A semiconductor device includes: a semiconductor body having an active region and a substrate region beneath the active region; a bidirectional switch having first and second gate structures configured to control a conductive state of a channel in the active region, and first and second input-output terminals electrically connected to the channel; and a passive discharge circuit in parallel with the bidirectional switch and configured to utilize a fraction of a voltage across the first and second input-output terminals to switch on a transistor device that electrically connects the substrate region to the input-output terminal at the lower potential during an off-state of the bidirectional switch and during ZVS (zero-voltage switching) transition periods.
H03K 17/56 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices
2.
SEMICONDUCTOR DEVICE HAVING GATE TRENCHES AND FIELD PLATE TRENCHES AND A METHOD OF FABRICATING THE SEMICONDUCTOR DEVICE
A semiconductor device includes: a plurality of transistor cells formed in a semiconductor body. The plurality of transistor cells includes: a plurality of stripe-shape gate trenches formed in a first main surface of the semiconductor body; and a plurality of field plate trenches separate from the stripe-shape gate trenches. At least one field plate trench is laterally interposed between each pair of neighboring stripe-shape gate trenches. Each stripe-shape gate trench includes a gate electrode, a gate dielectric between the gate electrode and a sidewall of the stripe-shape gate trench, and an oxide between the gate electrode and a bottom of the stripe-shape gate trench, the oxide having a vertical thickness that is greater than eight times a lateral thickness of the gate dielectric and/or greater than a vertical thickness of the gate electrode. A method of producing the semiconductor device is also described.
A system is provided that includes: at least one radio frequency (RF) electrode extending along a first direction, the at least one RF electrode configured to generate an RF field, where a first RF electrode of the least one RF electrode is disposed in a substrate, and a plurality of direct current (DC) electrodes that are spaced apart along at least the first direction, the plurality of DC electrodes configured to generate an electric field, where the RF field and the electric field are configured to trap an ion at a first position, the first position being spaced apart from the substrate by a first distance, where each DC electrode of the plurality of DC electrodes has a respective width in the first direction that is less or equal to 0.2 times the first distance.
A power supply controller is operative to: control switching of a first asymmetrical half bridge flyback power converter to supply first current from a secondary winding SW1 of the first asymmetrical half bridge flyback power converter during a first portion of a switch control cycle to produce an output voltage, the first asymmetrical half bridge flyback power converter operative to block the first current through the secondary winding SW1 during a second portion of the control cycle; and control switching of a second asymmetrical half bridge flyback power converter to supply second current from a secondary winding SW2 of the second asymmetrical half bridge flyback power converter during a second portion of the switch control cycle to produce the output voltage, the second asymmetrical half bridge flyback power converter operative to block the second current through the secondary winding SW2 during the first portion of the control cycle.
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
H02M 1/088 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
H02M 3/00 - Conversion of dc power input into dc power output
5.
Capacitive Coupling Compensation for Direct Current Electrodes in Ion Traps
An ion trap system and method of using an ion trap system, the system including a substrate, a radio frequency (RF) source configured to provide an RF signal, an RF electrode disposed in the substrate and connected to the RF source, a direct current (DC) source configured to provide a DC signal, a DC electrode disposed in the substrate and connected to the DC source, wherein the DC electrode is separate from the RF electrode, and a coupling compensation system configured to provide a compensating RF signal associated with the RF signal.
In an embodiment, a semiconductor device includes an edge termination region laterally surrounding an active area. The active area includes active transistor cells. The edge termination region includes one or more inactive cells, each including a first columnar trench and a first termination mesa arranged adjacent to the first columnar trench. Each first columnar trench includes a base, a side wall, a field plate, and a field dielectric arranged on the base and the side wall and surrounding the field plate. Each first termination mesa includes a drift region of a first conductivity type and a body region of a second conductivity type arranged above the drift region. Each field dielectric of the first columnar trenches has a first thickness in an upper region of the field plate and a second thickness in a lower region of the field plate, the first thickness being smaller than the second thickness.
A power converter is presented. The power converter may be configured to convert an input voltage into an output voltage. The power converter May comprise a switching bridge circuit. The power converter may comprise a transformer with primary windings, first secondary windings connected between a first transformer terminal and a second transformer terminal, and second secondary windings connected between the second transformer terminal and a third transformer terminal. The power converter may comprise a resonant tank circuit comprising the primary windings of the transformer. The power converter may comprise a buck power converter circuit coupled between the first secondary windings and an output of the power converter.
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
H02M 3/00 - Conversion of dc power input into dc power output
8.
POWER CONVERTER AND METHOD OF OPERATING A POWER CONVERTER
A power converter is provided. The power converter includes a transformer having a primary side winding and a secondary side winding, an oscillator circuit coupled to the primary side winding forming a resonant oscillator with the primary side winding and an output circuit coupled to the secondary side winding and configured to generate an output signal based on energy received from the secondary side winding. A secondary side controller is configured to transmit a control signal based on a controlled variable related to the output signal via the transformer to the primary side controller, and the primary side controller is configured to start or stop and oscillation of the resonant oscillator based on the control signal.
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
H02M 3/00 - Conversion of dc power input into dc power output
A molded package includes: a first semiconductor die embedded in a mold compound and including a normally-on bidirectional switch device having first and second normally-on gates and first source and second sources; a second semiconductor die embedded in the mold compound and including a first normally-off switch device having a normally-off gate, a source, and a drain; a third semiconductor die embedded in the mold compound and including a second normally-off switch device having a normally-off gate, a source, and a drain, the drain of the first normally-off switch device being electrically connected to the first source of the normally-on bidirectional switch device and the drain of the second normally-off switch device being electrically connected to the second source of the normally-on bidirectional switch device in a cascode configuration to form a bidirectional power switch; and an externally accessible source terminal electrically connected to each source of each switch device.
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
10.
POWER FACTOR CORRECTION SYSTEM, CONTROLLER AND METHOD OF CONTROLLING A POWER FACTOR CORRECTION SYSTEM
A multi-phase PFC (power factor correction) system, controller, and method of controlling the multi-phase PFC system are described. The method includes operating the phases under variable frequency control to interleave current delivered by the plurality of phases to a load. During a switching cycle for the phases, a phase synchronization correction indicator is activated if a predetermined crossing point along a rising or falling slope of the current delivered by a second phase is misaligned with the same predetermined crossing point along the opposite slope of the current delivered by a first phase. During the next switching cycle, a switching period of the second phase is adjusted if the phase synchronization correction indicator was activated during the previous switching cycle.
A transistor device includes: a plurality of transistor cells in a semiconductor substrate; and a source pad above the semiconductor substrate and electrically connected to a source region and a body region of the transistor cells. A first group of the transistor cells has a first body region average doping concentration. A second group of the transistor cells has a second body region average doping concentration higher than the first body region average doping concentration. The transistor cells of the first and second groups are interleaved. The transistor cells have a first source region density in a first area of the semiconductor substrate underneath a region of the source pad designated for clip contacting, and a second source region density lower than the first source region density in a second area of the semiconductor substrate outside the first area.
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
12.
GATE DRIVER SYSTEM FOR DETECTING A SHORT CIRCUIT CONDITION
A driver system includes a first half-bridge that generates a first load current at a first output node, a second half-bridge that generates a second load current at a second output node, a first voltage charging device coupled to the first output node, and a second voltage charging device coupled to the second output node. A method of detecting a short circuit condition in the driver system includes detecting a first charging time at which a first charging voltage of the first voltage charging device is charged to a first threshold voltage; detecting a second charging time at which a second charging voltage of the second voltage charging device is charged to a second threshold voltage; and detecting the short circuit condition on a condition that a time difference between the first charging time and the second charging time is less than a time difference threshold.
H03K 17/081 - Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
G01R 31/52 - Testing for short-circuits, leakage current or ground faults
H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
H02M 7/5387 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
H02P 27/08 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
A cryogenic system includes an ion trap device configured to be mounted on a trap socket. A magnetic radiation shield of a superconducting material surrounds an ion trap region of the ion trap device. The magnetic radiation shield forms part of the ion trap device and/or the trap socket. A magnet is enclosed by the magnetic radiation shield.
A power converter and a power conversion method are disclosed. The power converter includes a plurality of resonant converter stages (1a, 1b, 1c) each Including an input (Ina, Inb, Inc) and an output (Outa, Outb, Outc); a rectifier circuit (6); and a control circuit (7) configured to control operation of the plurality of resonant converter stages (1a, 1b, 1c). The input (Ina, Inb, Inc) of each of the plurality of converter stages (1a, 1b, 1c) is configured to receive a respective input voltage (Vina, Vinb, Vinc). The rectifier circuit (6) is connected to the outputs (Outa, Outb, Outc) of the plurality of converter stages (1a, 1b, 1c) and is configured to provide an output signal (Vout, Iout) based on a cascaded voltage that is dependent converter stage output voltages (Vseca, Vsecb, Vsecc) provided at the outputs (Outa, Outb, Outc) of the resonant converter stages (1a, 1b, 1c).
H02M 1/42 - Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
H02M 3/00 - Conversion of dc power input into dc power output
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
A control circuit (100) is provided, for controlling switching elements of a switched-mode power supply (10). The control circuit includes a control input (112), for receiving a pulse width modulated, PWM, control signal comprising a series of control pulses. The control circuit has a primary output (120), for controlling a primary switching element of the switched-mode power supply. Also provided are: a synchronous rectifier module (SR) incorporating the control circuit (100); and a switched mode power supply incorporating the synchronous rectifier module (SR).
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
A method of producing a semiconductor device includes providing a semiconductor die, providing a metal joining partner, forming a diffusion solderable region by an inkjet metal printing process, forming an assembly to include the diffusion solderable region in between the metal joining partner and the semiconductor die, and performing a diffusion soldering process that forms a soldered joint from the diffusion solderable region in between the semiconductor die and the metal joining partner.
A semiconductor device includes: a semiconductor substrate having a first main surface and a second main surface opposite the first main surface; and a trench structure extending into the semiconductor substrate from the first main surface. The trench structure includes: an upper section extending into the semiconductor substrate from the first main surface; a lower section at an opposite end of the trench structure as the upper section; a first intermediary section between the upper section and the lower section; a field plate in the upper section and dielectrically insulated from the semiconductor substrate; and a first dielectric material completely filling the lower section. The lower section, the upper section, and the first intermediary section have different geometries and/or different dielectric materials. Methods of producing the semiconductor device are also described.
A method of voltage regulation using a full bridge LLC converter includes: selecting a control mode for the full bridge LLC converter based on a nominal output voltage for the full bridge LLC converter, including selecting a first control mode if the nominal output voltage is a first voltage and selecting a second control mode if the nominal output voltage is a second voltage less than the first voltage; in the first control mode, operating the full bridge LLC converter as a full bridge under frequency control; and in the second control mode, operating a first half bridge of the full bridge LLC converter under frequency control and operating a second half bridge of the full bridge LLC converter under duty cycle control with valley switching.
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
19.
Method and Circuitry to Apply an Individual DC Offset to Electrodes on a Large-Scale Ion Trap Quantum Computer
A device includes a plurality of digital-to-analog converters (DACs), a multiplexer, a plurality of electrodes including a first electrode, and a plurality of direct current (DC) offset circuits including a first DC offset circuit. At least one of the plurality of electrodes is located along a lane for movement of an ion. The multiplexer has multiple inputs coupled to the plurality of DACs and multiple outputs including a first output. The first output is configured to provide a first voltage. The first DC offset circuit is coupled between the first output and the first electrode. The first DC offset circuit is configured to add a first DC offset voltage to either the first voltage or the first voltage amplified by a first gain. The first DC offset voltage is configurable.
A transistor arrangement includes a drift and drain region arranged in a semiconductor body and each connected to a drain node, a plurality of load transistor cells each comprising a source region integrated in a first region of the semiconductor body, a plurality of sense transistor cells each comprising a source region integrated in a second region of the semiconductor body, a first source node electrically connected to the source region of each of the plurality of the load transistor cells via a first source conductor, and a second source node electrically connected to the source region of each of the plurality of the sense transistor cells via a second source conductor, a resistance of the second source conductor is different from a resistance of the first source conductor, and the second source conductor comprises an elongated span with a plurality of meanders in which the connection line reverses its direction.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
Eidgenössische Technische Hochschule - ETH Zürich (Switzerland)
Universitat Innsbruck (Austria)
Inventor
Rössler, Clemens
Auchter, Silke
Stocker, Gerald
Sgouridis, Sokratis
Decaroli, Chiara
Home, Jonathan
Valentini, Marco
Colombe, Yves
Holz, Philip
Abstract
A device (100) for controlling trapped ions (180) includes a first semiconductor substrate (120) comprising a semiconductor and/or dielectric material. A first micro-fabricated electrode structure (125) is disposed at a main side of the first substrate (120). The device (100) further includes a second substrate (140) comprising a semiconductor and/or dielectric material. A second micro-fabricated electrode structure (145) is disposed at a main side of the second substrate (140) opposite the main side of the first substrate (120). A plurality of spacer members (160) is disposed between the first substrate (120) and the second substrate (140). At least one ion trap is configured to trap ions (180) in a space between the first substrate (120) and the second substrate (140). The first micro-fabricated electrode structure (125) and the second micro-fabricated electrode structure (145) comprise electrodes of the ion trap. A multi-layer metal interconnect (135) is formed on the first substrate (120) and electrically connected to the first micro-fabricated electrode structure (125).
In an exemplary embodiment, a semiconductor device includes a semiconductor substrate having a first major surface, one or more trenches formed in the first major surface and having a base and a side wall extending from the base to the first major surface, and a conductive member arranged in at least one trench of the one or more trenches. The conductive member is spaced apart from the base of the at least one trench by a lower isolating member and from the side wall of the at least one trench by an enclosed cavity located in the at least one trench. The conductive member has a lower face. A peripheral edge of the lower face of the conductive member is located in the cavity and a central portion of the lower face is in contact with the lower isolating member.
A transistor device includes a semiconductor substrate having a first major surface and one or more transistor cells. Each transistor cell includes a columnar trench formed in the substrate, a columnar field plate arranged in the columnar trench, and a mesa arranged around the columnar trench. The columnar trench includes a field dielectric, a base, and a side wall. The side wall extends from the base to the first major surface. The field dielectric lines the base and side wall. A first thickness of the field dielectric at a first distance from the base is smaller than a second thickness of the field dielectric at a second distance from the base, the first distance being greater than the second distance. A first perimeter of the columnar field plate at the first distance is greater than a second perimeter of the columnar field plate at the second distance.
A dual active bridge circuit includes a primary side circuit including first high-side transistor and a first low-side transistor electrically coupled at a first node, and an energy transfer inductor coupled to the first node and configured to provide an inductor current based on a voltage differential across the energy transfer inductor. A secondary side circuit includes a second high-side transistor and a second low-side transistor electrically coupled at a second node. A transformer is configured to transfer energy from the primary side circuit to the secondary side circuit based on the inductor current. A controller is configured to drive each of the transistors between respective switching states with a same duty cycle to control the voltage differential across the energy transfer inductor. The same duty cycle is less than 50% such that all of the transistors are simultaneously off for a predetermined interval.
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
25.
SEMICONDUCTOR DEVICE HAVING A DETACHABLE FOIL, POWER ELECTRONICS ARRANGEMENT, AND METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
A semiconductor device includes: at least one power semiconductor die; a substrate having a first side and an opposite second side, the at least one power semiconductor die being arranged over the first side; an encapsulation encapsulating the at least one power semiconductor die; a pre-cured lamination layer covering the second side of the substrate, the pre-cured lamination layer being exposed from the encapsulation and configured to provide electrical insulation for the substrate after curing; and a detachable foil covering the pre-cured lamination layer, the detachable foil being configured to be removed from the pre-cured lamination layer.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
B32B 3/04 - Layered products essentially comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar form; Layered products essentially having particular features of form characterised by features of form at particular places, e.g. in edge regions characterised by a layer folded at the edge, e.g. over another layer
B32B 7/06 - Interconnection of layers permitting easy separation
B32B 7/14 - Interconnection of layers using interposed adhesives or interposed materials with bonding properties applied in spaced arrangements, e.g. in stripes
B32B 15/04 - Layered products essentially comprising metal comprising metal as the main or only constituent of a layer, next to another layer of a specific substance
B32B 15/20 - Layered products essentially comprising metal comprising aluminium or copper
B32B 27/06 - Layered products essentially comprising synthetic resin as the main or only constituent of a layer next to another layer of a specific substance
B32B 37/12 - Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by using adhesives
B32B 37/18 - Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with all layers existing as coherent layers before laminating involving the assembly of discrete sheets or panels only
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
A power semiconductor device is proposed. The power semiconductor device includes a semiconductor substrate having first and second main surfaces arranged opposite to each other. The semiconductor substrate includes an insulated gate bipolar transistor area (IGBT) area including an IGBT, and a diode area including a diode. The diode area includes a cathode region of a first conductivity type and an auxiliary region of a second conductivity type both adjoining to the second main surface of the semiconductor substrate. The cathode region adjoins to the auxiliary region along a first lateral direction. The IGBT area includes a collector region of the second conductivity type at the second main surface of the substrate. The collector region includes a first collector sub-region and a second collector sub-region adjoining to each other along the first lateral direction. The first collector sub-region has a larger maximum doping concentration than the second collector sub-region.
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/07 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
A high-electron mobility transistor includes a semiconductor body includes a plurality of type III-nitride semiconductor layers stacked on top of one another, thereby forming a plurality of two-dimensional first charge type gas channels; source and drain electrodes that are laterally spaced apart from one another and in ohmic contact with each of the two-dimensional first charge type gas channels; a gate structure including a plurality of gate columns that extend into the semiconductor body and define gate fin portions of the semiconductor body, wherein the gate structure is configured to control a conductive connection between the source and drain electrodes by controlling a conductive state of each of the two-dimensional first charge type gas channels within the gate fin portions, and wherein the gate fin portions are doped with second conductivity type dopant atoms, thereby locally reducing a concentration of free first charge type carriers within the gate fin portions.
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
A semiconductor device includes a semiconductor substrate, a TiW layer arranged on the semiconductor substrate a Ti layer arranged on the TiW layer, a Ni alloy layer arranged on the Ti layer, and an Ag layer arranged on the Ni alloy layer, wherein the Ag layer and the Ni alloy layer comprise side faces fabricated by at least one wet etching process, and wherein the Ti layer and the TiW layer comprise side faces fabricated by a dry etching process.
A superjunction transistor device includes a drift region with a plurality of first regions of a first doping type and a plurality of second regions of a second type in a semiconductor body. The first regions and the second regions are arranged alternately in the semiconductor body. The second regions include wide regions having a first width and narrow regions having a second width. The wide regions and the narrow regions are arranged alternately. The first width is at least 1.05 times the second width.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 21/223 - Diffusion of impurity materials, e.g. doping materials, electrode materials, into, or out of, a semiconductor body, or between semiconductor regions; Redistribution of impurity materials, e.g. without introduction or removal of further dopant using diffusion into, or out of, a solid from or into a gaseous phase
H01L 21/225 - Diffusion of impurity materials, e.g. doping materials, electrode materials, into, or out of, a semiconductor body, or between semiconductor regions; Redistribution of impurity materials, e.g. without introduction or removal of further dopant using diffusion into, or out of, a solid from or into a solid phase, e.g. a doped oxide layer
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 29/167 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form further characterised by the doping material
A protection device includes a first protection stage comprising a first p-type transistor comprising a first terminal, a second terminal, and a first gate terminal. A first voltage regulating device is connected between the first terminal and the second terminal. A second voltage regulating device is connected between the first terminal and the first gate terminal. A third voltage regulating device is connected to the first gate terminal. A first current source is connected to the first gate terminal.
H02M 1/32 - Means for protecting converters other than by automatic disconnection
H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
A transformer arrangement is disclosed. The transformer arrangement includes: an electrically insulating carrier; a first integrated circuit including a first semiconductor die embedded in or arranged on top of the electrically insulating carrier; and a transformer including a first winding and a second winding that are inductively coupled. One of the first and second windings is connected to the first integrated circuit, and each of the first and second windings is embedded in or arranged on top of the electrically insulating carrier.
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/52 - Arrangements for conducting electric current within the device in operation from one component to another
H01L 23/58 - Structural electrical arrangements for semiconductor devices not otherwise provided for
H01L 27/01 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
The disclosure relates to a semiconductor die with a semiconductor body. The semiconductor die includes a vertical transistor device formed in a first area of the semiconductor body. The vertical transistor device includes a source region at a first side of the semiconductor body and a drain region at a second side of the semiconductor body. The semiconductor die further includes a first electrical isolation between the first area and a second area of the semiconductor body, and a diode in the second area of the semiconductor body. A cathode contact of the diode is electrically connected to the source region of the vertical transistor device.
H01L 23/528 - Layout of the interconnection structure
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
A control circuit, a signal conversion circuit and a control method are disclosed. The control circuit includes: a controller, which controls a load circuit according to a received input signal; and an enable module, which is connected to the controller and configured to enable the controller based on a frequency of the input signal. The controller is configured to be in an operational state to control the load circuit according to the input signal when the frequency is higher than a predetermined threshold.
A device for controlling trapped ions includes a first substrate and a second substrate spaced apart from the first substrate. The device further includes at least one ion trap configured to trap an ion in a space between the first substrate and the second substrate. DC electrodes of the ion trap are formed on the first substrate. RF electrodes of the ion trap are formed on the second substrate and not on the first substrate.
A semiconductor module includes a first metal layer, a ceramic layer applied on the first metal layer, a second metal layer applied at least in part on the ceramic layer, and a semiconductor die attached on a portion of the second metal layer. A method for fabricating the semiconductor module is also described.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 23/14 - Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
A power semiconductor package includes: a first power semiconductor die arranged on and electrically coupled to a first side of a first die pad; a first passive electronic component having a first end and an opposite second end, the first end being arranged on and coupled to the first side of the first die pad and the second end being coupled to an internal ledge of a first external contact; a second passive electronic component connected in series with the first passive electronic component; and an encapsulation encapsulating the first power semiconductor die and the first and second passive electronic components. The first external contact is exposed from a first lateral side of the encapsulation.
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
A device for controlling trapped ions includes a substrate. A metal layer is disposed over the substrate. An electrode of an ion trap is disposed over the metal layer, the electrode being configured to trap one or more ions in a space above the electrode. An electrical insulator is disposed between the metal layer and the electrode. The electrical insulator has an upper surface facing towards the electrode and a lower surface facing towards the metal layer. An etching rate of the electrical insulator increases along a direction pointing from the upper surface to the lower surface.
An isolated DC/DC converter includes: a transformer having a primary side and a secondary side; an inverter configured to change a DC input voltage (Vin) to an AC current for energizing the primary side of the transformer; a capacitor in series with the primary side of the transformer; and a controller configured to operate the inverter in a first mode such that the capacitor pre-charges to |Vin| before the controller receives a turn ON command, the capacitor charges to X*|Vin| during a first part of a first switching cycle after the controller receives the turn ON command where X>1, and the capacitor voltage resonates with a magnetizing inductance of the primary side of the transformer during a second part of the first switching cycle. A power electronics device that includes the isolated DC/DC converter is also described.
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 1/44 - Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
A voltage regulator module includes: a substrate having power input and output terminals; a power stage package mounted to the substrate and having first and second pads at a side facing away from the substrate, the power stage package configured to receive an input voltage from the power input terminal and output a phase current at the first pad; an inductor having a vertical conductor embedded in a magnetic core, the vertical conductor having a first end attached to the first pad of the power stage package and an opposite second end; and a metallic clip attached to each of the second end of the vertical conductor, the power output terminal, and the second pad of the power stage package. The second pad of the power stage package does not carry any of the phase current.
H01L 23/50 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements for integrated circuit devices
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 1/18 - Printed circuits structurally associated with non-printed electric components
A power transistor chip package includes a power transistor chip having a first load electrode on a first side, a second load electrode on a second (opposite) side, and a control electrode. The power transistor chip is disposed on a chip pad, with the first side facing the pad and the first load electrode electrically connected to the pad. An encapsulation body encapsulates the power transistor chip and includes a footprint side, a top (opposite) side, and side faces extending between the footprint and top sides. A first package load terminal is electrically connected to the first load electrode. Part I and part II second package load terminals are both electrically connected directly to the second load electrode. A package control terminal is electrically connected to the control electrode. The part I and part II second package load terminals are aligned with opposite sides faces of the encapsulation body.
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 25/11 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
41.
Multi-Channel High Electron Mobility Transistor with Reduced Input Capacitance
A high-electron mobility transistor includes a semiconductor body including a plurality of type III-nitride semiconductor layers stacked on top of one another, thereby forming a plurality of two-dimensional first charge type gas channels and at least one two-dimensional second charge type gas channel vertically in between two of the two-dimensional first charge type gas channel, source and drain electrodes that are laterally spaced apart from one another and in ohmic contact with the plurality of two-dimensional first charge type gas channel, a gate structure configured to control a conductive connection between the source and drain electrodes by controlling a conductive state of the plurality of two-dimensional first charge type gas channels, and a charge dissipation structure that is configured to remove second charge type carriers from the two-dimensional second charge type gas channel during an off-state of the high-electron mobility transistor.
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
An apparatus (such as a power converter circuit) includes s primary winding, an auxiliary winding, and an over-load protection circuit (such as a controller and corresponding one or more circuit components). A secondary winding is magnetically coupled to the primary winding and the second auxiliary winding. The controller controls input current through the primary winding of the transformer to produce an output voltage from the secondary winding. The controller monitors a magnitude of an auxiliary voltage received from the auxiliary winding magnetically coupled to the primary winding. The controller detects an overload condition associated with the output voltage based on the magnitude of the auxiliary voltage received from the auxiliary winding. In response to detecting the overload condition, the controller can be configured to reduce a magnitude of the input current inputted to the primary winding, preventing damage to the power converter circuit and corresponding circuitry.
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 1/32 - Means for protecting converters other than by automatic disconnection
H02M 1/42 - Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
43.
HIGH VOLTAGE SEMICONDUCTOR DEVICE WITH DATA TRANSMISSION FROM A HIGH VOLTAGE DOMAIN TO A LOW VOLTAGE DOMAIN
A gate driver circuit includes a low side part and a high side part. The low side part outputs a first gate drive signal between a first gate output and a first reference potential. The high side part generates a high side data signal and outputs a second gate drive signal between a second gate output and a second reference potential. A p-channel junction field effect transistor structure passes the high side data signal to the low side part.
H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
44.
CHIP-TO-CHIP STACKING BY USE OF NICKEL TIN METALLIZATION STACKS AND DIFFUSION SOLDERING
A method for fabricating a semiconductor device includes: providing a substrate layer stack including a substrate with a metallic upper surface, a first Ni containing layer disposed on the substrate, and a first Sn layer on the first Ni containing layer; depositing a first semiconductor layer stack on the first Sn layer and that includes a first NiP layer, a first semiconductor die disposed on the first NiP layer, and a second NiP layer disposed on the first semiconductor die; depositing a second semiconductor layer stack on the first semiconductor layer stack and that includes a second Sn layer, a second Ni containing layer disposed on the second Sn layer, and a second semiconductor die disposed on the second Ni containing layer; and performing a diffusion soldering process for connecting the first semiconductor layer stack to the substrate and the second semiconductor layer stack to the first semiconductor layer stack.
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 23/14 - Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
45.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
A semiconductor device is provided. The semiconductor device includes a substrate and an isolation region at a first main surface of the substrate. The isolation region includes a lower portion and an upper portion that protrudes from the lower portion. The semiconductor device further includes a charge shielding layer over at least a part of the upper portion of the isolation region. An edge of the charge shielding layer has a sidewall which slopes inward at a first angle of equal to or less than 50 degrees. The semiconductor device further includes a metal barrier layer over at least a part of the charge shielding layer and over at least a part of the lower portion of the isolation region. A method of manufacturing the semiconductor device is also described.
A power distribution system as discussed herein includes one or more interconnected power converters. Each of the one or more power converters in the power distribution system is operative to: receive a respective input voltage; via a closed loop regulation, convert the respective input voltage into a respective output voltage; and dynamically adjust a magnitude of a respective setpoint reference voltage of regulating a magnitude of the respective output voltage based on: i) a magnitude of the respective input voltage, and ii) a magnitude of respective output current supplied by the respective output voltage. Based on analysis of operational parameters such as sample output voltage of the one or more power converters, an analyzer resource determines occurrence of one or more anomaly conditions.
H02J 13/00 - Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network
H02M 3/155 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
47.
INTEGRATED CIRCUIT TRANSFORMER WITH CONCENTRIC WINDINGS AND MAGNETICALLY ACTIVE MATERIAL
A multi-voltage domain device includes a circuit substrate comprising a first region comprising first circuitry, a second region comprising second circuitry, and an isolation region that electrically isolates the first region and the second region; a stack insulator layer arranged on the circuit substrate; a first coil arranged in the stack insulator layer and electrically coupled to the first circuitry; a second coil arranged in the stack insulator layer and electrically coupled to the second circuitry and magnetically coupled to the first coil; and a field concentrating structure arranged on the circuit substrate. The field concentrating structure is configured to attract a first magnetic field produced by the first coil such that the first magnetic field is concentrated about the first coil, and attract a second magnetic field produced by the second coil such that the second magnetic field is concentrated about the second coil.
Disclosed is a method and apparatus. The method comprises generating an alternating voltage (Vmn) based on three alternating input voltages (Va, Vb, Vc) received at an input (a, b, c) of a power converter, wherein generating the alternating intermediate voltage (Vmn) comprises controlling waveforms of three input currents (Ia, Ib, Ic) received at the input (a, b, c) dependent on waveforms of the three alternating input voltages (Va, Vb, Vc).
H02M 1/084 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters using a control circuit common to several phases of a multi-phase system
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
H02M 1/42 - Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
49.
CRYOSTAT SOCKET FOR HOLDING AN ION TRAP DEVICE MOUNTED ON A SUBSTRATE IN A CRYOSTAT
A cryostat socket for holding an ion trap device mounted on a substrate in a cryostat includes a frame having a heat removal surface configured to be thermally coupled to a laterally outer region of the device carrier. The cryostat socket further includes a cover configured to exert a compressive force on the front side of the device carrier when assembled with the frame, by which the rear side of the device carrier is thermally coupled to the heat removal surface.
The disclosure relates to a semiconductor die that includes a vertical transistor device having a gate electrode in a gate trench, and a MOS gated diode (MGD) having an MGD gate electrode in an MGD trench. The gate trench of the vertical transistor device has an elongated extension in a first lateral direction. The vertical transistor device and the MGD are arranged consecutively in the first lateral direction.
A method of fabricating a Group III nitride layer on a substrate includes placing a substrate having a growth surface in a chamber of an apparatus configured for MOPVE (Metal Organic Vapour Phase Epitaxy) processing. A nitrogen-containing gas and no Group III element-containing gas is then supplied for a first time period. After expiry of the first time period, the supply of the nitrogen-containing gas is stopped. A Group III element-containing gas and no nitrogen-containing gas is then supplied to the apparatus for a second time period. After expiry of the second time period, the supply of the Group III element-containing gas to the apparatus is stopped for a third time period. After expiry of the third time period, the Group III element-containing gas and the nitrogen-containing gas is supplied to the apparatus and a Group III nitride layer is formed on the growth surface of the substrate.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
52.
SEMICONDUCTOR DEVICE HAVING SILICON PLUGS FOR TRENCH AND/OR MESA SEGMENTATION
A semiconductor device includes: a silicon layer having a frontside and an electrically insulated backside; a first trench extending through the silicon layer from the frontside to the electrically insulated backside and laterally isolating a first region of the silicon layer; an electrically conductive material in the first trench; a dielectric material separating the electrically conductive material from silicon material of the silicon layer; and a plurality of silicon plugs laterally surrounded by the dielectric material and dividing the electrically conductive material into a plurality of separate segments in the first trench. Additional embodiments of semiconductor devices and methods for manufacturing the semiconductor devices are also described.
An integrated circuit is presented. The integrated circuit includes a first terminal, a second terminal, a control terminal, a current monitor terminal, a power transistor coupled between the first terminal and the second terminal, and a replica transistor coupled between the first terminal and the current monitor terminal. The integrated circuit is configured to control a current between the first terminal and the second terminal based on a control signal applied to the control terminal. The integrated circuit is further configured to provide, at the current monitor terminal, a current monitor signal indicative of a value of the current.
In accordance with an embodiment, a method includes switching on a transistor device by generating a first conducting channel by driving a first gate electrode and, before generating the first conducting channel, generating a second conducting channel by driving a second gate electrode, wherein the second gate electrode is adjacent the first gate electrode in a current flow direction of the transistor device.
H03K 17/567 - Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
55.
A SEMICONDUCTOR TRANSISTOR PACKAGE HAVING ELECTRICAL CONTACT LAYERS AND A METHOD FOR FABRICATING THE SAME
A method for fabricating a semiconductor package includes: providing a die carrier; disposing a semiconductor die on the die carrier, the semiconductor die having one or more contact pads on a first main face thereof; applying an encapsulant at least partially to the semiconductor die, the encapsulant embedding at least one electrical connector, the electrical connector being connected with a contact pad or with the die carrier and extending to a main face of the encapsulant; and depositing at least one electrical layer onto the main face of the encapsulant and an exposed end of the at least one electrical connector.
In an exemplary embodiment, a semiconductor device includes: a semiconductor substrate having a first major surface; a trench positioned in the semiconductor substrate and having a width, a base, and a side wall extending from the base to the first major surface; a first electrically insulating layer that lines the base and the side wall of the trench; and an electrically insulating plug that is positioned in the trench and that extends across the entire width of the trench. The plug has a lower surface that forms an interface with the first electrically insulating layer and an upper surface. The upper surface of the plug is coplanar with the first major surface of the semiconductor substrate or positioned within the trench.
A power switch assembly includes a power switch, a driving circuit configured to control the power switch, a protection device associated with a first current duration and a first current value and arranged between the driving circuit and the power switch, the protection device being configured to decouple the driving circuit from the power switch based on the first current duration and the first current value, and a clamping device associated with a second current duration and a second current value and arranged between the driving circuit, the protection device and the power switch, the clamping device being configured to couple the power switch to a second assembly load terminal of the power switch assembly based on the second current duration and the second current value. The first current duration is longer than the second current duration. The first current value is lower than the second current value.
The present document relates to overcurrent protection methods and devices. In particular, the present document relates to overcurrent protection methods and devices for gate drivers which are receiving short pulse width modulation (PWM) pulses. In particular, a method of detecting an overcurrent in a switched mode power supply comprising a high side switching element and a low side switching element is described. The method may comprise sensing, in a first mode of operation, during a first sensing time interval when the low side switching element is turned on, a first current indicative of a load current. The method may comprise detecting an overcurrent condition if the first current exceeds a first threshold value.
H02M 1/32 - Means for protecting converters other than by automatic disconnection
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
59.
Power Module with Semiconductor Packages Mounted on Metal Frame
A power module includes a metal frame a metal frame having first and second device attach pads, first and second semiconductor packages each having an encapsulant body and a plurality of leads protruding out from the encapsulant body, and a potting compound that encapsulates both of the first and second semiconductor packages, wherein the first semiconductor package is mounted on the first device attach pad, wherein the second semiconductor package is mounted on the second device attach pad, and wherein terminals from each of the first and second semiconductor packages are electrically accessible from outside of the potting compound.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
60.
CONTROLLER FOR RESONANT POWER CONVERTER, RESONANT POWER CONVERTER AND METHOD OF OPERATING A RESONANT POWER CONVERTER
A controller for a resonant power converter is provided, comprising a control logic configured to control a high side switch and a low side switch of the power converter during normal operation, terminate normal operation in response to determining an exception condition, and after terminating normal operation, control one of the high side switch or low side switch to close for at least one time period to discharge a resonant capacitor of the power converter. Corresponding resonant power converters are also provided, as well as methods of operating such power converters.
H02M 3/00 - Conversion of dc power input into dc power output
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
61.
Methods for Manufacturing a Semiconductor Package and a Semiconductor Module
A method for manufacturing a semiconductor package includes: providing a leadframe having component positions each of which includes a die pad; providing semiconductor dies each having a first power electrode on a first main surface and a second power electrode on a second main surface; mounting a respective semiconductor die onto the die pad of a respective component position of the leadframe such that the first power electrode is attached to the die pad; mounting a clip onto the dies such that the clip is attached to a respective second power electrode; embedding at least the side faces of the dies and inner surfaces of the leadframe and clip in a mold compound to form a subassembly; and cutting through the clip and leadframe at positions between neighbouring component positions.
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
62.
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE INCLUDING AN EMBEDDED SEMICONDUCTOR DIE
A method for fabricating a semiconductor device includes: providing a die carrier; disposing a semiconductor die on a main face of the die carrier, the semiconductor die having one or more contact pads; applying an encapsulant at least partially to the semiconductor die and at least a portion of the main face of the die carrier; applying an insulation layer to the encapsulant; and fabricating electrical interconnects by forming openings into the encapsulant and the insulation layer and filling a conductive material into the openings. Additional methods for fabricating a semiconductor device are described.
H01L 23/485 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
H01L 23/14 - Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
A semiconductor device includes: a semiconductor body having an active region and a substrate region beneath the active region; a bidirectional switch having first and second gate structures configured to control a conductive state of a channel in the active region, and first and second input-output terminals electrically connected to the channel; and a passive discharge circuit in parallel with the bidirectional switch and configured to utilize a fraction of a voltage across the first and second input-output terminals to switch on a transistor device that electrically connects the substrate region to the input-output terminal at the lower potential during an off-state of the bidirectional switch and during ZVS (zero-voltage switching) transition periods.
H03K 17/56 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices
64.
DEVICE FOR CONTROLLING TRAPPED IONS WITH AN ELECTRODE LAYER OF LOW SURFACE ROUGHNESS
A micro-fabricated device for controlling trapped ions includes a substrate. A structured electrode layer is disposed over the substrate. The structured electrode layer forms a plurality of electrodes of an ion trap configured to trap ions in a space above the structured electrode layer. The structured electrode layer is formed of a multilayer stack. The multilayer stack includes an electrically conductive smoothing layer having a planarized surface and an electrically conductive top layer disposed over the planarized surface of the smoothing layer. The top layer provides an exposed surface of the structured electrode layer, the exposed surface having a mean surface roughness equal to or less than Ra=5 nm.
An electronic circuit and a method are disclosed. The electronic circuit includes: a first transistor device having a first drive node, a second drive node, and a load path; and a protection circuit coupled to the first and second drive nodes and the load path of the first transistor device. The protection circuit includes a second transistor device having a first drive node, a second drive node, and a load path connected between the first and second drive nodes of the first transistor device, and a capacitor coupled between the load path of the first transistor device and the first drive node of the second transistor device. A capacitance of the capacitor is voltage dependent such that the capacitance decreases as a voltage across the capacitor increases.
H03K 17/081 - Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/94 - Metal-insulator-semiconductors, e.g. MOS
A converter includes an input terminal, an output terminal, a rectifier connected between the input terminal and the output terminal, a first switch, a second switch connected to the output terminal and connected in series with the first switch at a first node, and a first leg having a first capacitor coupled to the first node, and a first isolation switch connected between the first capacitor and the rectifier.
H02M 3/06 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
H02M 3/00 - Conversion of dc power input into dc power output
An apparatus and method as discussed herein includes a heat sink element fabricated from electrically conductive material. A first element of electrically conductive material may be fixedly connected to the heat sink element. A second element of electrically conductive material may be fixedly connected to the heat sink element. The first element and the second element may extend substantially orthogonal from a surface of the heat sink element.
H01F 27/22 - Cooling by heat conduction through solid or powdered fillings
H01F 41/02 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets
68.
SEMICONDUCTOR PACKAGE IN A SOURCE-DOWN CONFIGURATION BY USE OF VERTICAL CONNECTORS
A semiconductor package includes: a leadframe having a die carrier and at least one first lead connected with the die carrier; a semiconductor transistor die connected with the die carrier and having a first surface and a second surface opposite to the first surface, a source pad disposed on the first surface, and a drain pad disposed on the second surface, the first surface facing a bottom side of the semiconductor package and the second surface facing a top side of the package; and a clip. The source pad is connected with the clip by at least one electrical connector.
A micro-fabricated device for controlling trapped ions includes a first substrate having a main surface. A structured first metal layer is disposed over the main surface of the first substrate. The structured first metal layer includes electrodes of at least one ion trapping zone configured to trap an ion in a space above the structured first metal layer. A dielectric element is fixedly attached to the first substrate. The dielectric element includes at least one laser light path and a surface covered with a layer. The layer is an electrically conductive layer. The layer is optically transparent for the laser light. The layer is arranged between the at least one laser light path and the at least one ion trapping zone.
A micro-fabricated device for controlling trapped ions includes a substrate of a dielectric material or a semiconductor material. A structured electrode layer is disposed above the substrate. The structured electrode layer forms a plurality of electrodes of an ion trap configured to trap ions in a space above the structured electrode layer. The structured electrode layer includes a low phonon density of states layer, referred to as low-PDOS layer, the low-PDOS layer being of TiN or TiW or Ti or W and having a thickness of equal to or greater than 100 nm.
The disclosure relates to a semiconductor die (1), comprising a vertical power transistor device (2), the vertical power transistor device having a source region (3) and a drain region (4) at opposite sides of a semiconductor body (10), and a lateral transistor device (20), the lateral transistor device having a body region (221) with a lateral channel region (221.1), as well as a source and a drain region formed at a frontside of the semiconductor body, wherein a deep trench (305) is arranged laterally between the vertical power transistor device (2) and the lateral transistor device (20), forming a deep trench isolation (306).
H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
A reverse conducting insulated gate bipolar transistor (RC-IGBT) includes an active area in a semiconductor body. The active area includes an IGBT area, a diode area, a transition area laterally adjacent to the diode area, trenches extending into the semiconductor body from a first surface of the semiconductor body, and a drift region of a first conductivity type that includes lifetime killing impurities in the transition area. The active area further includes a barrier region of the first conductivity type between the drift region and the first surface. A maximum doping concentration in the barrier region is at least 100 times larger than an average doping concentration in the drift region. The barrier region laterally extends through at least part of the transition area, and laterally ends in or before the diode area. The RC-IGBT further includes an edge termination area at least partly surrounding the active area.
H01L 27/07 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
73.
TRANSISTOR DEVICE AND METHOD OF FABRICATING CONTACTS TO A SEMICONDUCTOR SUBSTRATE
A transistor includes a semiconductor substrate having a first and second opposing major surfaces, a drain region of a first conductivity type at the second surface, a drift region of the first conductivity on the drain region, a body region of a second conductivity type that opposes the first conductivity type on the drift region, and a source region of a first conductivity type on and/or in the body region. A trench formed in the first surface has a base and sidewalls. A gate electrode in the trench is electrically insulated from the semiconductor substrate by a gate insulating layer. A field plate in the trench under the gate electrode is electrically insulated from the gate electrode and the semiconductor substrate by a field insulator. The base of the trench is positioned at a depth d from the first major surface, where 250 nm≤d≤800 nm.
An apparatus as discussed herein can be configured to include a first bridge circuit operative to receive an input voltage supplied by an input voltage source. An inductor in the apparatus also receives the input voltage. The apparatus can be configured to include a second bridge circuit. The inductor provides coupling of the input voltage source to the second bridge circuit. The second bridge circuit produces an output voltage to power a load.
H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
75.
MULTI-LAYER POWER TRANSFORMER WITH IMPROVED AC AND DC RESISTANCE
A multi-layer power converter assembly includes a transformer in which a secondary winding is magnetically coupled to a primary winding of the transformer. The multi-layer power converter assembly further includes an intermediary layer such as including a substrate disposed between the primary winding and the secondary winding. A circuit (such as one or more circuit components) disposed in the intermediary layer is coupled between a first node of the secondary winding and a second node of the secondary winding. The novel power converter assembly as discussed herein provides new degrees of freedom with respect to placing secondary side windings, paralleling them, and reducing hence AC and DC resistances in a respective power converter assembly. The power converter assembly supports more power dense transformers through vertical integration rather than spreading into the x-y plane through matrix transformer constructions.
H01F 27/30 - Fastening or clamping coils, windings, or parts thereof together; Fastening or mounting coils or windings on core, casing, or other support
76.
CIRCUIT, FAN SYSTEM, AND TRANSFORMER FOR POWER CONVERSION
Disclosed are a circuit, a fan system, and a transformer for power conversion. The circuit for power conversion includes: a voltage input terminal including a positive input terminal and a negative input terminal; a transformer, a first end of the primary side of the transformer being coupled to the positive input terminal and a second end thereof being coupled to the negative input terminal; a switch, a first end of which being coupled to the negative input terminal and a second end of which being coupled to the second end of the primary side; a first output terminal; and a secondary-side rectifier module coupled between the secondary side of the transformer and the first output terminal, for outputting, at the first output terminal, an output signal with superimposed direct current and alternating current.
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
A method includes providing a semiconductor body including a plurality of two-dimensional charge carrier gas channels, forming a gate fin by forming a pair of gate trenches in an upper surface of the semiconductor body, the pair of gate trenches exposing each one of two-dimensional charge carrier gas channels, providing source and drain contacts that are electrically connected to each one of the plurality of two-dimensional charge carrier gas channels, providing a gate structure that is configured to control a conductive connection between the source and drain contacts, wherein providing the gate structure includes forming a layer of doped type III-nitride semiconductor material that covers the gate fin and extends into the gate trenches, and forming a conductive gate electrode on top of the layer of doped type III-nitride semiconductor material.
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/205 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds in different semiconductor regions
A power supply includes a first power converter stage and a second power converter stage. The first power converter stage includes a first transformer winding; the second power converter stage includes a second transformer winding. The first power converter stage converts an input voltage into an intermediate voltage. The second power converter stage converts the intermediate voltage into first current contributing to generation of the output voltage. A circuit path in the power supply provides coupling of the first transformer winding in the first power converter to the second winding in the second power converter stage. Series connectivity of the first winding and the second winding provided by the circuit path creates a trans-inductance path between the first power converter stage and the second power converter stage.
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
An apparatus such as a power converter includes: a first capacitor; a second capacitor; a network of switches operative to control generation of an output voltage via: i) resonance of the first capacitor and a first transformer winding supplying first current to an output node of the power converter, and ii) resonance of the second capacitor and a second transformer winding supplying second current to an output node of the power converter. The first current may be substantially equal to the second current. The power converter may include additional windings in which other currents are substantially equal.
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 3/00 - Conversion of dc power input into dc power output
80.
POWER CONVERTER/TRANSFORMER ASSEMBLY AND CURRENT BALANCE
An apparatus such as a power converter includes a transformer assembly, a first series circuit path, and a second series circuit path. The transformer assembly includes multiple windings such as a first winding and a second winding. The first series circuit path includes a first circuit component disposed in series with a first winding of the multiple windings; the second series circuit path including a second circuit component disposed in series with a second winding of the multiple windings. The first series circuit path is connected in parallel with the second series circuit path.
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
A device for trapping ions includes: a substrate having a metal layer structure; and at least one ion trap configured to trap ions in a space over the substrate. The metal layer structure is a multi-layer metal structure that includes: a top metal layer having one or more electrodes forming part of the at least one ion trap; a redistribution metal layer having wiring for connecting the one or more electrodes; a first insulating layer arranged between the top metal layer and the redistribution layer and having one or more voids; and one or more connection elements arranged in the one or more voids that connect the wiring from the redistribution metal layer with the one or more electrodes in the top metal layer.
An ion shuttling system includes a plurality of first electrodes connected to a system configured to selectively provide an ion movement control voltage to each electrode of the plurality of first electrodes, a voltage source configured to provide one or more compensation voltages, a plurality of compensation electrodes comprising a plurality of compensation electrode pairs, where each compensation electrode pair of the plurality of compensation electrode pairs is associated with one or more different first electrodes of the plurality of first electrodes, and a plurality of switches, where each switch of the plurality of switches is connected at a respective first node to a compensation electrode of the plurality of compensation electrodes and is configured to selectively connect the respective compensation electrode to the voltage source.
A method of manufacturing an electronic module assembly includes forming the electronic module assembly, wherein the electronic module assembly comprises a plurality of internal exposed surfaces, a plurality of external exposed surfaces, at least one internal cavity, and an internal heat source configured to generate heat internally within the electronic module assembly; dipping the electronic module assembly into a thermally conductive material to coat the plurality of internal exposed surfaces and the plurality of external exposed surfaces and to at least partially fill the at least one internal cavity; and curing the thermally conductive material formed on the plurality of internal exposed surfaces and the plurality of external exposed surfaces and filled within the at least one internal cavity to form a thermally conductive layer, wherein the thermally conductive layer is formed as a one-piece integral member.
H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
The application relates to co-packaged controlled overcurrent handling of a power switch assembly. The power switch assembly includes a power switch and an overcurrent handling logic. The overcurrent handling logic includes an overcurrent detection circuit configured to detect an overcurrent condition of a load current of the power switch and to provide an overcurrent detection signal indicative of an overcurrent condition of the load current of the power switch and a discharge current generation circuit coupled to the overcurrent detection circuit, and configured to generate a discharge current to at least partially discharge a control terminal of the power switch responsive to the overcurrent detection signal.
H03K 17/082 - Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
H02H 9/02 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
85.
SEMICONDUCTOR PACKAGE INCLUDING A HIGH VOLTAGE SEMICONDUCTOR DIE AND A GATE DRIVER SEMICONDUCTOR DIE, AND METHOD OF PRODUCING THE SEMICONDUCTOR PACKAGE
A semiconductor package includes a substrate, a high voltage semiconductor die attached to an electrically conductive part of the substrate, and a gate driver semiconductor die attached, by an electrically insulative die attach material, to the electrically conductive part of the substrate or to a side of the high voltage semiconductor die that faces away from the substrate. The gate driver semiconductor die includes a semiconductor body and a polymer material covering a backside of the semiconductor body. The polymer material is interposed between the semiconductor body and the die attach material such that the semiconductor body is electrically insulated from the substrate or the side of the high voltage semiconductor die that faces away from the substrate by an insulator stack that includes both the polymer material and the die attach material. A method of producing the semiconductor package also is described.
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
A system for trapping an ion, including one or more lane elements in a substrate, one or more direct current (DC) elements in the substrate and connected to an electrode controller, one or more radio frequency (RF) electrodes, an RF controller connected to the one or more RF electrodes and configured to provide an RF signal to the one or more RF electrodes, one or more magnetic coils each having a portion associated with at least a portion of a DC element of the one or more DC elements and configured to be superconductive below a critical superconducting temperature, and a magnetic coil controller connected to each magnetic coil of the one or more magnetic coils, where the magnetic coil controller is configured to control the superconductivity and the magnetic flux of each magnetic coil of the one or more magnetic coils in relation to a source magnetic field.
A GaN (gallium nitride) die comprises: a first current sense terminal; a second current sense terminal; a main GaN power transistor; a GaN current sense transistor having a source electrically connected to a source of the main GaN power transistor; a diode device electrically connected in series between a drain of the main GaN power transistor and a drain of the GaN current sense transistor; a first voltage protection device electrically connecting the drain of the main GaN power transistor to the first sense terminal; and a second voltage protection device electrically connecting the drain of the GaN current sense transistor to the second sense terminal. A power electronics device that includes the GaN die is also described.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/812 - Field-effect transistors with field effect produced by a PN or other rectifying junction gate with a Schottky gate
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 1/32 - Means for protecting converters other than by automatic disconnection
Current sense circuitry includes: a current mirror circuit for sensing a power transistor current; a capacitor directly connected to the current mirror circuit at a first node; and a comparator circuit having a first input electrically connected to an input terminal of the current mirror circuit, a second input electrically connected to a drain or source terminal of the power transistor, and an output that is in a first state when a voltage at the first input is higher than a voltage at the second input and in a second state when the voltage at the first input is lower than the voltage at the second input. Current is sourced to the first node if the power transistor is on and the comparator output is in the second state, and sunk from the first node if the power transistor is on and the comparator output is in the first state.
G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 1/32 - Means for protecting converters other than by automatic disconnection
89.
SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THEREOF
The application refers to a semiconductor device including: a semiconductor body having a first surface and a second surface; an active region having at least one semiconductor cell configured to conduct a load current between the first surface and the second surface; an edge termination region separating the active region from a chip edge; and a first layer within at least a part of the edge termination region. The first layer includes silicon, nitrogen and hydrogen. In atomic numbers, a ratio of the silicon to the nitrogen is at least 3.3 to 4 in at least a portion of the first layer. At least the portion of the first layer includes at most 16 percent hydrogen in atomic numbers.
An electronic module includes a semiconductor package including a die carrier, a semiconductor transistor die disposed on the die carrier, an electrical conductor connected to the semiconductor die, and an encapsulant covering the die carrier, the semiconductor die, and the electrical conductor so that a portion of the electrical conductor extends to the outside of the encapsulant. The electronic module further includes an interposer layer on which the semiconductor package is disposed, and a heat sink through which a cooling medium can flow. The interposer layer is disposed on the heatsink.
H01L 23/473 - Arrangements for cooling, heating, ventilating or temperature compensation involving the transfer of heat by flowing fluids by flowing liquids
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
91.
SEMICONDUCTOR DEVICE AND CORRESPONDING METHODS OF MANUFACTURE
A semiconductor device includes a contact opening extending through a source region and at least into a body region formed in a semiconductor substrate. The contact opening forms at least one sidewall in the semiconductor substrate. An electrically insulative spacer partially covers the at least one sidewall. A contact plug is in the contact opening. A body contact region is formed in the semiconductor substrate adjacent a bottom of the contact opening.
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
A semiconductor device includes: a semiconductor substrate; a plurality of transistors cells in an active device region of the semiconductor substrate, each transistor cell having a gate electrode separated from the semiconductor substrate by a gate dielectric; a plurality of needle-shaped field plate trenches in the active device region and in a termination region of the semiconductor substrate that is devoid of fully functional transistor cells; a polysilicon layer that forms the gate electrodes in the active device region and extends over at least part of the termination region; and a shielding layer that separates the polysilicon layer from the semiconductor substrate in the termination region, the shielding layer having a higher dielectric strength than just the gate dielectric. A method of producing the semiconductor device is also described.
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/528 - Layout of the interconnection structure
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
93.
APPARATUS WITH ELECTRICALLY COUPLED OUTPUT INDUCTORS
An apparatus is configured according to a transformer based step down topology is provided. The apparatus includes a first transformer that transfers energy from a primary side of the first transformer to a secondary side of the first transformer for driving a load at the secondary side. The apparatus includes a first inductor and a second inductor electrically coupled at the secondary side. The apparatus includes a primary side directional conducting element and a secondary side directional conducting element configured to perform a first phase of transferring the energy through the first inductor and a second phase of transferring the energy through the second inductor. The first inductor induces the second inductor to transfer energy during the first phase and the second inductor induces the first inductor to transfer energy during the second phase.
H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
94.
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE PACKAGE COMPRISING A PIN IN THE FORM OF A DRILLING SCREW
A method of fabricating a semiconductor device package includes: providing a die carrier; disposing at least one semiconductor die on the die carrier, the semiconductor die comprising at least one contact pad on a main face remote from the carrier; electrically connecting the semiconductor die or another electrical device with an electrical connector; applying an encapsulant above the semiconductor die, the die carrier, and the electrical connector; and screwing a metallic drilling screw through the encapsulant so that an end of the drilling screw contacts the electrical connector.
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
95.
GATE DRIVER DEVICE HAVING A DRIVER CIRCUIT FOR SUPPLYING A BACKGATE DRIVE SIGNAL
A gate driver device includes a first field effect transistor and a first driver circuit. The first field effect transistor includes a first gate electrode and a first backgate structure. The first driver circuit supplies a first backgate drive signal to the first backgate structure.
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
An apparatus includes a controller that measures a first voltage across a first circuit path including a series connection of a first switch and a shunt resistor. The first voltage generated based on first current supplied from a first winding of a motor including multiple windings. Based on the magnitude of the first voltage, the controller determines an ON-resistance of the first switch. The ON-resistance can be used final office action any suitable purpose. For example, the controller can be configured to use the determined ON-resistance of the first switch to controller operation of a motor including the first winding. For example, the determined ON-resistance can be used as a basis to determine an amount of current through first switch and corresponding first winding of the motor.
A semiconductor package includes a semiconductor die thermally coupled to a planar metal pad, an encapsulant body that encapsulates the semiconductor die and includes a recess that extends from an outer upper side of the encapsulant body towards a rear side of the planar metal pad, and an insert arranged within the recess that is thermally coupled to the planar metal pad and extends to the outer upper side of the encapsulant body, wherein the insert that is arranged within the recess includes a curable polymer compound.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
A power semiconductor device includes: a main power switch having a drain, source, and gate; and a voltage clamp circuit in parallel with the main power switch and having a clamp voltage less than a breakdown voltage of the main power switch. The voltage clamp circuit includes: a pulldown switch having a normally-on gate electrically connected to the source of the main power switch; a plurality of series-connected diodes electrically connected between the drain of the main power switch and a drain of the pulldown switch; a voltage clamp device electrically connected between a source of the pulldown switch and the source of the main power switch; and a second power switch having a normally-off gate electrically connected to the drain of the pulldown switch, a drain electrically connected to the drain of the main power switch, and a source electrically connected to the source of the pulldown switch.
H03K 17/08 - Modifications for protecting switching circuit against overcurrent or overvoltage
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
A power converter includes: a solid-state transformer having a DC input and isolated DC outputs; a half bridge converter stage for each isolated DC output of the solid-state transformer, wherein an input of each half bridge converter stage is connected to the corresponding isolated DC output and an output of the half bridge converter stages are electrically connected in a cascade configuration; an output inductor shared by the half bridge converter stages and configured to deliver an output current; and a controller configured to implement phase shift control of the half bridge converter stages relative to one another, based on the number of half bridge converter stages and an output voltage of the power converter being regulated, such that each half bridge converter stage processes the full output current but only a fraction of the output voltage. Methods of controlling the power converter are also described.
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 1/42 - Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
H02M 3/00 - Conversion of dc power input into dc power output
100.
MISMATCH REDUCTION OF CAPACITIVE CHANNELS IN A COMMUNICATION SYSTEM
A first link disposed in a first capacitive channel (path) and a second link disposed in a second capacitive channel (path) of a communication system support conveyance of a respective differential signal from the first communication circuit to the second communication circuit of the communication system during a non-test mode. A controller controls the communication system to temporarily operate in a test mode to facilitate communications in the non-test mode. For example, while in the test mode, the controller determines adjustment settings in which to apply to an impedance adjustment circuit of the communication system to provide better RLC matching of the first capacitive channel and the second capacitive channel. Subsequent to the test mode and calibration, application of the adjustments to the first capacitive channel and the second capacitive channel reduce effects of a parasitic capacitance mismatch associated with at least the first link and the second link.
patents
