Abstract

A method for intelligently generating a stimulus for use in characterization of parameters of a model of a battery may include dynamically analyzing a current drawn from the battery by a load, based on analysis of the current, determining an augmented current for augmenting the current drawn by the load, and generating the augmented current based on a determined need to update the parameters.

IPC Classes  ?

• G01R 31/367 - Software therefor, e.g. for battery testing using modelling or look-up tables
• G01R 31/382 - Arrangements for monitoring battery or accumulator variables, e.g. SoC
• G01R 31/389 - Measuring internal impedance, internal conductance or related variables
• G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
• H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
• G01R 31/385 - Arrangements for measuring battery or accumulator variables

Abstract

A method of controlling a vibrational transducer, the method comprising: tracking a temperature metric of the vibrational transducer; and controlling a drive signal for the vibrational transducer, where the drive signal is limited to a value to protect the vibrational transducer from over excursion, and where said value is a function of the tracked temperature metric.

IPC Classes  ?

• G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
• H04R 3/00 - Circuits for transducers

Abstract

A circuitry for measuring a characteristic of an electrochemical cell, the electrochemical cell comprising at least one working electrode and a counter electrode, comprises: a driver circuitry configured to apply a working bias voltage to the at least one working electrode and a counter bias voltage at the counter electrode to produce a first voltage bias between the at least one working electrode and the counter electrode; a control circuitry configured to adjust the first voltage bias over a first bias range by varying the working bias voltage and the counter bias voltage.

IPC Classes  ?

• A61B 5/1468 - Measuring characteristics of blood in vivo, e.g. gas concentration, pH-value using chemical or electrochemical methods, e.g. by polarographic means
• G01N 27/416 - Systems
• G01R 31/36 - Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
• G01N 27/48 - Systems using polarography, i.e. measuring changes in current under a slowly-varying voltage

Abstract

Switching amplifier circuitry for driving an inductive load, the switching amplifier circuitry 5 comprising modulator circuitry and output stage circuitry, wherein the switching amplifier circuitry is configured to: while the modulator circuitry is outputting a modulated output signal that gives rise to ripple current in the load: adjust a switching frequency of the modulator circuitry over a predetermined range of frequencies; monitor a power of the switching amplifier circuitry as the switching frequency is adjusted over the predetermined range of frequencies; and select, as an operational switching frequency for the modulator circuitry, a frequency within the predetermined range of frequencies at which the monitored power meets a predefined criterion.

IPC Classes  ?

• H03F 3/185 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only with field-effect devices
• H03F 3/217 - Class D power amplifiers; Switching amplifiers

Abstract

Methods and apparatus for controlling a switch transition in an inductive switching circuit are disclosed. A switch driver is configured to receive an indication of current through a diode associated with a first switch and dynamically control a switch transition of a second switch based on the indication of current, so as to reduce the switch transition time, when possible, whilst maintaining a voltage transient due to the switch transition within an acceptable range.

IPC Classes  ?

• H03K 17/082 - Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
• H03K 17/16 - Modifications for eliminating interference voltages or currents

Abstract

A driver (300, 400) for driving a transducer has nodes for connection to high-side and low-side voltage supplies, an output node (301) and nodes (N1-N4) for connecting first and second capacitors (C1, C2). A network of switches is configured such that switching driver can be selectively switched between any of a first switch state in which a voltage at the output node is the high-side voltage supply, a second switch state in which the voltage at the output node is the low-side voltage supply, a third switch state in which the voltage at the output node is higher that the high-side voltage supply by an amount equal to the input voltage; a fourth switch state in which the voltage at the output node is higher that the high-side voltage supply by an amount equal to twice the input voltage and a fifth switch state in which the voltage at the output node is lower than the low-side voltage supply by an amount equal to the input voltage.

IPC Classes  ?

• H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
• H03F 3/185 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only with field-effect devices
• H03F 3/217 - Class D power amplifiers; Switching amplifiers

Abstract

A system for relaying communication for a PHY/data link level communication protocol may include a first device having a first and second transceiver, the first transceiver having a first protocol controller configured to detect a first bus condition and second transceiver having a second protocol controller configured to detect a second bus condition and a switching matrix coupled to the first and second transceiver and configured to operate in a relaying mode to enable: the first protocol controller to control a physical layer of the second transceiver and enables the second protocol controller to control a physical layer of the first transceiver, a physical layer of a first transmitter of the first transceiver to receive an output of a second receiver of the second transceiver, and the physical layer of a second transmitter of the second transceiver to receive an output of a first receiver of the first transceiver.

IPC Classes  ?

• G06F 13/40 - Bus structure
• G06F 13/42 - Bus transfer protocol, e.g. handshake; Synchronisation

Abstract

Apparatus for delivering power from a battery node of a battery to an output node, the apparatus comprising: a slow charging path between the battery node and the output node; a fast charging path parallel to the slow charging path, the fast charging path switchably coupled between the battery node and the output node; and control circuitry configured to: selectively couple the fast charging path between the battery node and the output node to allow faster transfer of charge between the battery node and the output node than the slow charging path.

IPC Classes  ?

• H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
• H02J 7/34 - Parallel operation in networks using both storage and other dc sources, e.g. providing buffering

Abstract

An integrated circuit (IC), comprising: a first input pin for receiving a first input signal; a first converter configured to convert the first input signal to a first output signal; a first gain stage configured to apply a first gain to the first output signal; gain update circuitry configured to: output a first external gain control signal to a first output pin of the IC; and subsequently output a first internal gain control signal to the first gain stage to update the first gain of the first gain stage, wherein output of the first internal gain control signal is delayed relative to output of the first external gain control signal by a first predetermined delay, the first predetermined delay to compensate for signal chain delay between the first input pin and the first gain stage.

IPC Classes  ?

• H03G 1/00 - CONTROL OF AMPLIFICATION - Details of arrangements for controlling amplification
• H03G 3/00 - Gain control in amplifiers or frequency changers
• H03G 3/30 - Automatic control in amplifiers having semiconductor devices
• H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
• H03G 3/02 - Manually-operated control
• H03F 3/45 - Differential amplifiers

Abstract

A system may include an analog loop filter comprising a plurality of analog integrators, the analog loop filter configured to receive an analog signal input and a feedback output signal, at least one sampler for sampling outputs of the analog integrators, a second loop filter coupled between an output of an analog pulse-width modulation driver and a digital pulse-width modulation controller, wherein the second loop filter comprises at least one integrator and is configured to receive sampled outputs of the analog integrators from the at least one sampler and receive a feedback pulse-width modulation signal from the analog pulse-width modulation driver, and a correction subsystem configured to apply a non-linear function to a signal path of the second loop filter in order to compensate for non-linearity introduced as a result of sampling outputs of the analog integrators.

IPC Classes  ?

• H03F 3/217 - Class D power amplifiers; Switching amplifiers
• H03M 3/00 - Conversion of analogue values to or from differential modulation
• H03K 7/08 - Duration or width modulation

Abstract

A method of adapting a battery charging profile of a battery may include monitoring one or more parameters associated with the battery during normal operation of a device powered from the battery and while the battery is simultaneously charged by a charger and is discharged by a dynamic system load of the device, determining an impedance of the battery based on the one or more parameters, determining a condition of the battery based on the impedance and the one or more parameters, and adapting the battery charging profile based on the condition.

IPC Classes  ?

• G01R 31/382 - Arrangements for monitoring battery or accumulator variables, e.g. SoC
• G01R 31/389 - Measuring internal impedance, internal conductance or related variables
• G01R 31/396 - Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
• H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

Abstract

A switched mode amplifier system may include a switched mode amplifier having an amplifier input coupled to an output of an analog integrator and an amplifier output and include a calibration system. The calibration system may be configured to force the input of the analog integrator to a fixed known input value, force the amplifier output to a fixed known duty cycle, measure an analog signal generated at the output of the analog integrator in response to forcing the input of the analog integrator to the fixed value, determine an offset of the switched mode amplifier system based on the analog signal, and correct for the offset.

IPC Classes  ?

• H03F 3/45 - Differential amplifiers
• H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
• H03F 3/217 - Class D power amplifiers; Switching amplifiers

Abstract

A switched mode amplifier system may include a switched mode amplifier having an amplifier input coupled to an output of an analog integrator and an amplifier output, include a feedback network coupled between the amplifier output and an input of the analog integrator, include a loop filter configured to generate a digital loop filter output, include a quantizer configured to generate a pulse-width modulated representation of the digital loop filter output; and include a calibration system. The calibration system may be configured to force the input of the analog integrator to a fixed known input value, low-pass filter the pulse-width modulated representation of the digital loop filter output generated by the quantizer to generate a filtered quantizer output signal, determine an offset of the switched mode amplifier system based on the filtered quantizer output signal, and correct for the offset.

IPC Classes  ?

• H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
• H03F 3/217 - Class D power amplifiers; Switching amplifiers

Abstract

A switched mode amplifier system may include a switched mode amplifier having an amplifier input coupled to an output of an analog integrator and an amplifier output, include a feedback network coupled between the amplifier output and an input of the analog integrator, and a calibration system. The calibration system may be configured to force the input of the analog integrator to a fixed known input value, force the amplifier output to a fixed known duty cycle, measure an analog signal generated at the output of the analog integrator in response to forcing the input of the analog integrator to the fixed value, determine an offset of the switched mode amplifier system based on the analog signal, and correct for the offset.

IPC Classes  ?

• H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
• H03F 3/217 - Class D power amplifiers; Switching amplifiers
• H03F 3/45 - Differential amplifiers

Abstract

A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a first power converter branch comprising a first capacitor, a first switch network, and a first inductor, the first switch network arranged to selectably couple the first capacitor between an input voltage, a first reference voltage, and a first terminal of the first inductor, wherein a second terminal of the first inductor is coupled to an output node; a second power converter branch comprising a second capacitor, a second switch network, and a second inductor, the second switch network arranged to selectably couple the second capacitor between the input voltage, a second reference voltage, and a first terminal of the second inductor, wherein a second terminal of the second inductor is coupled to the output node; and a third switch network between the first power converter branch and the second power converter branch, wherein the third switch network is arranged to selectably couple the first and second capacitors in series or in parallel, to allow enable charge balancing between the first capacitor and second capacitor.

IPC Classes  ?

• H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
• H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
• H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

Abstract

A DC-DC converter for converting an input voltage at an input node, the converter comprising: first and second inductor nodes for connection of an inductor therebetween; first and second flying capacitor nodes for connection of a flying capacitor therebetween; a first switching network for selectively connecting the first flying capacitor node to each of the input node and the first inductor node; a second switching network for selectively connecting the second flying capacitor node to each of the input node and a reference voltage node; and reservoir circuitry, comprising: first and second reservoir capacitor nodes for connection of a reservoir capacitor therebetween; a third switching network for selectively connecting the first reservoir capacitor node to each of the first and second flying capacitor nodes; a fourth switching network for selectively connecting the second reservoir capacitor node to each of the second flying capacitor node and the reference voltage node.

IPC Classes  ?

• H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
• H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
• H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Abstract

The controller for a system including a power converter may be configured to cause the system to operate in one of a low-power mode and the high-power mode based on power demand from a load at the output of the power converter and when in the low-power mode, monitor the output of the power converter to detect an occurrence of a load transient from the load and in response to detecting the occurrence of the load transient, transition from the low-power mode to the high-power mode via a transition mode to minimize undershoot and overshoot of the output voltage.

IPC Classes  ?

• H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
• H02M 1/15 - Arrangements for reducing ripples from dc input or output using active elements
• H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Abstract

A buck-boost converter for converting an input voltage at an input node into an output voltage at an output node, the converter comprising: first and second inductor nodes for connection of an inductor therebetween; a first converter stage coupled between the input node and the first inductor node; and a second converter stage coupled between the second inductor node and the output node, wherein one or more of the first converter stage and the second converter stage comprises a switching network, comprising: a first switch for selectively connecting a first flying capacitor node to a stage input node; a second switch for selectively connecting the first flying capacitor node to a stage output node; a third switch for selectively connecting a second flying capacitor node to the stage output node; and a fourth switch for selectively connecting the second flying capacitor node to a reference voltage, the first and second flying capacitor nodes for connection of a flying capacitor therebetween.

IPC Classes  ?

• H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
• H02M 7/483 - Converters with outputs that each can have more than two voltage levels

Abstract

A cell balancing system for balancing a set of series-connected cells, the cell balancing system comprising first balancer circuitry and second balancer circuitry. The first balancer circuitry comprises a first set of capacitors and a first switch network. The first switch network is controllable such that in operation of the cell balancing system: during a first phase of operation of the first balancer circuitry, a capacitor of the first set of capacitors is coupled to a first cell of the set of series-connected cells; and during a second phase of operation of the first balancer circuitry, the capacitor of the first set of capacitors is coupled to a second cell of the set of series-connected cells. The second balancer circuitry comprises a second set of capacitors and a second switch network. The second switch network is controllable such that in operation of the cell balancing system: during a first phase of operation of the second balancer circuitry, a capacitor of the second set of capacitors is coupled to a first subset of cells of the set of series- connected cells, the first subset comprising two or more of the set of series-connected cells; and during a second phase of operation of the second balancer circuitry, the capacitor of the second set of capacitors is coupled to a second subset of cells of the set of series-connected cells, different than the first subset, the second subset comprising two or more of the set of series-connected cells.

IPC Classes  ?

• H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
• H02J 7/34 - Parallel operation in networks using both storage and other dc sources, e.g. providing buffering

Abstract

A power management integrated circuit (PMIC) may have a loop controller configured to receive a first error signal from a first driver IC having a first driver powered from a supply voltage and configured to drive a first output signal responsive to a first input signal and a first error detector configured to generate the first error signal based between the supply voltage as detected locally to the first driver IC and a first reference voltage associated with the first driver, receive a second error signal from a second driver IC analogous to the first driver IC, and regulate the supply voltage based on the first and second error signals.

IPC Classes  ?

• H02M 3/00 - Conversion of dc power input into dc power output
• H02M 3/02 - Conversion of dc power input into dc power output without intermediate conversion into ac
• H02M 3/04 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters

Abstract

A system may include driving circuitry configured to drive a driving signal to an output transducer, sensing circuitry configured to sense a physical quantity associated with the output transducer in response to the driving signal, and interference detection circuitry configured to detect the presence of interference of the system and mitigate the effect of the interference in the system.

IPC Classes  ?

• H04R 3/00 - Circuits for transducers
• B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy
• B06B 1/04 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy operating with electromagnetism
• H04R 29/00 - Monitoring arrangements; Testing arrangements
• G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer

Abstract

A method for determining and mitigating over-excursion of an internal mass of an electromechanical transducer may include measuring a sensed signal associated with the electromechanical transducer in response to a driving signal driven to the electromechanical transducer, determining a non-linearity value based on the sensed signal, mapping the non-linearity value to a probability of over-excursion of the internal mass, and applying a gain to a signal path configured to generate the driving signal based on the probability.

IPC Classes  ?

• B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy
• H04R 3/00 - Circuits for transducers

Abstract

A method for determining and mitigating over-excursion of an internal mass of an under-damped electromechanical transducer may include transforming an electrical playback signal to an estimated displacement signal, based on the estimated displacement signal, determining an estimated over-excursion of the internal mass responsive to the electrical playback signal, and limiting, based on the estimated over-excursion, an electrical driving signal derived from the electrical playback signal and for driving the electromechanical transducer in order to mitigate over-excursion of the internal mass.

IPC Classes  ?

• H04R 3/00 - Circuits for transducers
• G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer

Abstract

A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a switching node, a power inductor coupled between the switching node and the output, a flying capacitor having a first flying capacitor terminal and a second flying capacitor terminal, a pump capacitor having a first pump capacitor terminal and a second pump capacitor terminal, the second pump capacitor terminal coupled to ground, a first switch coupled between the input and the first flying capacitor terminal, a second switch coupled between the first flying capacitor terminal and the switching node, a third switch coupled between the second flying capacitor terminal and the switching node, a fourth switch coupled between the second flying capacitor terminal and a ground voltage, a fifth switch coupled between the second flying capacitor terminal and the first pump capacitor terminal, and a sixth switch coupled between the output and the first pump capacitor terminal.

IPC Classes  ?

• H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
• H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
• H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode

Abstract

An integrated circuit (IC) substrate manufacturing process provides time-dependent device characteristic variation due to hydrogen absorption by including one or more gettering layers near the devices that would otherwise absorb hydrogen and exhibit the variation as the hydrogen migrates in the devices. The method includes forming or mounting the devices on a top surface of the semiconductor wafer in die areas of the substrate, forming semiconductor structures in the semiconductor die areas, forming a getter layer above or adjacent to the devices in the die areas, and processing the wafer with one or more processes exposing the wafer to vapor having a hydrogen content, whereby an amount of hydrogen absorbed by the devices is reduced by presence of the getter layer. The method produces wafers including semiconductor dies with reduced hydrogen absorption by the devices and packaged ICs including the dies.

IPC Classes  ?

• H01L 23/26 - Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device including materials for absorbing or reacting with moisture or other undesired substances
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 23/12 - Mountings, e.g. non-detachable insulating substrates
• H05K 3/20 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
• H01L 21/84 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body

Abstract

In accordance with embodiments of the present disclosure, a system may include a first input configured to receive a playback signal to be played back to a transducer, a second input configured to receive temperature information associated with the system, and a thermal-controlled gain element configured to determine a sub-band gain to be applied to a selected frequency band of the playback signal, wherein the thermal-controlled gain element determines the gain based on the temperature information and apply the sub-band gain to the selected frequency band.

IPC Classes  ?

• H04R 3/00 - Circuits for transducers
• H04R 29/00 - Monitoring arrangements; Testing arrangements

Abstract

Current detection circuitry for generating an average inductor current signal indicative of an average inductor current during an operational cycle of power converter circuitry, the current detection circuitry comprising: circuitry for generating a peak inductor current signal indicative of a peak inductor current during the operational cycle; and circuitry for applying a ripple current estimate signal, indicative of an estimate of half of a ripple current in the power converter circuitry, to the peak inductor current signal to generate the average inductor current signal, wherein the ripple current is equal to a difference between the average inductor current and the peak inductor current.

IPC Classes  ?

• H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
• H02M 3/156 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
• H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Abstract

In an example, an audio system, which may comprise an integrated circuit, comprises an amplifier and a combiner. The amplifier is configured to output a first amplified audio signal to a speaker. The combiner is configured to: receive the first amplified audio signal from the amplifier, receive a second audio signal, combine the first amplified audio signal and second audio signal into a combined signal, and output the combined signal.

IPC Classes  ?

• H04S 7/00 - Indicating arrangements; Control arrangements, e.g. balance control
• H04R 3/04 - Circuits for transducers for correcting frequency response

Abstract

A system for generating a plurality of switch control signals of a multiphase power converter may include a plurality of inputs, each input of the plurality of inputs configured to receive a respective control signal for controlling a respective phase of the multiphase power converter, and a plurality of control paths comprising a control path for each respective control signal, each control path configured to, for its respective control signal, control a switching period of the respective control signal for such control path based on a measure of alignment among the respective control signal for such control path and the other respective control signals of the other control paths.

IPC Classes  ?

• H02M 1/14 - Arrangements for reducing ripples from dc input or output
• H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Abstract

A battery pack comprising: a set of N parallel-coupled switched cell strings, each switched cell string comprising a cell and a switch for selectively coupling a first terminal of the cell to a first terminal of the battery pack, wherein the battery pack further comprises control circuitry configured to control the switches of the cell strings to steer a charging current received by the battery pack to the cell of each of the cell strings according to one or more predetermined duty cycles.

IPC Classes  ?

• H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
• H01M 10/44 - Methods for charging or discharging

Abstract

Circuitry comprising: a voltage monitoring path; a current monitoring path; a reference element of a predefined impedance; and processing circuitry, wherein in operation of the circuitry in a calibration mode of operation: the voltage monitoring path is operative to output a signal indicative of a voltage across the reference element in response to a reference signal applied to the reference element; the current monitoring path is operative to output a signal indicative of a current through the reference element in response to the reference signal; and the processing circuitry is operative to: receive the signal indicative of the voltage across the reference element and the signal indicative of the current through the reference element; generate an estimate of an impedance of the reference element; and determine a compensation parameter for an element of the circuitry for compensating for a difference between the estimate of the impedance and the predefined impedance of the reference element.

IPC Classes  ?

• G01R 27/08 - Measuring resistance by measuring both voltage and current
• G01R 27/14 - Measuring resistance by measuring current or voltage obtained from a reference source
• G01R 35/00 - Testing or calibrating of apparatus covered by the other groups of this subclass
• H03F 3/217 - Class D power amplifiers; Switching amplifiers
• H04R 3/00 - Circuits for transducers
• H04R 29/00 - Monitoring arrangements; Testing arrangements

Abstract

A system may include a power converter comprising at least one stage having a dual anti-wound inductor having a first winding and a second winding constructed such that its windings generate opposing magnetic fields in its magnetic core and constructed such that a coupling coefficient between the first winding and the second winding is less than approximately 0.95 and a current control subsystem for controlling an electrical current through the dual anti-wound inductor, the current control subsystem configured to minimize a magnitude of a magnetizing electrical current of the dual anti-wound inductor to prevent core saturation of the dual anti-wound inductor and regulate an amount of output electrical current delivered by the power converter to the load in accordance with a reference input signal.

IPC Classes  ?

• H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
• H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
• H02M 1/40 - Means for preventing magnetic saturation

Abstract

Circuitry for driving a load, the circuitry comprising: driver circuitry; and load sensing circuitry, wherein the circuitry is operable in: a driving mode of operation in which the driver circuitry supplies a drive signal to a load coupled to the circuitry; and a load sensing mode of operation, for estimating a characteristic of a load coupled to the circuitry based on a signal output by the load sensing circuitry in response to a stimulus signal, wherein the circuitry is configured to, in response to a request for operation of the circuitry in the load sensing mode: compare an indication of a current through the load to a predefined threshold; and if the indication of the current through the load meets the predefined threshold, prevent or delay operation in the load sensing mode.

IPC Classes  ?

• H04R 3/00 - Circuits for transducers
• H04R 29/00 - Monitoring arrangements; Testing arrangements

Abstract

A digital-to-analog converter may include an integrator, an input network comprising a plurality of parallel taps, each member of the plurality of parallel taps comprising a respective input resistance, and control circuitry configured to selectively enable and selectively disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the digital-to-analog converter.

IPC Classes  ?

• H03M 1/66 - Digital/analogue converters
• H03M 1/74 - Simultaneous conversion
• H03M 1/80 - Simultaneous conversion using weighted impedances
• H03M 3/00 - Conversion of analogue values to or from differential modulation

Abstract

A system may include a driver configured to drive a load with a single-ended driving signal and a processing system configured to implement a function to minimize signal distortion within a signal path of the single-ended driving signal occurring for magnitudes of the single-ended driving signal within a threshold magnitude of a voltage rail of the driver.

IPC Classes  ?

• H03F 3/45 - Differential amplifiers
• H03F 1/32 - Modifications of amplifiers to reduce non-linear distortion
• H03F 3/217 - Class D power amplifiers; Switching amplifiers
• H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
• H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation

Abstract

A feedforward correction block for use in a multi-level output system may include circuitry configured to determine an occurrence of a mode transition between operating modes of the multi-level output system, capture a loop filter output of a signal path of the multi-level output system occurring before and after the occurrence of the mode transition, and based on the transition and a change in the loop filter output responsive to the transition, determine a transition-specific compensation function to apply to a feedforward input signal of the signal path that is combined with the loop filter output.

IPC Classes  ?

• H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
• H02M 1/10 - Arrangements incorporating converting means for enabling loads to be operated at will from different kinds of power supplies, e.g. from ac or dc
• H03F 3/217 - Class D power amplifiers; Switching amplifiers

Abstract

A digital-to-analog converter may include an integrator, an input network comprising a plurality of parallel taps, each member of the plurality of parallel taps having a signal delay such that at least two of the signal delays of the members of the plurality of parallel taps are different, and wherein each member of the plurality of parallel taps is coupled between an input of the digital-to-analog converter and an input of the integrator, and control circuitry configured to selectively enable and disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the digital-to-analog converter, such that the control circuitry enables an even number of members at a time, with half of such enabled members in a first group and half of such enabled members in a second group.

IPC Classes  ?

• H03M 1/66 - Digital/analogue converters
• H03M 1/74 - Simultaneous conversion
• H03M 1/80 - Simultaneous conversion using weighted impedances
• H03M 3/00 - Conversion of analogue values to or from differential modulation

Abstract

Pulse width modulation (PWM) driver circuitry comprising: a loop filter configured to receive an analog input signal and to output a digital loop filter output signal based on the analog input signal and an analog feedback signal; and a PWM modulator configured to receive a digital signal based on the digital loop filter output signal and to output a PWM signal, wherein the PWM driver circuitry further comprises a feedback path coupled to an output of the PWM driver circuitry for the analog feedback signal.

IPC Classes  ?

• H03M 3/00 - Conversion of analogue values to or from differential modulation
• H03F 3/217 - Class D power amplifiers; Switching amplifiers

Abstract

Integrated circuitry implementing amplifier circuitry, the integrated circuity comprising first amplifier circuitry and second amplifier circuitry, the first and second amplifier circuitry being configurable as first and second single-ended amplifiers or as a differential amplifier, wherein the first amplifier circuitry comprises: a first input stage; a first half- bridge output stage having an output coupled to a first output terminal of the integrated circuitry; a first feedback path coupling a first input of the first input stage to a first sense terminal of the first amplifier circuitry; a second feedback path coupling a second input of the first input stage to a second sense terminal of the first amplifier circuitry; and a first shunt resistor coupling the output of the first half-bridge output stage to the first feedback path,wherein the second amplifier circuitry comprises: a second input stage; and a second half-bridge output stage having an output coupled to a second output terminal of the integrated circuitry, and wherein the first amplifier circuitry further comprises a second shunt resistor coupling the second feedback path to a dedicated shunt resistor terminal of the integrated circuitry, such that the second shunt resistor is directly accessible from outside the integrated circuitry.

IPC Classes  ?

• H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
• H03F 3/21 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
• H03F 3/213 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
• H03F 3/217 - Class D power amplifiers; Switching amplifiers

Abstract

Measurement circuitry for an electrochemical cell, the circuit comprising: a first half bridge, comprising: a first impedance coupled between an input voltage node for receiving an input voltage and a first node; and a second impedance coupled between the first node and a reference voltage node, the first impedance or the second impedance comprising a first voltage-controlled oscillator having a first input coupled to the first node and a first output for outputting a first oscillating signal having a first frequency proportional to the current flowing in the half bridge.

IPC Classes  ?

• G01N 27/416 - Systems
• G01R 27/02 - Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant

Abstract

A method for calibrating a fully-differential input system may include determining a first voltage of a first node of the fully-differential input system, wherein the first node is coupled at the first node to a plurality of first resistors in a first star configuration, determining a second voltage of a second node of the fully-differential input system, wherein the second node is coupled at the second node to a plurality of second resistors in a second star configuration, each resistor of the plurality of second resistors corresponding to a respective resistor of the plurality of first resistors, and trimming individual resistances of the plurality of first resistors and the plurality of second resistors in order to maintain a difference of a first voltage at the first node and a second voltage of the second node at approximately zero.

IPC Classes  ?

• H03F 3/45 - Differential amplifiers
• H03F 3/181 - Low-frequency amplifiers, e.g. audio preamplifiers
• H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits

Abstract

A system for sensing an electrical quantity may include a sensing stage configured to sense the electrical quantity and generate a sense signal indicative of the electrical quantity, wherein the electrical quantity is indicative of an electrical signal generated by a Class-DG amplifier configured to drive a load wherein the Class-DG amplifier has multiple signal-level common modes and a common-mode compensator configured to compensate for changes to a common-mode voltage of a differential supply voltage of the driver occurring when switching between signal-level common modes of the Class-DG amplifier.

IPC Classes  ?

• H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
• H03F 3/213 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
• H03F 3/217 - Class D power amplifiers; Switching amplifiers
• H03F 3/45 - Differential amplifiers

Abstract

In accordance with embodiments of the present disclosure, an electronic device may include a battery and a power converter coupled to the battery and configured to be coupled between the battery and a power source. The power converter may be configured to, in a first mode, couple to the power source having a source voltage and charge the battery with a charging voltage significantly smaller than the source voltage. The power converter may be further configured to, in a second mode, couple between at least one downstream component of the electronic device and the battery to provide electrical energy to the at least one downstream component from the battery at a boost voltage significantly larger than a battery voltage generated by the battery.

IPC Classes  ?

• H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
• H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Abstract

A charging integrated circuit for use in an electronic device may include an input interface configured to receive input electrical energy from a power supply, wherein the input interface is controllable to modify characteristics of the input electrical energy to provide a supply voltage, an N-level power converter configured to receive the supply voltage based on the input electrical energy and generate an output voltage, and a controller configured to control characteristics of the input electrical energy to maximize power efficiency associated with at least one of the charging integrated circuit and the electronic device and control the input interface to adjust the supply voltage such that the output voltage of the power converter is substantially unequal to M times the supply voltage divided by (N-1), where M is a positive integer less than (N-1).

IPC Classes  ?

• H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
• H02J 7/02 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
• H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Abstract

Circuitry for and methods of analyte measurement Circuitry for measuring a characteristic of an electrochemical cell, the circuitry comprising: a hysteretic comparator having a first comparator input, a second comparator input and a comparator output; a feedback path between the comparator output and the second comparator input configured to provide a feedback signal to the second comparator input; and a loop filter configured to apply filtering to the feedback path to generate the feedback signal, wherein the loop filter comprises the electrochemical cell.

IPC Classes  ?

• G01N 27/416 - Systems

Abstract

A system may include a boost converter configured to receive an input voltage and boost the input voltage to an output voltage and control circuitry configured to enforce a maximum current limit to limit a current drawn by the boost converter and in response to the output voltage decreasing below the input voltage, dynamically increase the current above the maximum current limit to cause the output voltage to be approximately equal to the input voltage.

IPC Classes  ?

• H02M 3/156 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
• H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Abstract

Circuitry for balancing cells in a battery pack, the circuitry comprising: cell balancing circuitry configured to transfer energy between cells of the battery pack in synchronisation with a clock signal; and control circuitry configured to control a parameter of the clock signal based on a monitored parameter or information associated with the battery pack.

IPC Classes  ?

• H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

Abstract

Balancing circuitry for balancing cells in first and second modules of a battery pack, wherein the first module comprises a first plurality of cells and the second module comprises a second plurality of cells, the balancing circuitry comprising: first cell balancing circuitry operative to balance the first plurality of cells of the first module; and second cell balancing circuitry operative to balance the second plurality of cells of the second module, wherein the second cell balancing circuitry is further operative to balance at least one cell of the first plurality of cells of the first module with at least one cell of the second plurality of cells of the second module.

IPC Classes  ?

• H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

Abstract

Balancing circuitry for balancing a set of N cells in a battery, the balancing circuitry comprising: a switch network configured to be coupled to the cells; and a set of capacitors coupled in parallel between the switch network and a common node, wherein the switch network is controllable such that: during a first phase of operation of the balancing circuitry the set of capacitors is coupled to a first subset comprising N-1 adjacent cells of the set of N cells; and during a second phase of operation the set of capacitors is coupled to a second subset comprising N-1 adjacent cells of the set of N cells, wherein the second subset is different from the first subset, and wherein, in use of the balancing circuitry, the common node is coupled intermittently, periodically or permanently to a reference voltage.

IPC Classes  ?

• H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

Abstract

The present disclosure relates to circuitry for performing a multiply-accumulate (MAC) operation. The circuitry comprises a first multiplexer having a plurality of inputs for receiving a plurality of unary-coded input signals representing operands of the MAC operation and an output for outputting a multiplexer output signal representing a result of the MAC operation and a first vector quantizer configured to receive a plurality of weighting signals, each representing a proportion of a computation time period for which a respective one of the unary-coded input signals should be selected by the multiplexer and to output a first selector signal to the multiplexer to cause the multiplexer to select each of the input signals in accordance with the plurality of weighting signals.

IPC Classes  ?

• G06F 7/544 - Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using unspecified devices for evaluating functions by calculation

Abstract

The present disclosure relates to switching drivers for driving a transducer. A switching driver (202) has supply nodes for receiving supply voltages (VSH, VSL) defining at least one input voltage and an output node (104). A controller (205) controls operation of the first switching driver to generate a drive signal for the transducer at the output node (104), based on an input signal (Sin). A first capacitor (201a) is connected between first and second capacitor nodes (104, 204a) and a second capacitor (201b) is connected between the second capacitor node (204a) and a third capacitor node (204b). A network of switches (203) selectively connects any of the driver output node, the second capacitor node and the third capacitor node to either of a respective pair of said supply nodes, with the first capacitor node connected to the first driver output node.

IPC Classes  ?

• H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
• H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
• H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
• H03F 3/217 - Class D power amplifiers; Switching amplifiers

Abstract

Pre-conditioning circuitry for pre-conditioning a node of a circuit to support a change in operation of the circuit, wherein the circuit is operative to change a state of the node to effect the change in operation of the circuit, and wherein the pre-conditioning circuitry is configured to apply a voltage, current or charge directly to the node to reduce the magnitude of the change to the state of the node required by the circuit to achieve the change in operation of the circuit.

IPC Classes  ?

• G05F 1/565 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
• H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Abstract

A method may include receiving, by a transducer driving system, a first signal for driving an amplifier that drives an electromagnetic load and receiving, by the transducer driving system, a second signal driven by the amplifier in order to control a feedback loop of the transducer driving system. The method may also include detecting unexpected spectral content in the second signal, declaring an indicator event based on the detected unexpected spectral content, determining whether the indicator event occurs in an undesired pattern, and in response to the indicator event occurring in the undesired pattern, modifying a behavior of the transducer driving system.

IPC Classes  ?

• B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy
• G10K 9/13 - Devices in which sound is produced by vibrating a diaphragm or analogous element, e.g. fog horns, vehicle hooters or buzzers electrically operated using electromagnetic driving means
• H03F 1/32 - Modifications of amplifiers to reduce non-linear distortion

Abstract

In accordance with embodiments of the present disclosure, a method of driving a playback waveform to an electromagnetic actuator by a transducer driving system may include operating the transducer driving system in a first mode wherein the electromagnetic actuator is driven with the playback waveform in a closed loop to form a closed-loop voltage drive system that includes a negative impedance, operating the transducer driving system in a second mode wherein the electromechanical actuator is driven with the playback waveform in an open loop, and operating a mode switch for transitioning the transducer driving system to operate between the first mode and the second mode.

IPC Classes  ?

• B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy
• G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer

Abstract

A method for estimating actuator parameters for an actuator, in-situ and in real-time, may include driving the actuator with a test signal imperceptible to a user of a device comprising the actuator during real-time operation of the device, measuring a voltage and a current associated with the actuator and caused by the test signal, determining one or more parameters of the actuator based on the voltage and the current, determining an actuator type of the actuator based on the one or more parameters, and controlling a playback signal to the actuator based on the actuator type.

IPC Classes  ?

• B06B 1/00 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency
• G01H 15/00 - Measuring mechanical or acoustic impedance
• G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

Abstract

An amplifier system configured to receive a differential pulse-width modulation input signal and generate and generate a single-ended output signal as a function of the differential pulse-width modulation input signal, may include a plurality of buffers. Each particular buffer of the plurality of buffers may include a buffering subcircuit configured to buffer the respective component of the differential pulse-width modulation input signal associated with the particular buffer in order to generate the respective buffered component and a biasing subcircuit configured to limit a magnitude of the respective component of the differential pulse-width modulation input signal driven to circuitry of the buffering subcircuit for driving the respective buffered component.

IPC Classes  ?

• H03M 3/00 - Conversion of analogue values to or from differential modulation
• H03F 3/217 - Class D power amplifiers; Switching amplifiers
• H03K 17/14 - Modifications for compensating variations of physical values, e.g. of temperature

Abstract

Circuitry comprising: a capacitor; first circuitry; and second circuitry, wherein the circuitry is operable to couple the capacitor to the first circuitry when the first circuitry is active, and to couple the capacitor to the second circuitry when the first circuitry is inactive or is not actively using the capacitor.

IPC Classes  ?

• G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc
• G05F 1/56 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
• G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
• H03F 3/45 - Differential amplifiers

Abstract

A circuit may include a two-stage feedforward compensated operational transconductance integrated amplifier, and the amplifier may include input and output terminals, a signal path between the input and output terminals, the signal path comprising first and second signal path gain stages, and ripple rejection circuitry coupled between the input terminal and an intermediate node of the signal path located between the first and second signal path gain stages. The ripple rejection circuitry may include a first ripple rejection circuitry gain stage coupled at its input to the input terminal and coupled at its output to an input terminal of a chopper circuit, a notch filter coupled at its input to an output terminal of the chopper circuit, and a second ripple rejection circuitry gain stage coupled at its input to an output terminal of the notch filter and coupled at its output to the intermediate node.

IPC Classes  ?

• H03M 3/02 - Delta modulation, i.e. one-bit differential modulation
• H03F 3/387 - Dc amplifiers with modulator at input and demodulator at output; Modulators or demodulators specially adapted for use in such amplifiers with semiconductor devices only

Abstract

A packaged semiconductor die may include a package terminal array comprising a plurality of terminals, wherein a spacing between the plurality of terminals of the ball grid array is less than 0.5 mm. First and second high-voltage circuits of the die may output a differential signal to a first and second terminal that may exceed 15 volts, in which the first high-voltage circuit and the second high-voltage circuit are positioned symmetrically around an axis and in which the first terminal and the second terminal are located at an edge of the package terminal array. A lowvoltage circuit may be coupled to a third terminal and positioned between the first high-voltage circuit and the second high-voltage circuit, wherein the low-voltage circuit comprises circuitry organized in columns aligned along an axis and having a width defined by a fraction of the terminal spacing pitch.

IPC Classes  ?

• H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
• H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
• H03F 3/213 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
• H03F 3/45 - Differential amplifiers

Abstract

A device (400) comprising: a data interface comprising: a data input (DATA) for receiving a data signal; a clock input (CLK) for receiving a clock signal for clocking the data signal; and a timing input (FSYNC) for receiving a first timing signal having a first freguency; and a timing signal generator (404) configured to generate, based on the first timing signal (FSYNC) and the data signal (DATA), a second timing signal (DT) having a second freguency, the first freguency (FSYNC) being a integer multiple of the second freguency (DT), a phase of the second timing signal (DT) being aligned with an event in the data signal (DATA).

IPC Classes  ?

• G06F 13/42 - Bus transfer protocol, e.g. handshake; Synchronisation
• G06F 13/16 - Handling requests for interconnection or transfer for access to memory bus
• G06F 1/12 - Synchronisation of different clock signals
• H04J 3/06 - Synchronising arrangements
• H04L 7/033 - Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal- generating means, e.g. using a phase-locked loop
• H04W 56/00 - Synchronisation arrangements

Abstract

The disclosure relates to integrated circuits and methods of manufacture. A method involves forming a first set of one or more circuit layers (102a, 104) on a semiconductor substrate (101), placing at least one prefabricated layer portion (206) onto the first set of circuit layers to form a component, and forming a second set of one or more circuit layers (102b, 102c, 104b, 104c) over the first set of circuit layers and the at least prefabricated layer portion. The prefabricated layer portion may be a magnetic layer portion placed to form a magnetic component such as a magnetic core of an inductor or transformer. The method may also comprise forming the prefabricated layer portion.

IPC Classes  ?

• H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils
• H01F 27/28 - Coils; Windings; Conductive connections
• H01F 27/26 - Fastening parts of the core together; Fastening or mounting the core on casing or support
• H01L 49/02 - Thin-film or thick-film devices
• H01F 17/00 - Fixed inductances of the signal type

Abstract

This application relates to methods and apparatus for driving a transducer. A transducer driver has a switch network is operable to selectively connect a driver output to any of a first set of at least three different switching voltages, which are, in use, maintained throughout a switching cycle of the driver apparatus. The switch network is also operable to selectively connect the driver output to flying capacitor driver. A controller is configured to control the switch network and flying capacitor driver to generate a drive signal at the driver output based on an input signal, wherein in one mode of operation the driver output is switched between two of the first set of switching voltages with a controlled duty cycle and in another mode of operation the driver output is connected to the flying capacitor driver which is switched between first and second states with a controlled duty cycle.

IPC Classes  ?

• H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
• H04R 3/00 - Circuits for transducers

Abstract

A system may include an electromagnetic actuator and a processing subsystem configured to apply a low-frequency actuation signal on an actuation coil of the electromagnetic actuator to drive mechanical displacement of the electromagnetic actuator, apply high-frequency electrical stimulus to a sensing coil of the electromagnetic actuator, and sense a change in high-frequency impedance of the sensing coil in response to the high-frequency electrical stimulus over a full cycle of oscillation of the electromagnetic actuator.

IPC Classes  ?

• H04R 29/00 - Monitoring arrangements; Testing arrangements
• H04R 3/00 - Circuits for transducers
• G01R 27/26 - Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants
• G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer

Abstract

A system for using actuators to control an image sensor and/or lens based on sensor data received from position sensors and position information for the image sensor and/or lens received from a host processor includes a primary camera controller device, at least one secondary camera controller device, and at least one communication link connecting the primary camera controller device and the secondary camera controller device. The primary camera controller device processes the received sensor data and the received position information to generate control data, sends a secondary portion of the control data to the secondary camera controller device via the communication link, and drives a primary portion of the control data to the actuators. The secondary camera controller device drives the received secondary portion of the control data to the actuators concurrently with the primary camera controller device driving the primary portion of the control data to the actuators. A system for using actuators to control an image sensor and/or lens based on sensor data received from position sensors and based on position information for the image sensor and/or lens received from a host processor includes a primary camera controller device, at least one secondary camera controller device, and at least one communication link connecting the primary camera controller device and the at least one secondary camera controller device. The primary and secondary camera controller devices receive respective primary and secondary sensor data from the position sensors, send the respective primary and secondary sensor data to the other camera controller device via the communication link, process the primary and secondary sensor data and the position information to generate respective primary and secondary control data, and drive the respective primary and secondary control data to the actuators concurrently.

IPC Classes  ?

• H04N 5/232 - Devices for controlling television cameras, e.g. remote control
• H02K 33/00 - Motors with reciprocating, oscillating or vibrating magnet, armature or coil system

Abstract

The present disclosure relates to circuitry for driving a load. The circuitry comprises: primary driver circuitry coupled to a primary signal path and operable to drive the load with a playback signal in a first mode of operation of the circuitry, wherein a playback signal comprises a signal that drives the load to generate a desired output; auxiliary driver circuitry coupled to an auxiliary signal path; an auxiliary current sense resistor in the auxiliary signal path; and current detection circuitry coupled to the auxiliary current sense resistor and configured to generate a signal indicative of a current through the load. One of the primary driver circuitry and the auxiliary driver circuitry is operable to drive the load with a pilot signal in a second mode of operation of the circuitry, wherein a pilot signal comprises a signal having a predefined frequency or frequency content and a predefined magnitude.

IPC Classes  ?

• H03F 1/52 - Circuit arrangements for protecting such amplifiers
• H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
• H03F 3/217 - Class D power amplifiers; Switching amplifiers
• H03F 3/45 - Differential amplifiers
• H03F 3/68 - Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
• H04R 5/04 - Circuit arrangements
• H04R 29/00 - Monitoring arrangements; Testing arrangements

Abstract

A battery management system, may include an input configured to couple to a power supply, an output configured to couple to a battery, and battery management circuitry coupled between the power supply and the battery and configured to deliver electrical energy to the output at a significantly higher peak-to-average power ratio than receipt of electrical energy to the input.

IPC Classes  ?

• H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
• H02J 7/34 - Parallel operation in networks using both storage and other dc sources, e.g. providing buffering

Abstract

A system may include an output power stage driver comprising a plurality of parallel-coupled field-effect transistors and a current sensor comprising a sense field-effect transistor matched to a matched field-effect transistor of the plurality of parallel-coupled field-effect transistors and gate-coupled and source-coupled to the matched field-effect transistor. The current sensor may be configured to measure a reference voltage across the sense field-effect transistor, measure a sense voltage across the matched field-effect transistor, and determine a current through the output power stage driver based on a comparison of the reference voltage to the sense voltage.

IPC Classes  ?

• H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
• H03K 17/12 - Modifications for increasing the maximum permissible switched current

Abstract

An electronic motor control system provides selectable linear and pulse-width modulated (PWM) operation without generating cross-over distortion. The system includes an output stage that has a pair of push-pull drivers each coupled to a terminal of the motor. The electronic motor control system also includes a pulse-width modulated (PWM) driver for providing pulse-width modulated drive signals to an input of the output stage when the pulse-width modulated mode is selected and a linear amplifier stage that provides a linear analog signal to the input of the output stage in linear mode, so that both drivers are operated to supply the current to the motor. In pulse-width modulated mode, a driver is selected for PWM operation, while the other driver is operated to supply a fixed voltage. A feedback control loop motor current and provides outputs to the pulse-width modulator the linear amplifier stage.

IPC Classes  ?

• G03B 3/10 - Power-operated focusing
• H02P 7/28 - Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices
• H02P 7/29 - Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only using pulse modulation
• H02P 7/291 - Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only using pulse modulation with on-off control between two set points, e.g. controlling by hysteresis
• H02P 7/298 - Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature and field supplies

Abstract

Circuitry for estimating a displacement of a piezoelectric transducer in response to a drive signal applied to the piezoelectric transducer, the circuitry comprising: monitoring circuitry configured to be coupled to the piezoelectric transducer and to output a sense signal indicative of an electrical signal associated with the piezoelectric transducer as a result of the drive signal; wherein the circuitry is configured to generate a difference signal based on the drive signal and the sense signal; and wherein the circuitry further comprises processing circuitry configured to apply at least one transfer function to the difference signal to generate a signal indicative of the displacement of the piezoelectric transducer.

IPC Classes  ?

• B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy
• B06B 1/06 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy operating with piezoelectric effect or with electrostriction
• H04R 17/00 - Piezoelectric transducers; Electrostrictive transducers

Abstract

A system may include a resonant sensor configured to sense a physical quantity, a measurement circuit communicatively coupled to the resonant sensor and configured to measure one or more resonance parameters associated with the resonant sensor and indicative of the physical quantity using an incident/quadrature detector having an incident channel and a quadrature channel and perform a calibration of a non-ideality between the incident channel and the quadrature channel of the system, the calibration comprising determining the non-ideality by controlling the sensor signal, an oscillation signal for the incident channel, and an oscillation signal for the quadrature channel; and correcting for the non-ideality.

IPC Classes  ?

• G01D 18/00 - Testing or calibrating apparatus or arrangements provided for in groups
• G01D 5/243 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the phase or frequency of ac

Abstract

A system may include a resistive-inductive-capacitive sensor configured to sense a physical quantity, and a measurement circuit communicatively coupled to the resistive-inductive-capacitive sensor and configured to measure one or more resonance parameters associated with the resistive-inductive-capacitive sensor and indicative of the physical quantity and, in order to maximize dynamic range in determining the physical quantity from the one or more resonance parameters, dynamically modify, across the dynamic range, either of reliance on the one or more resonance parameters in determining the physical quantity or one or more resonance properties of the resistive-inductive-capacitive sensor.

IPC Classes  ?

• G01D 5/243 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the phase or frequency of ac

Abstract

A power delivery system may include an inductive power converter comprising a shared connection to a shared voltage from a battery, multiple inductive phases, each of the multiple inductive phases configured to generate a respective voltage from the shared voltage, multiple regulated voltage connections, and one or more switches configured and arranged to selectively assign at least one of the multiple inductive phases to a regulated voltage connection selected from the multiple regulated voltage connections.

IPC Classes  ?

• H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
• H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Abstract

This application relates to methods and apparatus for DC voltage conversion. A DC converter (100) is described, with a charge pump circuit comprising a plurality of charge pump stages (1401, 1402-2,1402-2) each charge pump stage comprising connections for respective first and second capacitors for that stage (C1A, C1B; C2A,C2B; C3A, C3B). The charge pump also has a switch network, wherein the switch network comprises, between each successive stage, four switching paths (S7AA, S7AB, S7Ba, S7BB; S6AA, S6AB, S6Ba, S6BB) for separately connecting a respective first electrode of each of the first and second capacitors of one stage to a first electrode either of the first and second capacitors of the preceding stage, so that the relevant capacitor of the one stage can be charged by the relevant capacitor of the preceding stage.

IPC Classes  ?

• H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
• G05F 1/613 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in parallel with the load as final control devices
• H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

Abstract

A system may include a plurality of sensors configured to sense a physical quantity and a calibration subsystem configured to perform a calibration comprising: comparing a measured characteristic from each of at least two sensors of the plurality of sensors to determine a sensitivity drift of at least one sensor of the plurality of sensors; based on the measured characteristics of the at least two sensors and stored reference characteristics for the at least two sensors, calculating a normalization factor; and applying the normalization factor to the measured characteristic of the at least one sensor to ensure sensitivity of the plurality of sensors relative to each other remains approximately constant.

IPC Classes  ?

• G01D 5/244 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means generating pulses or pulse trains
• G01D 18/00 - Testing or calibrating apparatus or arrangements provided for in groups
• G01D 5/243 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the phase or frequency of ac

Abstract

A method of modelling speech of a user of a headset comprising a microphone, the method comprising: receiving a first sample, from a bone-conduction sensor, representing bone-conducted speech of the user; obtaining a measure of fundamental frequency of the bone-conducted speech in each of a plurality of speech frames of the first sample; obtaining a first distribution of the fundamental frequencies of the bone-conducted speech over the plurality of speech frames; receiving, from the microphone, a second sample; determining a first acoustic condition at the headset based on the second signal; performing a biometric process based on the first distribution of fundamental frequencies and the first acoustic condition.

IPC Classes  ?

• G10L 17/20 - Pattern transformations or operations aimed at increasing system robustness, e.g. against channel noise or different working conditions
• G10L 17/02 - Preprocessing operations, e.g. segment selection; Pattern representation or modelling, e.g. based on linear discriminant analysis [LDA] or principal components; Feature selection or extraction

Abstract

Calibrating devices communicating on the shared bus can assist in reducing conflicts on the bus and the resulting loss of data. For example, the timing of transmission of data from one device to another device on the shared bus may be adjusted to compensate for delays on the shared bus. For example, the transmitting device may adjust transmission to an earlier time than the programmed time by an amount proportional to a known delay, such that the signal arrives at a receiving device at the programmed time. When the adjustment is not able to obtain a desired alignment or would cause conflicts on the shared data bus, the timing may be adjusted to delay the transmission, rather than advance the transmission, such that the adjusted transmission time results in the receipt of the signal at the receiving device in an unused time window after the programmed time.

IPC Classes  ?

• G06F 13/372 - Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a time-dependent priority, e.g. individually loaded time counters or time slot

Abstract

Driver circuitry for driving a load, comprising: at least one variable boost stage comprising: first and second flying capacitor nodes for connection to a flying capacitor therebetween; a network of switching paths for selectively connecting a first voltage and a second voltage with the first and second flying capacitor nodes; an output stage for selectively connecting a driver output node to each of the first and second flying capacitor nodes; and a controller operable in a first boost mode to: control the output stage to selectively connect the driver output node to the first flying capacitor node; control the network of switching paths to switch connection of the second flying capacitor node between the first and second voltages at a controlled duty cycle; and in a first charge top-up cycle, control the network of switching paths to connect the first input node to the first flying capacitor node during a phase of the controlled duty cycle in which the first input node is connected to the second flying capacitor node.

IPC Classes  ?

• H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode

Abstract

An amplifier circuitry (300) includes a linear amplifier stage (110) that receives an input signal and outputs a first drive signal to an output node (302) and a switching amplifier stage (130) operable to output a second drive signal to the output node (302). A controller (340) is selectively operable in a first dual-amplifier mode, in which switching of the switching amplifier stage is controlled based on a current of the first drive signal, such that the current of the first drive signal does not exceed a first current threshold magnitude; and at least one other mode, in which the controller controls the switching amplifier stage such that the current of the first drive signal may exceed the first current threshold magnitude. The controller (340) selectively controls the mode of operation based on an indication (SSL) of signal level of the output signal.

IPC Classes  ?

• H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
• H03F 3/217 - Class D power amplifiers; Switching amplifiers
• H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation

Abstract

Class D amplifier circuitry comprising: modulator circuitry; and output stage circuitry, wherein the modulator circuitry is configured to: receive an input signal and first and second carrier signals, wherein the second carrier signal is offset in amplitude with respect to the first carrier signal; generate first and second modulated output signals, each of the first and second modulated output signals being based on the input signal and the first and second carrier signals; and generate a plurality of control signals for the output stage circuitry per signal period of the modulated output signals, wherein the plurality of control signals are based on the first and second modulated output signals, and wherein at least one of the plurality of control signals per signal period comprises a signal level transition.

IPC Classes  ?

• H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
• H03F 3/217 - Class D power amplifiers; Switching amplifiers

Abstract

The present disclosure relates to circuitry for determining a temperature coefficient value of an integrated resistor or an integrated circuit. The circuitry comprises circuitry for supplying an AC current signal to the resistor, circuitry for measuring a first voltage across the resistor when the AC current signal is supplied; and processing circuitry configured to determine the temperature coefficient value based on the first voltage.

IPC Classes  ?

• G01R 19/32 - Compensating for temperature change
• G01R 27/14 - Measuring resistance by measuring current or voltage obtained from a reference source
• G01R 31/26 - Testing of individual semiconductor devices

Abstract

This application relates to current sensing, in particular for a signal processing circuit (500) for outputting an output signal (Sout) based on an input signal (Sin). An output stage (101) includes an output transistor (102) driven, in use, by a drive signal. A current monitor (501) is configured to monitor, in use, a first current through the output transistor, wherein the current monitor comprises a current sensor (105) having a sense transistor (106) configured to be driven based on the drive signal so as to generate a sense current related to the first current. A compensation controller (301) receives an indication of signal level of the input signal and controllably varies operation of the current monitor (501) so as to at least partially compensate for signal- dependent variation in a relationship between the first current and the first sense current.

IPC Classes  ?

• H03F 3/30 - Single-ended push-pull amplifiers; Phase-splitters therefor
• H03F 1/52 - Circuit arrangements for protecting such amplifiers

Abstract

A signal processing system may include a signal path and a chop management circuit. The signal path may comprise a chopper configured to chop a differential input signal to the signal path at a chopping frequency and a low-pass filter downstream of the chopper and configured to filter out intermodulation products of a direct current offset of the signal path and intermodulation products of an aggressor on the differential input signal in order to generate an output signal. The chop management circuit may be communicatively coupled to the chopper and configured to, based on operational parameters associated with the signal path, dynamically manage energy of one or more clock signals used to define the chopping frequency.

IPC Classes  ?

• H03F 3/38 - Dc amplifiers with modulator at input and demodulator at output; Modulators or demodulators specially adapted for use in such amplifiers
• H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
• G01R 19/25 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
• H03M 1/12 - Analogue/digital converters

Abstract

A signal processing system may include a sensor readout channel configured to convert an electronic signal into a digital quantity, the sensor readout channel comprising an analog-to-digital converter (ADC) having an input and an output, first outside chopping switches located at the input of the ADC, and second outside chopping switches located at the output of the ADC. The ADC may comprise a memory element, first inside chopping switches located at the input of the memory element, and second inside chopping switches located at the output of the memory element. The first outside chopping switches, the second outside chopping switches, the first inside chopping switches, and the second inside chopping switches may be switched at the same frequency such that the memory element is swapped periodically in synchronization with the first outside chopping switches and second outside chopping switches.

IPC Classes  ?

• H03M 3/00 - Conversion of analogue values to or from differential modulation

Abstract

A signal processing system may include a sensor readout channel configured to convert an electronic signal into a digital quantity. The sensor readout channel may include a first-order sigma-delta modulator having a modulator input and a modulator output, first outside chopping switches located at the modulator input, second outside chopping switches located at the modulator output, an auxiliary path comprising an analog-to-digital converter (ADC) having an auxiliary path input and an auxiliary path output, the auxiliary path input configured to receive as its input signal a signal output by a memory element of the first-order sigma-delta modulator, and a signal combiner configured to combine a modulator output signal generated by the first-order sigma-delta modulator with an auxiliary path output signal generated by the auxiliary path to generate a combined output signal.

IPC Classes  ?

• H03M 3/00 - Conversion of analogue values to or from differential modulation

Abstract

A system may include a plurality of sensors, a measurement circuit communicatively coupled to the plurality of sensors and configured to measure one or more physical quantities associated with the plurality of sensors, and a predictive optimization subsystem configured to detect an event associated with a first sensor of the plurality of sensors and responsive to the event, execute a predictive action with respect to one or more of the other sensors of the plurality of sensors.

IPC Classes  ?

• G01D 5/20 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
• G01D 18/00 - Testing or calibrating apparatus or arrangements provided for in groups
• G01D 21/02 - Measuring two or more variables by means not covered by a single other subclass

Abstract

A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.

IPC Classes  ?

• H03F 3/45 - Differential amplifiers
• H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation

Abstract

A class-D amplifier provides low-distortion operation near one of the output power supply rails. The class-D amplifier has a first driver circuit, a second driver circuit and a control circuit. In some embodiments, the control circuit selects between a single-ended operating state and a differential operating state. The control logic may selectively determine the input of the second driver circuit in conformity with a current operating state of the class-D amplifier circuit so that a first differential modulator circuit operates both drivers in a differential operating state. In other embodiments, the control circuit selects between actively operating a selected one of the driver circuits or both, while setting an unselected driver circuit to turn either a high-side switch or a low-side switch of the unselected one of the first driver circuit or the second driver circuit fully on for at least some cycles of the one or more modulators.

IPC Classes  ?

• H03F 3/217 - Class D power amplifiers; Switching amplifiers
• H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
• H03F 3/20 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
• H03F 3/21 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only

Abstract

The present disclosure relates to a chip scale package (CSP) comprising: a first set of CSP contact balls or bumps; a second set of CSP contact balls or bumps; and a channel routing region, the channel routing region being devoid of any CSP contact balls or bumps.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates

Abstract

Circuitry comprising excitation circuitry for supplying a transducer with an excitation signal to generate a detection signal and current monitor circuitry for monitoring current through the transducer.

IPC Classes  ?

• G01S 7/52 - RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES - Details of systems according to groups , , of systems according to group
• G01S 7/523 - RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES - Details of systems according to groups , , of systems according to group - Details of pulse systems
• G01S 7/527 - Extracting wanted echo signals
• G01S 15/931 - Sonar systems specially adapted for specific applications for anti-collision purposes of land vehicles

Abstract

Class-D amplifiers and modulators therefor provide control of the DC operating point of the outputs of the amplifiers. The modulators generate a sum and difference signal using combiners and introduce the sum signal to a reference input of the quantizer, while the quantization input of the quantizer receives the difference signal. A difference mode loop filter circuit may filter the difference signal and a common mode loop filter may filter the sum signal. Outputs of the quantizer operate a pair of switching circuits to provide either a differential output with the sum signal set to a constant voltage and the difference signal provided by the signal to be reproduced, or a pair of single-ended outputs with the individual input signals used to generate the sum and difference signal, and selection of a differential or dual single-ended operating mode may be performed by a control circuit that reconfigures the combiners.

IPC Classes  ?

• H03F 3/217 - Class D power amplifiers; Switching amplifiers
• H03F 3/68 - Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics

Abstract

A method for determining if an inductor coupled to a switching network has been electrically shorted may include applying a voltage across the inductor for a predetermined period of time, controlling an impedance in an electrical path of a voltage source generating the voltage and the inductor, sensing an inductor current through the inductor, comparing the inductor current with a predetermined current threshold, and determining whether the inductor has been electrically shorted based on the inductor current, the predetermined current threshold, and the predetermined period of time.

IPC Classes  ?

• H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
• H02M 1/32 - Means for protecting converters other than by automatic disconnection
• H02M 3/155 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

Abstract

An integrated circuit comprises first and second interfaces, an internal addressable space comprising a plurality of address ranges, and a control unit. Each of the first and second interfaces is coupled to the internal addressable space via the control unit. The control unit is configurable in a first state in which the control unit is configured to allow or deny the second interface access to a subset of the plurality of address ranges of the internal addressable space.

IPC Classes  ?

• G06F 21/85 - Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices
• G06F 21/60 - Protecting data
• G06F 21/62 - Protecting access to data via a platform, e.g. using keys or access control rules
• G06F 9/4401 - Bootstrapping
• G06F 12/14 - Protection against unauthorised use of memory
• G06F 21/74 - Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode

Abstract

A method of detecting singing of a user of a personal audio device, the method comprising: receiving a first audio signal comprising bone-conducted speech of the user from a first transducer of the personal audio device; monitoring a second audio signal output to a speaker of the personal audio device; and determining whether the user is singing based on the first audio signal and the second audio signal.

IPC Classes  ?

• G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

Abstract

A classifier for classifying sensor samples in a sensor system, the sensor system comprising N force sensors each configured to output a sensor signal, where N>1, each sensor sample comprising N sample values from the N sensor signals, respectively, defining a sample vector in N-dimensional vector space, the classifier having access to a target definition corresponding to a target event, the target definition defining a bounded target region of X-dimensional vector space, where X≤N, the classifier configured, for a candidate sensor sample, to perform a classification operation comprising: determining a candidate location in the X-dimensional vector space defined by a candidate vector corresponding to the candidate sensor sample, the candidate vector being the sample vector for the candidate sensor sample or a vector derived therefrom; and generating a classification result for the candidate sensor sample based on the candidate location, the classification result labelling the candidate sensor sample as indicative of the target event if the candidate location is within the target region.

IPC Classes  ?

• G06N 3/08 - Learning methods
• G06N 20/10 - Machine learning using kernel methods, e.g. support vector machines [SVM]
• G06N 20/00 - Machine learning
• G06F 3/048 - Interaction techniques based on graphical user interfaces [GUI]
• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
• G06N 7/00 - Computing arrangements based on specific mathematical models

Abstract

A classification system for classifying sensor samples in a sensor system, the sensor system comprising N force sensors each configured to output a sensor signal, where N≥1, each sensor sample comprising N sample values from the N sensor signals, respectively, the classification system comprising: a classifier configured, for each of a series of candidate sensor samples, to perform a classification operation based on the N sample values concerned and generate a classification result which labels the candidate sensor sample as indicative of a defined target event, thereby generating a series of classification results corresponding to the series of candidate sensor samples, respectively; a determiner configured to output at least one event determination based on the series of classification results; and a controller configured to control the classifier and/or the determiner based on one or more controller input signals.

IPC Classes  ?

• G06N 20/00 - Machine learning
• G06N 3/08 - Learning methods
• G06N 5/00 - Computing arrangements using knowledge-based models
• G06N 20/10 - Machine learning using kernel methods, e.g. support vector machines [SVM]
• G06N 20/20 - Ensemble learning
• G06F 3/048 - Interaction techniques based on graphical user interfaces [GUI]
• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means

Abstract

A method for use in an analog circuit having a plurality of differential pairs of elements, wherein for each pair of the plurality of differential pairs of elements, the elements of the pair are designed to match but may have mismatch that induces error. The method includes, for each pair of at least two pairs of the plurality of differential pairs of elements: spectrally separating the mismatch-induced error of the pair from mismatch-induced error of a remainder of the plurality of differential pairs of elements, monitoring, by an analog-to-digital converter (ADC), an output of the analog circuit, and analyzing the monitored output to measure the mismatch-induced error of the pair.

IPC Classes  ?

• H03F 3/393 - Dc amplifiers with modulator at input and demodulator at output; Modulators or demodulators specially adapted for use in such amplifiers with semiconductor devices only with field-effect devices
• H03F 3/45 - Differential amplifiers
• H03M 1/12 - Analogue/digital converters

Abstract

A method for matching a pair of composite circuit elements (CEs) included in a circuit includes fabricating N CEs (e.g., resistors, transistors, current sources, capacitors) designed to match and switches configurable, according to M different combinations, to connect N/2 of the N CEs to form a first composite CE and to connect a remaining N/2 of the N CEs to form a second composite CE. Sequentially in time, for each combination of the M combinations, the switches are configured to form the first and second composite CEs according to the combination and a characteristic of the circuit is measured that includes the formed first and second composite CEs. The characteristic indicates how well the formed composite CEs match. A final combination of the M combinations is chosen whose measured characteristic indicates a best match and the final combination is used to configure the switches to form the composite CEs.

IPC Classes  ?

• H03F 3/45 - Differential amplifiers
• H03F 3/393 - Dc amplifiers with modulator at input and demodulator at output; Modulators or demodulators specially adapted for use in such amplifiers with semiconductor devices only with field-effect devices
• H03M 1/12 - Analogue/digital converters
• H03M 1/10 - Calibration or testing

Abstract

The present disclosure relates to circuitry for driving a capacitive load. The circuitry comprises amplifier circuitry configured to receive a drive signal and to output an output signal, based on the drive signal, to the capacitive load, a variable capacitor configured to be coupled in series with the capacitive load, and control circuitry. The control circuitry is configured to control a capacitance of the variable capacitor to compensate for hysteresis in the capacitive load and to control a gain of the amplifier circuitry to compensate for signal attenuation caused by the variable capacitor.

IPC Classes  ?

• B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy
• H01L 41/04 - SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR - Details thereof - Details of piezo-electric or electrostrictive elements
• H02N 2/06 - Drive circuits; Control arrangements

Abstract

The present disclosure relates to circuitry for driving a capacitive load. The circuitry comprises pre-processor circuitry configured to process an input signal to generate a processed signal; driver circuitry coupled to the pre-processor circuitry and configured to generate a drive signal, based on the processed signal, for driving the capacitive load; and processor circuitry configured to determine a resonant frequency of the capacitive load. The pre-processor circuitry is configured to process the input signal based on the determined resonant frequency so as to generate the processed signal.

IPC Classes  ?

• H04R 3/04 - Circuits for transducers for correcting frequency response
• H04R 3/06 - Circuits for transducers for correcting frequency response of electrostatic transducers
• H04R 17/00 - Piezoelectric transducers; Electrostrictive transducers
• H04R 29/00 - Monitoring arrangements; Testing arrangements

Abstract

Drive circuitry for driving a capacitive load, the circuitry comprising: an inductor; a first reservoir capacitor; a switch network; and control circuitry configured to control operation of the switch network to selectively couple the inductor to one of a power supply, the first reservoir capacitor and the capacitive load, wherein the circuitry is operative in a discontinuous mode to transfer charge between the reservoir capacitor and the capacitive load, and wherein a polarity of the first reservoir capacitor is opposite to a polarity of the power supply.

IPC Classes  ?

• H03K 17/06 - Modifications for ensuring a fully conducting state
• H01L 41/04 - SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR - Details thereof - Details of piezo-electric or electrostrictive elements
• H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
• H03F 3/217 - Class D power amplifiers; Switching amplifiers
• H04R 3/04 - Circuits for transducers for correcting frequency response