Cirrus Logic International Semiconductor Ltd.

United Kingdom

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IPC Class
H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries 19
H04R 3/00 - Circuits for transducers 16
G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase 12
H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load 12
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion 11
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Registered / In Force 102
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1.

ONLINE CHARACTERIZATION OF BATTERY MODEL PARAMETERS WITH AUGMENTED DYNAMIC STIMULUS

      
Application Number 18308420
Status Pending
Filing Date 2023-04-27
First Publication Date 2024-04-25
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Ebenezer, Samuel P.
  • King, Eric J.
  • Marchais, Emmanuel A.
  • Hendrix, Jon D.
  • Sabet, Mohamed

Abstract

A method for intelligently generating a stimulus for use in characterization of parameters of a model of a battery may include dynamically analyzing a current drawn from the battery by a load, based on analysis of the current, determining a sink current for augmenting the current drawn by the load, and generating the sink current based on a determined need to update the parameters.

IPC Classes  ?

  • G05B 13/04 - Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric involving the use of models or simulators
  • G01R 31/367 - Software therefor, e.g. for battery testing using modelling or look-up tables

2.

ESTIMATION OF BATTERY EQUIVALENT CIRCUIT MODEL PARAMETERS BY DECOMPOSITION OF SENSE CURRENT AND TERMINAL VOLTAGE INTO SUBBANDS

      
Application Number 18308449
Status Pending
Filing Date 2023-04-27
First Publication Date 2024-04-25
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Ebenezer, Samuel P.
  • Marchais, Emmanuel A.
  • King, Eric J.

Abstract

A method for estimating equivalent circuit model parameters of a battery may include measuring a battery voltage across terminals of the battery and a battery current drawn from the battery, decomposing the battery voltage and the battery current into a plurality of sub-bands, each sub-band of the plurality of sub-bands based on a time constant that characterizes a temporal behavior of the battery, for each sub-band of the plurality of sub-bands, estimating an equivalent resistance for such sub-band based on a spectral content of the battery voltage and battery current for such sub-band, and estimating an open circuit voltage of the battery based at least on the spectral content of the battery voltage and battery current present in one of the plurality of sub-bands and the equivalent resistances of the plurality of sub-bands.

IPC Classes  ?

  • G01R 31/367 - Software therefor, e.g. for battery testing using modelling or look-up tables
  • G01R 31/3842 - Arrangements for monitoring battery or accumulator variables, e.g. SoC combining voltage and current measurements
  • G01R 31/389 - Measuring internal impedance, internal conductance or related variables

3.

SYSTEM FOR PERFORMING A MEASUREMENT ON A COMPONENT

      
Application Number 18326238
Status Pending
Filing Date 2023-05-30
First Publication Date 2024-04-25
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Khenkin, Aleksey S.
  • Tucker, John C.
  • Kummaraguntla, Ravi K.

Abstract

A system for performing a measurement on a component, the system comprising: an integrated circuit (IC) comprising: analog to digital (ADC) converter circuitry; and processing circuitry, wherein the system further comprises: difference circuitry, wherein: the difference circuitry is operable to generate a compensated measurement voltage by subtracting a compensation voltage received from a voltage source external to the integrated circuit from a measurement voltage output by the component in response to a stimulus signal received by the component; the ADC circuitry is configured to convert the compensated measurement voltage into a digital compensated measurement signal; and the measurement circuitry is configured to generate a measurement result based on the digital compensated measurement signal.

IPC Classes  ?

  • G01R 31/36 - Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
  • G01R 31/385 - Arrangements for measuring battery or accumulator variables
  • G01R 31/389 - Measuring internal impedance, internal conductance or related variables
  • H01M 10/48 - Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte

4.

LAYERED PROCESS-CONSTRUCTED DOUBLE-WINDING EMBEDDED SOLENOID INDUCTOR

      
Application Number 18383816
Status Pending
Filing Date 2023-10-25
First Publication Date 2024-04-25
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Khenkin, Aleksey
  • Patten, David
  • Yan, Jun

Abstract

A method for constructing a solenoid inductor of an IC package with active/passive devices includes positioning an inner winding substantially around a magnetic core, positioning an outer winding substantially around the inner winding, and using a layered process to perform positioning the inner and outer windings. The layered process includes processing a first conducting layer as a bottom layer of the outer winding, above processing a first dielectric layer, above processing a second conducting layer as a bottom layer of the inner winding, above processing a second dielectric layer, above processing a magnetic core layer, above processing a third dielectric layer, above processing a third conducting layer as a top layer of the inner winding, above processing a fourth dielectric layer, above processing a fourth conducting layer as a top layer of the outer winding, above processing a fifth dielectric layer, and the inner and outer windings are electrically connected.

IPC Classes  ?

5.

ONLINE CHARACTERIZATION OF BATTERY MODEL PARAMETERS WITH AUGMENTED DYNAMIC STIMULUS

      
Application Number 18455253
Status Pending
Filing Date 2023-08-24
First Publication Date 2024-04-25
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Ebenezer, Samuel P.
  • Marchais, Emmanuel A.
  • King, Eric J.
  • Melanson, John L.

Abstract

A method for intelligently generating a stimulus for use in characterization of parameters of a model of a battery may include dynamically analyzing a current drawn from the battery by a load, based on analysis of the current, determining an augmented current for augmenting the current drawn by the load, and generating the augmented current based on a determined need to update the parameters.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • G01R 31/374 - Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC] with means for correcting the measurement for temperature or ageing
  • G01R 31/3842 - Arrangements for monitoring battery or accumulator variables, e.g. SoC combining voltage and current measurements

6.

ELECTRONIC CIRCUIT FABRICATION

      
Application Number 18308885
Status Pending
Filing Date 2023-04-28
First Publication Date 2024-04-18
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Patten, David

Abstract

This application describes electronic circuit packages and methods of manufacture. The package (100, 300) includes a primary integrated circuit die (101) with a smaller secondary integrated circuit die (102) attached to a first surface of the primary integrated circuit die in a first location. A first set of electrical connectors (103) extend from the first surface of the primary integrated circuit die outside the first location to a package connection layer (106) to provide electrical connection between the package connection layer and the primary integrated circuit die. An intermediate layer (108) of dielectric or insulating material extends between the primary integrated circuit die and the package connection layer so that the dielectric or insulating material surrounds the first set of electrical connectors and there is at least some dielectric or insulating material between the second integrated circuit die and the package connection layer.

IPC Classes  ?

  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices

7.

ELECTROCHEMICAL CELL CHARACTERISATION

      
Application Number 18453660
Status Pending
Filing Date 2023-08-22
First Publication Date 2024-04-18
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lesso, John P.
  • Ido, Toru
  • Suryono, Yanto

Abstract

Circuitry for determining an impedance of an electrochemical cell comprising at least one first electrode and a second electrode, the circuitry comprising: drive circuitry configured to apply a stimulus to the electrochemical cell, the stimulus having a stimulation frequency and a stimulation amplitude; and measurement circuitry configured to: sample an output of the electrochemical cell at a sampling frequency to generate an output signal; determine an output amplitude of output signal at one or more alias frequencies, the one or more alias frequency based on the stimulation frequency and the sampling frequency; and determine the impedance of the cell at the stimulation frequency based on the output amplitude at the one or more alias frequencies and the stimulation amplitude; and control circuitry configured to: control the sampling frequency and the stimulation frequency such that a Nyquist rate of the sampling frequency is greater than stimulation frequency.

IPC Classes  ?

  • G01R 31/389 - Measuring internal impedance, internal conductance or related variables
  • G01R 31/36 - Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
  • G01R 31/3835 - Arrangements for monitoring battery or accumulator variables, e.g. SoC involving only voltage measurements

8.

ELECTROCHEMICAL CELL CHARACTERISATION

      
Application Number 18452100
Status Pending
Filing Date 2023-08-18
First Publication Date 2024-04-18
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lesso, John P.
  • Warrick, Scott P.
  • Suryono, Yanto

Abstract

Circuitry for processing a response from an electrochemical cell to a stimulus, the circuitry comprising: sense circuitry configured to measure the response of the electrochemical cell to the stimulus; and processing circuitry configured to: sample the measured response to obtain a plurality of samples; and determine a first average signal based on a first number of samples of the plurality of samples; and output the first average signal, wherein the first number of samples in the first average signal is selected to minimise a first variance in the first number of samples.

IPC Classes  ?

  • G01R 31/36 - Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
  • G01R 31/367 - Software therefor, e.g. for battery testing using modelling or look-up tables
  • G01R 31/382 - Arrangements for monitoring battery or accumulator variables, e.g. SoC

9.

VIBRATIONAL TRANSDUCER CONTROL

      
Application Number 18073853
Status Pending
Filing Date 2022-12-02
First Publication Date 2024-04-04
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Li, Ning
  • Sepehr, Hamid
  • Leslie, Ben
  • Khenkin, Aleksey
  • Kurek, Michael
  • Janko, Marco A.
  • Konradi, Vadim
  • Foskey, Peter
  • Treptow, Aaron

Abstract

A method of controlling a vibrational transducer, the method comprising: tracking a temperature metric of the vibrational transducer; and controlling a drive signal for the vibrational transducer, where the drive signal is limited to a value to protect the vibrational transducer from over excursion, and where said value is a function of the tracked temperature metric.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • H04R 9/02 - Transducers of moving-coil, moving-strip, or moving-wire type - Details
  • H04R 29/00 - Monitoring arrangements; Testing arrangements

10.

FILTERS AND FILTER CHAINS

      
Application Number 18524887
Status Pending
Filing Date 2023-11-30
First Publication Date 2024-03-28
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Lesso, John P.

Abstract

An apparatus, comprising: an audio input for receiving an input audio signal; an tuning input for receiving a tuning signal; a filter chain comprising a plurality of filters for filtering the audio signal to produce a filtered input audio signal, the filter chain comprising: a first filter module operating at a first sampling rate; and a second filter module operating at a second sampling rate greater than the first sampling rate, wherein a phase response of the first filter module is dependent on the tuning input and wherein a magnitude response of the first filter module is substantially independent of the tuning input.

IPC Classes  ?

  • H04R 3/04 - Circuits for transducers for correcting frequency response

11.

DATA-DEPENDENT GLITCH AND INTER-SYMBOL INTERFERENCE MINIMIZATION IN SWITCHED-CAPACITOR CIRCUITS

      
Application Number 17952863
Status Pending
Filing Date 2022-09-26
First Publication Date 2024-03-28
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Norouzpourshirazi, Arashk
  • Zanbaghi, Ramin
  • Hodapp, Stephen T.
  • Amadi, Christophe J.
  • Kummaraguntla, Ravi K.
  • Dutta, Dhrubajyoti

Abstract

A system may include a sampling capacitor and a switch network. The switch network may include one or more first sampling switches electrically coupled to the sampling capacitor and configured to be activated during a first phase of a sampling cycle of the system and one or more second sampling switches electrically coupled to the sampling capacitor and configured to be activated during a second phase of the sampling cycle, wherein the switch network is configured to reset the sampling capacitor to a data-independent and/or signal-independent charge during a reset phase of the sampling cycle.

IPC Classes  ?

  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters

12.

Management of path selection in a multi-path control system

      
Application Number 18078292
Grant Number 11940827
Status In Force
Filing Date 2022-12-09
First Publication Date 2024-03-26
Grant Date 2024-03-26
Owner CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. (United Kingdom)
Inventor
  • Kenly, Stewart G.
  • Parupalli, Vamsikrishna
  • Jain, Nishant
  • Smith, Eric B.

Abstract

An electronic control system provides selectable path operation, such as linear and pulse-width modulated (PWM) operation and provides path transition management to improve operation. The system supplies a current or a voltage to a load in response to an input signal or value and includes an output driver, and multiple selectable control paths. The system includes a control circuit that selects between the first control path and the second control path in response to a path selection indication to drive the output driver. The system may include an evaluator that determines the path selection indication in conformity with an amplitude and a slew rate of the input. One or all of the control paths may have a response time to changes in the input signal or value, and the control circuit may delay switching from the second control path to the first control path to compensate for the response time.

IPC Classes  ?

  • H03K 3/017 - Adjustment of width or dutycycle of pulses
  • G05F 1/56 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
  • H02P 23/00 - Arrangements or methods for the control of AC motors characterised by a control method other than vector control

13.

AUDIO AMPLIFIER CIRCUITRY

      
Application Number 18521667
Status Pending
Filing Date 2023-11-28
First Publication Date 2024-03-21
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Singleton, David P.
  • Howlett, Andrew J.
  • Bowlerwell, John B.

Abstract

The present disclosure relates to circuitry comprising audio amplifier circuitry for receiving an audio signal to be amplified; and first and second output nodes for outputting first and second differential output signals. The circuitry further comprises common mode buffer circuitry configured to receive a common mode voltage and to selectively output the common mode voltage to the first and second output nodes.

IPC Classes  ?

14.

CONFIGURABLE GROUND SWITCH TO SUPPORT POWER DELIVERY BETWEEN TWO SUPPLY DOMAINS

      
Application Number 17948442
Status Pending
Filing Date 2022-09-20
First Publication Date 2024-03-21
Owner CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. (United Kingdom)
Inventor
  • Shannon, Donelson A.
  • Wen, Jianping

Abstract

A system may include a first power domain defined by a first supply rail and a first ground rail, a second power domain defined by a second supply rail and a second ground rail, and a configurable switch coupled between the first ground rail and the second ground rail such that when the configurable switch is enabled, the first ground rail and the second ground rail are electrically shorted to one another and when the configurable switch is disabled, the first ground rail and the second ground rail are electrically isolated from one another.

IPC Classes  ?

  • H03K 19/0185 - Coupling arrangements; Interface arrangements using field-effect transistors only
  • G11C 5/14 - Power supply arrangements
  • G11C 17/00 - Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards

15.

CIRCUITRY FOR ANALYTE MEASUREMENT

      
Application Number 17940225
Status Pending
Filing Date 2022-09-08
First Publication Date 2024-03-14
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Lesso, John P.

Abstract

Circuitry for measuring a characteristic of an electrochemical cell, the electrochemical cell comprising at least one working electrode and a counter electrode, the circuitry comprising: driver circuitry configured to apply a working bias voltage to the at least one working electrode and a counter bias voltage at the counter electrode to produce a first voltage bias between the at least one working electrode and the counter electrode; control circuitry configured to adjust the first voltage bias over a first bias range by varying the working bias voltage and the counter bias voltage.

IPC Classes  ?

  • G01N 27/416 - Systems
  • G01N 27/00 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
  • G01N 27/30 - Electrodes, e.g. test electrodes; Half-cells

16.

COMPENSATION OF ENVIRONMENTAL DRIFT BY TRACKING SWITCHED CAPACITOR IMPEDANCE VERSUS RESISTOR IMPEDANCE

      
Application Number 17939166
Status Pending
Filing Date 2022-09-07
First Publication Date 2024-03-07
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Norouzpourshirazi, Arashk
  • Melanson, John L.
  • Thomsen, Axel

Abstract

A method may include, for a signal path comprising a passive antialiasing filter sampled by a switched-capacitor front-end, monitoring a change of a first impedance of a resistor of the passive antialiasing filter responsive to an environmental condition relative to a second impedance of a switched capacitor of the switched-capacitor front end and compensating the signal path for a change in gain of the signal path resulting from the change of the first impedance.

IPC Classes  ?

  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03L 7/099 - Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
  • H03M 1/10 - Calibration or testing

17.

HYBRID POWER CONVERTER

      
Application Number 18505849
Status Pending
Filing Date 2023-11-09
First Publication Date 2024-03-07
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Lim, Changjong

Abstract

A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a switching node, a power inductor coupled between the switching node and the output, a flying capacitor having a first flying capacitor terminal and a second flying capacitor terminal, a pump capacitor having a first pump capacitor terminal and a second pump capacitor terminal, the second pump capacitor terminal coupled to ground, a first switch coupled between the input and the first flying capacitor terminal, a second switch coupled between the first flying capacitor terminal and the switching node, a third switch coupled between the second flying capacitor terminal and the switching node, a fourth switch coupled between the second flying capacitor terminal and a ground voltage, a fifth switch coupled between the second flying capacitor terminal and the first pump capacitor terminal, and a sixth switch coupled between the output and the first pump capacitor terminal.

IPC Classes  ?

  • H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

18.

DRIVER CIRCUITRY FOR PIEZOELECTRIC TRANSDUCERS

      
Application Number 18486609
Status Pending
Filing Date 2023-10-13
First Publication Date 2024-02-29
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Lesso, John P.

Abstract

The present disclosure relates to circuitry for driving a piezoelectric transducer. The circuitry may be implemented as an integrated circuit and comprises driver circuitry configured to supply a drive signal to cause the transducer to generate an output signal and active inductor circuitry configured to be coupled with the piezoelectric transducer. The active inductor circuitry may be tuneable to adjust a frequency characteristic of the output signal.

IPC Classes  ?

  • H10N 30/80 - Constructional details
  • H10N 30/40 - Piezoelectric or electrostrictive devices with electrical input and electrical output, e.g. functioning as transformers

19.

POWER SUPPLY ARCHITECTURE WITH BIDIRECTIONAL BATTERY IDEALIZATION

      
Application Number 18503830
Status Pending
Filing Date 2023-11-07
First Publication Date 2024-02-29
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Perry, Ivan
  • Akram, Hasnain
  • King, Eric J.

Abstract

A power management system for use in a device comprising a battery and one or more components configured to draw electrical energy from the battery may include a first power converter configured to electrically couple between charging circuitry configured to provide electrical energy for charging the battery and the one or more downstream components and a bidirectional power converter configured to electrically couple between the charging circuitry and the battery, wherein the bidirectional power converter is configured to transfer charge from the battery or transfer charge from the battery based on a power requirement of the one or more components and a power available from the first power converter.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

20.

DIFFERENTIAL DRIVER HAVING INPUT SIGNAL-CONTROLLED COMMON-MODE REFERENCE

      
Application Number 17894294
Status Pending
Filing Date 2022-08-24
First Publication Date 2024-02-29
Owner CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. (United Kingdom)
Inventor Parupalli, Vamsikrishna

Abstract

A differential amplifier provides improved signal swing and reduced common-mode output noise. The differential amplifier circuit includes a driver circuit with a first output for driving a first output of the differential amplifier and with a second output for driving a second output of the differential amplifier. The driver circuit has inputs for receiving a differential (complementary) pair of input signals at least one common-mode reference input for receiving a common-mode reference signal. The differential amplifier also includes a signal maxima detector having inputs for receiving the differential input signals that detects a maximum value between the individual signals, including any input common-mode voltage. The differential amplifier also includes a common-mode reference circuit that provides the common-mode reference signal and an input coupled to an output of the signal maxima detector, so that a common-mode voltage of the outputs is independent of power supply voltages provided to the driver circuit.

IPC Classes  ?

21.

CALIBRATION OF ANTI-ALIASING FILTER MISMATCH

      
Application Number 17895897
Status Pending
Filing Date 2022-08-25
First Publication Date 2024-02-29
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Norouzpourshirazi, Arashk
  • Melanson, John L.
  • Thomsen, Axel

Abstract

In accordance with embodiments of the present disclosure, a method may include, in a system comprising a differential filter comprising a plurality of impedance elements, applying a common-mode signal to the differential filter, measuring an output signal of the differential filter in response to the common-mode signal to determine an error due to impedance mismatch of the impedance elements, and tuning one or more of the plurality of impedance elements to minimize the error.

IPC Classes  ?

  • H03M 3/00 - Conversion of analogue values to or from differential modulation

22.

Circuitry for Analyte Measurement

      
Application Number 18498918
Status Pending
Filing Date 2023-10-31
First Publication Date 2024-02-29
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lesso, John P.
  • Ido, Toru

Abstract

Circuitry for measuring a characteristic of an electrochemical cell, the circuitry comprising: a comparator having a first comparator input, a second comparator input and a comparator output; a feedback path between the comparator output and the second comparator input configured to provide a feedback signal to the second comparator input; and a loop filter configured to apply filtering to the feedback path to generate the feedback signal, wherein the loop filter comprises the electrochemical cell.

IPC Classes  ?

23.

METHODS, APPARATUS AND SYSTEMS FOR AUDIO PLAYBACK

      
Application Number 18495236
Status Pending
Filing Date 2023-10-26
First Publication Date 2024-02-22
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lesso, John Paul
  • Forsyth, John

Abstract

The present invention relates to methods, apparatus and systems for audio playback via a personal audio device following a biometric process. A personal audio device may be used to obtain ear model data for authenticating a user via an ear biometric authentication system. Owing to that successful authentication, the electronic device is informed of the person who is listening to audio playback from the device. Thus the device can implement one or more playback settings which are specific to that authorised user.

IPC Classes  ?

  • G06F 21/32 - User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
  • G06F 3/16 - Sound input; Sound output
  • H04R 1/10 - Earpieces; Attachments therefor
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

24.

GAIN AND MISMATCH CALIBRATION FOR A PHASE DETECTOR USED IN AN INDUCTIVE SENSOR

      
Application Number 18470066
Status Pending
Filing Date 2023-09-19
First Publication Date 2024-02-22
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Das, Tejasvi
  • Maru, Siddharth
  • Melanson, John L.

Abstract

A system may include a resonant sensor configured to sense a physical quantity, a measurement circuit communicatively coupled to the resonant sensor and configured to measure one or more resonance parameters associated with the resonant sensor and indicative of the physical quantity using an incident/quadrature detector having an incident channel and a quadrature channel and perform a calibration of a non-ideality between the incident channel and the quadrature channel of the system, the calibration comprising determining the non-ideality by controlling the sensor signal, an oscillation signal for the incident channel, and an oscillation signal for the quadrature channel; and correcting for the non-ideality.

IPC Classes  ?

  • G01N 27/02 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance

25.

ULTRA-LOW-POWER FRONT END FOR BEYOND-THE-RAILS VOLTAGE SENSING

      
Application Number 17884753
Status Pending
Filing Date 2022-08-10
First Publication Date 2024-02-15
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Norouzpourshirazi, Arashk
  • Hodapp, Stephen T.
  • Kummaraguntla, Ravi K.
  • Thomsen, Axel

Abstract

A system may include a passive floating attenuator configured to receive an analog physical quantity and attenuate the analog physical quantity to a floating attenuated signal defined by voltage nodes other than the voltage nodes of the analog physical quantity, an anti-aliasing filter configured to filter the floating attenuated signal to generate a filtered attenuated signal, and a switched-capacitor sampling circuit comprising a plurality of switches configured to sample the filtered attenuated signal.

IPC Classes  ?

  • G01R 19/25 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques

26.

SWITCHING AMPLIFIER CIRCUITRY

      
Application Number 17885719
Status Pending
Filing Date 2022-08-11
First Publication Date 2024-02-15
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Beardsworth, Matthew
  • Melanson, John L.

Abstract

Switching amplifier circuitry for driving an inductive load, the switching amplifier circuitry comprising modulator circuitry and output stage circuitry, wherein the switching amplifier circuitry is configured to: while the modulator circuitry is outputting a modulated output signal that gives rise to ripple current in the load: adjust a switching frequency of the modulator circuitry over a predetermined range of frequencies; monitor a power of the switching amplifier circuitry as the switching frequency is adjusted over the predetermined range of frequencies; and select, as an operational switching frequency for the modulator circuitry, a frequency within the predetermined range of frequencies at which the monitored power meets a predefined criterion.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation

27.

INTEGRATED THIN-FILM RESISTIVE SENSOR WITH INTEGRATED HEATER AND METAL LAYER THERMAL EQUALIZER

      
Application Number 17884521
Status Pending
Filing Date 2022-08-09
First Publication Date 2024-02-15
Owner CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. (United Kingdom)
Inventor
  • Parupalli, Vamsikrishna
  • You, Zhong

Abstract

An integrated circuit (IC) provides on-line, wafer-level, die-level, or package-level thermal calibration of an integrated thin-film resistor, by thermally enclosing the thin-film resistor with metal layers formed above and below the thin-film resistor along its length and width. Metal vias thermally couple the metal layers to the substrate to at least partially equalize the temperature of the metal layers and the thin-film resistor and the substrate. A controllable heat source, which may be provided by another thin-film resistor integrated on or below the substrate, and a reference temperature sensor provide heating/calibration measurement of the resistance of the thin-film resistor over a range of temperature. The reference temperature sensor may be provided within the IC, for example, integrated on the substrate or packaged with the die containing the thin-film resistor, or may be otherwise thermally coupled to the metal layers, e.g., by an extension of one of the metal layers.

IPC Classes  ?

  • G01R 35/00 - Testing or calibrating of apparatus covered by the other groups of this subclass
  • G01R 27/16 - Measuring impedance of element or network through which a current is passing from another source, e.g. cable, power line

28.

BEYOND-THE-RAILS SWITCHED-CAPACITOR FLOATING FRONT END WITH OVER-VOLTAGE PROTECTION

      
Application Number 17885126
Status Pending
Filing Date 2022-08-10
First Publication Date 2024-02-15
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Norouzpourshirazi, Arashk
  • Hodapp, Stephen T.
  • Kummaraguntla, Ravi K.
  • Wilson, Paul
  • Thomsen, Axel

Abstract

A system may include a switched-capacitor analog front end comprising a plurality of switches for sampling an analog physical quantity and a bootstrap generation network electrically coupled to the plurality of switches and configured to generate a bootstrap sampling clock for controlling the plurality of switches and generate a floating supply voltage for the bootstrap sampling clock based on the analog physical quantity.

IPC Classes  ?

  • H03M 3/00 - Conversion of analogue values to or from differential modulation
  • H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode

29.

CURRENT SENSING CIRCUITRY

      
Application Number 18484873
Status Pending
Filing Date 2023-10-11
First Publication Date 2024-02-08
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Nag, Dipankar
  • Hsu, Peter
  • Sharma, Kapil R.
  • Bates, Gordon J.
  • Foster, Simon R.
  • Mccloy-Stevens, Mark J.

Abstract

The present application relates to current sensing circuitry (100) that comprises a differential amplifier (110) comprising first and second inputs configured to sense a current across a sense resistance, and an output configured to output a current sense signal. The circuitry (100) further comprises a first current source, a second current source and a switch network operable in: a first phase in which the first current source is connected to the first input and disconnected from the output, and the second current source is connected to the output and disconnected from the first input; and a second phase in which the first current source is connected to the output and disconnected from the first input, and the second current source is connected to the first input and disconnected from the output.

IPC Classes  ?

  • G01R 19/25 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
  • H03F 3/45 - Differential amplifiers

30.

BEYOND-THE-RAILS BOOTSTRAPPED SAMPLING SWITCH

      
Application Number 17881845
Status Pending
Filing Date 2022-08-05
First Publication Date 2024-02-08
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Norouzpourshirazi, Arashk
  • Kummaraguntla, Ravi K.

Abstract

A bootstrapped switch circuit may include a signal switch configured to, when enabled via a gate terminal of the signal switch during a sampling phase of the bootstrapped switch circuit, pass an input signal received at its input to its output. The bootstrapped switch circuit may also include a bootstrap circuit coupled to the signal switch comprising a bootstrap capacitor and a plurality of switches coupled to the bootstrap capacitor, wherein one of the plurality of switches comprises a p-type field effect transistor configured to decouple, by deactivating a second p-type field effect transistor, the bootstrap capacitor during a bootstrap phase of the bootstrapped switch circuit in which the signal switch is disabled, and further wherein the p-type field effect transistor is coupled to other of the plurality of switches and the bootstrap capacitor such that the signal switch is able to pass the input signal having a magnitude greater than voltage supply rails of the bootstrapped switch circuit from the input to the output.

IPC Classes  ?

31.

ON-DEVICE LOUDSPEAKER REFERENCE RESISTANCE DETERMINATION

      
Application Number 17816489
Status Pending
Filing Date 2022-08-01
First Publication Date 2024-02-08
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Sira, Sandeep P.
  • Clarkin, Philip B. J.
  • Napoli, Roberto

Abstract

This disclosure provides techniques for determining a reference resistance of a loudspeaker, such as in a mobile device. The reference resistance value may be used, among other applications, for speaker protection by reducing overdrive of the loudspeaker beyond safe temperature, which could damage the loudspeaker, while allowing driving of the loudspeaker closer to safety limits to improve performance of the loudspeaker. In a first aspect, a method of audio device monitoring includes applying a first signal to a loudspeaker; measuring a voltage and a current for the loudspeaker while applying the first signal to the loudspeaker; and determining a reference resistance for the loudspeaker based on the voltage and the current. Other aspects and features are also claimed and described.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangements; Testing arrangements

32.

CONTROL OF INDUCTOR SWITCHING

      
Application Number 17894663
Status Pending
Filing Date 2022-08-24
First Publication Date 2024-02-08
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Vijay, Vikas
  • Velarde, Eduardo
  • Quinones, Bryan
  • Macfarlane, Douglas J. W.
  • Smith, David
  • Singh, Saurabh K.

Abstract

Methods and apparatus for controlling a switch transition in an inductive switching circuit are disclosed. A switch driver is configured to receive an indication of current through a diode associated with a first switch and dynamically control a switch transition of a second switch based on the indication of current, so as to reduce the switch transition time, when possible, whilst maintaining a voltage transient due to the switch transition within an acceptable range.

IPC Classes  ?

  • H03K 3/012 - Modifications of generator to improve response time or to decrease power consumption
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters

33.

INTEGRATED CIRCUIT ARRANGEMENT SUPPORTING AGGREGATED TRANSDUCERS

      
Application Number 18210790
Status Pending
Filing Date 2023-06-16
First Publication Date 2024-02-01
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Eklund, Jonathan E.
  • Weber, Daniel
  • Bothwell, Andrew I.
  • Hatfield, Robert J.

Abstract

In an example there is provided a first integrated circuit. The first integrated circuit is configured to receive an audio signal and configured to drive an audio transducer based on the received audio signal. The first integrated circuit is configured to transmit a portion of the audio signal to a second integrated circuit.

IPC Classes  ?

  • H04R 5/04 - Circuit arrangements
  • H04R 3/04 - Circuits for transducers for correcting frequency response

34.

ADAPTIVE NOISE-CANCELING WITH DYNAMIC FILTER SELECTION BASED ON MULTIPLE NOISE SENSOR SIGNAL PHASE DIFFERENCES

      
Application Number 17875364
Status Pending
Filing Date 2022-07-27
First Publication Date 2024-02-01
Owner CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. (United Kingdom)
Inventor
  • Bryan-Merrett, John
  • Salahi, Mert
  • Lawrence, Wilbur
  • Ebenezer, Samuel P.
  • Kerkoud, Rachid

Abstract

An adaptive noise-canceling system generates an anti-noise signal with a filter that has a response controlled by a set of coefficients selected from a collection of coefficient sets. The adaptive noise-canceling system includes an acoustic output transducer for reproducing a signal containing the anti-noise signal, a first microphone for measuring ambient noise at a first location to produce a first noise measurement signal, a second microphone for measuring the ambient noise at a second location to generate a second noise measurement signal, and an analysis subsystem for analyzing the first noise measurement signal and the second noise measurement signal. The adaptive noise-canceling system also includes a controller that selects the set of coefficients from the collection of coefficient sets according to a phase difference between the first noise measurement signal and the second noise measurement signal as determined by the analysis subsystem.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

35.

CONTROL OF SEMICONDUCTOR DEVICES

      
Application Number 18478572
Status Pending
Filing Date 2023-09-29
First Publication Date 2024-01-25
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Pennock, John Laurence
  • Lesso, John Paul

Abstract

This application relates to control of semiconductor devices, in particular MOS devices, so as to reduce RTS/flicker noise. A circuit (100) includes a first MOS device (103, 104) and a bias controller (107). The circuit is operable in at least a first circuit state (PRO) in which the first MOS device is active to contribute to a first signal (Sout) and a second circuit state (PRST) in which the first MOS device does not contribute to the first signal. The bias controller is operable to control voltages at one or more terminals of the first MOS device to apply a pre-bias (VPB1, VPB2) during an instance of the second circuit state. The pre-bias is applied to set an occupancy state of charge carriers traps within the first MOS device, to limit noise during subsequent operation in the first circuit state. In embodiments, the bias controller is configured so that at least one parameter of the pre-bias is selectively variable in use based on one or more operating conditions.

IPC Classes  ?

  • H03K 19/0948 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET using CMOS
  • H03K 17/16 - Modifications for eliminating interference voltages or currents
  • H03K 19/003 - Modifications for increasing the reliability
  • H03M 1/00 - Analogue/digital conversion; Digital/analogue conversion

36.

SYSTEMS AND METHODS FOR GENERATING A SIGNAL

      
Application Number 18210856
Status Pending
Filing Date 2023-06-16
First Publication Date 2024-01-11
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Taipale, Dana J.
  • Matai, Meena

Abstract

A method for generating a signal for a device process may include retrieving a reduced-memory template signal centered on a chosen subharmonic of a reconstruction sample rate, upsampling the reduced-memory template signal to generate the signal for the device process at a desired data rate, and communicating the signal to a transducer for playback by the transducer.

IPC Classes  ?

  • G01S 15/04 - Systems determining presence of a target

37.

CURRENT SENSING

      
Application Number 18347715
Status Pending
Filing Date 2023-07-06
First Publication Date 2024-01-11
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Sharma, Kapil R.
  • Holland, Kathryn R.
  • Petherbridge, Matthew
  • Hsu, Peter
  • Bowlerwell, John B.

Abstract

This application relates to methods and apparatus for sensing current in a monitored current path, where the monitored current path is bidirectional such that current can flow in either direction along the monitored current path. A current sensor has first and second sense resistors (401a, 401b) configured to each pass a current corresponding to the current in the monitored current path. The first and second sense resistors are configured to have a matching arrangement, such that current flow through the first sense resistor when current is flowing in one direction in the monitored current path matches current flow through the second sense resistor when current is flowing in the opposite direction in the monitored current path.

IPC Classes  ?

  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof

38.

Sound components relationship classification and responsive signal processing in an acoustic signal processing system

      
Application Number 16384531
Grant Number 11863948
Status In Force
Filing Date 2019-04-15
First Publication Date 2024-01-02
Grant Date 2024-01-02
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Kwatra, Nitin
  • Alderson, Jeffrey D.

Abstract

An acoustic signal processing system and method includes classification technology to classify a relationship between at least two sound components of a received sound signal. The exemplary sound components are ambient noise and localized noise. The classification technology dynamically determines a classification value that represents the relationship between the sound components and processes the sound signal in accordance with the acoustic signal classification to modify the sound signal. In at least one embodiment, dynamic classification of the relationship between sound components in a sound signal and responsive signal processing improve performance of systems, such as an active noise cancellation (ANC) system, by, for example, attenuating at least one of the sound components and/or enhancing at least one of the sound components. In an ANC system context, the sound components generally include noise components such as ambient noise and noise localized to a microphone.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • G10L 21/0232 - Processing in the frequency domain
  • G10L 15/16 - Speech classification or search using artificial neural networks
  • H04R 5/033 - Headphones for stereophonic communication
  • H04R 5/04 - Circuit arrangements

39.

ACOUSTIC CROSSTALK CANCELLATION

      
Application Number 17847319
Status Pending
Filing Date 2022-06-23
First Publication Date 2023-12-28
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Zhou, Dayong
  • Zwernemann, Brad
  • Lau, Kaichow
  • Taipale, Dana J.
  • Melanson, John L.

Abstract

Circuitry for acoustic crosstalk cancellation between first and second acoustic signals, the circuitry comprising: crosstalk cancellation circuitry configured to: receive a first audio signal and, based on the received first audio signal, generate a first crosstalk cancellation signal; receive a second audio signal and, based on the received second audio signal, generate a second crosstalk cancellation signal; combine the first crosstalk cancellation signal with a signal indicative of the second audio signal to generate a first crosstalk cancellation circuitry output signal; and combine the second crosstalk cancellation signal with a signal indicative of the first audio signal to generate a second crosstalk cancellation circuitry output signal; and output stage circuitry configured to: receive the first crosstalk cancellation circuitry output signal and, based on the received first crosstalk cancellation circuitry, generate a first drive signal for driving a first speaker to generate the first acoustic signal; and receive the second crosstalk cancellation circuitry output signal and, based on the received second crosstalk cancellation circuitry, generate a second drive signal for driving a second speaker to generate the second acoustic signal, wherein a parameter of the crosstalk cancellation circuitry is variable based on one or more of: a position of a user of a host device incorporating the circuitry with respect to the host device; a volume setting of the host device; a level of the first and/or second crosstalk cancellation signal; and an operational parameter of the output stage circuitry.

IPC Classes  ?

  • H04R 3/02 - Circuits for transducers for preventing acoustic reaction

40.

INTEGRATED CIRCUIT WITH MULTIFUNCTION CAPABILITY

      
Application Number 18326420
Status Pending
Filing Date 2023-05-31
First Publication Date 2023-12-21
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Hisky, David
  • Weber, Daniel
  • Eklund, Jonathan E.
  • Brickman, Adam

Abstract

In an example there is provided an integrated circuit configured to perform a plurality of functions, the integrated circuit comprising a memory, wherein each function of the integrated circuit is configured to transmit a request to a processor, and wherein the integrated circuit is configured such that the first function to detect that its request has been serviced by the processor is configured to download firmware and/or configuration data for itself and for at least one other function.

IPC Classes  ?

41.

ELECTROCHEMICAL CELL CHARACTERISATION

      
Application Number 18327454
Status Pending
Filing Date 2023-06-01
First Publication Date 2023-12-21
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lesso, John P.
  • Suryono, Yanto
  • Ido, Toru

Abstract

Circuitry for determining an impedance of an electrochemical cell comprising at least one first electrode and a second electrode, the circuitry comprising: drive circuitry configured to apply a stimulus to the electrochemical cell; sense circuitry configured to measure a response of the electrochemical cell to the stimulus; and processing circuitry configured to: determine an estimated transfer function of the electrochemical cell based on the stimulus and the response; determine a score for the estimated transfer function; and adjust the stimulus or circuitry used to measure the response based on the score.

IPC Classes  ?

  • G01R 31/389 - Measuring internal impedance, internal conductance or related variables
  • G01N 27/416 - Systems
  • H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells

42.

ELECTROCHEMICAL CELL CHARACTERISATION

      
Application Number 18332382
Status Pending
Filing Date 2023-06-09
First Publication Date 2023-12-21
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Lesso, John P.

Abstract

Circuitry for a resistance of an electrochemical cell comprising at least one first electrode and a second electrode, the circuitry comprising: drive circuitry configured to apply a stimulus to the at least one first electrode of the electrochemical cell; sense circuitry configured to measure a response of the electrochemical cell to the stimulus, the response comprising a faradaic component and a non-faradaic component; and processing circuitry configured to: sample the response at a sample time, the sample time selected to maximise a ratio of the non-faradaic component to the faradaic component; and determine the resistance of the electrochemical cell based on the response at the sample time.

IPC Classes  ?

  • G01R 31/389 - Measuring internal impedance, internal conductance or related variables
  • G01R 31/367 - Software therefor, e.g. for battery testing using modelling or look-up tables
  • G01R 31/36 - Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
  • G01R 31/374 - Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC] with means for correcting the measurement for temperature or ageing

43.

DRIVER CIRCUITS

      
Application Number 18460218
Status Pending
Filing Date 2023-09-01
First Publication Date 2023-12-21
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Doy, Anthony S.
  • King, Eric J.

Abstract

The application describes a switched driver (401) for outputting a drive signal at an output node (402) to drive a load such as a transducer. The driver receives respective high-side and low-side voltages (VinH, VinL) defining an input voltage at first and second input nodes and has connections for first and second capacitors (403H, 403L). A network of switching paths is configured such that each of the first and second capacitors can be selectively charged to the input voltage, the first input node can be selectively coupled to a first node (N1) by a path that include or bypass the first capacitor, and the second input node can be selectively coupled to a second node (N2) by a path that includes or bypasses the second capacitor. The output node (402) can be switched between two switching voltages at the first or second nodes. The driver is selectively operable in different operating modes, where the switching voltages are different in each of said modes.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors

44.

CONTROL CIRCUITRY FOR CONTROLLING A POWER SUPPLY

      
Application Number 18453747
Status Pending
Filing Date 2023-08-22
First Publication Date 2023-12-07
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Blyth, Malcolm

Abstract

Control circuitry for controlling a current through an inductor of a power converter, the control circuitry comprising: comparison circuitry configured to compare a measurement signal, indicative of a current through the inductor during a charging phase of the power converter, to a signal indicative of a target average current through the inductor for the charging phase and to output a comparison signal based on said comparison; detection circuitry configured to detect, based on the comparison signal, a crossing time indicative of a time at which the current through the inductor during the charging phase is equal to the target average current for the charging phase; and current control circuitry configured to control a current through the inductor during a subsequent charging phase based on the crossing time.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 3/157 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
  • H03K 3/0233 - Bistable circuits
  • H03K 5/24 - Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

45.

DRIVER CIRCUITRY AND OPERATION

      
Application Number 18323779
Status Pending
Filing Date 2023-05-25
First Publication Date 2023-11-30
Owner CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. (United Kingdom)
Inventor
  • Thomsen, Axel
  • King, Eric J.
  • Doy, Anthony S.
  • Hoff, Thomas H.
  • Melanson, John L.

Abstract

This application relates to methods and apparatus for driving a transducer with switching drivers. A driver circuit has first and second switching drivers for driving the transducer in a bridge-tied-load configuration, each of the switching drivers having a respective output stage for controllably switching the respective driver output node between high and low switching voltages with a controlled duty cycle. Each of switching drivers is operable in a plurality of different driver modes, wherein the switching voltages are different in said different driver modes. A controller controls the driver mode of operation and the duty cycle of the switching drivers based on the input signal. The controller is configured to control the duty cycles of the first and second switching drivers within defined minimum and maximum limits of duty cycles; and to transition between driver modes of operation when the duty cycle of one of the switching drivers reaches a duty cycle limit.

IPC Classes  ?

  • B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • B06B 1/06 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy operating with piezoelectric effect or with electrostriction
  • H10N 30/80 - Constructional details

46.

MULTI-LEVEL MEMRISTOR ELEMENTS

      
Application Number 18323838
Status Pending
Filing Date 2023-05-25
First Publication Date 2023-11-30
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lesso, John Paul
  • Bates, Gordon James

Abstract

There is described a two-terminal multi-level memristor element synthesised from binary memristors, which is configured to implement a variable resistance based on unary or binary code words. There is further described a circuit such as a synapse circuit implemented using a multi-level memristor element.

IPC Classes  ?

  • H10B 61/00 - Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
  • G06N 3/02 - Neural networks
  • G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
  • H10N 50/10 - Magnetoresistive devices

47.

CIRCUITRY FOR MEASUREMENT OF ELECTROCHEMICAL CELLS

      
Application Number 18307369
Status Pending
Filing Date 2023-04-26
First Publication Date 2023-11-30
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Lesso, John P.

Abstract

Circuitry for determining an impedance of an electrochemical cell comprising at least one first electrode and a second electrode, the circuitry comprising: drive circuitry configured to apply a stimulus to the electrochemical cell, the stimulus having a stimulation frequency and a stimulation amplitude; and measurement circuitry configured to: measure an output of the electrochemical cell to generate an output signal; separate the output signal into a linear component and a non-linear component; and determine the impedance of the cell based on the linear component of the response.

IPC Classes  ?

  • G01R 31/389 - Measuring internal impedance, internal conductance or related variables
  • G01R 31/385 - Arrangements for measuring battery or accumulator variables
  • G01R 31/367 - Software therefor, e.g. for battery testing using modelling or look-up tables
  • G01R 31/392 - Determining battery ageing or deterioration, e.g. state of health

48.

APPARATUS AND METHODS FOR TRANSFERRING CHARGE

      
Application Number 17824687
Status Pending
Filing Date 2022-05-25
First Publication Date 2023-11-30
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lesso, John Paul
  • Ido, Toru
  • Motion, Claire

Abstract

Apparatus for delivering power from a battery node of a battery to an output node, the output node coupled to an analyte monitoring device, the apparatus comprising: a slow charging path between the battery node and the output node; a fast charging path parallel to the slow charging path, the fast charging path switchably coupled between the battery node and the output node; and control circuitry configured to: selectively couple the fast charging path between the battery node and the output node to allow faster transfer of charge between the battery node and the output node than the slow charging path.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • G01N 27/403 - Cells and electrode assemblies
  • H02J 7/34 - Parallel operation in networks using both storage and other dc sources, e.g. providing buffering
  • G01R 31/385 - Arrangements for measuring battery or accumulator variables

49.

SYSTEMS AND METHODS FOR RELAYING A MESSAGE FOR A PHYSICAL LEVEL/DATA LINK LEVEL COMMUNICATION PROTOCOL

      
Application Number 18318896
Status Pending
Filing Date 2023-05-17
First Publication Date 2023-11-23
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Shum, Wai-Shun
  • Vellanki, Amar
  • Skarzynski, Jeffrey
  • Sivasankar, Gautham S.
  • Dai, Xingdong
  • Choukinishi, Venugopal
  • Fei, Xiaofan
  • Zhao, Xin

Abstract

A system for relaying communication for a PHY/data link level communication protocol may include a first device having a first and second transceiver, the first transceiver having a first protocol controller configured to detect a first bus condition and second transceiver having a second protocol controller configured to detect a second bus condition and a switching matrix coupled to the first and second transceiver and configured to operate in a relaying mode to enable: the first protocol controller to control a physical layer of the second transceiver and enables the second protocol controller to control a physical layer of the first transceiver, a physical layer of a first transmitter of the first transceiver to receive an output of a second receiver of the second transceiver, and the physical layer of a second transmitter of the second transceiver to receive an output of a first receiver of the first transceiver.

IPC Classes  ?

  • H04N 23/90 - Arrangement of cameras or camera modules, e.g. multiple cameras in TV studios or sports stadiums

50.

VOLTAGE REGULATORS

      
Application Number 18323530
Status Pending
Filing Date 2023-05-25
First Publication Date 2023-11-23
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Melanson, John L.
  • Lesso, John P.

Abstract

This application relates to voltage regulators and, particular, to low-dropout regulators (LDOs). The regulator (300) has an output stage (102) which receives an input voltage (Vin) and outputs an output voltage (Vout) and which includes at least one transistor (103) as an output device configured to pass an output current to the output, ased on a drive voltage (V1). A differential amplifier (101) is configured to receive a feedback signal derived from the output voltage and also a reference voltage (REF) to generate an amplifier output to control the drive voltage (V1) to minimise any difference between the feedback signal and the reference voltage. A controller (301) is operable to selectively reconfigure the output stage to provide a change in output current in response to a load activity signal (ACT), which is indicative of a change in load activity that results in a change in load current demand for a load connected, in use, to the output.

IPC Classes  ?

  • G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

51.

HEALTH-RELATED INFORMATION GENERATION AND STORAGE

      
Application Number 18359577
Status Pending
Filing Date 2023-07-26
First Publication Date 2023-11-23
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Lesso, John Paul

Abstract

A detected sound signal may comprise speech or non-verbal sounds, and many non-verbal sounds contain health information. If the speech, or a non-verbal sound containing health information, was produced by an enrolled user, data relating to the sound can be stored in a storage element. A system also comprises a data modification block, for obfuscating received data to provide an obfuscated version of the stored data. The system then has a first access mechanism, for controlling access to the stored data such that only an authorised user can obtain access to said stored data, and a second access mechanism, for controlling access to said stored data such the second access mechanism only provides access to the obfuscated version of the stored data.

IPC Classes  ?

  • G10L 25/66 - Speech or voice analysis techniques not restricted to a single one of groups specially adapted for particular use for comparison or discrimination for extracting parameters related to health condition
  • G16H 10/00 - ICT specially adapted for the handling or processing of patient-related medical or healthcare data
  • A61B 7/00 - Instruments for auscultation

52.

TEMPERATURE MEASUREMENT USING A THERMISTOR

      
Application Number 18191733
Status Pending
Filing Date 2023-03-28
First Publication Date 2023-11-16
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Parupalli, Vamsikrishna
  • You, Zhong
  • Gaboriau, Johann G.
  • Vellanki, Amar
  • Arumugam, Vikrant

Abstract

A current digital-to-analog converter may be used in a system for measuring temperature of a thermistor, with mismatch reduction techniques applied to digital-to-analog converter elements of the digital-to-analog converter in order to maximize accuracy and precisions of the temperature measurement.

IPC Classes  ?

  • G01K 7/22 - Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat using resistive elements the element being a non-linear resistance, e.g. thermistor
  • H03M 1/10 - Calibration or testing

53.

SINGLE-POINT TEMPERATURE CALIBRATION OF RESISTANCE-BASED TEMPERATURE MEASUREMENTS

      
Application Number 17884517
Status Pending
Filing Date 2022-08-09
First Publication Date 2023-11-16
Owner CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. (United Kingdom)
Inventor
  • You, Zhong
  • Parupalli, Vamsikrishna
  • Gaboriau, Johann G.

Abstract

A system and method provide on-line, wafer-level, die-level, or package-level thermal calibration of an integrated measurement resistor with a single temperature insertion. The system includes a measurement resistor integrated on a substrate with an unknown temperature coefficient and a temperature reference sensor thermally coupled to the measurement resistor. A measurement circuit measures an indication of a resistance of the measurement resistor. An electrically-controllable integrated heat source is operated by a controller to change a temperature of the measurement resistor and the temperature reference sensor and stores values of the resistance indication and the sensed temperature corresponding to multiple temperatures of the temperature of the measurement resistor and the temperature reference sensor. The controller generates or approximates a mathematical relationship between the resistance of the measurement resistor and the temperature of the measurement resistor and the temperature reference sensor from the stored values.

IPC Classes  ?

  • G01K 15/00 - Testing or calibrating of thermometers
  • G01K 7/16 - Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat using resistive elements

54.

PARALLEL BATTERY CHARGER

      
Application Number 18308480
Status Pending
Filing Date 2023-04-27
First Publication Date 2023-11-16
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Melanson, John L.
  • King, Eric J.

Abstract

A battery charging system may include a first current source for charging a battery that provides a direct current for charging the battery and a second current source for charging the battery that provides an alternating current for charging the battery and that provides electrical energy for operation of a system load of the battery during discharging of the battery. Further, a battery charging system may include a first current source for charging a battery that provides a direct current for charging the battery and a second current source for charging the battery that provides an alternating current at a frequency of at least 5 KHz for charging the battery.

IPC Classes  ?

  • H02J 7/34 - Parallel operation in networks using both storage and other dc sources, e.g. providing buffering
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H02J 7/04 - Regulation of the charging current or voltage

55.

Circuitry for and Methods of Gain Control

      
Application Number 17982864
Status Pending
Filing Date 2022-11-08
First Publication Date 2023-11-02
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Howlett, Andrew J.
  • Chandler-Page, Michael
  • Singleton, David P.
  • Zwyssig, Erich P.

Abstract

An integrated circuit (IC), comprising: a first input pin for receiving a first input signal; a first converter configured to convert the first input signal to a first output signal; a first gain stage configured to apply a first gain to the first output signal; gain update circuitry configured to: output a first external gain control signal to a first output pin of the IC; and subsequently output a first internal gain control signal to the first gain stage to update the first gain of the first gain stage, wherein output of the first internal gain control signal is delayed relative to output of the first external gain control signal by a first predetermined delay, the first predetermined delay to compensate for signal chain delay between the first input pin and the first gain stage.

IPC Classes  ?

  • H03G 3/30 - Automatic control in amplifiers having semiconductor devices
  • H03F 3/04 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only

56.

Circuitry for and Methods of Gain Control

      
Application Number 17983000
Status Pending
Filing Date 2022-11-08
First Publication Date 2023-11-02
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Howlett, Andrew J.
  • Chandler-Page, Michael
  • Georgieva, Lea S.

Abstract

Signal processing circuitry configured to receive an input signal and to output a processed output signal, wherein the signal processing circuitry is configured to: receive an indication of a temporal location of a transient in the input signal; and provide, in the processed output signal, a masking signal bridging the temporal location of the transient to mask the transient.

IPC Classes  ?

  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • H03G 3/30 - Automatic control in amplifiers having semiconductor devices

57.

NON-LINEAR FUNCTION IN AN EARLY-SAMPLED HYBRID MULTI-LEVEL CONVERTER AMPLIFIER SYSTEM

      
Application Number 18303750
Status Pending
Filing Date 2023-04-20
First Publication Date 2023-10-26
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Melanson, John L.
  • Mukherjee, Abhishek
  • Zhang, Lingli
  • He, Zhaohui

Abstract

A system may include an analog loop filter comprising a plurality of analog integrators, the analog loop filter configured to receive an analog signal input and a feedback output signal, at least one sampler for sampling outputs of the analog integrators, a second loop filter coupled between an output of an analog pulse-width modulation driver and a digital pulse-width modulation controller, wherein the second loop filter comprises at least one integrator and is configured to receive sampled outputs of the analog integrators from the at least one sampler and receive a feedback pulse-width modulation signal from the analog pulse-width modulation driver, and a correction subsystem configured to apply a non-linear function to a signal path of the second loop filter in order to compensate for non-linearity introduced as a result of sampling outputs of the analog integrators.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H03F 1/32 - Modifications of amplifiers to reduce non-linear distortion
  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation

58.

LIVE SPEECH DETECTION

      
Application Number 17729238
Status Pending
Filing Date 2022-04-26
First Publication Date 2023-10-26
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Sherwood, William E.
  • Geiger, Fred D.
  • Kovvali, Narayan
  • Suppappola, Seth

Abstract

A method of detecting a suitability of a signal for live speech detection, the method comprising: receiving the signal containing speech from a transducer; measuring a signal characteristic of an audible component of the received signal; estimating an expected signal characteristic of an ultrasonic component of the received signal based on the measured signal characteristic of the audible component; determining, based on the estimated expected signal characteristic, whether the ultrasonic component is suitable for detecting whether the speech is live speech.

IPC Classes  ?

  • G10L 21/0388 - Speech enhancement, e.g. noise reduction or echo cancellation using band spreading techniques - Details of processing therefor
  • G10L 15/20 - Speech recognition techniques specially adapted for robustness in adverse environments, e.g. in noise or of stress induced speech
  • G10L 21/0364 - Speech enhancement, e.g. noise reduction or echo cancellation by changing the amplitude for improving intelligibility

59.

DRIVER CIRCUITRY AND OPERATION

      
Application Number 17971039
Status Pending
Filing Date 2022-10-21
First Publication Date 2023-10-26
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Zhang, Lingli
  • Cheng, Yongjie
  • Melanson, John L.

Abstract

A driver apparatus for driving a load with a differential drive signal is described. For a level of input signal within a first range, a first switching driver modulates the voltage at a first output node with a first modulation index by switchably connecting at least one flying capacitor to the first output node, whilst a second switching driver modulates the voltage at a second output node with a second modulation index by controlling switching between DC voltages that are maintained throughout a switching cycle of the driver apparatus. The first and second switching drivers are controlled so, for at least a first part of the first input range, a change in input signal level results in a change of the first controlled modulation index that has a different magnitude to any change in the second controlled modulation index a constant modulation frequency of the differential drive signal is maintained.

IPC Classes  ?

  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H04R 3/00 - Circuits for transducers

60.

POWER CONVERTER CIRCUITRY

      
Application Number 18299969
Status Pending
Filing Date 2023-04-13
First Publication Date 2023-10-26
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Boomer, Alastair M.
  • Bowlerwell, John B.
  • Munger, James
  • Howlett, Andrew J.

Abstract

The present disclosure relates to power converter circuitry, and in particular to power converter circuitry for providing a supply voltage to a load such as amplifier circuitry. In one aspect the invention provides a system comprising: amplifier circuitry; and power converter circuitry for receiving a supply voltage and providing an output voltage to the amplifier circuitry, the power converter circuitry comprising: a control loop for regulating an output voltage of the power converter circuitry in accordance with a target output voltage value; and controller circuitry configured to adjust the target output voltage value if the supply voltage to the power converter circuitry is within a first predefined threshold of a requested output voltage of the power converter circuitry.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

61.

POWER LIMITING FOR AMPLIFIERS

      
Application Number 18302219
Status Pending
Filing Date 2023-04-18
First Publication Date 2023-10-26
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Demirci, Kemal S.
  • Zhao, Tian
  • May, Jeffrey A.
  • Burk, Theodore M.
  • Hoff, Thomas H.
  • Veeser, Edward M.

Abstract

This application relates to methods and apparatus for power limiting for amplifiers. An amplifier is configured to receive an input supply voltage and to draw, in use, an amplifier input current resulting in an amplifier input power. A power limiter is configured to monitor an indication of the amplifier input power, determine a first signal limit based on said indication of the amplifier input power and a pre-set limit and apply regulation to the input signal to provide a regulated input signal for input to the amplifier that does not exceed the first signal limit.

IPC Classes  ?

  • H03F 1/52 - Circuit arrangements for protecting such amplifiers
  • H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only

62.

CIRCUITRY FOR ELECTROCHEMICAL CELLS

      
Application Number 17725995
Status Pending
Filing Date 2022-04-21
First Publication Date 2023-10-26
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Lesso, John P.

Abstract

Circuitry for processing an analyte signal obtained from an electrochemical cell, the circuitry comprising: a first analog-to-digital converter (ADC) configured to generate a first digital output based on the analyte signal; a second ADC configured to generate a second digital output based on the analyte signal; and control circuitry configured to control generation of the second digital output by the second ADC based on the first digital output from the first ADC.

IPC Classes  ?

  • G01N 27/327 - Biochemical electrodes
  • H03M 1/12 - Analogue/digital converters
  • A61B 5/1468 - Measuring characteristics of blood in vivo, e.g. gas concentration, pH-value using chemical or electrochemical methods, e.g. by polarographic means
  • A61B 5/1486 - Measuring characteristics of blood in vivo, e.g. gas concentration, pH-value using enzyme electrodes, e.g. with immobilised oxidase
  • A61B 5/145 - Measuring characteristics of blood in vivo, e.g. gas concentration, pH-value
  • A61B 5/00 - Measuring for diagnostic purposes ; Identification of persons

63.

CALIBRATION OF PULSE WIDTH MODULATION AMPLIFIER SYSTEM

      
Application Number 17720796
Status Pending
Filing Date 2022-04-14
First Publication Date 2023-10-19
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Melanson, John L.

Abstract

A switched mode amplifier system may include a switched mode amplifier having an amplifier input coupled to an output of an analog integrator and an amplifier output, include a feedback network coupled between the amplifier output and an input of the analog integrator, include a loop filter configured to generate a digital loop filter output, include a quantizer configured to generate a pulse-width modulated representation of the digital loop filter output; and include a calibration system. The calibration system may be configured to force the input of the analog integrator to a fixed known input value, low-pass filter the pulse-width modulated representation of the digital loop filter output generated by the quantizer to generate a filtered quantizer output signal, determine an offset of the switched mode amplifier system based on the filtered quantizer output signal, and correct for the offset.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H03F 3/185 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only with field-effect devices
  • H03K 7/08 - Duration or width modulation

64.

ADAPTING A BATTERY CHARGING PROFILE BASED ON NORMAL OPERATION OF A BATTERY-POWERED DEVICE

      
Application Number 18295530
Status Pending
Filing Date 2023-04-04
First Publication Date 2023-10-19
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Marchais, Emmanuel A.
  • King, Eric J.
  • Melanson, John L.

Abstract

A method of adapting a battery charging profile of a battery may include monitoring one or more parameters associated with the battery during normal operation of a device powered from the battery and while the battery is simultaneously charged by a charger and is discharged by a dynamic system load of the device, determining an impedance of the battery based on the one or more parameters, determining a condition of the battery based on the impedance and the one or more parameters, and adapting the battery charging profile based on the condition.

IPC Classes  ?

  • G01R 31/367 - Software therefor, e.g. for battery testing using modelling or look-up tables
  • G01R 31/389 - Measuring internal impedance, internal conductance or related variables
  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

65.

DIRECT CURRENT POWER FACTOR CORRECTION IN A DIRECT CURRENT-TO-DIRECT CURRENT CONVERSION SYSTEM

      
Application Number 18337223
Status Pending
Filing Date 2023-06-19
First Publication Date 2023-10-19
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • May, Jeffrey A.
  • King, Eric J.
  • Larsen, Christian
  • Eklund, Eric

Abstract

A power converter system may include a first power converter configured to couple via its input to a power source and configured to convert an input voltage provided by the power source to an intermediate voltage, a second power converter coupled via its input to an output of the first power converter and configured to convert the intermediate voltage to a regulated output voltage, a capacitor coupled at one of its terminals to an electrical node of the intermediate voltage. Based on one or more electrical parameters of the power converter, the second power converter is controlled to regulate the regulated output voltage at a substantially constant level and the first power converter is controlled to control the intermediate voltage to maintain the intermediate voltage between a maximum voltage and a minimum voltage and regulate an input current drawn from the power source at a substantially constant level.

IPC Classes  ?

  • H02M 1/42 - Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

66.

MULTI-CHANNEL CONVERTERS AND RECONFIGURATION THEREOF

      
Application Number 18180429
Status Pending
Filing Date 2023-03-08
First Publication Date 2023-10-12
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Howlett, Andrew J.

Abstract

An audio codec integrated circuit (IC), comprising: an audio input interface; an audio output interface, wherein a first one of the audio input interface and the audio output interface comprises a plurality of interface pins, each interface pin configured to receive a respective one of a plurality of audio input signals or output a respective one of a plurality of audio output signals; a plurality of data converters for converting the plurality of audio input signals into the plurality of audio output signals; and routing circuitry for routing the plurality of audio input signals to the data converters and the plurality of audio output signals from the data converters, the routing circuitry configurable by at least one select pin to adjust the order of routing of the plurality of audio input signals to the data converters or the order of routing of the plurality of audio output signals from the data converters.

IPC Classes  ?

  • H04R 5/04 - Circuit arrangements
  • H04R 3/12 - Circuits for transducers for distributing signals to two or more loudspeakers

67.

Integrated Circuits for Driving Transducers

      
Application Number 18188112
Status Pending
Filing Date 2023-03-22
First Publication Date 2023-10-12
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Morgan, Ross C.
  • Robinson, Michael
  • Tyagi, Itisha

Abstract

An integrated circuit (IC), comprising: a first transducer driver for driving a first transducer; a second transducer driver for driving a second transducer; and boost circuitry comprising first and second boost nodes, the boost converter configurable to boost a supply voltage received at one or more input pins of the IC to provide first and second boosted voltages to respective first and second transducer drivers via respective first and second boost nodes.

IPC Classes  ?

  • H04R 5/04 - Circuit arrangements
  • H04R 3/12 - Circuits for transducers for distributing signals to two or more loudspeakers
  • H04S 1/00 - Two-channel systems
  • H04R 5/02 - Spatial or constructional arrangements of loudspeakers

68.

SPLICE-POINT DETERMINED ZERO-CROSSING MANAGEMENT IN AUDIO AMPLIFIERS

      
Application Number 18204356
Status Pending
Filing Date 2023-05-31
First Publication Date 2023-09-28
Owner CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. (United Kingdom)
Inventor
  • Melanson, John L.
  • Peterson, Cory J.
  • Prakash, Chandra
  • Zanbaghi, Ramin
  • Kimball, Eric

Abstract

Amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include multiple driver circuits and a control circuit. The control circuit selects between actively operating selected ones of the multiple driver circuits or all of the multiple driver circuits, according to an input signal to be reproduced by one or more of the multiple amplifier driver circuits. The control circuit determines a splice point at which the control circuit selects between actively operating selected ones of the multiple driver circuits or all of the multiple driver circuits.

IPC Classes  ?

  • H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
  • H03F 1/26 - Modifications of amplifiers to reduce influence of noise generated by amplifying elements
  • H03F 3/217 - Class D power amplifiers; Switching amplifiers

69.

DC-DC CONVERTERS

      
Application Number 17704142
Status Pending
Filing Date 2022-03-25
First Publication Date 2023-09-28
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Lesso, John P.

Abstract

A DC-DC converter for converting an input voltage at an input node, the converter comprising: first and second inductor nodes for connection of an inductor therebetween; first and second flying capacitor nodes for connection of a flying capacitor therebetween; a first switching network for selectively connecting the first flying capacitor node to each of the input node and the first inductor node; a second switching network for selectively connecting the second flying capacitor node to each of the input node and a reference voltage node; and reservoir circuitry, comprising: first and second reservoir capacitor nodes for connection of a reservoir capacitor therebetween; a third switching network for selectively connecting the first reservoir capacitor node to each of the first and second flying capacitor nodes; a fourth switching network for selectively connecting the second reservoir capacitor node to each of the second flying capacitor node and the reference voltage node.

IPC Classes  ?

  • H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

70.

PROTECTION CIRCUITRY

      
Application Number 18183817
Status Pending
Filing Date 2023-03-14
First Publication Date 2023-09-21
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Singleton, David P.
  • Howlett, Andrew J.
  • Riaz, Sharjeel
  • Bowlerwell, John B.

Abstract

An integrated circuit (IC), comprising: a converter comprising: one or more core devices; and one or more output internal nodes, each internal node coupled to one of the one or more core devices; protection circuitry comprising: one or more isolation switches, each of the one or more isolation switches coupled between a respective one of the one or more internal output nodes and a respective output external pin of the IC, wherein the protection circuitry configured to: monitor a characteristic at each respective external output pin of the IC; and if the characteristic is outside an operating specification of the one or more core devices, open one or more of the one or more isolation switches to isolate one or more of the one or more core devices from the respective external pin of the IC.

IPC Classes  ?

  • H02H 7/20 - Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from norm for electronic equipment
  • H02H 1/00 - EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS - Details of emergency protective circuit arrangements

71.

METHODS, APPARATUS AND SYSTEMS FOR BIOMETRIC PROCESSES

      
Application Number 18200746
Status Pending
Filing Date 2023-05-23
First Publication Date 2023-09-14
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Lesso, John Paul

Abstract

Embodiments of the invention relate to methods, apparatus and systems for biometric processes. The methods include updating stored ear model data for a user following successful authentication of the user. The ear model data may be acquired using a personal audio device that generates an acoustic stimulus and detects a measured response. The acquisition of the ear model data may be responsive to a determination that the personal audio device is inserted into or placed adjacent to the user's ear. The acquisition of the ear model data may also be responsive to the determination that the personal audio device has not been removed from or moved away from the user's ear.

IPC Classes  ?

  • G06F 21/32 - User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • G06F 16/23 - Updating
  • G06F 21/40 - User authentication by quorum, i.e. whereby two or more security principals are required
  • G10L 17/00 - Speaker identification or verification

72.

DETECTION OF LIVE SPEECH

      
Application Number 18318269
Status Pending
Filing Date 2023-05-16
First Publication Date 2023-09-14
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lesso, John Paul
  • Ido, Toru

Abstract

A method of detecting live speech comprises: receiving a signal containing speech; obtaining a first component of the received signal in a first frequency band, wherein the first frequency band includes audio frequencies; and obtaining a second component of the received signal in a second frequency band higher than the first frequency band. Then, modulation of the first component of the received signal is detected; modulation of the second component of the received signal is detected; and the modulation of the first component of the received signal and the modulation of the second component of the received signal are compared. It may then be determined that the speech may not be live speech, if the modulation of the first component of the received signal differs from the modulation of the second component of the received signal.

IPC Classes  ?

  • G10L 15/06 - Creation of reference templates; Training of speech recognition systems, e.g. adaptation to the characteristics of the speaker's voice
  • G10L 19/26 - Pre-filtering or post-filtering
  • G10L 25/78 - Detection of presence or absence of voice signals

73.

POWER CONVERTERS

      
Application Number 17677097
Status Pending
Filing Date 2022-02-22
First Publication Date 2023-08-24
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Lesso, John P.

Abstract

A buck-boost converter for converting an input voltage at an input node into an output voltage at an output node, the converter comprising: first and second inductor nodes for connection of an inductor therebetween; a first converter stage coupled between the input node and the first inductor node; and a second converter stage coupled between the second inductor node and the output node, wherein one or more of the first converter stage and the second converter stage comprises a switching network, comprising: a first switch for selectively connecting a first flying capacitor node to a stage input node; a second switch for selectively connecting the first flying capacitor node to a stage output node; a third switch for selectively connecting a second flying capacitor node to the stage output node; and a fourth switch for selectively connecting the second flying capacitor node to a reference voltage, the first and second flying capacitor nodes for connection of a flying capacitor therebetween.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode

74.

APPARATUS AND METHODS FOR DETECTING A MICROPHONE CONDITION

      
Application Number 18187186
Status Pending
Filing Date 2023-03-21
First Publication Date 2023-08-17
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Bhattacharya, Anindya
  • Kumar, Bhoodev
  • Mehta, Jaimin
  • Shi, Yongsheng
  • Khenkin, Aleksey S.
  • Melanson, John L.

Abstract

A method and apparatus for detecting a microphone condition of a microphone, the method comprising: applying an electrical stimulus to a microphone; measuring an electrical response to the electrical stimulus at the microphone; comparing the electrical response to an expected response; and determining the microphone condition based on the comparison.

IPC Classes  ?

  • H04R 29/00 - Monitoring arrangements; Testing arrangements

75.

CELL BALANCING

      
Application Number 18101316
Status Pending
Filing Date 2023-01-25
First Publication Date 2023-08-17
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lesso, John P.
  • Steven, Robert A.

Abstract

A cell balancing system for balancing a set of series-connected cells, the cell balancing system comprising first balancer circuitry and second balancer circuitry. The first balancer circuitry comprises a first set of capacitors and a first switch network. The first switch network is controllable such that in operation of the cell balancing system: during a first phase of operation of the first balancer circuitry, a capacitor of the first set of capacitors is coupled to a first cell of the set of series-connected cells; and during a second phase of operation of the first balancer circuitry, the capacitor of the first set of capacitors is coupled to a second cell of the set of series-connected cells. The second balancer circuitry comprises a second set of capacitors and a second switch network. The second switch network is controllable such that in operation of the cell balancing system: during a first phase of operation of the second balancer circuitry, a capacitor of the second set of capacitors is coupled to a first subset of cells of the set of series-connected cells, the first subset comprising two or more of the set of series-connected cells; and during a second phase of operation of the second balancer circuitry, the capacitor of the second set of capacitors is coupled to a second subset of cells of the set of series-connected cells, different than the first subset, the second subset comprising two or more of the set of series-connected cells.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • H02J 7/34 - Parallel operation in networks using both storage and other dc sources, e.g. providing buffering

76.

CELL BALANCING CIRCUITRY

      
Application Number 18104337
Status Pending
Filing Date 2023-02-01
First Publication Date 2023-08-17
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Lesso, John P.

Abstract

Cell balancing circuitry for balancing a set of cells, the cell balancing circuitry comprising: a switch network configured for coupling to the cells; a set of capacitors coupled in parallel between the switch network and a common node; and detection circuitry configured to detect a fault in a capacitor of the set of capacitors based on a voltage at the common node.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • H02J 7/34 - Parallel operation in networks using both storage and other dc sources, e.g. providing buffering

77.

METHODS AND APPARATUSES FOR CONTROLLING OPERATION OF A VIBRATIONAL OUTPUT SYSTEM AND/OR OPERATION OF AN INPUT SENSOR SYSTEM

      
Application Number 18306472
Status Pending
Filing Date 2023-04-25
First Publication Date 2023-08-17
Owner CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. (United Kingdom)
Inventor
  • Das, Tejasvi
  • Beardsworth, Matthew
  • Kost, Michael A.
  • Mcveigh, Gavin
  • Sepehr, Hamid
  • Ståhl, Carl L.

Abstract

Embodiments described herein relate to methods and apparatuses for controlling an operation of a vibrational output system and/or an operation of an input sensor system, wherein the controller is for use in a device comprising the vibrational output system and the input sensor system. A controller comprises an input configured to receive an indication of activation or de-activation of an output of the vibrational output system; and an adjustment module configured to adjust the operation of the vibrational output system and/or the operation of the input sensor system based on the indication to reduce an interference expected to be caused by the output of the vibrational output system on the input sensory system.

IPC Classes  ?

  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G08B 6/00 - Tactile signalling systems, e.g. personal calling systems
  • B06B 1/04 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy operating with electromagnetism
  • B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy

78.

AMPLIFIERS

      
Application Number 18306742
Status Pending
Filing Date 2023-04-25
First Publication Date 2023-08-17
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor Lesso, John P.

Abstract

This application relates to an amplifier selectively operable in first or second modes. The first mode is a BTL mode with first and second output drivers (103p, 103n) both active to generate respective driving signals that vary with an input signal. The second mode is an SE mode, where the first output driver (103p) is active to generate a driving signal at and the output of the second driver (103n) is held constant. A controller (201) selectively controls the mode based on an indication of output signal amplitude. In the first mode, a ratio of magnitude of the two driving signals varies with the indication of output signal amplitude, i.e. the magnitudes of the two driving signals may vary so as to be not equal.

IPC Classes  ?

  • B26D 1/26 - Cutting through work characterised by the nature or movement of the cutting member; Apparatus or machines therefor; Cutting members therefor involving a cutting member which does not travel with the work having a cutting member moving about an axis with a non-circular cutting member moving about an axis substantially perpendicular to the line of cut
  • B26D 7/20 - Cutting beds
  • B26F 3/08 - Severing by using heat with heated members

79.

INTERFERENCE MITIGATION IN AN IMPEDANCE SENSING SYSTEM

      
Application Number 17726920
Status Pending
Filing Date 2022-04-22
First Publication Date 2023-08-10
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Maru, Siddharth
  • Das, Tejasvi

Abstract

A system may include driving circuitry configured to drive a driving signal to an output transducer, sensing circuitry configured to sense a physical quantity associated with the output transducer in response to the driving signal, and interference detection circuitry configured to detect the presence of interference of the system and mitigate the effect of the interference in the system.

IPC Classes  ?

  • G08B 6/00 - Tactile signalling systems, e.g. personal calling systems
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer

80.

DETERMINATION AND AVOIDANCE OF OVER-EXCURSION OF INTERNAL MASS OF TRANSDUCER

      
Application Number 18095305
Status Pending
Filing Date 2023-01-10
First Publication Date 2023-08-03
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lal, Anil
  • Sepehr, Hamid
  • Khenkin, Aleksey S.
  • Rossi, Filippo
  • Konradi, Vadim
  • Janko, Marco A.
  • Yong, Chin H.
  • Campbell, Colin

Abstract

A method for determining and mitigating over-excursion of an internal mass of an under-damped electromechanical transducer may include transforming an electrical playback signal to an estimated displacement signal, based on the estimated displacement signal, determining an estimated over-excursion of the internal mass responsive to the electrical playback signal, and limiting, based on the estimated over-excursion, an electrical driving signal derived from the electrical playback signal and for driving the electromechanical transducer in order to mitigate over-excursion of the internal mass.

IPC Classes  ?

  • G08B 6/00 - Tactile signalling systems, e.g. personal calling systems

81.

LOAD DETECTION

      
Application Number 18296266
Status Pending
Filing Date 2023-04-05
First Publication Date 2023-08-03
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lesso, John Paul
  • Mccloy-Stevens, Mark James
  • Bowlerwell, John Bruce
  • Suryono, Yanto
  • Zhao, Xin
  • Prior, Morgan Timothy

Abstract

This application relates to audio driving circuitry (100), and in particular to audio driving circuitry for outputting first and second audio driving signals for driving a stereo audio load (106), which may be a stereo audio load of an accessory apparatus (102) removably coupled to the audio driving circuitry in use. A load monitor (111) is provided for monitoring to monitor, from a monitoring node (112), an indication of a common mode return current passing through a common return path, together with an indication of a common mode component of the first and second audio driving signals and to determine an impedance characteristic of the stereo audio load. The load monitor (111) can provide dynamic monitoring of any significant change in load impedance. In some embodiments the load monitor (111) comprises an adaptive filter (301) which adapts a parameter of the filter which is related to the load impedance so as to determine the indication of load impedance.

IPC Classes  ?

  • H04R 5/04 - Circuit arrangements
  • H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
  • H03G 3/30 - Automatic control in amplifiers having semiconductor devices
  • H04R 29/00 - Monitoring arrangements; Testing arrangements
  • H04S 1/00 - Two-channel systems
  • H04R 5/02 - Spatial or constructional arrangements of loudspeakers

82.

DETECTION AND PREVENTION OF NON-LINEAR EXCURSION IN A HAPTIC ACTUATOR

      
Application Number 18080900
Status Pending
Filing Date 2022-12-14
First Publication Date 2023-07-27
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Janko, Marco A.
  • Rossi, Filippo
  • Sepehr, Hamid
  • Wilkinson, Kyle
  • Marchais, Emmanuel A.
  • Konradi, Vadim
  • Lal, Anil
  • Khenkin, Aleksey S.
  • Yong, Chin Huang

Abstract

A method for determining and mitigating over-excursion of an internal mass of an electromechanical transducer may include measuring a sensed signal associated with the electromechanical transducer in response to a driving signal driven to the electromechanical transducer, determining a non-linearity value based on the sensed signal, mapping the non-linearity value to a probability of over-excursion of the internal mass, and applying a gain to a signal path configured to generate the driving signal based on the probability.

IPC Classes  ?

  • G08B 6/00 - Tactile signalling systems, e.g. personal calling systems

83.

INTEGRATED CIRCUIT WITH GETTER LAYER FOR HYDROGEN ENTRAPMENT

      
Application Number 18150398
Status Pending
Filing Date 2023-01-05
First Publication Date 2023-07-13
Owner CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. (UK)
Inventor
  • Tarabbia, Marc L.
  • Warrick, Scott P.
  • Blackley, Winston S.

Abstract

An integrated circuit (IC) substrate manufacturing process provides time-dependent device characteristic variation due to hydrogen absorption by including one or more gettering layers near the devices that would otherwise absorb hydrogen and exhibit the variation as the hydrogen migrates in the devices. The method includes forming or mounting the devices on a top surface of the semiconductor wafer in die areas of the substrate, forming semiconductor structures in the semiconductor die areas, forming a getter layer above or adjacent to the devices in the die areas, and processing the wafer with one or more processes exposing the wafer to vapor having a hydrogen content, whereby an amount of hydrogen absorbed by the devices is reduced by presence of the getter layer. The method produces wafers including semiconductor dies with reduced hydrogen absorption by the devices and packaged ICs including the dies.

IPC Classes  ?

  • H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
  • H01L 21/70 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/311 - Etching the insulating layers
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 27/01 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body

84.

DRIVER CIRCUITRY

      
Application Number 18182020
Status Pending
Filing Date 2023-03-10
First Publication Date 2023-07-06
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Morgan, Ross C.
  • Rashid, Tahir
  • Taylor, Jonathan

Abstract

The present disclosure relates to circuitry comprising: digital circuitry configured to generate a digital output signal; and monitoring circuitry configured to monitor a supply voltage to the digital circuitry and to output a control signal for controlling operation of the digital circuitry, wherein the control signal is based on the supply voltage.

IPC Classes  ?

  • H03M 1/10 - Calibration or testing
  • H02P 7/295 - Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only using static converters, e.g. AC to DC of the kind having one thyristor or the like in series with the power supply and the motor
  • G05F 3/26 - Current mirrors
  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • H03K 7/08 - Duration or width modulation
  • H02M 3/156 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • H03M 1/50 - Analogue/digital converters with intermediate conversion to time interval
  • H02P 7/29 - Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only using pulse modulation

85.

ECHO CANCELLATION

      
Application Number 18073062
Status Pending
Filing Date 2022-12-01
First Publication Date 2023-06-22
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Rand, Robert D.
  • Eklund, Jon E.
  • Saminathan, Pradeep
  • Horsfall, Peter

Abstract

In an example, an audio system, which may comprise an integrated circuit, comprises an amplifier and a combiner. The amplifier is configured to output a first amplified audio signal to a speaker. The combiner is configured to: receive the first amplified audio signal from the amplifier, receive a second audio signal, combine the first amplified audio signal and second audio signal into a combined signal, and output the combined signal.

IPC Classes  ?

  • H04M 9/08 - Two-way loud-speaking telephone systems with means for conditioning the signal, e.g.  for suppressing echoes for one or both directions of traffic
  • H04R 3/12 - Circuits for transducers for distributing signals to two or more loudspeakers

86.

METHODS AND APPARATUS FOR OUTPUTTING A HAPTIC SIGNAL TO A HAPTIC TRANSDUCER

      
Application Number 18170277
Status Pending
Filing Date 2023-02-16
First Publication Date 2023-06-22
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Doy, Anthony S.
  • Osmanovic, Nermin
  • Ståhl, Carl L.

Abstract

Embodiments described herein relate to methods and apparatus for outputting a haptic signal to a haptic transducer. A method for triggering a haptic signal being output to a haptic transducer comprises receiving an audio signal for output through an audio output transducer; determining whether the audio signal comprises a haptic trigger based on an indication of a rate of change of an amplitude of the audio signal, and responsive to determining that the audio signal comprises a haptic trigger, triggering the haptic signal to be output to the haptic transducer.

IPC Classes  ?

  • G08B 6/00 - Tactile signalling systems, e.g. personal calling systems
  • H04R 3/00 - Circuits for transducers

87.

ESTIMATION OF AN INDUCTANCE IN A POWER CONVERTER

      
Application Number 17699269
Status Pending
Filing Date 2022-03-21
First Publication Date 2023-06-22
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Bowlerwell, John B.
  • Boomer, Alastair M.
  • Haiplik, Holger
  • Blyth, Malcolm

Abstract

Circuitry for estimating an inductance of an inductor in power converter circuitry, the circuitry comprising: circuitry for generating a peak inductor current signal indicative of a peak inductor current during an operational cycle of the power converter circuitry; circuitry for generating a ripple current estimate signal, indicative of an estimate of a ripple current in the power converter circuitry; and circuitry for applying the ripple current estimate signal to the peak inductor current signal to generate an average inductor current threshold signal indicative of an estimated average inductor current in the power converter circuitry during the operational cycle, wherein the ripple current estimate signal is based on: a duration of a charging phase of operation of the power converter circuitry; a voltage across the inductor; and an inductance value for the inductor; and wherein the circuitry for generating the ripple current estimate signal is operative to select an inductance value for the inductor for which the estimated average inductor current is equal to an actual average inductor current during the operational cycle to generate a value for the actual inductance of the inductor.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • G01R 27/26 - Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants

88.

SELECTIVE ACOUSTIC OPTIMIZATION FOR THERMALLY OR POWER LIMITED SPEAKER SYSTEMS

      
Application Number 17735419
Status Pending
Filing Date 2022-05-03
First Publication Date 2023-06-22
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Roberto, Miles K.
  • Rattray, Chris
  • Xu, Zhengyi
  • Clarkin, Philip B.J.

Abstract

A system may include a first input configured to receive a playback signal to be played back to a transducer, a second input configured to receive temperature information associated with the transducer, and a thermal-controlled gain element configured to determine a sub-band gain to be applied to a selected frequency band of the playback signal, wherein the thermal-controlled gain element determines the gain based on the temperature information and apply the sub-band gain to the selected frequency band.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangements; Testing arrangements
  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • G01K 3/10 - Thermometers giving results other than momentary value of temperature giving differentiated values in respect of time, e.g. reacting only to a quick change of temperature

89.

PHASE INTERLEAVING IN A MULTIPHASE POWER CONVERTER

      
Application Number 18061591
Status Pending
Filing Date 2022-12-05
First Publication Date 2023-06-15
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lawrence, Jason W.
  • Mackay, Graeme G.

Abstract

A system for generating a plurality of switch control signals of a multiphase power converter may include a plurality of inputs, each input of the plurality of inputs configured to receive a respective control signal for controlling a respective phase of the multiphase power converter, and a plurality of control paths comprising a control path for each respective control signal, each control path configured to, for its respective control signal, control a switching period of the respective control signal for such control path based on a measure of alignment among the respective control signal for such control path and the other respective control signals of the other control paths.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/14 - Arrangements for reducing ripples from dc input or output

90.

DELTA-BASED CURRENT STEERING FOR POWER CONVERTER PEAK/VALLEY CURRENT CONTROL

      
Application Number 17990098
Status Pending
Filing Date 2022-11-18
First Publication Date 2023-06-15
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Perry, Ivan
  • Akram, Hasnain
  • Mackay, Graeme G.
  • Gallina, Pietro
  • Gupta, Chanchal
  • Quinones, Bryan
  • Ray, Abhishek

Abstract

A power converter system for converting an input voltage at an input into an output voltage at an output may comprise a switch network comprising a reactive circuit element and a plurality of switches, switch control circuitry configured to operate the plurality of switch in a plurality of periodic, sequential states to regulate the output voltage, and reference current generating circuitry. The reference current generating circuitry may include a comparator coupled to a sensed switch of the plurality of switches and configured to compare a current flowing through the sensed switch to a reference current and current-steering circuitry coupled to the comparator configured to generate the reference current and alternate the reference current between a first reference current and a second reference current whenever the switch control circuitry changes from one state of the plurality of periodic, sequential states to another state of the plurality of periodic, sequential states.

IPC Classes  ?

  • H03M 1/74 - Simultaneous conversion
  • H04R 1/00 - LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS - Details of transducers

91.

COULOMB COUNTER CIRCUITRY

      
Application Number 17987448
Status Pending
Filing Date 2022-11-15
First Publication Date 2023-06-08
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Wilson, Paul
  • Deas, James T.
  • Kozak, Mucahit
  • Mackay, Graeme G.

Abstract

Coulomb counter circuitry operable in a first mode of operation and a second mode of operation, the coulomb counter circuitry comprising: first analog to digital converter (ADC) circuitry configured to generate a first ADC output signal indicative of a current through a load coupled to the coulomb counter circuitry; second analog to digital converter (ADC) circuitry; offset correction circuitry; and accumulator circuitry configured to generate a signal indicative of a cumulative amount of charge transferred to the load, wherein in the second mode of operation, the coulomb counter circuitry is operable to enable the second ADC circuitry and to generate an offset correction factor based at least in part on a second ADC output signal output by the second ADC circuitry, and wherein in subsequent operation of the coulomb counter circuitry in the first mode of operation, the offset correction circuitry applies the offset correction factor to the first ADC output signal.

IPC Classes  ?

  • H03M 1/10 - Calibration or testing
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters

92.

CHARGING CELLS IN A BATTERY PACK

      
Application Number 17988299
Status Pending
Filing Date 2022-11-16
First Publication Date 2023-06-01
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lesso, John P.
  • Doy, Anthony S.

Abstract

A battery pack comprising: a set of N parallel-coupled switched cell strings, each switched cell string comprising a cell and a switch for selectively coupling a first terminal of the cell to a first terminal of the battery pack.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

93.

MODULATOR FEEDFORWARD COMPENSATION

      
Application Number 17739480
Status Pending
Filing Date 2022-05-09
First Publication Date 2023-06-01
Owner CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. (United Kingdom)
Inventor
  • Maru, Siddharth
  • Prakash, Chandra B.
  • Das, Tejasvi

Abstract

An amplifier system may include a first feedback loop coupled between an output of an amplifier to an input of a modulator for regulating an output voltage driven at the output of the amplifier to a first terminal of a load of the amplifier system, a sense resistor for sensing a physical quantity associated with the amplifier, a second control loop coupled to the sense resistor such that the sense resistor is outside of the second control loop, the second control loop configured to regulate a common-mode voltage at a second terminal of the load, and a common-mode feedforward circuit coupled to the sense resistor and configured to minimize effects of a signal-dependent common-mode feedback of the sense resistor.

IPC Classes  ?

  • H03F 3/04 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
  • B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy

94.

INTEGRATED HAPTIC SYSTEM

      
Application Number 18094680
Status Pending
Filing Date 2023-01-09
First Publication Date 2023-05-25
Owner CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. (United Kingdom)
Inventor
  • Rao, Harsha
  • Hu, Rong
  • Ståhl, Carl Lennart
  • Su, Jie
  • Konradi, Vadim
  • Ramo, Teemu
  • Doy, Anthony Stephen

Abstract

An integrated haptic system may include a digital signal processor and an amplifier communicatively coupled to the digital signal processor and integrated with the digital signal processor into the integrated haptic system. The digital signal processor may be configured to receive a force sensor signal indicative of a force applied to a force sensor and generate a haptic playback signal responsive to the force. The amplifier may be configured to amplify the haptic playback signal and drive a vibrational actuator communicatively coupled to the amplifier with the haptic playback signal as amplified by the amplifier.

IPC Classes  ?

  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

95.

CONTROLLING SLEW RATE

      
Application Number 17939245
Status Pending
Filing Date 2022-09-07
First Publication Date 2023-05-18
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Tonge, Peter J.
  • Lesso, John P.

Abstract

This application relates to methods and apparatus for controlling slew-rate of components for outputting an analogue output signal. Described is a signal processing circuit having a forward signal path for receiving an input signal and outputting an analogue output signal. The signal processing circuit has a first component located in said forward signal path for outputting the analogue output signal. A predictor is configured to predict a required slew-rate for the first component based on the input signal and a controller is configured to controllably vary an output slew-rate limit of the first component based on the prediction of required slew-rate.

IPC Classes  ?

  • H03K 5/04 - Shaping pulses by decreasing duration
  • H03H 17/02 - Frequency-selective networks
  • H04R 3/00 - Circuits for transducers
  • G10L 19/04 - Speech or audio signal analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis using predictive techniques

96.

WINDOWING FILTER FOR AMPLIFIER DEVICE

      
Application Number 17749473
Status Pending
Filing Date 2022-05-20
First Publication Date 2023-05-11
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Parikh, Viral
  • Mehta, Jaiminkumar
  • Hellman, Ryan

Abstract

A method may include measuring a physical quantity associated with a load driven by an amplifier, generating a windowing function having a variable length and based on a number of samples of the physical quantity to be processed, applying the windowing function to the physical quantity, performing a transform on the physical quantity as filtered by the windowing function, and determining a characteristic of the load based on the transform.

IPC Classes  ?

  • H04R 3/04 - Circuits for transducers for correcting frequency response

97.

AMPLIFIER CIRCUITRY

      
Application Number 17751011
Status Pending
Filing Date 2022-05-23
First Publication Date 2023-05-11
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Eno, Charles W.
  • Prakash, Chandra B.

Abstract

Integrated circuitry implementing amplifier circuitry, the integrated circuitry comprising first amplifier circuitry and second amplifier circuitry, the first and second amplifier circuitry being configurable as first and second single-ended amplifiers or as a differential amplifier, wherein the first amplifier circuitry comprises: a first input stage; a first half-bridge output stage having an output coupled to a first output terminal of the integrated circuitry; a first feedback path coupling a first input of the first input stage to a first sense terminal of the first amplifier circuitry; a second feedback path coupling a second input of the first input stage to a second sense terminal of the first amplifier circuitry; and a first shunt resistor coupling the output of the first half-bridge output stage to the first feedback path, wherein the second amplifier circuitry comprises: a second input stage; and a second half-bridge output stage having an output coupled to a second output terminal of the integrated circuitry, and wherein the first amplifier circuitry further comprises a second shunt resistor coupling the second feedback path to a dedicated shunt resistor terminal of the integrated circuitry, such that the second shunt resistor is directly accessible from outside the integrated circuitry.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiers; Switching amplifiers
  • H03K 7/08 - Duration or width modulation
  • H03F 3/45 - Differential amplifiers
  • H03F 3/213 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits

98.

COMPENSATING FOR CURRENT SPLITTING ERRORS IN A MEASUREMENT SYSTEM

      
Application Number 17846832
Status Pending
Filing Date 2022-06-22
First Publication Date 2023-05-11
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Ilango, Anand
  • Maru, Siddharth
  • Das, Tejasvi
  • Melanson, John L.

Abstract

A system may include amplifier circuitry configured to drive an electromagnetic load with a driving signal and a processing system communicatively coupled to the electromagnetic load and configured to compensate for current-sensing error of the processing system caused by feedback circuitry of the amplifier circuitry.

IPC Classes  ?

  • G01R 27/16 - Measuring impedance of element or network through which a current is passing from another source, e.g. cable, power line
  • H03F 3/04 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only

99.

SYSTEMS AND METHODS FOR MINIMIZING IDLE CHANNEL NOISE IN A SINGLE-ENDED AMPLIFIER

      
Application Number 17545378
Status Pending
Filing Date 2021-12-08
First Publication Date 2023-05-11
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Prakash, Chandra B.
  • Peterson, Cory J.

Abstract

In accordance with embodiments of the present disclosure, a system may include a driver configured to drive a load with a single-ended driving signal and a signal return path for the load, wherein the signal return path comprises a voltage-mode driver configured to create a signal offset during an idle channel mode of the system in order to minimize idle channel noise at the load.

IPC Classes  ?

  • G11C 7/10 - Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers

100.

USER INPUT DEVICE

      
Application Number 17983959
Status Pending
Filing Date 2022-11-09
First Publication Date 2023-05-11
Owner Cirrus Logic International Semiconductor Ltd. (United Kingdom)
Inventor
  • Lorenz, Thomas
  • Doy, Anthony S.
  • Johanningsmeier, Nathan A.

Abstract

A solid state keyboard device comprising a user interaction layer for receiving a user input and a plurality of haptic actuators, wherein the solid state keyboard device is operable to cause one or more of the plurality of haptic actuators to generate a haptic output at the user interaction layer in response to a received user input, wherein one or more parameters of the haptic output are variable according to one or more parameters of or associated with the received user input.

IPC Classes  ?

  • G06F 3/02 - Input arrangements using manually operated switches, e.g. using keyboards or dials
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F 3/0354 - Pointing devices displaced or positioned by the user; Accessories therefor with detection of 2D relative movements between the device, or an operating part thereof, and a plane or surface, e.g. 2D mice, trackballs, pens or pucks
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
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