Tokyo Electron Limited

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        Patent 11,412
        Trademark 187
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        United States 7,344
        World 4,247
        Europe 6
        Canada 2
Owner / Subsidiary
[Owner] Tokyo Electron Limited 11,599
Tokyo Electron America, Inc. 93
Date
New (last 4 weeks) 136
2024 April (MTD) 119
2024 March 102
2024 February 98
2024 January 105
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IPC Class
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components 2,222
H01J 37/32 - Gas-filled discharge tubes 1,959
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof 1,545
H01L 21/3065 - Plasma etching; Reactive-ion etching 1,414
H01L 21/311 - Etching the insulating layers 1,014
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NICE Class
07 - Machines and machine tools 157
09 - Scientific and electric apparatus and instruments 47
37 - Construction and mining; installation and repair services 24
11 - Environmental control apparatus 17
41 - Education, entertainment, sporting and cultural services 6
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Status
Pending 1,727
Registered / In Force 9,872
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1.

EVAROS

      
Application Number 1788313
Status Registered
Filing Date 2024-03-14
Registration Date 2024-03-14
Owner Tokyo Electron Limited (Japan)
NICE Classes  ? 07 - Machines and machine tools

Goods & Services

Semiconductor manufacturing machines and their component parts and fittings; flat panel display manufacturing machines and their component parts and fittings.

2.

SUBSTRATE PROCESSING APPARATUS AND FLUID HEATING DEVICE

      
Application Number 18489229
Status Pending
Filing Date 2023-10-17
First Publication Date 2024-04-25
Owner Tokyo Electron Limited (Japan)
Inventor
  • Hayashida, Takahiro
  • Moriyama, Shigeru
  • Umezaki, Shota

Abstract

A substrate processing apparatus that dries a liquid adhering to a substrate by using a processing fluid in a supercritical state, includes: a processing container in which the substrate is accommodated; a plurality of pipes configured to allow the processing fluid to flow to and from the processing container therethrough; a first fluid heating device configured to heat a first pipe that supplies the processing fluid to an interior of the processing container among the plurality of pipes; and a second fluid heating device configured to heat a second pipe that discharges the processing fluid from the interior of the processing container among the plurality of pipes.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

3.

FREQUENCY-VARIABLE POWER SUPPLY AND PLASMA PROCESSING APPARATUS

      
Application Number 18382809
Status Pending
Filing Date 2023-10-22
First Publication Date 2024-04-25
Owner Tokyo Electron Limited (Japan)
Inventor Kaneko, Kazushi

Abstract

A frequency-variable power supply that outputs radio-frequency (RF) waves of a set frequency and includes an operation part configured to calculate a correction value according to each of a plurality of frequencies within an outputtable frequency range.

IPC Classes  ?

4.

PLASMA PROCESSING SYSTEM AND EDGE RING REPLACEMENT METHOD

      
Application Number 18398162
Status Pending
Filing Date 2023-12-28
First Publication Date 2024-04-25
Owner Tokyo Electron Limited (Japan)
Inventor
  • Matsuura, Shin
  • Kato, Kenichi

Abstract

A plasma processing system includes a control device. The control device executes raising a lifter to deliver a cover ring supporting an edge ring to the lifter; moving a jig supported by a holder to a space between the cover ring and a substrate support surface/an annular support surface; raising a different lifter to deliver the jig to the different lifter; extracting the holder, and then moving the lifter and the different lifter relatively to deliver the edge ring to the jig; lowering only the lifter to deliver the cover ring to the annular member support surface; moving the holder to a space between the cover ring and the jig, and then lowering the different lifter to deliver the jig to the holder; and extracting the holder from the processing chamber to transfer the jig supporting the edge ring from the processing chamber.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches

5.

Method for OES Data Collection and Endpoint Detection

      
Application Number 17972958
Status Pending
Filing Date 2022-10-24
First Publication Date 2024-04-25
Owner Tokyo Electron Limited (Japan)
Inventor
  • Voronin, Sergey
  • Messer, Blaze
  • Chen, Yan
  • Ng, Joel
  • Shalini, Ashawaraya
  • Zhu, Ying
  • Song, Da

Abstract

A method of processing a substrate that includes: exposing the substrate in a plasma processing chamber to a plasma powered by applying a first power to a first electrode of the plasma processing chamber for a first time duration; and after the first time duration, determining a process endpoint by: while exposing the substrate to the plasma by applying the first power to the first electrode, applying a second power to a second electrode of the plasma processing chamber for a second time duration that is shorter than the first time duration; and obtaining an optical emission spectrum (OES) from the plasma while applying the second power to the second electrode, where an energy of the second power over the second time duration is less than an energy of the first power over a sum of the first and the second time durations by a factor of at least 2.

IPC Classes  ?

6.

SUBSTRATE-PROCESSING METHOD AND SUBSTRATE-PROCESSING APPARATUS

      
Application Number 18482401
Status Pending
Filing Date 2023-10-05
First Publication Date 2024-04-25
Owner Tokyo Electron Limited (Japan)
Inventor Kanemura, Rui

Abstract

A substrate-processing method includes a) providing a substrate including a silicon oxide film on a surface of the substrate, b) supplying a gas mixture to the surface of the substrate, thereby etching the silicon oxide film, the gas mixture including fluorine-containing gas and basic gas, c) purging the surface of the substrate, and d) alternatingly repeating b) and c).

IPC Classes  ?

  • H01L 21/311 - Etching the insulating layers
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

7.

SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD

      
Application Number 18489188
Status Pending
Filing Date 2023-10-17
First Publication Date 2024-04-25
Owner Tokyo Electron Limited (Japan)
Inventor Fukushima, Kenji

Abstract

A substrate processing apparatus includes: a processing container; a substrate holder that horizontally holds the substrate inside the processing container; a liquid supplier that supplying a processing liquid to a lower surface of the substrate; a cover that discharges a gas toward an upper surface of the substrate; a gas supplier that supplies the gas to the cover; a heater that heats the gas; and a controller. The controller performs a control to: maintain a temperature of the heater at a second set temperature while the processing liquid is supplied to the lower surface; maintain the temperature of the heater at the first set temperature during a standby operation; and increase an output of the heater during the standby operation and raise the temperature of the heater from the first set temperature to the second set temperature until a subsequent substrate is loaded in the standby operation.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • C03C 15/00 - Surface treatment of glass, not in the form of fibres or filaments, by etching

8.

SELECTIVE GAS PHASE ETCH OF SILICON GERMANIUM ALLOYS

      
Application Number US2023032157
Publication Number 2024/085974
Status In Force
Filing Date 2023-09-07
Publication Date 2024-04-25
Owner
  • TOKYO ELECTRON LIMITED (Japan)
  • TOKYO ELECTRON U.S. HOLDINGS, INC. (USA)
Inventor
  • Kanaki, Toshiki
  • Kal, Subhadeep
  • Mosden, Aelan
  • Otto Iv, Ivo
  • Matsumoto, Masashi
  • Irie, Shinji

Abstract

Methods for selective etching of one layer or material relative to another layer or material adjacent thereto. In an example, a SiGe layer is etched relative to or selective to another silicon containing layer which either contains no germanium or geranium in an amount less than that of the target layer.

IPC Classes  ?

  • H01L 21/3213 - Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
  • H01L 21/3065 - Plasma etching; Reactive-ion etching

9.

DIFFRACTION GRATING FORMATION METHOD

      
Application Number JP2023036136
Publication Number 2024/084965
Status In Force
Filing Date 2023-10-04
Publication Date 2024-04-25
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Higuchi, Takuya
  • Tanaka, Fumiaki
  • Maehara, Hiroki

Abstract

Provided is a technique for forming a diffraction grating using a high-refractive-index material. This method for forming a diffraction grating on a substrate having permeability includes: (a) a step for forming, on the substrate, a first structure including recessed portions corresponding to protruding portions of the diffraction grating using a first material; (b) a step for providing a second material to the recessed portions of the first structure on the substrate to form a second structure including the diffraction grating; and (3) a step for removing the first structure.

IPC Classes  ?

  • G02B 5/18 - Diffracting gratings
  • B81C 1/00 - Manufacture or treatment of devices or systems in or on a substrate
  • G03F 7/20 - Exposure; Apparatus therefor
  • H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or

10.

PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD

      
Application Number JP2023036707
Publication Number 2024/085017
Status In Force
Filing Date 2023-10-10
Publication Date 2024-04-25
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor Tai, Masaki

Abstract

The present invention provides a plasma processing apparatus which is provided with: a plasma processing chamber; an antenna which is provided on the upper part of or above the plasma processing chamber; an RF power supply which is electrically connected to the antenna and is configured such that the frequency of the output power can be controlled; and a control unit. The RF power supply outputs a first output power which has a first frequency, and a second output power which has a second frequency and which is lower than the output power having the first frequency. The control unit executes: (a) a process for sweeping the second frequency, and searching for and identifying the resonance point; and (b) a process for tuning the first frequency to the resonance point.

IPC Classes  ?

  • C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges
  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H05H 1/46 - Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy

11.

SUBSTRATE TREATMENT METHOD AND SUBSTRATE TREATMENT DEVICE

      
Application Number JP2023036703
Publication Number 2024/085016
Status In Force
Filing Date 2023-10-10
Publication Date 2024-04-25
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Dinh, Congque
  • Nagahara, Seiji
  • Muramatsu, Makoto

Abstract

Provided is a substrate treatment method including a step for developing a substrate wherein a negative-type metal-containing resist film is formed and subjected to an exposure treatment and a heat-treatment after the exposure treatment, said substrate being developed using a polar development material and a nonpolar development material.

IPC Classes  ?

  • G03F 7/32 - Liquid compositions therefor, e.g. developers
  • G03F 7/004 - Photosensitive materials
  • G03F 7/30 - Imagewise removal using liquid means
  • H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or

12.

SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD

      
Application Number JP2023036392
Publication Number 2024/084987
Status In Force
Filing Date 2023-10-05
Publication Date 2024-04-25
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Nakashima, Mikio
  • Umezaki, Shota
  • Hayashida, Takahiro

Abstract

This substrate processing apparatus comprises: a processing vessel that has a carry in/out opening for substrates, and that accommodates the substrates; a lid that opens/closes the carry in/out opening; a gate opening/closing part that moves the lid; a substrate transfer part that holds and passes the substrate through the carry in/out opening; a first open/close valve that opens/closes a first flow path for supplying a purge gas to the processing vessel; and a control unit. The control unit determines whether carrying out of one of the substrates is followed by carrying in of another substrate. If carrying out of said one substrate is followed by carrying in of said another substrate, the control unit performs the carrying in of said another substrate after the carrying out of said one substrate, without switching the carry in/out opening from open state to closed state, and without switching the first flow path from closed state to open state.

IPC Classes  ?

  • H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting

13.

PROCESSING FLUID SUPPLY APPARATUS AND PROCESSING FLUID SUPPLY METHOD

      
Application Number JP2023036677
Publication Number 2024/085014
Status In Force
Filing Date 2023-10-10
Publication Date 2024-04-25
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Nakashima, Mikio
  • Umezaki, Shota
  • Hayashida, Takahiro

Abstract

A processing fluid supply apparatus (70) according to one aspect of the present disclosure is provided with a supply line (61), a cooling unit, a pump (75), a return line (90), a heating unit, and a flow volume adjustment mechanism. The supply line (61) supplies a processing fluid from a processing fluid supply source (60) to a substrate processing apparatus (1), the processing fluid supply source (60) supplying the processing fluid in gaseous state. The cooling unit is provided in the supply line (61), and generates a processing fluid in liquid state by cooling the processing fluid in gaseous state. The pump (75) is provided downstream of the cooling unit in the supply line (61). The return line (90), which is branched from a branch portion (76) positioned downstream of the pump (75) in the supply line (61), returns the processing fluid to a converging portion (71) positioned upstream of the cooling unit in the supply line (61). The heating unit is provided in the return line (90) to heat the processing fluid. The flow volume adjustment mechanism adjusts the flow volume of the processing fluid supplied to the heating unit.

IPC Classes  ?

  • H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting

14.

METHOD TO SELECTIVELY ETCH SILICON NITRIDE TO SILICON OXIDE USING WATER CRYSTALLIZATION

      
Application Number US2023032042
Publication Number 2024/085970
Status In Force
Filing Date 2023-09-06
Publication Date 2024-04-25
Owner
  • TOKYO ELECTRON LIMITED (Japan)
  • TOKYO ELECTRON U.S. HOLDINGS, INC. (USA)
Inventor
  • Tsai, Yu-Hao
  • Wang, Mingmei
  • Zhang, Du

Abstract

i.ei.ei.e., step 1).

IPC Classes  ?

15.

RESONANT ANTENNA FOR PHYSICAL VAPOR DEPOSITION APPLICATIONS

      
Application Number US2023029371
Publication Number 2024/085938
Status In Force
Filing Date 2023-08-03
Publication Date 2024-04-25
Owner
  • TOKYO ELECTRON LIMITED (Japan)
  • TOKYO ELECTRON U.S. HOLDINGS, INC. (USA)
Inventor
  • Lane, Barton
  • Takagi, Masaki

Abstract

Systems and methods provide a solution for efficiently generating high density plasma for a physical vapor deposition (PVD). The present solution includes a vacuum chamber for a PVD process. The system can include a target located within the vacuum chamber for sputtering a material onto a wafer. The system can include a resonant structure formed by an antenna and a plurality of capacitors. The resonant structure can be configured to provide a pulsed output at a resonant frequency. The resonant structure can be configured to generate, via the antenna and based on the pulsed output, a plasma between the target and a location of the wafer to ionize the material sputtered from the target.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation

16.

CUP, LIQUID PROCESSING APPARATUS, AND LIQUID PROCESSING METHOD

      
Application Number 18490119
Status Pending
Filing Date 2023-10-18
First Publication Date 2024-04-25
Owner Tokyo Electron Limited (Japan)
Inventor
  • Higashi, Ryunosuke
  • Yada, Kenji
  • Imura, Yoshihiro
  • Kawakami, Kohei
  • Maeda, Yuhei

Abstract

A cup includes a flow passage forming member forming a first exhaust passage, a scattered substance collection passage configured to collect a scattered substance from a substrate, and a second exhaust passage in sequence as going upwards; a joint exhaust passage connected to each of the first exhaust passage, the scattered substance collection passage, and the second exhaust passage; a first annular member included in the flow passage forming member, the scattered substance collection passage and the first exhaust passage being formed above and below the first annular member, respectively; and a communication hole provided in the flow passage forming member to allow the scattered substance collection passage and the joint exhaust passage to communicate with each other such that a pressure loss of the communication hole is large as compared to a pressure loss in a gap formed between the first annular member and the substrate.

IPC Classes  ?

  • B05C 11/11 - Vats or other containers for liquids or other fluent materials
  • B05C 11/10 - Storage, supply or control of liquid or other fluent material; Recovery of excess liquid or other fluent material

17.

PROCESSING LIQUID SUPPLY SYSTEM AND OPERATION METHOD THEREOF

      
Application Number 18380986
Status Pending
Filing Date 2023-10-16
First Publication Date 2024-04-25
Owner Tokyo Electron Limited (Japan)
Inventor
  • Kasahara, Masatoshi
  • Uchino, Keiichiro
  • Mori, Sadamichi
  • Iwanaga, Naohiro

Abstract

A processing liquid supply system includes a tank that stores a processing liquid supplied from a processing liquid supply, a circulation passage that is connected to the tank, a plurality of supply passages that is connected to the circulation passage and supplies the processing liquid to each of a plurality of liquid processing units that perform a liquid processing on a substrate, a first pump filter set that is a combination of a first pump and a plurality of first filters provided downstream of the first pump, and a second pump filter set that is a combination of a second pump and a plurality of second filters provided downstream of the second pump. The first pump filter set and the second pump filter set are arranged in series in the circulation passage such that the first pump filter set is located upstream of the second pump filter set.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • G05D 16/00 - Control of fluid pressure

18.

Polymer Removal via Multiple Flash Steps during Plasma Etch

      
Application Number 17970899
Status Pending
Filing Date 2022-10-20
First Publication Date 2024-04-25
Owner Tokyo Electron Limited (Japan)
Inventor
  • Dorfner, Alec
  • Park, Minjoon
  • Oh, Minseok

Abstract

A method of etching a target material using plasma includes cyclically performing the steps of an etch step for a first duration to etch a target material exposed in openings of a patterned mask material, and a flash step for a second duration after the first duration to remove polymer material accumulated at the openings during the etch step. The etch step is performed by generating plasma from an etch precursor gas including an etchant species. The target material may be a dielectric, such as a dielectric target material that includes an oxide. The flash step is performed by generating plasma from a flash precursor gas. Bias power may be provided to the substrate during the flash step. The flash species is different from the etchant species. The flash precursor gas may include oxygen and no fluorocarbons.

IPC Classes  ?

19.

RESONANT ANTENNA FOR PHYSICAL VAPOR DEPOSITION APPLICATIONS

      
Application Number 17971394
Status Pending
Filing Date 2022-10-20
First Publication Date 2024-04-25
Owner Tokyo Electron Limited (Japan)
Inventor
  • Lane, Barton
  • Takagi, Masaki

Abstract

Systems and methods provide a solution for efficiently generating high density plasma for a physical vapor deposition (PVD). The present solution includes a vacuum chamber for a PVD process. The system can include a target located within the vacuum chamber for sputtering a material onto a wafer. The system can include a resonant structure formed by an antenna and a plurality of capacitors. The resonant structure can be configured to provide a pulsed output at a resonant frequency. The resonant structure can be configured to generate, via the antenna and based on the pulsed output, a plasma between the target and a location of the wafer to ionize the material sputtered from the target.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • C23C 14/35 - Sputtering by application of a magnetic field, e.g. magnetron sputtering
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

20.

FILM FORMING DEVICE AND FILM FORMING METHOD

      
Application Number 18275359
Status Pending
Filing Date 2022-01-26
First Publication Date 2024-04-25
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor Yamawaku, Jun

Abstract

[Solution] A device according to the present disclosure comprises: a plasma generation chamber that is provided with a plasma generation mechanism for activating a second processing gas, when forming a film on a substrate by supplying each of a first processing gas, a substitution gas, the plasma-activated second processing gas, and the substitution gas, in order and by turns, to a processing vessel in which an interior processing space is evacuated so as to become a vacuum atmosphere; an evacuation mechanism that evacuates the plasma generation chamber; and a supply destination changing valve that is provided on an evacuation path connecting the plasma generation chamber and the evacuation mechanism, and opens and closes such that the supply destination of the plasma-activated second processing gas switches between a downstream side of the evacuation path, and the processing space.

IPC Classes  ?

  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges
  • C23C 16/52 - Controlling or regulating the coating process
  • H01J 37/32 - Gas-filled discharge tubes

21.

Time-Resolved OES Data Collection

      
Application Number 17973083
Status Pending
Filing Date 2022-10-24
First Publication Date 2024-04-25
Owner Tokyo Electron Limited (Japan)
Inventor
  • Voronin, Sergey
  • Mitrovic, Andrej
  • Messer, Blaze
  • Chen, Yan
  • Ng, Joel
  • Shalini, Ashawaraya
  • Zhu, Ying
  • Song, Da

Abstract

A method of processing a substrate that includes: exposing the substrate in a plasma processing chamber to a plasma powered by applying a first power to a first electrode of a plasma processing chamber; turning OFF the first power to the first electrode after the first time duration; while the first power is OFF, applying a second power to a second electrode of the plasma processing chamber for a second time duration, the second time duration being shorter than the first time duration, an energy of the second power over the second time duration is less than an energy of the first power over the first time duration by a factor of at least 2; and detecting an optical emission spectrum (OES) from species in the plasma processing chamber.

IPC Classes  ?

  • G01J 3/443 - Emission spectrometry
  • G01J 3/02 - Spectrometry; Spectrophotometry; Monochromators; Measuring colours - Details

22.

PROCESSOR THAT IMPLEMENTS INDIRECT ADDRESSING-STYLE CONDITIONAL JUMP INSTRUCTIONS, PROGRAM RECORDING MEDIUM, AND METHOD

      
Application Number JP2023030696
Publication Number 2024/084809
Status In Force
Filing Date 2023-08-25
Publication Date 2024-04-25
Owner
  • TAKEOKA LAB CORPORATION (Japan)
  • TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Takeoka, Shozo
  • Kinoshita, Yoshio

Abstract

Provided is a processor that reduces assembly code in a subroutine of an indirect addressing-style conditional jump. This processor includes a logic circuit implementing conditional jump instructions of assembly code, and is logically configured so as to store, in an index register, index register numbers serving as the indexes to jump destination effective addresses, and store, in respective reference registers, jump destination effective addresses differing from one another or address offsets to jump destination effective addresses differing from one another, and then, upon having fetched and decoded a conditional jump instruction, which is one instruction referencing the index register, (S1) acquire the jump destination effective address or the address offset from the reference register corresponding to an index register number in the content of the index register, and (S2) set, in a register serving as a program counter, the acquired jump destination effective address or a jump destination effective address that was calculated from the address offset.

IPC Classes  ?

  • G06F 9/32 - Address formation of the next instruction, e.g. by incrementing the instruction counter

23.

FLUID SUPPLY SYSTEM, SUBSTRATE PROCESSING APPARATUS, AND SUBSTRATE PROCESSING METHOD

      
Application Number JP2023026064
Publication Number 2024/084757
Status In Force
Filing Date 2023-07-14
Publication Date 2024-04-25
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Hayashida, Takahiro
  • Umezaki, Shota
  • Nakashima, Mikio

Abstract

A fluid supply system according to one aspect of the present disclosure supplies a fluid into a processing container in which a substrate is to be processed, said fluid supply system comprising: a processing fluid supply unit that supplies a processing fluid; a fluid supply path that is connected to the processing fluid supply unit and the processing container and that causes the processing fluid the temperature of which has been adjusted to flow into the processing container; a first heating mechanism that is provided to the fluid supply path and that heats the processing fluid to a first temperature; and a second heating mechanism that is provided to the fluid supply path and that heats the processing fluid to a second temperature which is lower than the first temperature, wherein the processing fluid supply unit has a flow rate adjustment mechanism that adjusts the flow rate of the processing fluid, and the fluid supply path has a first branch flow path that causes the processing fluid to pass through the first heating mechanism and flow into the processing container, and a second branch flow path that causes the processing fluid to pass through the second heating mechanism and flow into the processing container.

IPC Classes  ?

  • H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

24.

METHOD FOR FABRICATING A FERROELECTRIC DEVICE

      
Application Number US2023076990
Publication Number 2024/086529
Status In Force
Filing Date 2023-10-16
Publication Date 2024-04-25
Owner
  • TOKYO ELECTRON LIMITED (Japan)
  • TOKYO ELECTRON U.S. HOLDINGS, INC. (USA)
  • FERROELECTRIC MEMORY GMBH (Germany)
Inventor
  • Triyoso, Dina
  • Clark, Robert
  • Tapily, Kandabara
  • Schenk, Tony
  • Kashir, Alireza
  • Müeller, Stefan Ferdinand

Abstract

A method for fabricating a ferroelectric device includes providing a lower electrode layer on a substrate, forming a retention enhancement layer by oxidizing a surface of the lower electrode layer using a gas phase oxidation process, and depositing a ferroelectric high-k metal oxide layer over the retention enhancement layer on the lower electrode layer using a vapor deposition process. The retention enhancement layer on the lower electrode layer increases the retention performance and reliability of the ferroelectric device.

IPC Classes  ?

  • H10N 97/00 - Electric solid-state thin-film or thick-film devices, not otherwise provided for
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region

25.

FLUID SUPPLY SYSTEM, SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD

      
Application Number JP2023036501
Publication Number 2024/085000
Status In Force
Filing Date 2023-10-06
Publication Date 2024-04-25
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Hayashida, Takahiro
  • Nakashima, Mikio
  • Umezaki, Shota

Abstract

A fluid supply system according to one embodiment of the present disclosure supplies a fluid into a process chamber in which a substrate is processed, and this fluid supply system comprises: a first fluid supply unit which has a first supply valve and supplies a first fluid; a second fluid supply unit which has a second supply valve and supplies a second fluid; a fluid supply path which is connected to the first fluid supply unit, the second fluid supply unit and the process chamber, and supplies the first fluid and the second fluid into the process chamber; a heating mechanism which heats the first fluid and the second fluid, while being provided on the fluid supply path at a position that is in the downstream of the positions at which the first fluid supply unit and the second fluid supply unit are connected to the fluid supply path; and a control unit which controls those units of this fluid supply system. The control unit executes: a process in which the second supply valve is opened so as to supply the second fluid, which has been heated by the heating mechanism, into the process chamber when the first fluid is not supplied into the process chamber; and a process in which the second supply valve is closed so as to stop the supply of the second fluid into the process chamber before the substrate is carried into the process chamber. The second fluid supply process comprises a step for setting the set temperature of the heating mechanism to the same temperature as the set temperature of the heating mechanism at the time when the firs fluid is supplied into the process chamber.

IPC Classes  ?

  • H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting

26.

FILM FORMING METHOD AND FILM FORMING APPARATUS

      
Application Number 18476804
Status Pending
Filing Date 2023-09-28
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor Kubo, Kazumi

Abstract

A film forming method includes causing adsorption of a source gas on a substrate surface having a convex portion, and forming a film on the substrate surface using a thermal reaction between the adsorbed source gas and a reactive gas. The substrate is disposed on a surface of a turntable provided inside a vacuum chamber. An adsorption region in which the causing is performed, and a reaction region in which the forming is performed, are provided inside the vacuum chamber above the turntable along a circumferential direction of the turntable. The causing and the forming are repeated with respect to the substrate by rotating the turntable in a state where the source and reactive gases are supplied to the adsorption and reaction regions, respectively. At least one of the source gas supply and the reactive gas supply supplies the gas at an angle with respect to a vertically downward direction.

IPC Classes  ?

  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/04 - Coating on selected surface areas, e.g. using masks
  • C23C 16/40 - Oxides

27.

SUBSTRATE PROCESSING APPARATUS AND SHUTTER

      
Application Number 18381222
Status Pending
Filing Date 2023-10-18
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor
  • Aramaki, Takashi
  • Matsuzaka, Kojiro
  • Ogata, Atsushi
  • Li, Lifu
  • Park, Gyeong Min

Abstract

A substrate processing apparatus comprises a substrate support disposed in the chamber, a shutter including a valve body configured to open and close an opening of the chamber, and a baffle plate disposed between an inner peripheral side of the chamber and the substrate support and having a vertically inclined portion at an end portion on a substrate support side, and a contact member disposed on a side surface of the substrate support and formed of a conductive elastic member. In a state where the shutter is closed, contact between the end portion on the substrate support side and the contact member is maintained.

IPC Classes  ?

28.

SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE GRIPPING DEVICE

      
Application Number 18483608
Status Pending
Filing Date 2023-10-10
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor
  • Hashimoto, Yusuke
  • Goto, Daisuke
  • Ogata, Nobuhiro
  • Higashijima, Jiro
  • Obaru, Tomoaki
  • Mori, Kanta

Abstract

A substrate processing apparatus that supplies a processing liquid to a front surface of a substrate which is rotating, includes: a substrate holder configured to hold the substrate, wherein the substrate holder includes: a gripper configured to come into contact with a periphery of the substrate to grip the substrate; and a base to which the gripper is attached.

IPC Classes  ?

  • C23F 1/08 - Apparatus, e.g. for photomechanical printing surfaces

29.

CONSUMABLE MEMBER, PLASMA PROCESSING APPARATUS, AND METHOD OF MANUFACTURING CONSUMABLE MEMBER

      
Application Number 18398213
Status Pending
Filing Date 2023-12-28
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor
  • Moyama, Kazuki
  • Nagayama, Nobuyuki
  • Miura, Mamoru

Abstract

A consumable member includes a core portion formed of the material having a first purity; and a protection portion provided at a portion worn out by plasma in the plasma processing apparatus around the core portion, and formed of the material having a second purity higher than the first purity. The material may be either quartz or ceramic.

IPC Classes  ?

30.

TEST DEVICE AND TEMPERATURE CONTROL METHOD

      
Application Number 18546832
Status Pending
Filing Date 2022-02-14
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor Nakayama, Hiroyuki

Abstract

A test device according to one aspect of the present disclosure includes a stage configured to mount a substrate, a first temperature sensor configured to measure a surface temperature of the stage and a temperature of the substrate mounted on the stage, a second temperature sensor for controlling a temperature of the stage, and a controller configured to control the temperature of the stage by offsetting a control temperature of the second temperature sensor based on the surface temperature of the stage and the temperature of the substrate that are measured by the first temperature sensor.

IPC Classes  ?

  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

31.

METHOD TO SELECTIVELY ETCH SILICON NITRIDE TO SILICON OXIDE USING WATER CRYSTALLIZATION

      
Application Number 17967996
Status Pending
Filing Date 2022-10-18
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor
  • Tsai, Yu-Hao
  • Wang, Mingmei
  • Zhang, Du

Abstract

Embodiments of improved processes and methods that provide selective etching of silicon nitride are disclosed herein. More specifically, a cyclic, two-step dry etch process is provided to selectively etch silicon nitride layers formed on a substrate, while protecting oxide layers formed on the same substrate. The cyclic, two-step dry etch process sequentially exposes the substrate to: (1) a hydrogen plasma to modify exposed surfaces of the silicon nitride layer and the oxide layer to form a modified silicon nitride surface layer and a modified oxide surface layer, and (2) a halogen plasma to selectively etch silicon nitride by removing the modified silicon nitride surface layer without removing the modified oxide surface layer. The oxide layer is protected from etching during the removal step (i.e., step 2) by creating a crystallized water layer on the oxide layer during the surface modification step (i.e., step 1).

IPC Classes  ?

  • H01L 21/308 - Chemical or electrical treatment, e.g. electrolytic etching using masks

32.

SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS

      
Application Number 18397020
Status Pending
Filing Date 2023-12-27
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor
  • Nakane, Yuta
  • Kumakura, Sho

Abstract

In one exemplary embodiment, a substrate processing method includes: (a) providing a substrate including a metal-containing film and a mask provided on the metal-containing film; (b) forming a protective film on the mask; and (c) etching the metal-containing film after (b). (c) includes (c1) forming a second metal-containing substance from a first metal-containing substance contained in the metal-containing film by using a first processing gas including a fluorine-containing gas, and (c2) removing the second metal-containing substance by using a second processing gas including a precursor.

IPC Classes  ?

  • H01L 21/3213 - Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
  • H01L 21/033 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or comprising inorganic layers

33.

SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD

      
Application Number 18535134
Status Pending
Filing Date 2023-12-11
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor
  • Higashi, Koudai
  • Hayashi, Masato
  • Noguchi, Kohei

Abstract

A substrate processing apparatus includes a supply channel through which a liquid to be supplied to a substrate flows; and a foreign substance detecting unit configured to detect a foreign substance in the liquid based on a signal obtained when light, which is near-infrared light, is radiated toward a flow path forming unit constituting a part of the supply channel by a light projector so that light is emitted from the flow path forming unit and a light receiver receives the light emitted from the flow path forming unit.

IPC Classes  ?

  • G01N 21/39 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using tunable lasers
  • G01N 21/85 - Investigating moving fluids or granular solids

34.

COMPONENT REPLACEMENT METHOD, COMPONENT REPLACEMENT DEVICE, AND COMPONENT REPLACEMENT SYSTEM

      
Application Number 18025934
Status Pending
Filing Date 2022-05-27
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor
  • Endo, Hiroki
  • Sato, Suguru

Abstract

There is provided a component replacement method comprising: a) connecting a component replacement device to a chamber of a processing device configured to process a substrate; b) inserting an end effector disposed at a tip end of a transfer arm in the component replacement device into the chamber, and measuring a first distance from a predetermined position in the chamber to the end effector using a distance sensor provided on the end effector; c) moving the end effector until a difference between the first distance and a predetermined second distance becomes less than a predetermined third distance; d) capturing a feature disposed at a predetermined position in the chamber by a camera provided on the end effector; e) moving the end effector so that the feature is captured in a predetermined position in an image captured by the camera; and f) replacing a component in the chamber using the end effector with reference to a position of the end effector in a state where the feature is captured in the predetermined position in the image captured by the camera.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • H01J 37/244 - Detectors; Associated components or circuits therefor

35.

VAPORIZATION DEVICE, SEMICONDUCTOR MANUFACTURING SYSTEM, AND METHOD FOR VAPORIZING SOLID RAW MATERIAL

      
Application Number 18378932
Status Pending
Filing Date 2023-10-11
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor
  • Furuya, Yuichi
  • Mochizuki, Ryuta

Abstract

A vaporization device includes a vaporization amount adjusting plate that covers a surface of a solid raw material, and an exhaust passage that exhausts a carrier gas that flows while being faced with the vaporization amount adjusting plate. The vaporization amount adjusting plate has a plurality of through holes. An aperture ratio per unit area in the adjusting plate varies along a flowing direction of the carrier gas. The carrier gas is vaporized from the solid raw material and carries a predetermined raw material that has passed through the plurality of through holes.

IPC Classes  ?

  • C23C 16/448 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials
  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber

36.

SURFACE ENERGY MODIFICATION IN HYBRID BONDING

      
Application Number 18313177
Status Pending
Filing Date 2023-05-05
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor
  • Hooge, Joshua
  • Carcasi, Michael

Abstract

A semiconductor structure includes a semiconductor substrate and a dielectric layer disposed over the semiconductor substrate. The semiconductor structure includes a conductive feature embedded in the dielectric layer. The semiconductor structure includes a barrier layer disposed between the conductive feature and the dielectric layer. The semiconductor structure further includes a self-assembled monolayer (SAM) disposed over the barrier layer, at least a portion of the SAM directly contacting the conductive feature.

IPC Classes  ?

  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices

37.

SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD

      
Application Number 18275908
Status Pending
Filing Date 2022-01-31
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor
  • Higuchi, Rintaro
  • Nakamori, Mitsunori
  • Kagawa, Koji
  • Sekiguchi, Kenji
  • Nakabayashi, Hajime
  • Yonezawa, Syuhei

Abstract

A substrate processing method includes: (A) preparing a substrate, on which a high-dielectric film having a higher permittivity than a SiO2 film is formed; (B) supplying, to the substrate, a metal solution containing a second metal element having a higher electronegativity or a lower valence than a first metal element contained in the high-dielectric film; and (C) forming a doping layer, in which the first metal element is substituted with the second metal element, on a surface of the high-dielectric film.

IPC Classes  ?

38.

SELECTIVE GAS PHASE ETCH OF SILICON GERMANIUM ALLOYS

      
Application Number 17967298
Status Pending
Filing Date 2022-10-17
First Publication Date 2024-04-18
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Kanaki, Toshiki
  • Kal, Subhadeep
  • Mosden, Aelan
  • Otto, Iv, Lvo
  • Matsumoto, Masashi
  • Irie, Shinji

Abstract

Methods for selective etching of one layer or material relative to another layer or material adjacent thereto. In an example, a SiGe layer is etched relative to or selective to another silicon containing layer which either contains no germanium or geranium in an amount less than that of the target layer.

IPC Classes  ?

  • H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

39.

FILM FORMING METHOD AND FILM FORMING APPARATUS

      
Application Number 18481492
Status Pending
Filing Date 2023-10-05
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor
  • Takezawa, Yoshihiro
  • Kanazawa, Toru
  • Watanabe, Yosuke
  • Miyahara, Tatsuya
  • Tanabe, Yuki
  • Suzuki, Daisuke
  • Watanabe, Masahisa
  • Suzuki, Keisuke
  • Basu, Tuhin Shuvra

Abstract

A film forming method includes preparing a substrate having an amorphous silicon film on a surface thereof, diffusing nickel into the amorphous silicon film by supplying a nickel source gas to the amorphous silicon film, and forming a polycrystalline silicon film by heating the amorphous silicon film, and crystallizing the amorphous silicon film by metal-induced lateral crystallization using the nickel diffused in the amorphous silicon film as a nucleus.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • C23C 16/24 - Deposition of silicon only

40.

METHOD FOR FABRICATING A FERROELECTRIC DEVICE

      
Application Number 18487502
Status Pending
Filing Date 2023-10-16
First Publication Date 2024-04-18
Owner
  • Tokyo Electron Limited (Japan)
  • Ferroelectric Memory GmbH (Germany)
Inventor
  • Triyoso, Dina
  • Clark, Robert
  • Tapily, Kandabara
  • Schenk, Tony
  • Kashir, Alireza
  • Mueller, Stefan Ferdinand

Abstract

A method for fabricating a ferroelectric device includes providing a lower electrode layer on a substrate, forming a retention enhancement layer by oxidizing a surface of the lower electrode layer using a gas phase oxidation process, and depositing a ferroelectric high-k metal oxide layer over the retention enhancement layer on the lower electrode layer using a vapor deposition process. The retention enhancement layer on the lower electrode layer increases the retention performance and reliability of the ferroelectric device.

IPC Classes  ?

  • H10B 53/00 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/283 - Deposition of conductive or insulating materials for electrodes
  • H01L 21/321 - After-treatment

41.

METHOD FOR FORMING RESIST PATTERN, METHOD FOR PRODUCING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING DEVICE, AND STORAGE MEDIUM

      
Application Number 18470491
Status Pending
Filing Date 2023-09-20
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor
  • Nagahara, Seiji
  • Dinh, Congque
  • Muramatsu, Makoto
  • Cho, Kayoko

Abstract

Disclosed is a method for forming a resist pattern including, in the following order, irradiating a part of a resist film containing a resist material with a first radiation, baking the resist film, irradiating the entire region including the part irradiated with the first radiation and other parts in the resist film with a second radiation in a batch, and forming a resist pattern by development for removing a part of the resist film.

IPC Classes  ?

  • G03F 7/40 - Treatment after imagewise removal, e.g. baking

42.

METHOD OF CONTROLLING SUBSTRATE TRANSFER SYSTEM

      
Application Number 18478767
Status Pending
Filing Date 2023-09-29
First Publication Date 2024-04-18
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Kinoshita, Kosuke
  • Sugimoto, Takashi

Abstract

Provided is a method of controlling a substrate transfer system transferring substrates by controlling a first transfer device and a second transfer device comprising: a process of acquiring process module-specific substrate transfer positions for each of the plurality of process modules, wherein the process module-specific substrate transfer positions are substrate transfer positions of the mounting parts of the first transfer device for allowing the second transfer device to place substrates at centers of the stages, the second transfer device transferring substrates from the mounting parts of the load lock module to the stages of the process modules.

IPC Classes  ?

  • H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

43.

SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD

      
Application Number 18485469
Status Pending
Filing Date 2023-10-12
First Publication Date 2024-04-18
Owner Tokyo Electron Limited (Japan)
Inventor
  • Anamoto, Atsushi
  • Umeno, Shinichi

Abstract

A substrate processing apparatus includes: a reservoir configured to temporarily store a processing liquid for processing a substrate; a replenisher configured to replenish the processing liquid to the reservoir; a flow rate measurer configured to measure a flow rate of the processing liquid replenished to the reservoir; a gas supplier configured to supply gas to the reservoir to pressurize an interior of the reservoir; and a controller, wherein the controller is configured to control the gas supplier based on a value measured by the flow rate measurer to execute a process of replenishing the processing liquid from the replenisher to the reservoir while regulating a magnitude of an internal pressure of the reservoir.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • G05D 9/12 - Level control, e.g. controlling quantity of material stored in vessel characterised by the use of electric means
  • H01L 21/66 - Testing or measuring during manufacture or treatment

44.

PLASMA TREATMENT DEVICE AND PLASMA TREATMENT METHOD

      
Application Number JP2023031707
Publication Number 2024/080022
Status In Force
Filing Date 2023-08-31
Publication Date 2024-04-18
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor Otomo Hiroshi

Abstract

[Problem] To adjust energy of only ions of a specific type that are included in plasma. [Solution] This plasma treatment device comprises: a first electrode and a second electrode that face the inside of a treatment container which accommodates a substrate; a first high-frequency power source that supplies high-frequency power for generating plasma to the first electrode, and a second high-frequency power source that supplies high-frequency power to the second electrode; a sensor unit that measures a state of the plasma generated inside the treatment container; and a control unit. The second high-frequency power source can arbitrarily set the frequency of the high-frequency power supplied to the second electrode. The control unit acquires an ion plasma frequency of ions of a specific type on the basis of the results of measurement by the sensor unit and sets the frequency of the high-frequency power supplied to the second electrode to the ion plasma frequency, such that a high-frequency voltage having the ion plasma frequency is applied from the second electrode to the plasma.

IPC Classes  ?

  • H01L 21/31 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
  • C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges
  • H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H05H 1/46 - Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy

45.

INFORMATION PROCESSING METHOD, COMPUTER PROGRAM, AND INFORMATION PROCESSING DEVICE

      
Application Number JP2023036834
Publication Number 2024/080293
Status In Force
Filing Date 2023-10-11
Publication Date 2024-04-18
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Saitou, Yukiya
  • Sano, Kei

Abstract

Provided are an information processing method, a computer program, and an information processing device with which it can be expected to be able to perform control or the like of a subject device while correcting for mechanical differences from a reference device. The information processing device: acquires a sensor value of a subject device; inputs the acquired sensor value of the subject device into a sensor value conversion model; acquires a sensor value of the reference device that is output from the sensor value conversion model; inputs the acquired sensor value of the reference device, together with a desired target value, into a control input value determination model; acquires a control input value of the reference device that is output from the control input value determination model; inputs the acquired control input value of the reference device into the control input value conversion model; acquires a control input value of the subject device that is output from the control input value conversion model; and controls the subject device on the basis of the acquired control input value of the subject device.

IPC Classes  ?

  • G05B 13/02 - Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric
  • G05B 13/04 - Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric involving the use of models or simulators

46.

SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS

      
Application Number 18263920
Status Pending
Filing Date 2022-01-24
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor
  • Wada, Makoto
  • Ifuku, Ryota
  • Matsumoto, Takashi
  • Yamada, Hiroki

Abstract

A substrate processing method of processing a substrate includes: a carry-in process of carrying the substrate into a processing container; a first process of forming a first carbon film on the substrate with plasma of a first mixture gas containing a carbon-containing gas in a state in which interior of the processing container is maintained at a first pressure; and a second process of changing a pressure in the processing container to a second pressure higher than the first pressure.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • C23C 16/26 - Deposition of carbon only
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/511 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using microwave discharges
  • C23C 16/52 - Controlling or regulating the coating process
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

47.

APPARATUS FOR TRANSFERRING SUBSTRATE, SUBSTRATE PROCESSING SYSTEM AND METHOD OF PROCESSING SUBSTRATE

      
Application Number 18273446
Status Pending
Filing Date 2022-01-12
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor
  • Shindo, Takehiro
  • Shimamura, Akinori
  • Sakaue, Hiromitsu
  • Li, Dongwei

Abstract

Provided is an apparatus that transfers a substrate inside a substrate transfer chamber by a substrate transfer module using magnetic levitation. The apparatus includes: a substrate transfer chamber having a floor portion provided with a first magnet and connected, through an opening portion, to a substrate processing chamber in which the substrate is processed; and a substrate transfer module including a substrate holder configured to hold the substrate, and a second magnet configured such that a repulsive force acts between the first magnet and the second magnet. The substrate transfer module is movable inside the substrate transfer chamber by the magnetic levitation based on the repulsive force. The substrate transfer module performs loading/unloading of the substrate by directly entering into the substrate transfer chamber via the opening portion, or delivers the substrate to and from a substrate transfer mechanism fixedly provided inside the substrate transfer chamber.

IPC Classes  ?

  • H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

48.

PLASMA PROCESSING DEVICE, HIGH-FREQUENCY POWER SUPPLY CIRCUIT, AND IMPEDANCE MATCHING METHOD

      
Application Number 18274808
Status Pending
Filing Date 2022-01-19
First Publication Date 2024-04-11
Owner
  • TOKYO ELECTRON LIMITED (Japan)
  • KYUSHU UNIVERSITY, NATIONAL UNIVERSITY CORPORATION (Japan)
Inventor
  • Shiratani, Masaharu
  • Kamataki, Kunihiro
  • Koga, Kazunori
  • Shindo, Takahiro
  • Matsudo, Tatsuo

Abstract

There is provided a plasma processing apparatus for performing plasma processing on a substrate, comprising: a processing container accommodating the substrate; an electrode to which a high-frequency power for generating plasma in the processing container is applied; a high-frequency power supply configured to apply the high-frequency power to the electrode; and a high-frequency power supply circuit configured to supply the high-frequency power from the high-frequency power supply to the electrode. The high-frequency power supply circuit comprises: a power supply path configured to supply a power from the high-frequency power supply to the electrode; and a matching device configured to match a high-frequency power supply-side impedance with a plasma-side impedance, the matching device comprising a negative impedance portion that is connected to the power supply path and realizes a negative impedance corresponding to a plasma-side impedance.

IPC Classes  ?

49.

SHIFTED MULTI-VIA CONNECTION FOR HYBRID BONDING

      
Application Number 18373098
Status Pending
Filing Date 2023-09-26
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor Ryan, Kevin

Abstract

Shifted multi-via connections are disclosed. A method includes providing a first contact array structure on a first substrate. The first contact array structure includes a plurality of first contacts. The method includes providing a second contact array structure on a second substrate. The second contact array structure includes a plurality of second contacts configured to interface with the plurality of first contacts. The method includes bonding the first substrate to the second substrate. Portions of the first contact array structure, the second contact array structure or both the first and second contact array structures are intentionally shifted to compensate for misalignment that occurs during the bonding of the first substrate to the second substrate.

IPC Classes  ?

  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology

50.

PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD

      
Application Number 18392294
Status Pending
Filing Date 2023-12-21
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor Koshimizu, Chishio

Abstract

In a plasma processing apparatus, a radio-frequency power supply adjusts frequencies of radio-frequency power in each bias cycle of electrical bias energy. The radio-frequency power supply uses a reference time series of frequencies of the radio-frequency power in each bias cycle. The radio-frequency power supply repeats using a changed time series of frequencies of the radio-frequency power in each bias cycle to increase a degree of match based on an evaluation value. The changed time series results from shifting the reference time series by a phase shift amount, scaling the reference time series in a frequency direction, or scaling two or more of multiple time zones of the reference time series in a time direction.

IPC Classes  ?

51.

SUBSTRATE PROCESSING APPARATUS

      
Application Number 18483050
Status Pending
Filing Date 2023-10-09
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor
  • Kadobe, Masato
  • Nitadori, Hiromi
  • Abe, Takahiro
  • Sato, Junichi

Abstract

A substrate processing apparatus includes: a loading/unloading part having a first side surface into or from which a container accommodating a substrate is loaded or unloaded and a second side surface opposite to the first side surface; a substrate transfer part extending in a first direction orthogonal to the second side surface; and a plurality of batch processors adjacent to each other in a length direction of the substrate transfer part. The loading/unloading part includes: a first transfer device and a second transfer device configured to transfer the container; a first area accessible to the first transfer device and having a plurality of first storage shelves configured to store the container, a second area accessible to the second transfer device and having a plurality of second storage shelves configured to store the container; and a movable shelf configured to be movable between the first area and the second area.

IPC Classes  ?

  • B65G 1/10 - Storage devices mechanical with relatively-movable racks to facilitate insertion or removal of articles
  • B65G 49/06 - Conveying systems characterised by their application for specified purposes not otherwise provided for for fragile or damageable materials or articles for fragile sheets, e.g. glass

52.

System and Method for Plasma Process Uniformity Control

      
Application Number 17961335
Status Pending
Filing Date 2022-10-06
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor
  • Voronin, Sergey
  • Wang, Qi

Abstract

A method of plasma processing includes delivering direct current voltage to a substrate holder including an upper side configured to support a substrate disposed within a plasma processing chamber. The upper side is divided into a plurality of zones by a plurality of conductors electrically isolated from each other. The method further includes pulsing the direct current voltage as first direct current pulses to a first conductor of the plurality of conductors using first pulse parameters, and pulsing the direct current voltage as second direct current pulses to a second conductor of the plurality of conductors using second pulse parameters that are different from the first pulse parameters. The direct current voltage is pulsed to the second conductor while pulsing the direct current voltage to the first conductor.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

53.

HIGH PERFORMANCE 3D CHANNELS WITH UPSILON NANOSHEETS

      
Application Number 17962222
Status Pending
Filing Date 2022-10-07
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor
  • Gardner, Mark I.
  • Fulford, H. Jim

Abstract

A method for fabricating and a structure comprising one or more transistors where a transistor includes one or more nanosheets formed based on one or more layers of a nanosheet material. A layer of shell material can at least partly surround the one or more nanosheets to form one or more channels of the transistor. A gate structure of the transistor can at least partly surround each of the one or more channels. The gate structure can include a gate dielectric disposed between the layer of the shell material and a gate metal of the gate structure for each of the nanosheets, where the shell material can include a charge carrier mobility that is greater than a charge carrier mobility of the nanosheet material.

IPC Classes  ?

  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/775 - Field-effect transistors with one-dimensional charge carrier gas channel, e.g. quantum wire FET
  • H01L 29/786 - Thin-film transistors

54.

PLASMA PROCESSING APPARATUS AND CLEANING METHOD

      
Application Number 18544468
Status Pending
Filing Date 2023-12-19
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor Tsuchiya, Kazuki

Abstract

The chamber is internally provided with a stage on which a substrate is disposed, and an exhaust port connected to an exhaust system around the stage. The baffle is provided around the stage, and divides a space in the chamber into a processing space where plasma processing is performed on the substrate, and an exhaust space connected to the exhaust port. The switching mechanism switches the baffle between a shield state in which the baffle shields a plasma and a transmissive state in which the baffle allows a plasma to pass therethrough. The controller controls the switching mechanism to switch the baffle from the shield state to the transmissive state or from the transmissive state to the shield state.

IPC Classes  ?

55.

SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING DEVICE

      
Application Number JP2023034347
Publication Number 2024/075539
Status In Force
Filing Date 2023-09-21
Publication Date 2024-04-11
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Nakane Yuta
  • Kumakura Sho
  • Katahira Takeshi
  • Yonezawa Takahiro

Abstract

This substrate processing method includes (a) a step in which a substrate is provided, (b) a step in which a first processing gas containing an amino group and silicon is supplied to the substrate and a first layer is formed on the substrate, and (c) a step in which a metal-containing film is formed by reacting a second processing gas containing a metal halide-containing gas with the first layer.

IPC Classes  ?

  • C23C 16/08 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the deposition of metallic material from metal halides
  • C23C 16/30 - Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
  • H01L 21/3065 - Plasma etching; Reactive-ion etching

56.

BONDING DEVICE, BONDING SYSTEM, AND BONDING METHOD

      
Application Number JP2023034679
Publication Number 2024/075562
Status In Force
Filing Date 2023-09-25
Publication Date 2024-04-11
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Yamasaki, Yutaka
  • Terada, Takashi

Abstract

Provided is a bonding device for bonding a first substrate and a second substrate, the bonding device including: a first holding part that holds the first substrate by attraction; a second holding part that is disposed at a position facing the first holding part and that holds the second substrate by attraction; a processing container that accommodates the first holding part and the second holding part and that forms a processing space isolated from the outside; a moving mechanism that relatively moves the first substrate held by the first holding part and the second substrate held by the second holding part to a close position and a spaced position; a decompression unit that is connected to the processing container and that decompresses the processing space; and a pressing mechanism that brings the central sections of the first substrate and the second substrate into contact with each other at the close position and that presses at least the first substrate. The first holding part includes an electrostatic attraction part for electrostatically attracting the first substrate.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

57.

SUBSTRATE PROCESSING SYSTEM, AND CONVEYANCE METHOD

      
Application Number JP2023034920
Publication Number 2024/075592
Status In Force
Filing Date 2023-09-26
Publication Date 2024-04-11
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Okamura, Tatsuru
  • Makabe, Toshiyuki
  • Kita, Masatomo
  • Yanagi, Yoshihiro

Abstract

This substrate processing system includes a processing module, a vacuum conveyance module that is connected to the processing module and has a conveyance robot conveying a ring, a temperature adjustment unit that can adjust the temperature of the ring, and a control unit. The control unit performs, in order, a step for using the temperature adjustment unit to adjust the temperature of the ring before the ring is conveyed into the processing module, and a step for using the conveyance robot to convey the ring, the temperature of which has been adjusted by the temperature adjustment unit, and place the same on a substrate support unit.

IPC Classes  ?

  • H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
  • H01L 21/3065 - Plasma etching; Reactive-ion etching

58.

PLASMA TREATMENT DEVICE, POWER SUPPLY SYSTEM, AND FREQUENCY CONTROL METHOD

      
Application Number JP2023034969
Publication Number 2024/075596
Status In Force
Filing Date 2023-09-26
Publication Date 2024-04-11
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor Koshimizu Chishio

Abstract

The disclosed plasma treatment device comprises a chamber, a substrate-supporting portion, a high-frequency power supply, and a control unit. The substrate-supporting portion is provided inside the chamber. The high-frequency power supply is configured to supply source high-frequency electric power in order to generate plasma from gas within the chamber. The control unit is configured to set the source frequency of the source high-frequency electric power when the source high-frequency electric power is being supplied alone, in accordance with the extent of reflection of the source high-frequency electric power and the source frequency when the source high-frequency electric power has been supplied alone previously, such that the extent of reflection of the source high-frequency electric power is minimized.

IPC Classes  ?

  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H05H 1/46 - Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy

59.

SUBSTRATE PROCESSING DEVICE AND ELECTROSTATIC CHUCK

      
Application Number JP2023036250
Publication Number 2024/075785
Status In Force
Filing Date 2023-10-04
Publication Date 2024-04-11
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor Satake, Daisuke

Abstract

This substrate processing device comprises a chamber, an electrostatic chuck, a power source, and a control unit. The electrostatic chuck is provided inside a chamber and a substrate is placed thereon. Furthermore, the electrostatic chuck has a plurality of electrodes disposed in a direction that follows an upper surface of the electrostatic chuck. The power source applies a voltage across the plurality of electrodes to generate an electrostatic force in the plurality of electrodes. The control unit controls the power source such that the magnitude of the voltage applied to at least one electrode among the plurality of electrodes becomes a magnitude which is different than the magnitude of the voltage applied to the other electrodes.

IPC Classes  ?

  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

60.

SUBSTRATE PROCESSING APPARATUS AND CONTROL METHOD FOR A SUBSTRATE PROCESSING APPARATUS

      
Application Number 17961601
Status Pending
Filing Date 2022-10-07
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor
  • Tsugao, Keisuke
  • Takimoto, Yuji

Abstract

A substrate processing apparatus includes a plurality of processing units, an exhaust route, a gas processing device, and a controller. The exhaust route is provided where a gas that is discharged from the plurality of processing units. The gas processing device eliminates a target component in the gas and includes a duct, a partition plate, a liquid supply unit, and a concentration detection unit. The duct has a flow path. The partition plate partitions the flow path into a plurality of spaces and is formed of a porous material. The liquid supply unit supplies a dissolving liquid to the partition plate. The concentration detection unit detects a concentration of the target component. The controller regulates a flow volume of the dissolving liquid, based on at least one of operation information that indicates operation states of the plurality of processing units and a detection result of the concentration detection unit.

IPC Classes  ?

  • H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

61.

3D NANOSHEET STACK WITH DUAL SELECTIVE CHANNEL REMOVAL OF HIGH MOBILITY CHANNELS

      
Application Number 17962233
Status Pending
Filing Date 2022-10-07
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor
  • Fulford, H. Jim
  • Gardner, Mark I.

Abstract

A transistor structure may include a first transistor beside a second transistor. The first transistor can include a first nanosheet oriented horizontally and forming a first channel, a second nanosheet oriented horizontally and forming a second channel, and a first gate structure disposed between and at least partly surrounding the first channel and the second channel. The second transistor can include a third nanosheet oriented horizontally and forming a third channel, a fourth nanosheet oriented horizontally and forming a fourth channel, and a second gate structure disposed between and at least partly surrounding the third channel and the fourth channel. The first nanosheet can be disposed above the third nanosheet, the third nanosheet is disposed above the second nanosheet, and the second nanosheet is disposed above the fourth nanosheet.

IPC Classes  ?

  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/8256 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using technologies not covered by one of groups , or
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/775 - Field-effect transistors with one-dimensional charge carrier gas channel, e.g. quantum wire FET

62.

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF

      
Application Number 17962235
Status Pending
Filing Date 2022-10-07
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor
  • Fulford, H. Jim
  • Gardner, Mark I.
  • Mukhopadhyay, Partha

Abstract

A method includes forming a fin structure over a substrate, the fin structure including alternating first semiconductor layers and second semiconductor layers stacked along a vertical direction; forming a dummy gate structure over the fin structure; performing a plasma doping process to form source/drain regions in each second semiconductor layer adjacent the dummy gate structure, where a portion of each second semiconductor layer interposing between the source/drain regions defines a channel region; forming a dielectric layer over the fin structure; removing the dummy gate structure to form a gate trench in the dielectric layer; selectively removing the first semiconductor layers to form openings interleaved with the second semiconductor layers; depositing an inner spacer layer to partially fill the gate trench and the openings, wherein the inner spacer layer overlaps with the source/drain regions along the lateral direction; and forming a metal gate structure over the inner spacer layer.

IPC Classes  ?

  • H01L 29/66 - Types of semiconductor device
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/223 - Diffusion of impurity materials, e.g. doping materials, electrode materials, into, or out of, a semiconductor body, or between semiconductor regions; Redistribution of impurity materials, e.g. without introduction or removal of further dopant using diffusion into, or out of, a solid from or into a gaseous phase
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/775 - Field-effect transistors with one-dimensional charge carrier gas channel, e.g. quantum wire FET

63.

METHOD FOR SETTING UP TEST APPARATUS AND TEST APPARATUS

      
Application Number 18264319
Status Pending
Filing Date 2022-02-07
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor Watanabe, Shinjiro

Abstract

One aspect of the present disclosure relates to a method of setting up a test apparatus that is a method of setting up the test apparatus to test a substrate by bringing a probe into contact with an electrode pad formed on a chip on the substrate that is mounted on a stage. The method includes acquiring a first image including the probe in a probe card that is attached to the test apparatus. The method includes calculating first information including a center of gravity, and an angle, for the probe card, based on probe information including a position of the probe that is calculated based on the first image; and probe information or pad information that is pre-provisioned and corresponds to the probe card. The method includes acquiring a second image including the electrode pad on the substrate mounted on the stage. The method includes calculating second information including a center of gravity of the chip and an angle for the substrate, based on pad information that includes a position of the electrode pad and is calculated based on the second image; and pad information that is pre-provisioned and corresponds to the substrate. The method includes outputting the first information and the second information.

IPC Classes  ?

64.

SUBSTRATE PROCESSING APPARATUS

      
Application Number 18372995
Status Pending
Filing Date 2023-09-26
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor Gunji, Ryosuke

Abstract

A substrate processing apparatus includes a chamber comprising an exhaust port in a bottom portion of the chamber, a substrate support disposed within the chamber, a partition member that partitions a substrate processing region from an exhaust region connected to the exhaust port, one or more plate-shaped members provided upstream of the partition member with respect to a flow of exhaust gas to the exhaust port and configured to block particles from the partition member. At least one of the one or more plate-shaped members comprises a through-hole configured to allow the exhaust gas to the exhaust port to pass therethrough, the through-hole opened to be directed to a side surface of the substrate support or to an inner surface of the chamber.

IPC Classes  ?

65.

SUBSTRATE TRANSFER UNIT AND SUBSTRATE TRANSFER CONTROL METHOD

      
Application Number 18376512
Status Pending
Filing Date 2023-10-04
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor Taoda, Isamu

Abstract

A substrate transfer unit that transfers a substrate to a target transfer position includes a transfer mechanism having a portion where two arms are connected to each other by a shaft, an imager photographing the substrate, an image processor image-processing images, and a controller configured to perform feedback control of a drive mechanism such that when the substrate is transferred by a transfer mechanism, a shaft angle detected by a shaft angle detector reaches a target value, and perform correction of a feedback control based on image information obtained by image-processor. The transfer controller is further configured to perform the feedback control periodically, cause the imager and the image processor to perform the photographing and the image-processing in real time concurrently with the feedback control at least once for each feedback control, and perform the correction of the control operation whenever the feedback control is performed.

IPC Classes  ?

  • H01L 21/68 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for positioning, orientation or alignment
  • B25J 9/16 - Programme controls
  • B25J 13/08 - Controls for manipulators by means of sensing devices, e.g. viewing or touching devices
  • H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
  • H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches

66.

PLASMA PROCESSING METHOD AND PLASMA PROCESSING APPARATUS

      
Application Number 18389827
Status Pending
Filing Date 2023-12-20
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor
  • Sasagawa, Hironari
  • Kumakura, Sho

Abstract

A plasma processing method includes providing a substrate having a recess is provided in a processing container; generating plasma in the processing container to form a film on the recess; monitoring a state of the plasma generated in the generating; and determining necessity of re-execution of the generating and processing conditions for the re-execution based on the monitored plasma state.

IPC Classes  ?

67.

SUBSTRATE TREATMENT METHOD, SUBSTRATE TREATMENT APPARATUS, AND COMPUTER STORAGE MEDIUM

      
Application Number 18473459
Status Pending
Filing Date 2023-09-25
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor
  • Kawakami, Shinichiro
  • Yoshihara, Kosuke
  • Shimura, Satoru
  • Kuwahara, Yuhei
  • Onitsuka, Tomoya
  • Okada, Soichiro
  • Furusho, Tetsunari

Abstract

A substrate treatment method includes: performing a first heat treatment on a substrate on which a coating film of a metal-containing resist has been formed and subjected to an exposure treatment, to form the metal-containing resist into a precursor in an exposed region of the coating film; thereafter, performing a second heat treatment on the substrate to condense the metal-containing resist formed into the precursor in the exposed region of the coating film; and thereafter, performing a developing treatment on the substrate.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or

68.

PLACING TABLE AND SUBSTRATE PROCESSING APPARATUS

      
Application Number 18477047
Status Pending
Filing Date 2023-09-28
First Publication Date 2024-04-11
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Kikuchi, Yusuke
  • Shinada, Masato

Abstract

There is a placing table comprising: an electrostatic chuck having a chuck electrode, wherein the electrostatic chuck is configured to attract and hold a substrate on a placing surface and to be rotatable; a freezing device having a contact surface in contact with or separated from a surface of the electrostatic chuck opposite to the placing surface and configured to cool the electrostatic chuck; and a power controller configured to superimpose a radio frequency (RF) bias voltage applied to the electrostatic chuck on a chuck voltage applied to the chuck electrode.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • C23C 14/35 - Sputtering by application of a magnetic field, e.g. magnetron sputtering
  • C23C 14/50 - Substrate holders

69.

FILM FORMING APPARATUS AND FILM FORMING METHOD

      
Application Number 18477060
Status Pending
Filing Date 2023-09-28
First Publication Date 2024-04-11
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor Suzuki, Yasunobu

Abstract

A film forming apparatus for performing film formation on a substrate comprises a processing chamber, a stage configured to place thereon a substrate disposed in the processing chamber, a film forming part configured to perform film formation on the substrate placed on the stage, a shutter that is movable between a shielding position where the substrate on the stage is shielded and a retracted position retracted from the stage and where the film forming part performs the film formation on the substrate, and a film thickness measuring part. The film thickness measuring part has a film thickness measuring device configured to measure a film thickness of a film formed on the shutter at the shielding position by the film forming part.

IPC Classes  ?

  • C23C 14/34 - Sputtering
  • C23C 14/16 - Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
  • C23C 14/50 - Substrate holders

70.

MOTOR CONTROL METHOD, TRANSFER DEVICE, AND STORING MEDIUM

      
Application Number 18480575
Status Pending
Filing Date 2023-10-04
First Publication Date 2024-04-11
Owner Tokyo Electron Limited (Japan)
Inventor
  • Masaki, Youichi
  • Yano, Mitsuteru
  • Sekimoto, Eiichi
  • Otsuka, Tsuyoshi
  • Teramoto, Akihiro
  • Ito, Teppei
  • Takayanagi, Koji

Abstract

A motor control method for transferring an object to be transferred by a moving object that moves by driving of a motor in a substrate processing apparatus, includes: a data acquisition process of acquiring, at different times, pieces of drive data which relate to the driving of the motor and vary with heat generation of the motor; and a transfer process of transferring the object to be transferred by controlling current to be supplied to the motor, based on each of the pieces of drive data, to compensate for displacement of the object to be transferred from a target transfer position due to the heat generation of the motor.

IPC Classes  ?

71.

SUBSTRATE TREATMENT SYSTEM AND EDGE RING ATTACHMENT METHOD

      
Application Number JP2023030543
Publication Number 2024/075423
Status In Force
Filing Date 2023-08-24
Publication Date 2024-04-11
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Aramaki, Takashi
  • Li, Lifu
  • Sasaki, Nobutaka
  • Akama, Toshiki
  • Kato, Shusei
  • Park, Gyeong Min
  • Shimizu, Wataru
  • Koitabashi, Ryota

Abstract

Provided is a substrate treatment system comprising a plasma treatment device, a reduced pressure transfer device that is connected to the plasma treatment device, and a control device. The plasma treatment device has: a treatment container that is configured such that the pressure thereof can be reduced; a substrate support base that is provided inside the treatment container, that includes a substrate placement surface, a ring placement surface on which an edge ring is placed so as to surround the substrate, and an electrostatic chuck which electrostatically clamps the edge ring to the ring placement surface, and that is connected to a power source which supplies direct current voltage in pulses for bias; a raising/lowering mechanism that raises and lowers the edge ring; and a plasma generation unit that generates plasma in the treatment container. The reduced pressure transfer device has a transfer robot that transfers the edge ring. The control device controls: a step for lowering, with the raising/lowering mechanism, the edge ring that has been transferred in the treatment container by the transfer robot and received by the raising/lowering mechanism, and placing the edge ring on the ring placement surface; a step for electrostatically clamping, to the ring placement surface, the edge ring that has been placed; and a step for generating plasma in the treatment container prior to plasma treatment of the substrate and stabilizing the electrostatically clamping of the edge ring to the electrostatic chuck. The stabilizing step includes a step for applying, to the substrate support base, the direct current voltage in pulses for bias. The step for applying the direct current voltage includes a first step for applying a first bias voltage and a second step for applying a second bias voltage that is higher than the first bias voltage after the first step.

IPC Classes  ?

  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • B65G 49/07 - Conveying systems characterised by their application for specified purposes not otherwise provided for for fragile or damageable materials or articles for semiconductor wafers
  • H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

72.

BONDING DEVICE, BONDING SYSTEM, AND BONDING METHOD

      
Application Number JP2023034693
Publication Number 2024/075566
Status In Force
Filing Date 2023-09-25
Publication Date 2024-04-11
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Nakamitsu, Takashi
  • Fukushima, Hideyuki
  • Wakamoto, Yukihiro
  • Matuo, Yuhei
  • Saiki, Keiichi
  • Kohama, Norifumi

Abstract

A bonding method for bonding substrates together, the method comprising: (a) a step for moving a first holding part and a second holding part relative to each other by a movement mechanism so as to cause a first substrate being held on the undersurface of the first holding part and a second substrate being held on the top surface of the second holding part to be disposed to face each other; (b) a step for bringing the central part of the first substrate and the central part of the second substrate into abutment with each other by means of an abutment member; (c) a step for bonding the first substrate and the second substrate from the central part of the first substrate toward the outer peripheral part thereof in a state in which the central part of the first substrate and the central part of the second substrate are in abutment with each other; and (d) a step for measuring, at least in said step (c), a real position of the first holding part and/or the second holding part moved in the step (a), and inspecting the state of the bonding process on the basis of the real position.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • G01B 21/00 - Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant

73.

SUBSTRATE PROCESSING SYSTEM AND SUBSTRATE ABNORMALITY DETECTION METHOD

      
Application Number JP2023034814
Publication Number 2024/075579
Status In Force
Filing Date 2023-09-26
Publication Date 2024-04-11
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Nagai, Ryu
  • Ishikawa, Shinya
  • Sato, Kenta
  • Tanaka, Koki

Abstract

This substrate processing system comprises a load port, a processing chamber, a measurement unit, and a control unit. The load port is configured such that a storage container containing a substrate can be connected thereto. The processing chamber is configured to implement substrate processing on the substrate. The measurement unit is provided on a path for transporting the substrate between the storage container and the processing chamber, and is configured to measure a spectrum distribution in the plane of the substrate. The control unit is configured to create an outlier detection model on the basis of the spectrum distribution in the plane of the substrate measured by the measurement unit, use the created outlier detection model to calculate a score in the plane of the substrate from the measured spectrum distribution in the plane of the substrate, and detect abnormality in the substrate on the basis of the calculated score.

IPC Classes  ?

  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • G01N 21/956 - Inspecting patterns on the surface of objects

74.

SURFACE OBSERVATION METHOD

      
Application Number JP2023035017
Publication Number 2024/075598
Status In Force
Filing Date 2023-09-26
Publication Date 2024-04-11
Owner
  • TOKYO ELECTRON LIMITED (Japan)
  • KYOTO UNIVERSITY (Japan)
Inventor
  • Oowada, Shin
  • Asako, Ryuichi
  • Shimura, Satoru
  • Tanaka, Kazuo
  • Ito, Shunichiro
  • Chujo, Yoshiki
  • Yuhara, Kazuhiro

Abstract

This surface observation method comprises a step a) and a step b). In the step a), materials including one or more kinds of solid light-emitting dye molecules are accumulated in a region, of a substrate or a structure on the substrate, having an abnormal shape. In the step b), a fluorescent image of the solid light-emitting dye molecules is acquired by applying illumination light to the region, of the substrate or the structure on the substrate, having the abnormal shape.

IPC Classes  ?

  • G03F 7/004 - Photosensitive materials
  • G03F 7/40 - Treatment after imagewise removal, e.g. baking
  • G01N 21/70 - Systems in which the material investigated is excited whereby it emits light or causes a change in wavelength of the incident light mechanically excited, e.g. triboluminescence
  • G01N 21/91 - Investigating the presence of flaws, defects or contamination using penetration of dyes, e.g. fluorescent ink
  • H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or
  • H01L 21/66 - Testing or measuring during manufacture or treatment

75.

SYSTEM AND METHOD FOR PLASMA PROCESS UNIFORMITY CONTROL

      
Application Number US2023028448
Publication Number 2024/076410
Status In Force
Filing Date 2023-07-24
Publication Date 2024-04-11
Owner
  • TOKYO ELECTRON LIMITED (Japan)
  • TOKYO ELECTRON U.S. HOLDINGS, INC. (USA)
Inventor
  • Voronin, Sergey
  • Wang, Qi

Abstract

A method of plasma processing includes delivering direct current voltage to a substrate holder including an upper side configured to support a substrate disposed within a plasma processing chamber. The upper side is divided into a plurality of zones by a plurality of conductors electrically isolated from each other. The method further includes pulsing the direct current voltage as first direct current pulses to a first conductor of the plurality of conductors using first pulse parameters, and pulsing the direct current voltage as second direct current pulses to a second conductor of the plurality of conductors using second pulse parameters that are different from the first pulse parameters. The direct current voltage is pulsed to the second conductor while pulsing the direct current voltage to the first conductor.

IPC Classes  ?

76.

SHIFTED MULTI-VIA CONNECTION FOR HYBRID BONDING

      
Application Number US2023034072
Publication Number 2024/076497
Status In Force
Filing Date 2023-09-29
Publication Date 2024-04-11
Owner
  • TOKYO ELECTRON LIMITED (Japan)
  • TOKYO ELECTRON U.S. HOLDINGS, INC. (USA)
Inventor Ryan, Kevin

Abstract

Shifted multi-via connections are disclosed. A method includes providing a first contact array structure on a first substrate. The first contact array structure includes a plurality of first contacts. The method includes providing a second contact array structure on a second substrate. The second contact array structure includes a plurality of second contacts configured to interface with the plurality of first contacts. The method includes bonding the first substrate to the second substrate. Portions of the first contact array structure, the second contact array structure or both the first and second contact array structures are intentionally shifted to compensate for misalignment that occurs during the bonding of the first substrate to the second substrate.

IPC Classes  ?

  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

77.

ETCHING METHOD AND PLASMA PROCESSING APPARATUS

      
Application Number 18376050
Status Pending
Filing Date 2023-10-03
First Publication Date 2024-04-04
Owner Tokyo Electron Limited (Japan)
Inventor
  • Takata, Fumiya
  • Togashi, Wataru
  • Oikawa, Kota

Abstract

In one embodiment, an etching method includes (a) preparing a substrate having a first region including a first material that contains silicon, and a second region including a second material different from the first material, and (b) etching the first region by plasma generated from a processing gas containing a carbon- and fluorine-containing gas, a nitrogen-containing gas, and a metal halide gas. In (b), a flow rate of the metal halide gas is lower than a flow rate of the carbon- and fluorine-containing gas and a flow rate of the nitrogen-containing gas.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01L 21/3065 - Plasma etching; Reactive-ion etching

78.

SUBSTRATE TRANSFER MODULE AND SUBSTRATE TRANSFER METHOD

      
Application Number 18472157
Status Pending
Filing Date 2023-09-21
First Publication Date 2024-04-04
Owner Tokyo Electron Limited (Japan)
Inventor
  • Suwa, Mitsuyori
  • Shindo, Takehiro
  • Tateishi, Akio

Abstract

A substrate transfer module includes: a transfer space in which a transport body including a magnet moves in a lateral direction while being levitated from a floor by magnetic force to transfer a substrate; a hole forming member having a through-hole formed in a vertical direction; a partition member that forms the floor by overlapping a hole edge portion of the through-hole in the vertical direction to block the through-hole, and defines the transfer space having an atmosphere that is separated from a non-transfer space including a portion under the floor outside the transfer space; and a plurality of electromagnets provided in the non-transfer space at positions overlapping the through-hole to move the transport body in the lateral direction, wherein each of the electromagnets is individually fed with power from a power feeder provided in the non-transfer space via a power feed line.

IPC Classes  ?

  • H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations

79.

ETCHING METHOD AND PLASMA PROCESSING SYSTEM

      
Application Number 18479599
Status Pending
Filing Date 2023-10-02
First Publication Date 2024-04-04
Owner Tokyo Electron Limited (Japan)
Inventor
  • Matsubara, Ryo
  • Takahashi, Atsushi
  • Nakane, Yuta
  • Saito, Noboru

Abstract

In one exemplary embodiment, there is provided an etching method. The method includes (a) preparing a substrate, the substrate comprising a silicon-containing film and a mask, the silicon-containing film including a recess, the mask being provided on the silicon-containing film and including an opening that exposes the recess; (b) forming a carbon-containing film on a side wall of the silicon-containing film, the side wall defining the recess; and (c) by using a plasma generated from a processing gas, forming a protective film containing tungsten on the carbon-containing film and etching the silicon-containing film in the recess, the processing gas including a fluorine-containing gas and a tungsten-containing gas.

IPC Classes  ?

  • H01L 21/311 - Etching the insulating layers
  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/3213 - Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer

80.

PLASMA PROCESSING SYSTEM, PLASMA PROCESSING APPARATUS, AND ETCHING METHOD

      
Application Number 18479986
Status Pending
Filing Date 2023-10-03
First Publication Date 2024-04-04
Owner Tokyo Electron Limited (Japan)
Inventor
  • Saito, Noboru
  • Nakane, Yuta
  • Takahashi, Atsushi
  • Ishikawa, Shinya
  • Ohuchida, Satoshi
  • Tomura, Maju

Abstract

A plasma processing system includes: first and second processing chambers having respective first and second substrate supports; a transport chamber connected to the first and second processing chambers, and having a transport device; and a controller that executes processing of (a) disposing a substrate including a silicon-containing film having a recess portion and a mask on the silicon-containing film on the first substrate support of the first processing chamber, (b) forming a carbon-containing film on a side wall of the silicon-containing film defining the recess portion in the first processing chamber, (c) transporting the substrate from the first processing chamber to the second processing chamber via the transport chamber and disposing the substrate on the second substrate support, and (d) etching a bottom portion of the recess portion where the carbon-containing film is formed by using a plasma formed from a first processing gas in the second processing chamber.

IPC Classes  ?

  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/308 - Chemical or electrical treatment, e.g. electrolytic etching using masks
  • H01L 21/311 - Etching the insulating layers

81.

In-Situ Adsorbate Formation for Dielectric Etch

      
Application Number 17937179
Status Pending
Filing Date 2022-09-30
First Publication Date 2024-04-04
Owner Tokyo Electron Limited (Japan)
Inventor
  • Zhang, Du
  • Tsai, Yu-Hao
  • Yokoi, Masahiko
  • Wang, Mingmei
  • Kihara, Yoshihide

Abstract

A method of processing a substrate that includes: flowing an etch gas, O2, and an adsorbate precursor into a plasma processing chamber that is configured to hold the substrate including a silicon-containing dielectric layer and a patterned mask layer, the etch gas including hydrogen and fluorine; generating a plasma in the plasma processing chamber while flowing the etch gas, O2, and the adsorbate precursor, the adsorbate precursor being oxidized to form an adsorbate; and patterning, with the plasma, the silicon-containing dielectric layer on the substrate, where the adsorbate forms a sidewall passivation layer.

IPC Classes  ?

82.

Low-Temperature Etch

      
Application Number 17956089
Status Pending
Filing Date 2022-09-29
First Publication Date 2024-04-04
Owner Tokyo Electron Limited (Japan)
Inventor
  • Zhang, Du
  • Tomura, Maju
  • Mukaiyama, Koki
  • Niizeki, Tomohiko
  • Kihara, Yoshihide
  • Wang, Mingmei

Abstract

A method of processing a substrate that includes: flowing dioxygen (O2) and a hydrogen-containing gas into a plasma processing chamber that is configured to hold the substrate, the substrate including an organic layer and a patterned etch mask, the hydrogen-containing gas including dihydrogen (H2), a hydrocarbon, or hydrogen peroxide (H2O2); generating an oxygen-rich plasma while flowing the gases; maintaining a temperature of the substrate in the plasma processing chamber between −150° C. and −50° C.; and while maintaining the temperature, exposing the substrate to the oxygen-rich plasma to form a recess in the organic layer.

IPC Classes  ?

  • H01L 21/308 - Chemical or electrical treatment, e.g. electrolytic etching using masks

83.

SUBSTRATE PROCESSING DEVICE AND SUBSTRATE PROCESSING METHOD

      
Application Number JP2023029148
Publication Number 2024/070267
Status In Force
Filing Date 2023-08-09
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Ishikawa, Shinya
  • Nagai, Tsutomu
  • Yamamoto, Kyouhei
  • Tsuda, Takafumi

Abstract

This substrate processing device comprises: a chamber; and a substrate support part that is disposed in the chamber and that supports a substrate. The substrate support part has: a first base having a substrate support surface supporting the substrate; and a second base disposed below the first base. The first base includes a heater, a first heat transfer part, and a second heat transfer part. The heater is embedded inside the first base. The first heat transfer part is provided inside the first base, which is spaced further apart from the substrate support surface than the heater and in a position corresponding to a first region, which includes a central region, of the substrate support surface. The second heat transfer part is provided inside the first base, which is spaced further apart from the substrate support surface than the heater and in a position corresponding to a second region surrounding the first region, and has a greater thermal conductivity than the first heat transfer part. Furthermore, the second base is cooled.

IPC Classes  ?

  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

84.

PLASMA TREATMENT DEVICE AND ETCHING METHOD

      
Application Number JP2023029158
Publication Number 2024/070268
Status In Force
Filing Date 2023-08-09
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Torii, Natsumi
  • Takayama, Wataru
  • Suzuki, Takayuki
  • Kato, Hiroki

Abstract

A plasma treatment device according to the present invention comprises: a plasma treatment chamber; a substrate support body that includes a lower electrode, an electrostatic chuck, and an edge ring; an upper electrode that is disposed above the substrate support body; a source RF power supply that supplies source RF power to the upper electrode or the lower electrode; a bias power supply that supplies bias power to the lower electrode; a direct-current power supply that applies direct-current voltage that has negative polarity to the edge ring; an RF filter that is electrically connected between the edge ring and the direct-current power supply and includes at least one variable passive element; and a control unit that is configured to control the direct-current power supply and the variable passive element so as to adjust the incidence angle of the ions in plasma at an edge region of a substrate mounted on the electrostatic chuck and adjust the voltage of the bias power to an allowable range.

IPC Classes  ?

  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H05H 1/00 - Generating plasma; Handling plasma
  • H05H 1/46 - Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy

85.

COMMUNICATION SYSTEM, CALCULATION DEVICE, AND COMMUNICATION METHOD

      
Application Number JP2023029639
Publication Number 2024/070304
Status In Force
Filing Date 2023-08-16
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor Tokairin Motoki

Abstract

Disclosed is a communication system comprising a main device, a plurality of subordinate devices, and a calculation device. A data frame that is transmitted to the plurality of subordinate devices includes a plurality of datagrams for the respective ones of the plurality of subordinate devices. Each of the plurality of datagrams includes setting data for a corresponding subordinate device among the plurality of subordinate devices, and monitor data that is to be written in the corresponding subordinate device. The calculation device is configured to determine, on the basis of the monitor data of each of the plurality of subordinate devices in the data frame received in a preceding communication cycle, updated setting data for each of the plurality of datagrams in a data frame to be transmitted to the plurality of subordinate devices in a subsequent communication cycle.

IPC Classes  ?

  • H04L 12/28 - Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
  • C23C 16/509 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges using internal electrodes
  • H01L 21/3065 - Plasma etching; Reactive-ion etching

86.

COOLING DEVICE, SUBSTRATE PROCESSING DEVICE, AND COOLING METHOD

      
Application Number JP2023031593
Publication Number 2024/070457
Status In Force
Filing Date 2023-08-30
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor Ikeda Kyoko

Abstract

This cooling device cools a to-be-cooled item using a gas, and comprises: a case that accommodates the to-be-cooled item and includes side walls that surround the periphery of the to-be-cooled item; a plurality of supply holes that are disposed in the side walls of the case at an interval, and that are flow paths to allow the gas to flow into the case from a space outside the case; and a discharge path that is formed in the case, and that is for discharging the gas inside the case. In order to form a rotational flow that rotates in the case along the side walls, the plurality of supply holes are formed so as to be oriented in directions such that the gas is discharged along the direction of the rotational flow when the case is viewed in a plan view.

IPC Classes  ?

  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
  • H01L 21/31 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers

87.

PLASMA PROCESSING DEVICE AND POWER SUPPLY SYSTEM

      
Application Number JP2023032784
Publication Number 2024/070578
Status In Force
Filing Date 2023-09-08
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Iwano, Mitsuhiro
  • Noro, Motoki

Abstract

Provided is technology for improving the controllability of plasma generated on a substrate. This plasma processing device includes: a chamber; a substrate support part provided within the chamber, the substrate support part including a lower electrode; an upper electrode disposed above the substrate support part; a first RF power supply configured to supply a first RF signal having a first RF frequency to the upper electrode or to the lower electrode; a second RF power supply configured to supply a second RF signal having a second RF frequency to the lower electrode; and a third RF power supply configured to supply a third RF signal having a third RF frequency to the lower electrode. The three RF power supplies supply RF signals at respective electric power levels in three periods within respective cycles.

IPC Classes  ?

  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H05H 1/46 - Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy

88.

INSPECTION METHOD, INSPECTION DEVICE, AND PROGRAM

      
Application Number JP2023033304
Publication Number 2024/070678
Status In Force
Filing Date 2023-09-13
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Hayashi, Hiroaki
  • Sano, Satoshi
  • Takahashi, Miyoshi
  • Akiyama, Kazuya
  • Wada, Reo

Abstract

Provided is a technology capable of precisely bringing a probe into contact with an electrode formed on an object to be inspected. Provided is an inspection method that is executed by an inspection device comprising a placement stage on which the object to be inspected is placed and a probe card provided with a probe that is used for the inspection of the object to be inspected, the inspection method executing a step for bringing the probe into contact with the electrode on the basis of a first offset value, a step for setting a second offset value based on a probe mark region formed as a result of the contact of the probe with the electrode on the basis of the first offset value, and a step for bringing the probe into contact with the electrode on the basis of the second offset value.

IPC Classes  ?

  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • G01R 31/26 - Testing of individual semiconductor devices

89.

FILM FORMING METHOD AND FILM FORMING DEVICE

      
Application Number JP2023033327
Publication Number 2024/070683
Status In Force
Filing Date 2023-09-13
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Yamada, Kazuki
  • Murakami, Hiroki
  • Sakai, Shuichiro
  • Yamaji, Tomohito

Abstract

This film forming method includes: preparing a substrate having a resist film in the upper surface of which an opening is formed; supplying the substrate with a metal-containing gas that contains a metal, thereby causing the metal to permeate at least the upper section of the resist film; and supplying the substrate with a precursor gas containing silanol, thereby selectively forming a protective film containing silicon and oxygen on the upper surface of the resist film as compared to the side surface and bottom surface of the opening.

IPC Classes  ?

  • H01L 21/316 - Inorganic layers composed of oxides or glassy oxides or oxide-based glass
  • G03F 7/095 - Photosensitive materials - characterised by structural details, e.g. supports, auxiliary layers having more than one photosensitive layer
  • G03F 7/11 - Photosensitive materials - characterised by structural details, e.g. supports, auxiliary layers having cover layers or intermediate layers, e.g. subbing layers
  • G03F 7/40 - Treatment after imagewise removal, e.g. baking
  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H01L 21/31 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers

90.

FILM FORMING METHOD, FILM FORMING DEVICE, AND FILM FORMING SYSTEM

      
Application Number JP2023033332
Publication Number 2024/070685
Status In Force
Filing Date 2023-09-13
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor Yamauchi Susumu

Abstract

This film forming method for forming a molybdenum film or a tungsten film includes: preparing a substrate; forming a film containing molybdenum or tungsten on the substrate by means of ALD using an organometallic source gas containing molybdenum or tungsten and a reactant gas; and performing treatment in which ions are made to act on the film during or after the film formation.

IPC Classes  ?

  • C23C 16/06 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the deposition of metallic material
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber

91.

METHOD FOR PRODUCING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE

      
Application Number JP2023033862
Publication Number 2024/070800
Status In Force
Filing Date 2023-09-19
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Ikejiri Masahiro
  • Akiyama Koji
  • Fujiwara Naonori
  • Yamazaki Kazuyoshi

Abstract

A method for producing a semiconductor device which comprises: forming a lower electrode on a substrate; forming, on the lower electrode, a high-permittivity film comprising an oxide containing a tetravalent metal cation; forming, on the high-permittivity film, an oxide film comprising an oxide containing a pentavalent metal cation; reacting the high-permittivity film with the oxide film to form an electroconductive mixture layer comprising a mixture of an oxide containing the tetravalent metal cation and an oxide containing the pentavalent metal cation; and forming an upper electrode.

IPC Classes  ?

  • H01L 21/316 - Inorganic layers composed of oxides or glassy oxides or oxide-based glass
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

92.

SUBSTRATE TREATMENT METHOD AND SUBSTRATE TREATMENT SYSTEM

      
Application Number JP2023033864
Publication Number 2024/070801
Status In Force
Filing Date 2023-09-19
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Iwashita Mitsuaki
  • Kikuchi Yuki
  • Nakamura Genji
  • Nagai Hiroyuki
  • Kawano Yumiko
  • Azumo Shuji
  • Fujita Keiichi

Abstract

This substrate treatment method includes: forming an Ru film on a substrate through electroless plating; carrying out a treatment using an inert-gas plasma on the substrate on which the Ru film is formed; and carrying out a reduction treatment on the substrate after the treatment using the inert-gas plasma.

IPC Classes  ?

  • H01L 21/288 - Deposition of conductive or insulating materials for electrodes from a liquid, e.g. electrolytic deposition
  • C23C 18/42 - Coating with noble metals
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 21/3205 - Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials

93.

METHOD FOR CONTROLLING LIFTER PIN AND CONVEYANCE ARM

      
Application Number JP2023033944
Publication Number 2024/070818
Status In Force
Filing Date 2023-09-19
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Nishimori, Yuichi
  • Kawamura, Toshiki
  • Miyamatsu, Junya

Abstract

Provided is a method which is for controlling a lifter pin and is for performing substrate delivery between a conveyance arm on which a multistage effector is mounted and a stage inside a processing module of a substrate processing device, wherein the multistage effector: has a plurality of sensors for determining the height of the lifter pin; uses the plurality of sensors to determine the height position of the lifter pin; and adjusts the height of the lifter pin on the basis of the determination result.

IPC Classes  ?

  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
  • H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations

94.

SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING SYSTEM

      
Application Number JP2023034013
Publication Number 2024/070834
Status In Force
Filing Date 2023-09-20
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Kumakura, Sho
  • Ono, Kenta
  • Nakane, Yuta
  • Nishizuka, Tetsuya
  • Honda, Masanobu

Abstract

The present invention provides a technology for adjusting the exposure sensitivity of a resist film. The present invention provides a substrate processing method. This method comprises (a) a step (ST1) for providing a substrate that has a base film, and (b) a step (ST2) for forming a metal-containing resist film on the base film. The (b) step comprises (b1) a step (ST21) for forming a first resist film, which contains a metal, on the base film, and (b2) a step (ST22) for forming a second resist film, which contains a metal at a composition ratio that is different from the composition ratio of the fist resist film, on the first resist film.

IPC Classes  ?

  • C23C 16/18 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the deposition of metallic material from metallo-organic compounds
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or

95.

SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS

      
Application Number JP2023034066
Publication Number 2024/070843
Status In Force
Filing Date 2023-09-20
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Moyama, Kazuki
  • Saito, Michishige

Abstract

Provided is a substrate processing method for processing a substrate by supplying a gas from a gas supply unit into a substrate processing space in a substrate processing apparatus. The gas supply unit comprises a plurality of gas sources, a flow path for circulating the gas from the plurality of the gas sources to the substrate processing space, and a valve provided in the flow path to switch between opening and closing of the circulation of the gas. Pulse control is performed to cause the circulation of the gas to pulsate by alternately repeating the opening and closing of the circulation of the gas in the valve, wherein the duration of continuation of the pulse control and the number of times of opening the circulation of the gas in the duration of continuation are controlled to control the flow volume of the gas.

IPC Classes  ?

  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber

96.

SUBSTRATE PROCESSING METHOD

      
Application Number JP2023034146
Publication Number 2024/070858
Status In Force
Filing Date 2023-09-20
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Fuse, Takashi
  • Toda, Kazuya

Abstract

Provided is a substrate processing method in which, for a substrate comprising a first surface including a metallic material and a second surface including a dielectric material, a silicon dioxide film is selectively formed on the second surface relative to the first surface. The substrate processing method comprises: a step for preparing a first surface including a metallic material and a second surface including a dielectric material containing oxygen; a step for exposing the substrate to a boron-containing substance to selectively form a boron-containing film on the second surface relative to the first surface; and a step for exposing the substrate to a silanol gas to form a silicon dioxide film on the second surface on which the boron-containing film was formed.

IPC Classes  ?

  • H01L 21/316 - Inorganic layers composed of oxides or glassy oxides or oxide-based glass
  • C23C 16/42 - Silicides

97.

SUBSTRATE PROCESSING SYSTEM AND TRANSPORT METHOD

      
Application Number JP2023034678
Publication Number 2024/071020
Status In Force
Filing Date 2023-09-25
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Okamura, Tatsuru
  • Kita, Masatomo
  • Song, Young Tae

Abstract

A substrate processing system according to an embodiment of the present disclosure comprises: a plurality of processing units each having a substrate support unit that supports a substrate and a ring disposed around the substrate; a vacuum transport unit connected to the plurality of processing units; a housing unit housing the ring; and a control unit. The vacuum transport unit includes a transport robot that transports the substrate or the ring. The control unit performs control to execute a step for removing all substrates from the plurality of processing units and the vacuum transport unit, and a step for transporting the ring between at least one of the plurality of processing units and the housing unit after the removing step.

IPC Classes  ?

  • H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
  • H01L 21/3065 - Plasma etching; Reactive-ion etching

98.

SUBSTRATE TREATMENT SYSTEM

      
Application Number JP2023034825
Publication Number 2024/071073
Status In Force
Filing Date 2023-09-26
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Akama, Toshiki
  • Kato, Shusei
  • Park, Gyeong Min
  • Sasaki, Nobutaka
  • Aramaki, Takashi
  • Li, Lifu

Abstract

This substrate treatment system comprises a plasma treatment device, a decompression transfer device connected to the plasma treatment device, and a control device, wherein the plasma treatment device includes: a treatment container configured to be decompressible; a substrate support stage provided in the treatment container and including a substrate mounting surface, a ring mounting surface on which an edge ring is mounted to enclose the substrate mounting surface, and an electrostatic chuck which electrostatically adsorbs the edge ring to the ring mounting surface; a lift mechanism which lifts the edge ring with respect to the ring mounting surface; a supply path, through which a gas is supplied, between the back of the edge ring and the ring mounting surface; and a pressure sensor connected to the supply path. The decompression transfer device includes a transfer robot which transfers the edge ring, and the control device controls: a step for lowering, by means of the lift mechanism, the edge ring transferred by the transfer robot in the treatment container and delivered to the lift mechanism, and mounting the edge ring on the ring mounting surface; a step for electrostatically adsorbing the mounted edge ring to the ring mounting surface; a step for supplying the gas to the supply path so that the pressure of the supply path is maintained to be higher than that in the treatment container performed after the electrostatically adsorbing step; a step for measuring the pressure of the supply path; and a step for determining, on the basis of the measured pressure, a mounted state of the edge ring on the ring mounting surface.

IPC Classes  ?

  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations

99.

SUBSTRATE PROCESSING SYSTEM

      
Application Number JP2023034968
Publication Number 2024/071130
Status In Force
Filing Date 2023-09-26
Publication Date 2024-04-04
Owner TOKYO ELECTRON LIMITED (Japan)
Inventor
  • Okamura Tatsuru
  • Kita Masatomo
  • Song Young Tae

Abstract

The disclosed substrate processing system includes a vacuum transfer chamber, a plurality of substrate processing modules, a ring stocker, a transfer robot, and a control unit. The plurality of substrate processing modules and the ring stocker are connected to the vacuum transfer chamber. When the transfer robot is using at one of at least two end effectors to transfer only a new edge ring, the control unit controls the transfer robot in response to a substrate transfer request so as to transfer a substrate through the vacuum transfer chamber by using an end effector from among the at least two end effectors that is not being used by the transfer robot.

IPC Classes  ?

  • H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H05H 1/46 - Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy

100.

METHODS TO PROVIDE UNIFORM WET ETCHING OF MATERIAL WITHIN HIGH ASPECT RATIO FEATURES PROVIDED ON A PATTERNED SUBSTRATE

      
Application Number US2023030666
Publication Number 2024/072563
Status In Force
Filing Date 2023-08-21
Publication Date 2024-04-04
Owner
  • TOKYO ELECTRON LIMITED (Japan)
  • TOKYO ELECTRON U.S. HOLDINGS, INC. (USA)
Inventor
  • Hu, Shan
  • Zhang, Henan
  • Kumari, Sangita
  • D'Elia, Peter

Abstract

Embodiments of a wet etch process and methods are disclosed herein to provide uniform wet etching of material within high aspect ratio features. In the present disclosure, a wet etch process is used to etch material within high aspect ratio features, such as deep trenches and holes, provided on a patterned substrate. Uniform wet etching is provided in the present disclosure by ensuring that wall surfaces of the material being etched (or wall surfaces adjacent to the material being etched) exhibit a neutral surface charge when exposed to the etch solution used to etch the material.

IPC Classes  ?

  • H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
  • H01L 21/311 - Etching the insulating layers
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