Provided is a semiconductor device that, with respect to a trench MOSFET having a vertical channel fin structure, is capable of improving the short circuit tolerance and reducing the gate capacity while maintaining a high channel density. A semiconductor 1 is configured so that channel current flows in the vertical direction, and comprises: a plurality of trenches 2, the longitudinal direction thereof being a first direction and the transverse direction thereof being a second direction, the trenches being disposed in the second direction when observed in plan view; a first source region 3 of a first electroconductive type; a second source region 4 of the first electroconductive type and including a region in which at least a portion thereof has a fin structure partitioned by the plurality of trenches 2; a channel region 5 of the second electroconductive type and having a fin structure partitioned by the plurality of trenches 2; a gate insulation film and a gate electrode that are disposed inside a trench 2; and a JFET region 8 of the first electroconductive type and a body region 9 of the second electroconductive type. The second source region 4 has a shorter depth from the surface than the first source region 3.
Provided is a resin-sealed power semiconductor module that does not use a base plate or heat sink to serve as a support member for an insulating substrate, and that can effectively suppress cracking of the insulating substrate, which is susceptible to occur during cooling and curing of the sealing resin. This resin-sealed power semiconductor module, which does not have a support member of an insulating substrate, is characterized by comprising: an insulating substrate; a first conductor layer pattern disposed on the insulating substrate; a second conductor layer pattern that is disposed on the insulating substrate and is electrically insulated from the first conductor layer pattern; a third conductor layer pattern that is disposed on the insulating substrate and is electrically insulated from the first conductor layer pattern and the second conductor layer pattern; a first semiconductor chip group having one or more semiconductor chips bonded onto the first conductor layer pattern; a second semiconductor chip group having one or more semiconductor chips bonded onto the second conductor layer pattern; a first lead frame that electrically connects the side of the first semiconductor chip group opposite to the surface bonding with the first conductor pattern, and the second conductor layer pattern; and a second lead frame that electrically connects the side of the second semiconductor chip group opposite to the surface bonding with the second conductor layer pattern, and the third conductor layer pattern, wherein the first lead frame and the second lead frame are each disposed straddling a slit between the first conductor layer pattern and the second conductor layer pattern, and are disposed such that the lead frames are singly formed in a direction perpendicular to the arrangement surface of each conductor layer pattern of the insulating substrate.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/28 - Encapsulation, e.g. encapsulating layers, coatings
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
Provided is a semiconductor device which has, during an OFF time, a carrier discharge path that is provided in an IGBT, and increases an IE effect while assuring breakdown resistance against avalanches, and is thereby capable of reducing an ON-voltage. This semiconductor device 1 has: a first trench 7 having formed therein a gate electrode 9 with a gate insulating film 10 interposed therebetween; and a second trench 8 having formed therein an in-trench emitter electrode 13 with an in-trench insulating film 14 interposed therebetween, wherein an emitter layer 11 is not in contact with the second trench 8, and, in a vertical cross-section, when Wg is the width of the first trench 7, We is the width of the second trench 8, and Wb is the width of a body layer 6 interposed between the first trench 7 and the second trench 8, WG ≤ Wb and We/Wb ≥ 2.
The present invention provides a rectifier circuit which uses a rectifying switching element and which can reduce the required capacitance of a capacitor that supplies power to a drive circuit for driving the rectifying switching element. A rectifier circuit 2 having an anode A and a cathode K comprises: a rectifying switching element (MOSFETQ1); a diode (body diode DQ1); a drive circuit 1 that drives the rectifying switching element (MOSFETQ1); and a capacitor C1 that supplies power to the drive circuit 1, wherein during the period from when the rectifying switching element (MOSFETQ1) turns off until the rectifying switching element (MOSFETQ1) subsequently turns on, the capacitor C1 has a first charging period and a second charging period in which the capacitor C1 is charged, and a charging stop period which is provided between the first charging period and the second charging period and in which charging of the capacitor C1 is stopped.
H02M 7/21 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
H02M 7/12 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
5.
GATE DRIVE CIRCUIT FOR SEMICONDUCTOR SWITCHING ELEMENT, ELECTRIC MOTOR CONTROL SYSTEM, AND SEMICONDUCTOR DEVICE
Provided is a gate drive circuit for a semiconductor switching element, the gate drive circuit driving and controlling the semiconductor switching element by using two independent gate electrodes, and being characterized in that the time constant of the voltage of a gate electrode is set to be longer when a second gate electrode (Gc) is off than when a first gate electrode (Gs) is off, and the voltage V*of the second gate electrode (Gc) at the point in time that a maximum power is applied when the semiconductor switching element (31) is turned off satisfies expression (1). Expression (1): 0 ≤ V* ≤ prescribed value < +Vp (in the expression, +Vp is the gate drive voltage when the semiconductor switching element is on)
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
H03K 17/08 - Modifications for protecting switching circuit against overcurrent or overvoltage
H03K 17/64 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being bipolar transistors having inductive loads
6.
OVERCURRENT STATE ASSESSMENT DEVICE, OVERCURRENT STATE ASSESSMENT METHOD, AND ELECTRIC POWER CONVERSION SYSTEM
The present invention makes it possible to suitably estimate the cause of occurrence of an overcurrent in an electric power conversion device. For this purpose, an assessment device (50) is provided with: a detection result storage unit (51) that stores a detection result in an overcurrent detection circuit (20), the detection result being acquired from an electric power conversion device (1); and a type assessment unit (52) that, on the basis of the detection result stored by the detection result storage unit (51), assesses which state is in effect from among a first overcurrent state in which an overcurrent produced in the electric power conversion device (1) flows between any upper arm part (HA1-HAn) and any lower arm part (LA1-LAn) or a second overcurrent state in which the overcurrent flows out from an output terminal (AC).
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
Provided is a semiconductor DC breaker which has redundancy so as to be able to cut off a current even if a semiconductor switching element for cutting off a current when an abnormal current is detected has failed. This semiconductor DC breaker 1 having a semiconductor switching element 21 for cutting off a main current when an abnormal current is detected comprises: a fuse 25 connected to the semiconductor switching element 21 in series; an abnormal current detection unit 11 that detects an abnormal current; and a gate drive unit 12 that turns off the semiconductor switching element 21 when the abnormal current detection unit 11 has detected an abnormal current. The magnitude of the abnormal current at which the semiconductor switching element 21 is to be turned off is set so as to be smaller than that of the fusing current of the fuse 25.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/58 - Structural electrical arrangements for semiconductor devices not otherwise provided for
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H02H 3/08 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to excess current
H02J 1/00 - Circuit arrangements for dc mains or dc distribution networks
8.
SEMICONDUCTOR DEVICE, RECTIFYING ELEMENT USING SAME, AND ALTERNATOR
A semiconductor device that is equipped with a MOSFET with a Zener diode embedded and capable of achieving both improvement in the surge resistance and the low on-resistance of the MOSFET is provided. The semiconductor device equipped with a MOSFET with a Zener diode embedded includes an active region in which the MOSFET operates, and a peripheral region that is disposed outside of the active region and holds a withstand voltage of a chip peripheral portion, in which the active region includes a first region including a chip central portion and a second region disposed outside of the first region, and a withstand voltage of the first region is lower than a withstand voltage of the second region and a withstand voltage of the peripheral region.
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 27/07 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
9.
POWER SEMICONDUCTOR MODULE AND MOTOR DRIVE SYSTEM USING SAME
Provided is a power semiconductor module that comprises a snubber capacitor and that can achieve both a higher current density and prevention of overheating in the snubber capacitor. The present invention is characterized by comprising: a positive electrode terminal; a negative electrode terminal disposed such that, in plan view, at least a portion thereof overlaps the positive electrode terminal; first wiring that is branched from the positive electrode terminal; second wiring that is branched from the negative electrode terminal; and a snubber capacitor that is disposed outside a position at which the positive electrode terminal and the negative electrode terminal overlap each other in plan view, and that is connected via the first wiring and the second wiring.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
10.
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME
The present invention provides a semiconductor device which comprises a field plate that is connected to a guard ring, which is formed in a termination region, by the intermediary of a barrier metal layer, wherein it is possible to suppress the remaining of a residue of the barrier metal layer. According to the present invention, a termination region 22 comprises: a semiconductor substrate 1 of a first conductivity type; a plurality of guard rings 2 of a second conductivity type, the guard rings 2 being formed on the semiconductor substrate; an insulating film 3 which is in contact with the semiconductor substrate and the guard rings, while having openings at positions that correspond to the guard rings; a plurality of barrier metal layers 4 which are formed at least in the openings of the insulating film so as to be in contact with the guard rings, while being separated from each other; and a plurality of field plates 5, the outlines of which are outside the outlines of the barrier metal layers when viewed in plan, while being arranged so as to be separated from each other and being in contact with the upper surfaces of the barrier metal layers and the upper surface of the insulating film.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 29/41 - Electrodes characterised by their shape, relative sizes or dispositions
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
Provided is a compact and highly reliable power semiconductor device that prevents partial discharge originating from voids generated by the entering of water vapor from the exterior of the semiconductor device through a sealing resin or voids generated between a main terminal and the sealing resin when the main terminal is heated. The power semiconductor device comprises an insulating substrate, a semiconductor element provided on a front surface of the insulating substrate, and a gel-like first insulation material for sealing the semiconductor element. The power semiconductor device further includes a plate-shaped terminal for electrically connecting the semiconductor element and an external equipment, and an entire portion of the plate-shaped terminal surrounded by the first insulating material is covered with a second insulating material having a hardness greater than that of the first insulating material.
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 23/60 - Protection against electrostatic charges or discharges, e.g. Faraday shields
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
Provided is a semiconductor module comprising a power semiconductor chip, a base, an insulating substrate bonded to the base, a semiconductor chip bonded to the insulating substrate, and a case adhered to the base by means of an adhesive. The semiconductor module has a low variability but a high assembly quality and reliability enabling a decrease in stress between the case and an adhered portion of the base. The base includes a plate-like first material, and a second material coating the first material and having a linear coefficient of expansion greater than that of the first material. The case covers at least part of a side surface of the base and is adhered to the base at least on an upper surface of the base by means of the adhesive, and a linear expansion coefficient of the case is larger than the linear expansion coefficient of the first material.
H01L 23/053 - Containers; Seals characterised by the shape the container being a hollow construction and having an insulating base as a mounting for the semiconductor body
Provided is a semiconductor device where an electric field applied to an electric field protection layer at a bottom of a trench gate electrode of an active region is relaxed and an avalanche withstand voltage is improved. The semiconductor device includes: an active region that has multiple gate trenches, a trench gate electrode in each gate trench, and a P body layer provided to a section other than the gate trenches; and a termination region disposed on the outer periphery of the active region. Additionally, an electric field protection layer is provided to the bottom of each gate trench of the active region, an electric field relaxation layer is between the active region and the termination region, the bottom surface of the electric field relaxation layer is shallower than that of the electric field protection layer, and the electric field relaxation layer is electrically connected to the P body layer.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
14.
ENERGIZATION INSPECTION APPARATUS, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND ENERGIZATION METHOD
An electric connection inspection device includes: a cooling plate; an insulating plate provided on the cooling plate; a first measurement electrode provided on the insulating plate; and a second measurement electrode and a third measurement electrode provided above the first measurement electrode and located apart from the first measurement electrode. The insulating plate includes a variable thermal resistance mechanism. A semiconductor device can be installed between the first measurement electrode and the second measurement electrode and between the first measurement electrode and the third measurement electrode.
G01R 31/70 - Testing of connections between components and printed circuit boards
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
15.
SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE
Provided is a semiconductor device manufacturing method by which it is possible to reduce the width of a termination region and suppress the electrical field concentration in the termination region. The semiconductor device manufacturing method is for a semiconductor device that has, in the periphery of the active region, a termination region in which a first semiconductor region of a first electroconductive type has formed on the surface thereof a second semiconductor region that is a plurality of well regions of a second electroconductive type. Said method is characterized by forming the second semiconductor region by injecting impurities of the second electroconductive type using, as a mask for forming the second semiconductor region, a mask with which an interval S(x) is substantially equal to the value defined by S(x)=Smax–(Smax–Smin)·(x/XN)1/2, where x is the distance from the reference window at the outermost periphery and the interval S(x) is the interval between the injection window in a position at the distance x and one injection window on the active region side thereof.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
A semiconductor device comprises: a diode element with a main surface having an electrode and a back surface having another electrode; a heat dissipation base arranged to face the diode element; a Cu lead arranged to face the diode element; a bonding material which bonds the back surface of the diode element and the heat dissipation base to each other; and a bonding material which bonds the main surface of the diode element and the Cu lead to each other. The bonding material provided on the back surface side of the diode element is a lead-free solder having a melting point higher than 260° C. and a thermal expansion coefficient lower than that of a Zn—Al solder; and the bonding material provided on the main surface side of the diode element contains a high-melting-point metal having a melting point higher than 260° C. and a compound of Sn and the high-melting-point metal.
Provided is a semiconductor device capable of ensuring turn-off tolerance by suppressing carrier concentration in an active region near a gate common wiring region or a gate pad region. This semiconductor device comprises: a plurality of switching elements; a gate common wiring 1 to which gates of the plurality of switching elements are commonly connected; and a gate pad that supplies power to the gate common wiring 1. The semiconductor device is characterized by comprising a carrier injection suppression region 18 in a gate common wiring region 6 overlapping the gate common wiring 1 and in a gate pad region overlapping the gate pad.
Provided are a semiconductor device and a power converting device utilizing a field-stop layer in a vertical semiconductor device with improved manufacturability using large-diameter wafers. A semiconductor device manufacturing method according to the present invention is characterized by: a step for, after a pattern on a main surface side of a drift layer of a first conductivity type is formed, irradiating ions from a second main surface side to a predetermined depth; a step for, after the ion irradiation, converting the ions into donors by anneal processing of heating at 300-450° C. for 60 seconds or less, thereby forming a field-stop layer; and a step for reducing the thickness of a semiconductor substrate to a predetermined value from the second main surface side such that a crystal defect having occurred in the ion irradiating step is eliminated.
H02M 7/5387 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
19.
SEMICONDUCTOR DEVICE AND POWER CONVERSION DEVICE USING SAME
Provided is a semiconductor device capable of preventing a flow of carriers due to an avalanche into a region where a switching element body is present, while controlling the location where the avalanche occurs, through the formation of an electric-field concentration layer 7. The electric-field concentration layer 7 makes an avalanche occur in a region where a second body layer 5b is present. A floating layer 8 is provided between a first body layer 5a where the switching element body is present and the second body layer 5b where the avalanche occurs, whereby the first body layer 5a and the second body layer 5b are separated from each other, and it is possible to prevent a flow of carriers due to the avalanche into the first body layer 5a, where the switching element body is present.
The purpose of the present invention is, in an RC-IGBT, to provide a semiconductor device that can suppress a snapback phenomenon when the IGBT is on, and hole injection from the IGBT region to a diode region when the diode is conductive, using a simple structure. The semiconductor device having an IGBT region 21 and a diode region 22 within the same chip is characterized in that the gate resistance R of the IGBT near the boundary of the IGBT region 21 and the diode region 22 is greater than the gate resistance of the IGBT near the center of the IGBT region 21.
The present invention provides a semiconductor device in which, when spacer-containing solder is used as a joining layer, it is possible to inhibit uneven distribution of the spacers, and to inhibit tilt from being produced in members to be joined. The present invention is a semiconductor device having a first member, a second member joined to the first member, and a joining layer via which the first member and the second member are joined, said semiconductor device being characterized in that one of the first member and the second member is a semiconductor chip 1, the joining layer is solder 3 containing spacers 4, and the first member and the second member are joined by a joining layer that is divided into a plurality of segments for one electrode 2 of the semiconductor chip 1, as seen in plan view.
Provided are: a semiconductor device with which it is possible to form a Schottky barrier diode in a diode unit of a RC-IGBT and to perform low injection of the diode unit by a simpler process than conventional; a method for manufacturing the semiconductor device; and a power conversion device. This semiconductor device 100 (RC-IGBT) has an IGBT unit and a diode unit in one chip, the RC-IGBT being characterized by not having a body layer of a second conductivity type in the diode unit, by having a plurality of first trenches 9 connecting to a gate potential or an emitter potential, and second trenches 7 formed between two of the first trenches 9 and connecting to the emitter potential, and by having a Schottky barrier diode 10 formed by the second trenches 7 and a drift layer 3 of a first conductivity type contacting side walls of the second trenches 7.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
The present invention provides a semiconductor device, a method for manufacturing a semiconductor device, and an electric power converter, which make it possible to prevent an increase in an on-voltage of an IGBT, and to improve the reverse recovery characteristics of a diode portion with a simpler process. A semiconductor device 100 (RC-IGBT) according to the present invention comprises an RC-IGBT having an IGBT portion and a diode portion in one chip, characterized in that a body layer 11 of the diode portion is formed shallower than a body layer 10 of the IGBT portion, a lifetime control layer 8 of the IGBT portion is formed inside the body layer 10 of the IGBT portion, and the lifetime control layer 8 of the diode portion is formed inside an n-drift layer 4 under the body layer 11 of the diode portion.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
The purpose of the present invention is to provide a power semiconductor module that is unlikely to cause insulation failure. The power semiconductor module 10 according to the present invention comprises: a first terminal case 11f to which is screwed a first main terminal 12a1 that is an external terminal; a second terminal case 11g to which is screwed a second main terminal 12b1 that is an external terminal; a first main terminal wiring part 12a3 which is connected to the first main terminal 12a1; and a second main terminal wiring part 12b3 which is connected to the second main terminal 12b1. The first main terminal 12a1 overlaps the first main terminal wiring part 12a3 and the second main terminal wiring part 12b3 with the first terminal case 11f interposed between the first main terminal 12a1 and the main terminal wiring parts. The first terminal case 11f has a bottom part 11f4 disposed between a screw hole for screwing the first main terminal 12a1 thereto and the first main terminal wiring part 12a3. The bottom part 11f4 has an arch-shaped recess 11f5 in the surface thereof on the first main terminal wiring part 12a3 side.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
25.
POWER SEMICONDUCTOR MODULE AND POWER CONVERSION APPARATUS
Provided is a power semiconductor module comprising two power semiconductor chips, an insulating substrate on which these power semiconductor chips are provided, and a base plate on which the insulating substrate is provided, in which first fins are provided to portions, on a cooling surface which is a reverse surface of the base plate to the surface of the side the power semiconductor chips are provided on, corresponding to the two mounting regions where the two power semiconductor chips are respectively provided, and a separation region is provided between the two mounting regions, wherein a flow path resistance of a cooling medium in a portion, on the cooling surface of the base plate, corresponding to the separation region, is larger in a direction parallel to a surface facing the two mounting regions than in a direction orthogonal to a surface facing the two mounting regions. Thereby, it is made possible to select the direction in which cooling water is made to flow in a power semiconductor module having a separation region between two mounting regions. Moreover, it is made easy to make design changes to the mounting dimensions of an electric power conversion device comprising the power semiconductor module.
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
H01L 23/473 - Arrangements for cooling, heating, ventilating or temperature compensation involving the transfer of heat by flowing fluids by flowing liquids
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
Provided are a semiconductor device and a power conversion device capable of improving recovery characteristics by reducing the area of a p-body layer of a diode part of an RC-IGBT to suppress hole injection. A semiconductor device 100 according to the present invention is characterized in that in an RC-IGBT having an IGBT part and a diode part in one chip, a collector electrode layer/cathode electrode layer, a diffusion layer 1, a buffer layer 2, a drift layer 3, a body layer 10, an insulating layer 4, and an emitter/anode electrode layer 5 are stacked from the back side to the front side of one chip, the diode part has a plurality of trenches 6, and the plurality of trenches 6 include regions having the body layer 10 between the trenches 6, and regions 11 having no body layer 10 between the trenches 6.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
Provided are a semiconductor device and a power conversion device with which the p-body layer area of a diode portion of an RC-IGBT can be reduced, hole injection can be suppressed, and the recovery characteristic can be improved. This semiconductor device 100 (RC-IGBT) has a first body layer, a second body layer 5, first trenches 13 provided between the first body layer and the second body layer, a first gate electrode 7 formed on a side wall on the first body layer side, with a gate insulation film therebetween, and a second gate electrode 16 formed on a side wall on the second body layer side, with a gate insulation film therebetween, wherein the first gate electrode and the second gate electrode are separated by at least a first insulation film 14a interposed therebetween. The diode has a third body layer and a fourth body layer 5 of a first conductivity type, and a second trench 13 provided between the third body layer and the fourth body layer, the second trench 13 has a first electrode 10 formed on a side wall on the third body layer side, with an insulation film therebetween, and a second electrode 17 formed on a side wall on the fourth body layer side, with an insulation film therebetween, and the first electrode and the second electrode are separated by at least a second insulation film 14a interposed therebetween.
Provided is a semiconductor device in which faults in the semiconductor device can be detected. The semiconductor device has: a switching element having a gate, a first main electrode, and a second main electrode serving as a gate reference potential; a first main terminal serving as an external electrode, the first main terminal being electrically connected to the first main electrode; a second main terminal serving as an external electrode, the second main terminal being electrically connected to the second main electrode; a first auxiliary terminal serving as an external electrode for measuring the potential of the second main electrode in the switching element; wiring for channeling a main current from the second main electrode in the switching element to the second main terminal; and a second auxiliary terminal serving as an external electrode for measuring the potential of the wiring. The wiring has a first circuit pattern, and a main lead for connecting at least the first circuit pattern and the second main terminal. The main lead has a branch lead configured as a branch point between a connection part where the main lead connects to the first circuit pattern and a connection part where the main lead connects to the second main terminal. The second auxiliary terminal is electrically connected to the branch lead.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
29.
SEMICONDUCTOR DEVICE AND ELECTRIC POWER CONVERSION DEVICE
The present invention provides a technology that is capable of reducing the thermal resistance of a sintered metal joining section corresponding to the thinning and area-enlarging of the size of the semiconductor chip. Provided is a technology that is characterized by including a wiring layer, a semiconductor chip, and a sintered metal layer that joins the semiconductor chip to the wiring layer, wherein: the wiring layer has a groove extending from a semiconductor chip mounting region where the semiconductor chip is mounted to the outside of the semiconductor chip mounting region; and, in the semiconductor chip mounting region, the sintered metal layer is formed in the interior of the groove and to the outside of the upper end of the groove, the sintered metal layer is also formed in the portions of the groove formed to the outside of the semiconductor chip mounting region; and the depth of the groove differs between the portion of the groove in the vicinity of the center of the semiconductor chip mounting region and the portions of the groove in the vicinity of the ends of the semiconductor chip mounting region.
H01L 21/52 - Mounting semiconductor bodies in containers
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
Provided is a semiconductor device having an inverter circuit consisting of upper and lower arms in which short-circuit current detection accuracy can be improved by increasing the inductance of a circuit for detecting the rate of change (di/dt) of the main current with time without increasing the inductance of the main circuit. The semiconductor device is characterized by comprising: an upper arm switching element having a gate, a first main electrode, and a second main electrode serving as a gate reference potential; a positive electrode terminal which is an external electrode electrically connected to the first main electrode and through which a main current flows; a first auxiliary terminal which is an external electrode electrically connected to the second main electrode and can detect the potential of the second main electrode and through which the main current does not flow; and a second auxiliary terminal which is an external electrode electrically connected to an AC terminal and arranged close to the positive electrode terminal and through which the magnetically coupled main current does not flow.
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
31.
METHOD FOR ESTIMATING PARTIAL DISCHARGE FACTOR OF POWER SEMICONDUCTOR MODULE, AND DEVICE FOR ESTIMATING PARTIAL DISCHARGE FACTOR OF POWER SEMICONDUCTOR MODULE
Provided is a method for estimating a partial discharge factor of a power semiconductor module, by which a partial discharge factor can easily and automatically be estimated using time series data regarding the discharged charge quantity during a partial discharge test. This method for estimating a partial discharge factor of a power semiconductor module, by which a partial discharge factor during a partial discharge test of the power semiconductor module is estimated, is characterized by having: (a) a measurement step in which a test voltage pattern in which the voltage pattern varies is applied to the power semiconductor module, and the quantity of charge that is due to partial discharge of the power semiconductor module is measured; (b) a feature quantity extraction step in which a plurality of feature quantities are extracted, said plurality of feature quantities including at least a first feature quantity that is the average value of the quantity of charge in a first period, and a second feature quantity that is the average value of the quantity of charge in a second period; and (c) an estimation step in which a partial discharge factor is estimated on the basis of the plurality of feature quantities.
The provided power semiconductor module is configured to reduce the wiring inductance and save space on the substrate by establishing a multi-parallel connection between multiple power semiconductor chips. It consists of a first and second insulated substrates with a plurality of semiconductor switching elements positioned on one and facing the other. There are also first and second spacer conductors positioned between the plurality of semiconductor switching elements and the second insulated substrate. Inter-spacer-conductor wiring parts are connected with the plurality of second spacer conductors. Each of the plurality of semiconductor switching elements has a first electrode connected to a conductor layer on the first substrate, a second electrode connected to a conductor on the second substrate via the first spacer conductors, and a control electrode connected to each other through the second spacer conductors and the inter-spacer-conductor wiring parts which are positioned a prescribed distance from the second conductor layer.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H02M 7/00 - Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
In the present invention, in a FinFET having a channel forming region on a surface of a fin that is a semiconductor layer protruding on an upper surface of a substrate, a channel at a corner of the fin is prevented from becoming an ON state with a low voltage and a steep ON/OFF operation is made possible. As a means thereof, in a MOSFET that has a plurality of trenches, each of which have embedded therein a gate electrode, on an upper surface of an n-type epitaxial substrate provided with a drain region on a bottom surface and that has a channel region formed on a surface of a fin which is a protrusion part between the trenches adjacent to each other, a p-type body layer that constitutes a lateral surface of the fin, and a p+-type semiconductor region that constitutes a corner which is an end of the upper surface of the fin, are formed.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
34.
SEMICONDUCTOR DEVICE AND POWER CONVERSION DEVICE USING SAME
Provided is a highly reliable semiconductor device that has low conduction loss and switching loss, and that can achieve an increase in turn-off cut-off resistance. The semiconductor device comprises a switching gate and a carrier control gate that are driven independently of each other, and is characterized by comprising, as viewed in plan, a central region cell, a peripheral region cell surrounding the circumference of the central region cell, and a terminal region surrounding the circumference of the peripheral region cell, wherein the central region cell includes a switching element having the switching gate and the carrier control gate, and the peripheral region cell is disposed between the central region cell and the terminal region, the switching element of the peripheral region cell having a gate only composed of the carrier control gate.
Provided is a technology for allowing stable protection of a switching element in the event of a short circuit by suppressing a sharp increase in a voltage Vge across a gate terminal and a reference potential terminal in the event of the short circuit. This power semiconductor module having at least an upper arm has: a Zener diode that is connected between a gate terminal and a reference potential terminal and that is provided outside a semiconductor chip of a switching element and on an insulating substrate; a housing for accommodating the insulating substrate; and a plurality of external electrodes that are provided on the housing and that are connected to the gate terminal and the reference potential terminal.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
The semiconductor device configures a cascode-type high voltage element comprising a plurality of low voltage elements connected in series, wherein the number of stages of connected low voltage elements is reduced, and the high voltage element has desired withstand voltage, without limiting the withstand voltage of the gate oxide film of the low voltage elements. The semiconductor device comprises a first semiconductor element and one or more second semiconductor elements connected in series, wherein the first and the second semiconductor elements have a control signal output terminal between a source terminal and a drain terminal or between an emitter terminal and a collector terminal; and a gate terminal of the one or more second semiconductor elements is connected to the control signal output terminal of the first or second semiconductor element connected in series adjacently to the source or emitter side of said one or more second semiconductor elements.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
H03K 17/10 - Modifications for increasing the maximum permissible switched voltage
H03K 17/12 - Modifications for increasing the maximum permissible switched current
The present invention provides a technology which improves the connection reliability of a solder connection of a semiconductor device in a high temperature environment, while being capable of reducing wet spreading failure of a solder. As a means for achieving the above, the present invention uses a solder for the connection of a semiconductor element, the solder containing Sn with a Cu content of 3 to 9 wt% and an Sb content of 6.7 to 9.6 wt%, while being added with one or more elements that are selected from among 0.004 to 0.01 wt% of Fe, 0.002 to 0.04 wt% of Bi, 0.01 to 0.09 wt% of Pb ad 0.0125 to 0.02 wt% of As.
C22C 13/02 - Alloys based on tin with antimony or bismuth as the next major constituent
H01L 21/52 - Mounting semiconductor bodies in containers
H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
The present invention provides: a semiconductor device which has higher resistance to bias at high temperatures and high humidities than ever before, while achieving good connection between a field limiting layer and a field plate; and a power conversion device which uses this semiconductor device. A semiconductor device according to the present invention is characterized by comprising a floating field limiting layer 102 that is provided in a termination region and a field plate 105 that is electrically connected to the field limiting layer 102, and is also characterized in that: the field plate 105 is formed of a polysilicon; the field plate 105 and the field limiting layer 102 are connected to each other via an Al electrode 108; and the connection between the field limiting layer 102 and the Al electrode 108 and the connection between the field plate 105 and the Al electrode 108 are established at different contacts 109 and 110.
Provided are: a semiconductor device configured to have low ON voltage, low switching loss, and to suppress high-frequency oscillation caused by noise during switching, even if the semiconductor device is made thin; and a power conversion device using the semiconductor device. Provided is a semiconductor device comprising: a drift layer of a first conductivity type; an anode layer of a second conductivity type formed on a first main surface side of the drift layer; a field stop layer of the first conductivity type that is formed on a second main surface side of the drift layer and has a higher impurity concentration than the drift layer; and a cathode layer of the first conductivity type that has a higher impurity concentration than the field stop layer. The semiconductor device has a first defect layer for carrier lifetime control, which is formed by light ion irradiation. In the defect layer, the region from the concentration peak of the light ions to the half-value width ΔLp of the light ion concentration profile does not overlap the depletion layer spreading in the drift layer, and does not overlap the location in the field stop layer where the first conductivity type carrier concentration is 1016cm-3.
H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
Provided is a rectifier circuit for implementing synchronous rectification using a rectification MOSFET, wherein the capacity and the volume of a capacitor for supplying power for controlling the rectification MOSFET can be reduced while maintaining a loss reduction effect produced by the synchronous rectification. The present invention is characterized in that: a first MOSFET, a second MOSFET, a first control circuit, and a second control circuit are provided; the second MOSFET is in a non-rectification period when the first MOSFET is in a rectification period; the first MOSFET is in a non-rectification period when the second MOSFET is in a rectification period; the first control circuit outputs a voltage generated on the basis of a first input voltage as a first output voltage between the gate and the source of the first MOSFET in at least a portion of a period in which a voltage between the drain and the source of the second MOSFET is inputted as the first input voltage and a negative voltage is applied between the drain and the source of the first MOSFET; the second control circuit outputs a voltage generated on the basis of a second input voltage as a second output voltage between the gate and the source of the second MOSFET in at least a portion of a period in which a voltage between the drain and the source of the first MOSFET is inputted as the second input voltage and a negative voltage is applied between the drain and the source of the second MOSFET; when the first input voltage is equal to or greater than a prescribed first threshold voltage, the first control circuit clamps the first output voltage to the first threshold voltage; and, when the second input voltage is equal to or greater than a prescribed second threshold voltage, the second control circuit clamps the second output voltage to the second threshold voltage.
H02M 7/21 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
41.
PLATING DEFECT ESTIMATION METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
The present invention provides a plating defect estimation method capable of estimating the degree of generation of a spike caused by plating, prior to formation of a plating film, and a semiconductor device manufacturing method using the same. The plating defect estimation method comprises: a measuring step (S10) for measuring, before a plating preprocessing step (S130) for implementing preprocessing for plating on an underlayer, a physical property of a surface of the underlayer; and an estimation step (S20) for estimating, on the basis of the measured physical property, the degree of generation of a spike caused by plating on the underlayer. The semiconductor device manufacturing method comprises: an underlayer forming step (S110) for forming an underlayer on a surface of a semiconductor wafer; a plating preprocessing step (S130) for implementing preprocessing for plating on the underlayer; a plating step (S140) for implementing plating on the underlayer on which the preprocessing has been implemented; a measuring step (S10) for measuring a physical property of a surface of the underlayer prior to the plating preprocessing step (S130); and an estimating step (S20) for estimating, on the basis of the measured physical property, the degree of generation of a spike caused by plating on the underlayer.
H01L 21/288 - Deposition of conductive or insulating materials for electrodes from a liquid, e.g. electrolytic deposition
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/3205 - Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
C23C 18/36 - Coating with one of iron, cobalt or nickel; Coating with mixtures of phosphorus or boron with one of these metals using reducing agents using hypophosphites
G01N 21/27 - Colour; Spectral properties, i.e. comparison of effect of material on the light at two or more different wavelengths or wavelength bands using photo-electric detection
The present invention provides a rectification circuit which uses a switching element such as a MOSFET to perform synchronous rectification, and which can reduce the capacitance of a capacitor that supplies power to a drive circuit of the switching element for synchronous rectification. This rectification circuit has an anode and cathode, and is provided with: a first switching element in which a first terminal is connected to the cathode of the rectification circuit and a second terminal is connected to the anode of the rectification circuit; a first diode in which a cathode is connected to the first terminal and an anode is connected to the second terminal; a second switching element in which a third terminal is connected to the first terminal; a second diode in which an anode is connected to a fourth terminal of the second switching element; a first capacitor in which a positive electrode terminal is connected to a cathode of the second diode and a negative electrode terminal is connected to the second terminal; a comparator which detects the voltage between the fourth terminal and the second terminal and supplies power from the first capacitor; a gate driver in which an input terminal is connected to an output terminal of the comparator and an output terminal is connected to a fifth terminal, of the first switching element, for controlling the first switching element, and which controls the first switching element on the basis of an output signal of the comparator; and a control circuit which is connected to a sixth terminal, of the second switching element, which inputs a signal which controls the second switching element, wherein the control circuit controls the second switching element so as to continuously be ON and controls the voltage between the fourth terminal and the sixth terminal of the second switching element such that the voltage of the first capacitor does not exceed a prescribed target voltage, thereby controlling the current flowing to the fourth terminal from the third terminal of the second switching element.
H02M 7/21 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
H02M 7/12 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
The present invention improves the performance of a semiconductor device. As a means therefor, the present invention forms a semiconductor device comprising: a semiconductor substrate having a drift layer of a first conductivity type, a body region of a second conductivity type, and a JFET region of the first conductivity type being in contact with the body region on both sides on the drift layer; a plurality of trenches formed in an upper surface of the semiconductor substrate and extending in a first direction; and a gate electrode formed in the trenches and on the upper surface of the semiconductor substrate with an insulating film interposed therebetween. In a unit cell, a first trench group composed of a plurality of trenches lined up in a second direction that is orthogonal to the first direction and a second trench group composed of a plurality of trenches lined up in the second direction are lined up in the first direction, and have a channel region that is shallower than the trenches in a lower surface of a source region between adjacent trenches in the second direction. The gate electrode comprises a plurality of first portions in the trenches, and a second portion that is positioned on the semiconductor substrate and connects the first portions lined up in the first direction and the second direction to one another, and has a plurality of JFET regions per unit cell.
Provided is a semiconductor module overcurrent detection device that, with a relatively simple circuit configuration, is capable of highly accurately detecting short-circuit current of a power semiconductor element in a semiconductor module that is configured by connecting a plurality of inverter circuits in parallel. A semiconductor module overcurrent detection device according the present invention detects an overcurrent of a semiconductor module in a parallel connection configuration that has a first inverter circuit on which a first upper arm and a first lower arm are mounted and a second inverter circuit which is connected in parallel with the first inverter circuit and on which a second upper arm and a second lower arm are mounted. The semiconductor module overcurrent detection device is characterized in that: the first inverter circuit has a first output terminal between the emitter of the first upper arm and the collector of the first lower arm; the second inverter circuit has a second output terminal between the emitter of the second upper arm and the collector of the second lower arm; the first output terminal and the second output terminal are connected via a wire; an output wire to the outside is attached at the middle point between the first output terminal and the second output terminal; the wire inductance between the first output terminal and the middle point is substantially equal to the wire inductance between the second output terminal and the middle point; the potential difference between the first output terminal and the second output terminal is detected; and when the detected potential difference is larger than a predetermined threshold value, it is determined that an overcurrent is generated.
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
45.
POWER SEMICONDUCTOR MODULE AND POWER CONVERSION DEVICE
A semiconductor module (200) comprises: an insulating substrate (10) having a main terminal (1), a conductor layer (11), and a sense terminal (6); an insulating substrate (20) disposed opposite the insulating substrate (10) and having a conductor layer (21); and a sensing spacer conductor (81) which is electrically connected to the sense terminal (6) and electrically connects from the insulating substrate (10) side to the conductor layer (21) of the insulating substrate (20) while keeping an interval between the insulating substrate (10) and the insulating substrate (20). One sensing spacer conductor (81) corresponds to a plurality of semiconductor switching elements (31) to (38).
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
Provide is a highly reliable semiconductor device in which stress generated in a semiconductor chip is reduced and an increase in thermal resistance is suppressed. The semiconductor device includes: a semiconductor chip including a first main electrode on one surface thereof and a second main electrode and a gate electrode on the other surface thereof; a first electrode connected to the one surface of the semiconductor chip via a first bonding material; and a second electrode connected to the other surface of the semiconductor chip via a second bonding material. The first electrode is a plate-shaped electrode and has a groove in a region overlapping with the semiconductor chip. The groove penetrates in a thickness direction of the first electrode and reaches an end portion of the first electrode when viewed in a plan view.
Provided are a driving circuit capable of driving a CG-IGBT collector gate with the same PWM signals as a common IGBT using a low-cost structure, and an electric power apparatus provided with said driving circuit. This driving circuit drives a collector gate control IGBT provided with an emitter, a collector, an emitter gate on the emitter side, and a collector gate on the collector side, and has a first gate driver for driving the gate on the emitter side and a second gate driver for driving the gate on the collector side, wherein the same driving command signal is input into the first gate driver and the second gate driver, and the second gate driver has a high breakdown voltage diode into which is input a signal based on the driving command signal.
A MOS control diode (1) obtained by adding a MOS control function to a pn diode, comprises: a semiconductor substrate having a first conductivity-type drift layer (104); a second conductivity-type anode layer (103) that constitutes, on the drift layer, a PN junction diode (2) together with the drift layer; a first conductivity-type well layer (113) on the anode layer; a second conductivity-type low-concentration source layer (112) on the well layer; a second conductivity-type high-concentration source layer (111) provided only on a portion of the low-concentration source layer; gate electrodes (101) that are located adjacent to, by way of gate oxide films (102), the anode layer, the well layer, and the low-concentration source layer, and that constitute a MOSFET (3); an insulating film (107) that covers the anode layer, the low-concentration source layer, the high-concentration source layer, and the gate electrodes; and a contact hole (109) that penetrates the insulating film, the high-concentration source layer, the low-concentration source layer, and the well layer.
H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/41 - Electrodes characterised by their shape, relative sizes or dispositions
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
Disclosed is a rectifier circuit that makes it possible to achieve a high breakdown voltage while suppressing an increase in power loss, and a semiconductor device and a power supply device using this rectifier circuit. This rectifier circuit supplies a current in one direction, said rectifier circuit comprising: a first enhancement type MOSFET (QH1); a second enhancement type MOSFET (QL1) that is connected in series to the first MOSFET and that has a lower breakdown voltage than the first MOSFET; a control circuit (1) that causes the first MOSFET and the second MOSFET to perform a rectification operation; and a capacitor (C1) that supplies power to the control circuit and that is charged by the voltage between the drain and the source of the second MOSFET.
H02M 7/21 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
50.
POWER SEMICONDUCTOR UNIT, AND METHOD FOR MANUFACTURING POWER SEMICONDUCTOR UNIT
Provided is a power semiconductor unit including a cooler, capable of achieving, simultaneously, both cooling efficiency and mounting flexibility of a power semiconductor module installed therein. The power semiconductor unit comprises a power semiconductor element, a first insulating substrate bonded to one surface of the power semiconductor element, a wiring metal component bonded to another surface of the power semiconductor element, a second insulating substrate bonded to a surface of the wiring metal component on the opposite side to the surface to which the power semiconductor element is bonded, and a heat sink for cooling heat from the power semiconductor element, characterized in that sintered metal bonding is employed for the bonding between the power semiconductor element and the first insulating substrate, the bonding between the power semiconductor element and the wiring metal component, and the bonding between the wiring metal component and the second insulating substrate.
H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
H01L 23/467 - Arrangements for cooling, heating, ventilating or temperature compensation involving the transfer of heat by flowing fluids by flowing gases, e.g. air
H01L 23/473 - Arrangements for cooling, heating, ventilating or temperature compensation involving the transfer of heat by flowing fluids by flowing liquids
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H01L 21/52 - Mounting semiconductor bodies in containers
51.
POWER SEMICONDUCTOR MODULE AND ELECTRIC POWER CONVERTER USING SAME
Provided is a power semiconductor module in which a gate terminal and an emittance terminal are disposed adjacent to each other and a main circuit wiring is disposed in the vicinity thereof. The power semiconductor module is capable of efficiently suppressing the impact of induction field, generated by current flowing through the main circuit wiring, on the gate terminal and the emittance terminal, thereby exhibiting reliability. The present invention is characterized by comprising: a gate terminal to which a control signal is inputted; a reference potential terminal disposed adjacent to the gate terminal with a predetermined interval from the gate terminal; a main circuit wiring disposed in the vicinity of the reference potential terminal and the gate terminal; and an electromagnetic shield disposed between the gate terminal and the reference potential terminal to shield induction field generated by current flowing through the main circuit wiring. The present invention is also characterized in that: the electromagnetic shield is integrally formed with the gate terminal and/or the reference potential terminal; and, in a portion between the gate terminal and the reference potential terminal, a gap that is not shielded by the electromagnetic shield as seen from a direction in which a magnetic flux of the induction field intersects with the electromagnetic shield, is 1 mm or less.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
Provided is a semiconductor module comprising a semiconductor chip, a wire formed on an insulating substrate, and a lead frame, the semiconductor module having a higher heat-dissipating effect than before. A semiconductor module 10 of the present invention comprises an insulating substrate 1, a wire 2 formed on the insulating substrate 1, a semiconductor chip 3, and a lead frame 4, and is characterized in that the semiconductor chip 3 has one surface connected to the wire 2 and another surface connected to the lead frame 4, the wire 2 has a floating wire to which the lead frame 4 is connected, and a connection point between the floating wire and the lead frame 4 is located at a corner of the insulating substrate 1.
H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
Provided is a cascode-type semiconductor device configured by connecting a plurality of power transistors in series. The semiconductor device is highly reliable and has a high design/fabrication degree of freedom in that a normally-off power transistor can be used for each of the power transistors, the source-to-drain withstand voltage and the gate-to-source withstand voltage of each of the power transistors can be designed independently, and the withstand voltage of the semiconductor device as a whole does not significantly decrease even in the case where there is a failure in the source-to-drain withstand voltages of some power transistors. The present invention is a semiconductor device provided with a plurality of multistage-connected semiconductor elements in which a drive signal from a gate drive circuit is input to the gate in the first stage and in which the drain in a preceding stage is connected in series with the source in the following stage. The semiconductor device is characterized in that: the plurality of semiconductor elements are first-conductivity-type MOSFETs if one of the N type and the P type is defined as a first-conductivity type and the other as a second-conductivity type; one or more first second-conductivity-type MOSFETs that, when an on drive signal is input from the gate drive circuit to the gate of the semiconductor element in the first stage, turn on the semiconductor elements in the second and following stages by supplying the on drive signal to the semiconductor elements in the second and following stages are provided; and one or more second second-conductivity-type MOSFETs that, when an off drive signal is input from the gate drive circuit to the gate of the semiconductor element in the first stage, turn off the first second-conductivity-type MOSFETs and turn off the semiconductor elements in the second and following stages by supplying the gates of the semiconductor elements in the second and following stages with the voltage at the source or drain of the semiconductor element in the preceding stage are provided.
H03K 17/10 - Modifications for increasing the maximum permissible switched voltage
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
The present invention can provide a power semiconductor module in which space for storing heat-conductive grease between a heat sink and a cooler is ensured while ensuring sufficient contact area between the heat sink and the cooler. The power semiconductor module of the present invention is characterized by comprising a base plate (15), a semiconductor chip (11) mounted on a first main surface of the base plate, and a heat sink (22) connected to a second main surface of the base plate (15), wherein: a chamfered part is provided at an end portion of at least one side of the second main surface; and, when the cross section of the base plate (15) is viewed in a state in which the base plate (15) is fixed to the heat sink (22), the slope of the second main surface of the base plate (15) is discontinuous at the boundary between the chamfered part and an area of the second main surface other than the chambered part, and the angle between the bottom surface (15e) of the chamfered part of the base plate (15) and the surface on the side of the heat sink (22) where the base plate (15) is fixed is 5° to 30°.
H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
55.
POWER SEMICONDUCTOR MODULE AND POWER CONVERSION DEVICE
Provided are a power semiconductor module and a power conversion device that have an internal wiring structure that can reduce electrical vibration that occurs in internal wiring. This power semiconductor module comprises: an upper arm that has a first substrate upon which at least one power semiconductor chip including a first switching element is mounted, and a second substrate upon which at least one power semiconductor chip including a second switching element connected in parallel to the first switching element is mounted; and a lower arm that has a third substrate upon which at least one power semiconductor chip including a third switching element is mounted, and a fourth substrate upon which at least one power semiconductor chip including a fourth switching element connected in parallel to the third switching element is mounted. The power semiconductor module is characterized in that: the upper arm has first wiring that connects the first substrate and the second substrate and connects an emitter or source for the first switching element to an emitter or source for the second switching element; and the first wiring is disposed at a position further away from the lower arm in comparison to the end portion on the far side away from the lower arm of the power semiconductor chip positioned furthest from the lower arm from among the power semiconductor chips of the upper arm.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
56.
SEMICONDUCTOR DEVICE, POWER CONVERSION DEVICE USING SAME, AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
Provided is a highly reliable semiconductor device having both low conduction loss and switching loss and having good uniformity in heat generation temperature during operation. The present invention is characterized in that: a high conduction region and a low conduction region are provided in the same semiconductor chip; the low conduction region has a first carrier control gate connected to a first gate electrode, and a switching gate connected to a second gate electrode that can be controlled independent of the first gate electrode; the high conduction region has a second carrier control gate connected to a third gate electrode; the first carrier control gate, from among the first carrier control gate and the switching gate, is disposed at the end, of the low conduction region, on the side of the boundary with the high conduction region; and the carrier concentration that can be accumulated during conduction is lower in the lower conduction region than in the high conduction region.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 21/336 - Field-effect transistors with an insulated gate
57.
ELECTRIC CONNECTION INSPECTION DEVICE, AND MANUFACTURING METHOD AND ELECTRIC CONNECTION METHOD FOR SEMICONDUCTOR DEVICE
An electric connection inspection device 200 includes: a cooling plate 21; an insulating plate 22 provided on the cooling plate 21; a measurement electrode 24 provided on the insulating plate 22; and a measurement electrode 26 and a measurement electrode 27 provided above the measurement electrode 24 and located apart from the measurement electrode 24. The insulating plate 22 includes a variable thermal resistance mechanism. A semiconductor device 100 can be installed between the measurement electrode 24 and the measurement electrode 26 and between the measurement electrode 24 and the measurement electrode 27.
The upper arm drive circuit for controlling the drive of an upper arm switching element of the power conversion device includes: an upper arm gate voltage output wiring connected to a gate of the upper arm switching element; a first upper arm drive circuit reference potential wiring; an upper arm gate voltage reference potential wiring connected to an inverter output of the power conversion device; and a control circuit of upper arm drive circuit reference potential wiring potential for controlling the potential of the first upper arm drive circuit reference potential wiring to a potential lower than a reference potential when a potential of the inverter output is equal to a predefined potential that is lower than the reference potential or lower. The first upper arm drive circuit reference potential wiring is connected to the reference potential via the control circuit of upper arm drive circuit reference potential wiring potential.
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
H02M 7/5387 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
There is provided a power semiconductor module with multiple semiconductor chips arranged in parallel on an insulated substrate, allowing for high density mounting of semiconductor chips and highly reliable with less difference in operating characteristics from one semiconductor chip to another. The above module includes an insulated substrate; a first conductive pattern laid out on the insulated substrate; multiple power semiconductor chips arranged on the first conductive pattern; a first wiring formed to bridge and directly connecting respective gate electrodes of the power semiconductor chips; and a second wiring formed to bridge and directly connecting respective source electrodes of the power semiconductor chips, wherein the first wiring is placed alongside of the second wiring and may be angled within 30 degrees with respect to the second wiring.
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/049 - Containers; Seals characterised by the shape the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being perpendicular to the base
H01L 23/373 - Cooling facilitated by selection of materials for the device
Provided is a semiconductor module comprising a power semiconductor chip, the semiconductor module having a low variability in adhered position of a case made of resin and adhered to a base, and having high assembly quality and reliability enabling a decrease in stress between the case and an adhered portion of the base. A semiconductor module comprising a base, an insulating substrate bonded to the base, a semiconductor chip bonded to the insulating substrate, and a case adhered to the base by means of an adhesive. The semiconductor module is characterized in that: the base is composed of a plate-like first material, and a second material coating the first material and having a linear coefficient of expansion greater than that of the first material; when the base is viewed in plan, the second material includes a first region disposed in a corner portion of the base, and a second region disposed in an outer peripheral portion of the base and having a width less than that of the first region; the case covers at least part of a side surface of the base, and is adhered to the base at least on an upper surface of the base by means of the adhesive, the case having a linear coefficient of expansion greater than a linear coefficient of expansion of the first material; and, if the length from the center of a side of the base to an end portion of the base is L1, and the length from the center of the side of the base to a boundary between the first region and the second region is L2, L1-L2 is greater than a plate thickness of the base, and L3≧L2 or L2-L3≧L1-L2 is satisfied, where L3 is the length from the center of the side of the base to an end portion, on the corner portion side of the base, of the adhesive adhering the base to the case on the side surface of the base, wherein L3=0 when the adhesive is absent on the side surface of the base.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/28 - Encapsulation, e.g. encapsulating layers, coatings
H01L 23/34 - Arrangements for cooling, heating, ventilating or temperature compensation
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H05K 5/00 - Casings, cabinets or drawers for electric apparatus
A semiconductor device having a high cutoff resistance capable of suppressing local current/electric field concentration and current concentration at a chip termination portion due to an electric field variation between IGBT cells due to a shape variation and impurity variation during manufacturing. The semiconductor device is characterized by including an emitter electrode formed on a front surface of a semiconductor substrate via an interlayer insulating film, a collector electrode formed on a back surface of the semiconductor substrate, a first semiconductor layer of a first conductivity type in contact with the collector electrode, a second semiconductor layer of a second conductivity type, a central area cell, and an outer peripheral area cell located outside the central area cell.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H02M 7/5387 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
H02M 7/00 - Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
62.
RECTIFIER CIRCUIT AND RECTIFIER CIRCUIT CONTROL METHOD
In rectifier circuits configured by connecting a plurality of MOSFETs in a multistage manner, provided is a rectifier circuit with a low loss and high reliability in which the plurality of MOSFETs can be controlled in conjunction with each other on the basis of one detection voltage. This rectifier circuit is characterized by comprising: a plurality of MOSFETs that are connected between a first terminal and a second terminal in a multistage manner; and a control circuit that detects the drain-source voltages of one or more MOSFETs among the plurality of MOSFETs, compares the drain-source voltages with a predetermined threshold voltage, and generates a control signal for controlling the on/off of the plurality of MOSFETs. The control circuit has: a comparison circuit for comparing a detection voltage with the predetermined threshold voltage, said detection voltage being obtained by detecting the drain-source voltage of one of the plurality of MOSFETs or the sum of the drain-source voltages of two or more MOSFETs; and a plurality of drive circuits for controlling the on/off of the plurality of MOSFETs on the basis of the comparison result of the comparison circuit. The control circuit controls, on the basis of the comparison result of the comparison circuit, the on/off of the plurality of MOSFETs including at least the MOSFET to be detected in conjunction with each other.
H02M 7/21 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
H02M 7/12 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
Provided is a small and highly reliable power semiconductor device in which there is prevented a partial discharge originating from voids generated by water vapor entering from the exterior of the semiconductor device through a sealing resin or voids generated between a main terminal and the sealing resin when the main terminal is heated. The present invention is a power semiconductor device (100A) comprising an insulated substrate (1), a semiconductor element (2) provided on the surface of the insulated substrate (1), and a gel-like first insulation material (8) for sealing the semiconductor element (2), the power semiconductor device (100A) being characterized by having a plate-shaped terminal (5) for electrically connecting the semiconductor element (2) and an external device, and all of the portion of the plate-shaped terminal (5) surrounded by the first insulation material (8) being covered by a second insulation material (10) having a hardness greater than that of the first insulation material (8).
H01L 23/28 - Encapsulation, e.g. encapsulating layers, coatings
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
64.
SEMICONDUCTOR DEVICE MANUFACTURING METHOD, SEMICONDUCTOR DEVICE, SEMICONDUCTOR MODULE, AND POWER CONVERTING DEVICE
Provided are a semiconductor device and a power converting device using the same, wherein it is possible to improve the manufacturability of a field-stop layer (n-buffer layer) of a vertical semiconductor device, such as an IGBT and a PIN diode for which large-diameter (8-inch or larger diameter) wafers can be used. A semiconductor device manufacturing method according to the present invention is characterized by: a step for, after a pattern on a main surface side of a drift layer (101) of a first conductivity type is formed, irradiating ions from a second main surface side to a predetermined depth; a step for, after the ion irradiation, converting the ions into donors by anneal processing of heating at 300-450℃ for 60 seconds or less, thereby forming a field-stop layer (108); and a step for reducing the thickness of a semiconductor substrate to a predetermined value from the second main surface side such that a crystal defect having occurred in the ion irradiating step is eliminated.
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
A semiconductor device 20 which comprises: a diode element 1 which is provided with a main surface 1a that has an electrode 1c and a back surface 1b that has an electrode 1d; a heat dissipation base 12 which is arranged so as to face the diode element 1; a Cu lead 11 which is arranged so as to face the diode element 1; a bonding material 6 which bonds the back surface 1b of the diode element 1 and the heat dissipation base 12 to each other; and a bonding material 5 which bonds the main surface 1a of the diode element 1 and the Cu lead 11 to each other. The bonding material 6 that is provided on the back surface 1b side of the diode element 1 is a lead-free solder which has a melting point higher than 260°C and a thermal expansion coefficient that is lower than the thermal expansion coefficient of a Zn-Al solder; and the bonding material 5 that is provided on the main surface 1a side of the diode element 1 is composed of a high-melting-point metal that has a melting point higher than 260°C and a compound of Sn and the high-melting-point metal.
Provided is a highly reliable semiconductor device in which an influence on device characteristics can be reduced while improving a high temperature and high humidity bias resistance of a termination structure (termination region) of a chip by a relatively simple method. The semiconductor device includes an active region disposed on a main surface of a semiconductor substrate, and a termination region disposed on the main surface so as to surround the active region. The termination region includes an interlayer insulating film formed on the main surface of the semiconductor substrate, and an organic protective film formed so as to cover the interlayer insulating film. An insulating film having a thickness of 100 nm or less and containing nitrogen is provided between the interlayer insulating film and the organic protective film.
Provided is a semiconductor device which is easy to manufacture, and in which an electric field applied to an electric field protection layer provided to a trench gate electrode in the end portion of an active region is relaxed and the avalanche withstand voltage is improved. A semiconductor device (10) according to the present invention is provided with: an active region (1) that has a plurality of gate trenches (41), a trench gate electrode (40) provided in each gate trench (41), and a P body layer (8) provided to a section other than the gate trenches (41); and a termination region (2) that is disposed on the outer periphery of the active region (1). The semiconductor device is characterized in that an electric field protection layer (5) is provided to the bottom of each gate trench (41) of the active region (1), an electric field relaxation layer (3) is provided between the active region (1) and the termination region (2), the bottom surface of the electric field relaxation layer (3) is shallower than the bottom surface of the electric field protection layer (5), and the electric field relaxation layer is electrically connected to the P body layer (8).
Provided is a power semiconductor module configured by establishing a multi-parallel connection between a plurality of power semiconductor chips positioned on the same substrate, wherein the wiring inductance in the module can be reduced while reducing the area on the substrate on which the chips are positioned. This invention is characterized by being provided with a first insulated substrate, a plurality of semiconductor switching elements positioned on the first insulated substrate, a second insulated substrate positioned so as to face the first insulated substrate across the plurality of semiconductor switching elements, a plurality of first spacer conductors and a plurality of second spacer conductors that are positioned between the plurality of semiconductor switching elements and the second insulated substrate and that serve as spacers between the plurality of semiconductor switching elements and the second insulated substrate, and inter-spacer-conductor wiring parts that are formed so as to be integral with the plurality of second spacer conductors and that electrically connect the plurality of second spacer conductors; each of the plurality of semiconductor switching elements having a first electrode, and a second electrode and a control electrode provided on the opposite side from the first electrode; the first electrodes being electrically connected to a first conductor layer provided on the first insulated substrate; the second electrodes being electrically connected to a second conductor layer provided on the second insulated substrate via the first spacer conductors; the control electrodes being electrically connected to each other by the second spacer conductors and the inter-spacer-conductor wiring parts; and the inter-spacer-conductor wiring parts being positioned so as to face the second conductor layer across a prescribed distance.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
69.
SEMICONDUCTOR POWER MODULE AND SEMICONDUCTOR POWER MODULE PRODUCTION METHOD
Provided is a composite semiconductor power module in which an Si semiconductor chip and an SiC semiconductor chip are mounted on the same insulation substrate, wherein both the joining reliability between the Si semiconductor chip and the substrate and the joining reliability between the SiC semiconductor chip and the substrate are improved. Provided is a composite semiconductor power module in which an Si semiconductor chip and an SiC semiconductor chip are mounted on the same insulation substrate, the semiconductor power module being characterized in that: the Si semiconductor chip is joined to a first wiring area on the insulation substrate by a soldered joint; and the SiC semiconductor chip is joined to a second wiring area on the insulation substrate by a sintered joint.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
70.
Upper arm drive circuit having a reverse current prevention circuit disposed between a power supply of a power conversion device and a first capacitor and control method thereof
The upper arm drive circuit for controlling drive of the upper arm switching element of the power conversion device includes: a capacitor disposed between a gate of the upper switching element and the output terminal of the power conversion device; a reverse current prevention circuit that is disposed between a power supply of the power conversion device and the capacitor, and that makes a current flow from a first terminal side of the reverse current prevention circuit connected to the power supply side to a second terminal side of the reverse current prevention circuit connected to the capacitor side and prevents a reverse current from flowing from the second terminal side to the first terminal side; and a switching element for capacitor charging that is turned ON in synchronization with a command signal that turns the upper arm switching element ON.
The present invention provides a semiconductor device which makes it possible to configure a cascode-type high voltage element constituted by a plurality of low voltage elements connected in series, wherein the number of stages of connected low voltage elements is reduced, and the high voltage element has desired withstand voltage, without limitation on the withstand voltage of the gate oxide film of the low voltage elements. Provided is a semiconductor device in which a first semiconductor element and one or more second semiconductor elements are connected in series, and which is characterized in that: the first semiconductor element and the one or more second semiconductor elements have a control signal output terminal between a source terminal and drain terminal or between an emitter terminal and collector terminal; and a gate terminal of the one or more second semiconductor elements is connected to the control signal output terminal of a second semiconductor element or the first semiconductor element which is connected in series adjacently to the source or emitter side of said one or more second semiconductor elements.
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
Provided is a gel-sealed-type power module, wherein disconnection of a bonding wire within the module can be inhibited even in a usage environment involving a vibration, and a high reliability is obtained. This invention is characterized in being provided with: a base plate having a heat sink; a substrate positioned on the base plate; a power semiconductor chip positioned on the substrate; a bonding wire connected to the substrate; a case that is connected to the base plate and that encloses the substrate, the power semiconductor chip, and the bonding wire; and a gel that is packed in the case and that seals the substrate, the power semiconductor chip, and the bonding wire, the bonding wire connected between the substrate and the case being such that only a connection part of the bonding wire is covered by a resin having a higher hardness than that of the gel.
H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
In the present invention, in a FinFET having a channel forming region on a surface of a fin that is a semiconductor layer protruding on an upper surface of a substrate, a channel at a corner of the fin is prevented from becoming an ON state with a low voltage and a steep ON/OFF operation is made possible. As a means thereof, in a MOSFET that has a plurality of trenches, each of which have embedded therein a gate electrode, on an upper surface of an n-type epitaxial substrate provided with a drain region on a bottom surface and that has a channel region formed on a surface of a fin which is a protrusion part between the trenches adjacent to each other, a p-type body layer that constitutes a lateral surface of the fin, and a p+-type semiconductor region that constitutes a corner which is an end of the upper surface of the fin, are formed.
Provided is a semiconductor device having a semiconductor chip, a semiconductor pattern, a solder alloy layer, and an intermetallic compound layer. The semiconductor pattern consists of a metal (for example, Cu) and is connected to the bottom surface of the semiconductor chip via the solder alloy layer. The intermetallic compound layer is formed at an interface between the bottom surface of the semiconductor chip and the solder alloy layer and includes an uneven surface facing the semiconductor pattern side from the bottom surface side. The bottom surface of the semiconductor chip includes a first region that includes the center of the bottom surface and a second region that includes the outer periphery of the bottom surface. As shown in fig. 2, the thickness of the intermetallic compound layer is such that the average thickness of a portion overlapping with the first region of the bottom surface is greater than the average thickness of a portion overlapping with the second region.
A joining jig 100 includes: a top board 1; a pressure member 2 having an upper end part thereof attached to the top board 1; thin plates 31 to 34 surrounding the pressure member 2 in a plan view; and columnar support members 41 to 44. The thin plates 31 to 34 have respective upper end parts attached to the top board 1. The support members 41 to 44 have respective side surfaces attached to the respective lower end parts of the thin plates 31 to 34.
A termination structure in which a semiconductor active region is surrounded with a guard ring and capable of preventing corrosion of a metal layer connected to the guard ring includes: an active region and a guard ring region surrounding the active region. A guard ring is formed on the semiconductor substrate, and an interlayer insulating film is formed on the semiconductor substrate so as to cover the guard ring. A field plate is disposed on the interlayer insulating film and is electrically connected to the guard ring via a contact penetrating the interlayer insulating film. A protective film covers the field plate, which has a laminated structure including a first metal in contact with the guard ring and a second metal which is disposed in contact with the first metal and has a lower standard potential than the first metal.
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H02M 7/5387 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
H02P 27/06 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
77.
Gate drive device, gate drive method, power semiconductor module, and electric power conversion device
The invention provides a gate drive device, a gate drive method, a power semiconductor module, and an electric power conversion device capable of reducing a negative gate surge voltage. The gate drive device drives a semiconductor device constituting an arm in an electric power conversion device. Before a turn-off start of a drive arm, in a counter arm, a voltage between one main terminal of the semiconductor device and a gate terminal of the semiconductor device is charged to a voltage value that is larger, in a positive direction, than a negative voltage of a negative gate power supply and smaller than a gate threshold voltage of the semiconductor device.
H02M 1/084 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters using a control circuit common to several phases of a multi-phase system
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
Provided is a semiconductor device which has an electrode layer on a surface of the semiconductor device and a resin layer surrounding an outer periphery of the electrode layer and which exhibits excellent reliability and durability since crack in the electrode layer due to thermal expansion of the resin layer is less likely to occur. This semiconductor device is provided with: a semiconductor element; a first electrode layer that is formed on the surface of the semiconductor element; a second electrode layer that is formed on the first electrode layer and that is joined to a bonding wire; and a resin layer that is formed on the first electrode layer and that surrounds the outer periphery of the second electrode layer. The semiconductor device is characterized in that resin layer is in contact with the second electrode layer in at least a portion of the outer periphery of the second electrode layer and in that the thickness between the surface of the first electrode layer and a contact of the resin layer and the surface of the second electrode layer is less than that the thickness of the second electrode layer in a joint part of the bonding wire.
H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
79.
Semiconductor device signal transmission circuit for drive-control, method of controlling semiconductor device signal transmission circuit for drive-control, semiconductor device, power conversion device, and electric system for railway vehicle
To provide a semiconductor device signal transmission circuit for drive-control, a method of controlling a semiconductor device signal transmission circuit for drive-control, a semiconductor device, a power conversion device, and an electric system for a railway vehicle capable of preventing malfunction due to noise while speeding up or reducing loss of a switching operation. The semiconductor device signal transmission circuit for drive-control that is connected between a semiconductor device constituting an arm in a power conversion device and a drive circuit configured to drive the semiconductor device, including: an inductor; and an impedance circuit including a switch and connected in parallel with the inductor.
H03K 17/16 - Modifications for eliminating interference voltages or currents
H02M 1/32 - Means for protecting converters other than by automatic disconnection
B60L 13/00 - Electric propulsion for monorail vehicles, suspension vehicles or rack railways; Magnetic suspension or levitation for vehicles
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
Provided is a semiconductor device that has improved heat resistance and reliability and that is made to have a longer service life. This semiconductor device (100) is characterized in that: on top of a first main electrode (2) and a gate electrode (3), a first electrode layer (6) that is composed primarily of nickel and a second electrode layer (7) that is composed primarily of copper are laminated in the order stated; a lead frame (9) is bonded to the second electrode layer (7) on the first main electrode (2); a bonding wire (10) is bonded to the second electrode layer (7) on the gate electrode (3); the diameter of the bonding wire (10) is no greater than 150 μm; and the film thicknesses of the first electrode layer (6) and the second electrode layer (7) are 1 μm to 3 μm.
Provided are a motor drive device capable of effectively suppressing an induced voltage distortion caused by a motor and torque ripples due to an output voltage distortion caused by an inverter, an outdoor unit of an air conditioner using the motor drive device, and a motor drive control method. The motor drive device is provided with a power conversion circuit for supplying power to a motor, a control unit for controlling the power conversion circuit, and a current sensor for detecting three-phase current that energizes the motor. The control unit has: a command voltage calculation unit for calculating a command voltage contributing to the driving of the motor; a ripple current detection unit for separating the the three-phase detection current detected by the current sensor into components orthogonal to each other and generating, on the basis of each of the components, a first component and a second component which are obtained by extracting ripple components of each of the components; a torque ripple compensation unit for outputting a first compensation command voltage for compensating, on the basis of the first component, torque ripples caused by the structure of the motor; and a dead time compensation unit for outputting a second compensation command voltage for compensating, on the basis of the second component, an output voltage distortion caused by the dead time of the power conversion circuit. The motor drive device is characterized by reducing the torque ripples and the output voltage distortion by correcting the command voltage using the first compensation command voltage and the second compensation command voltage.
H02P 21/05 - Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation specially adapted for damping motor oscillations, e.g. for reducing hunting
F24F 1/12 - Vibration or noise prevention therefor
F24F 11/86 - Control systems characterised by their outputs; Constructional details thereof for controlling the temperature of the supplied air by controlling compressors within refrigeration or heat pump circuits
F24F 11/871 - Control systems characterised by their outputs; Constructional details thereof for controlling the temperature of the supplied air by controlling absorption or discharge of heat in outdoor units by controlling outdoor fans
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
H02P 6/10 - Arrangements for controlling torque ripple, e.g. providing reduced torque ripple
H02P 21/22 - Current control, e.g. using a current control loop
H02P 27/08 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
82.
Semiconductor device including a semiconductor element with a gate electrode on only one surface
Provided is a highly reliable semiconductor device capable of reducing stress generated in a semiconductor element even when a highly elastic joining material such as a Pb-free material is used in a power semiconductor having a double-sided mounting structure. The semiconductor device includes a semiconductor element including a gate electrode only on one surface, an upper electrode connected to the surface of the semiconductor element on which the gate electrode is provided, and a lower electrode connected to a surface opposite to the surface of the semiconductor element on which the gate electrode is provided. A connection end portion of the upper electrode with the surface of the semiconductor element on which the gate electrode is provided is located inside an end portion of the surface of the semiconductor element on which the gate electrode is provided, and a connection end portion of the lower electrode with the opposite surface of the semiconductor element is located inside an end portion of the opposite surface of the semiconductor element.
The present invention provides a semiconductor device equipped with a MOSFET with a built-in Zener diode and capable of achieving both improvement in surge withstand capability and low on resistance. A semiconductor device equipped with a MOSFET with a built-in Zener diode is characterized by being provided with an active region in which the MOSFET operates, and a peripheral region which is disposed outside the active region and holds the withstand voltage of a chip peripheral portion, wherein the active region has a first region including a chip central portion and a second region disposed outside the first region, and the withstand voltage of the first region is lower than the withstand voltage of the second region and the withstand voltage of the peripheral region.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
H02M 7/21 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
A current switching semiconductor device to be used in a power conversion device achieves both a low conduction loss and a low switching loss. The semiconductor device includes the IGBT in which only Gc gates are provided and an impurity concentration of the p type collector layer is high, and the IGBT in which the Gs gates and the Gc gates are provided and an impurity concentration of the p type collector layer is low. When the semiconductor device is turned off, the semiconductor device transitions from a state in which a voltage lower than a threshold voltage is applied to both the Gs gates and the Gc gates to a state in which a voltage equal to or higher than the threshold voltage is applied to the Gc gates prior to the Gs gates.
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
Provided is a semiconductor device having high blocking capability which can suppress localized current and electric field concentration or concentration of current at a chip termination part caused by electrical field variation among IGBT cells originating from variation in shape and impurities in manufacturing. This semiconductor device is characterized by comprising: an emitter electrode which is formed on the obverse surface of a semiconductor substrate with an interlayer insulation film interposed therebetween; a collector electrode which is formed on the reverse surface of the semiconductor substrate; a first conductivity type first semiconductor layer which is contiguous to the collector electrode and is formed on the reverse surface of the semiconductor substrate; a second conductivity type second semiconductor layer which is formed further inward of the first semiconductor layer; a central region cell which is disposed along the obverse surface of the semiconductor substrate; and an outer periphery region cell which is outward of the central region cell in the planar direction of the semiconductor substrate and disposed between the central region cell and a chip termination guard ring region.
Provided is an electric power conversion device that is obtained by parallel connection of a plurality of power semiconductor modules and that can reduce switching loss while suppressing parasitic oscillation generated during switching operation. This electric power conversion device is provided with: a plurality of power semiconductor modules; a gate driving circuit for driving the plurality of power semiconductor modules; and an arm circuit configured from a gate wiring circuit that is connected between the gate driving circuit and the plurality of power semiconductor modules and that is for parallel connection of the plurality of power semiconductor modules with respect to the gate driving circuit. The electric power conversion device is characterized in that the gate wiring circuit has a plurality of impedance circuits respectively corresponding to the plurality of power semiconductor modules, the impedance value of each of the impedance circuits is changed in conjunction with the frequency of a voltage applied to the impedance circuit, the impedance value becomes small at low frequencies, and the impedance value becomes great at high frequencies.
The invention provides an inexpensive flywheel diode having a low power loss. A semiconductor substrate side of a gate electrode provided on a surface of an anode electrode side of a semiconductor substrate including silicon is surrounded by a p layer, an n layer, and a p layer via a gate insulating film. The anode electrode is in contact with the p layer with a low resistance, and is also in contact with the n layer or the p layer, and a Schottky diode is formed between the anode electrode and the n layer or the p layer.
Provided is a highly reliable power semiconductor module in which a plurality of semiconductor chips are arranged in parallel on an insulated substrate. The power semiconductor module makes it possible to densely package the semiconductor chips, and there is little difference in operating characteristics between the semiconductor chips. The present invention is characterized by comprising an insulated substrate, a first conductive pattern that is arranged on the insulated substrate, a plurality of power semiconductor chips that are arranged on the first conductive pattern, bridge-shaped first wiring that directly connects gate electrodes of the plurality of power semiconductor chips, and bridge-shaped second wiring that directly connects source electrodes of the plurality of power semiconductor chips. The present invention is also characterized in that the first wiring is arranged along the second wiring such that the angle formed between the first wiring and the second wiring is no more than 30 degrees.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
89.
Semiconductor device, method for controlling semiconductor device, and control circuit for semiconductor device
To provide a semiconductor device in which an IGBT having two gate terminals is driven by one control signal, and a continuous ON state and an ON state twice for one on-pulse signal are avoided. A semiconductor device includes: a control signal input terminal; an IGBT having a first gate terminal and a second gate terminal; a delay unit configured to delay an input signal for a delay time; and a logical product unit configured to calculate a logical product of a first input terminal and a second input terminal. The control signal input terminal is connected to an input terminal of the delay unit and a second input terminal of the logical product unit. An output terminal of the delay unit is connected to the first gate terminal of the IGBT and a first input terminal of the logical product unit. An output terminal of the logical product unit is connected to the second gate terminal of the IGBT.
Provided is a motor driving device that can reduce noise and vibration caused by mechanical resonance without requiring preadjustment such as a preliminary test and has high versatility adaptable to various motors. The motor driving device is characterized by comprising: a power conversion circuit that drives a permanent magnet synchronous motor; a control unit that controls the power conversion circuit; and a current sensor that detects a three-phase current supplied to the permanent magnet synchronous motor, wherein the control unit comprises a three-phase/dq conversion unit that converts a detected three-phase current detected by the current sensor into a d-axis detection current and a q-axis detection current, a command voltage calculation unit that calculates a command voltage contributing to driving of the permanent magnet synchronous motor, a torque pulsation suppression control unit that calculates a voltage correction command contributing to reduction of the pulsation torque of the permanent magnet synchronous motor on the basis of a preset value related to a distortion component in the induced voltage of the permanent magnetic synchronous motor, a parameter estimation unit that corrects the preset value so as to reduce a pulsation component in at least one of the d-axis detection current and the q-axis detection current, and an addition unit that adds the command voltage and the voltage correction command.
H02P 21/05 - Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation specially adapted for damping motor oscillations, e.g. for reducing hunting
H02P 21/14 - Estimation or adaptation of machine parameters, e.g. flux, current or voltage
H02P 21/22 - Current control, e.g. using a current control loop
H02P 21/24 - Vector control not involving the use of rotor position or rotor speed sensors
91.
Semiconductor device, manufacturing method for semiconductor device, semiconductor module, and power conversion device
a is formed of a region R1 including a first corner, a region R2 including a second corner, and a region R3 interposed between the region R1 and the region R2. At this point, in a case of defining a minimum film thickness of a high electric field-resistant sealing member MR in the region R3 as t1 and defining a maximum film thickness of the high electric field-resistant sealing member MR in the region R1 as t2, a relation of t2≤1.5×t1 is satisfied.
H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H01L 23/08 - Containers; Seals characterised by the material of the container or its electrical properties the material being an electrical insulator, e.g. glass
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
Provided is a semiconductor device capable of improving heat dissipation of the semiconductor device without enlarging a cooling structure and suppressing deformation of the semiconductor device caused by temperature fluctuation. This semiconductor device is characterized by being provided with: a semiconductor chip; an insulating substrate on which the semiconductor chip is mounted with a chip junction layer therebetween; and a heat dissipation base on which the insulating substrate is mounted with a substrate junction layer therebetween, wherein the substrate junction layer is disposed at least directly below the semiconductor chip, and the area of the substrate junction layer is not greater than 1/2 of that of the insulating substrate.
The present invention provides a 2-in-1 power semiconductor module constituting a half bridge circuit, wherein the power semiconductor module is capable of suppressing gate voltage oscillation and lowering loss due to LC resonance between upper and lower arms. The present invention further provides a power converter in which said module is used. The present invention is characterized in that the impedance value between a second main electrode and a fourth main electrode is greater than the smallest impedance value among the impedance value between a first main electrode and a third main electrode, the impedance value between a fifth main electrode and a seventh main electrode, and the impedance value between a sixth main electrode and an eighth main electrode.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
94.
Inverter device and electric motor device using same
The object of the invention is to provide an inverter device and an electric motor device using the same to shorten a dead time. Thus, an inverter device is provided, which includes: a switching element including a control terminal and a pair of main terminals; a control circuit configured to output a control signal which indicates whether to instruct an ON state of the switching element; a decision circuit configured to output a decision signal which indicates a state of the switching element based on a voltage between the main terminals of the switching element; and a drive circuit configured to control the ON state or an OFF state of the switching element based on the control signal and the decision signal.
H02P 27/08 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
H02M 7/5387 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
95.
SEMICONDUCTOR DEVICE AND ELECTRIC POWER CONVERSION DEVICE USING SAME
Provided is a high-performance, highly reliable power semiconductor device. A semiconductor device comprising: a first conductivity type epitaxial layer 101 which is formed on a first main surface of an SiC substrate 107, and, which has a lower impurity concentration than an impurity concentration of the SiC substrate; second conductivity type first and second body layers 102 which are formed on the epitaxial layer; a first conductivity type source region 103 which is formed on the first body layer; a first conductivity type first region 105 which contacts the first body layer and a JFET region 104, said JFET region being the epitaxial layer where the same is sandwiched by the first and the second body layers, and, said first conductivity type first region having a higher impurity concentration than an impurity concentration of the epitaxial layer; a second conductivity type second region 130 which is formed on the JFET region; a trench 106 which is formed so as to extend to the source region, the first body layer, and the first region; an insulation film 110 which is formed on an inner wall of the trench; and, a gate electrode 111 which is formed on the insulation film of the trench.
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
Provided is an electric current detecting device that collectively detects the electric currents of a plurality of semiconductor devices (power semiconductor devices) using the inductance of the wiring when the plurality of semiconductor devices are connected in parallel. This invention comprises: a plurality of input resistors (111-11n), each having one terminal connected to the wiring of a respective power semiconductor module (301-30n) and having another terminal connected to a single point at an input connection point (P100); a summing resistor (120) connected between the input connection point (P100) and ground (G); and an integrator (12) that integrates the voltage across both terminals of the summing resistor (120).
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
98.
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, SOLDER SHEET, AND METHOD OF MANUFACTURING SAME
This method of manufacturing a semiconductor device includes: a step of preparing a second laminate which is obtained by mounting a first laminate on a base substrate via a solder sheet; a step of installing the second laminate inside a chamber and preheating the second laminate at a temperature at or below a melting point of solder of the solder sheet while introducing reducing gas into the chamber; and a step of heating the second laminate at a temperature at or above the melting point of the solder of the solder sheet. The solder sheet includes a recessed portion (C1) on a ceramic substrate side and a recessed portion (C3) on a base substrate side, and in the preheating step, the solder sheet is in contact with a plated layer at both ends of the recessed portion (C1) and is in contact with the plated layer at both ends of the recessed portion (C3). In plan view, the recessed portion (C1) and the recessed portion (C3) extend continuously inside the solder sheet to the exterior of the solder sheet.
H01L 21/52 - Mounting semiconductor bodies in containers
B23K 1/00 - Soldering, e.g. brazing, or unsoldering
B23K 31/02 - Processes relevant to this subclass, specially adapted for particular articles or purposes, but not covered by any single one of main groups relating to soldering or welding
B23K 35/40 - Making wire or rods for soldering or welding
H01L 23/40 - Mountings or securing means for detachable cooling or heating arrangements
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
Provided is a semiconductor device in which, in a case where a metallic plate (a conductive member) is bonded by being sintered to a semiconductor chip having an IGBT gate structure, an excess stress is less likely to be generated in a gate wiring section of the semiconductor chip even when pressure is applied in a sinter bonding process, so that a characteristic failure is reduced. The semiconductor device according to the present invention is characterized by: being provided with a semiconductor chip having a gate structure represented by an IGBT; including first gate wiring and second gate wiring formed on the surface of the semiconductor chip; and including an emitter electrode disposed so as to cover the first gate wiring and a sintered layer disposed above the emitter electrode, wherein a multilayer structure formed by including at least the emitter electrode and the sintered layer on the surface of the semiconductor chip continuously exists over a range including an emitter electrode connecting contact and gate wiring regions.
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
A power module 20 comprises: a semiconductor chip 1; a ceramic substrate 3 that supports the semiconductor chip 1 and is provided with a wiring 3e on an upper surface 3a on which the semiconductor chip 1 is mounted; a solder 2 for joining the semiconductor chip 1 and the wiring 3e; a plurality of wires 6 for electrically connecting the semiconductor chip 1 and the ceramic substrate 3; and a sealing resin 9 for sealing the semiconductor chip 1 and the plurality of wires 6. In a plan view, part of an intermetallic compound 10 including a metal contained in the wiring 3e and a metal contained in the solder 2 protrudes outward from a region of the solder 2 and is exposed on the surface 3a.
H01L 21/52 - Mounting semiconductor bodies in containers
B23K 1/00 - Soldering, e.g. brazing, or unsoldering
B23K 1/19 - Soldering, e.g. brazing, or unsoldering taking account of the properties of the materials to be soldered
B23K 31/02 - Processes relevant to this subclass, specially adapted for particular articles or purposes, but not covered by any single one of main groups relating to soldering or welding
H01L 23/12 - Mountings, e.g. non-detachable insulating substrates
H01L 23/40 - Mountings or securing means for detachable cooling or heating arrangements
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
patents
