equal1.labs Inc.

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IPC Class
G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena 37
B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic 27
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed 25
H01L 29/66 - Types of semiconductor device 24
G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells 22
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Status
Pending 3
Registered / In Force 35
Found results for  patents

1.

SYSTEM AND METHOD OF GENERATING QUANTUM UNITARY NOISE USING SILICON BASED QUANTUM DOT ARRAYS

      
Application Number IB2021060430
Publication Number 2022/101811
Status In Force
Filing Date 2021-11-11
Publication Date 2022-05-19
Owner EQUAL1.LABS INC. (USA)
Inventor
  • Redmond, David J.
  • Leipold, Dirk Robert Walter
  • Bashir, Imran
  • Staszewski, Robert Bogdan

Abstract

A novel and useful system and method of generating quantum unitary noise using silicon based quantum dot arrays. Unitary noise is derived from a probability of detecting a particle within a quantum dot array structure comprising position based charge qubits with two time independent basis states |0> and |1>. A two level electron tunneling device such as an interface device, qubit or other quantum structure is used to generate quantum noise. The electron tunneling device includes a reservoir of particles, a quantum dot, and a barrier that is used to control tunneling between the reservoir and the quantum dot. A detector circuit connected to the device outputs a digital stream corresponding to the probability of a particle of being detected. Controlling the bias applied to the barrier controls the probability of detection. Thus, the probability density function (PDF) of the output unitary noise can be controlled to correspond to a desired probability. The unitary noise can be used in stochastic rounding by controlling the bias applied to the barrier in accordance with a remainder of numbers to be rounded.

IPC Classes  ?

  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • G06F 7/58 - Random or pseudo-random number generators

2.

SYSTEM AND METHOD OF QUANTUM STOCHASTIC ROUNDING USING SILICON BASED QUANTUM DOT ARRAYS

      
Application Number IB2021060431
Publication Number 2022/101812
Status In Force
Filing Date 2021-11-11
Publication Date 2022-05-19
Owner EQUAL1.LABS INC. (USA)
Inventor
  • Redmond, David J.
  • Leipold, Dirk Robert Walter
  • Bashir, Imran
  • Staszewski, Robert Bogdan

Abstract

A novel and useful system and method of quantum stochastic rounding using silicon based quantum dot arrays. Unitary noise is derived from a probability of detecting a particle within a quantum dot array structure comprising position based charge qubits with two time independent basis states |0> and |1>. A two level electron tunneling device such as an interface device, qubit or other quantum structure is used to generate quantum noise. The electron tunneling device includes a reservoir of particles, a quantum dot, and a barrier that is used to control tunneling between the reservoir and the quantum dot. A detector circuit connected to the device outputs a digital stream corresponding to the probability of a particle of being detected. Controlling the bias applied to the barrier controls the probability of detection. Thus, the probability density function (PDF) of the output unitary noise can be controlled to correspond to a desired probability. The unitary noise is used to perform stochastic rounding by controlling the bias applied to the barrier in accordance with a remainder of numbers to be rounded.

IPC Classes  ?

  • G06F 7/499 - Denomination or exception handling, e.g. rounding or overflow
  • G06N 3/02 - Neural networks
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • G06F 7/58 - Random or pseudo-random number generators

3.

ACCELERATED LEARNING IN NEURAL NETWORKS INCORPORATING QUANTUM UNITARY NOISE AND QUANTUM STOCHASTIC ROUNDING USING SILICON BASED QUANTUM DOT ARRAYS

      
Application Number IB2021060432
Publication Number 2022/101813
Status In Force
Filing Date 2021-11-11
Publication Date 2022-05-19
Owner EQUAL1.LABS INC. (USA)
Inventor
  • Redmond, David J.
  • Leipold, Dirk Robert Walter
  • Bashir, Imran
  • Staszewski, Robert Bogdan

Abstract

A novel and useful system and method of accelerated learning in neural networks using silicon based quantum dot arrays. Unitary noise is derived from a probability of detecting a particle within a quantum dot array structure comprising position based charge qubits with two time independent basis states |0> and |1>. A two level electron tunneling device such as an interface device, qubit or other quantum structure is used to generate quantum noise. The electron tunneling device includes a reservoir of particles, a quantum dot, and a barrier that is used to control tunneling between the reservoir and the quantum dot. Controlling the bias applied to the barrier controls the probability of detection. Thus, the probability density function (PDF) of the output unitary noise can be controlled to correspond to a desired probability. The quantum unitary noise is injected into one or more layers of an artificial neural network (ANN) to improve the learning and training process. The quantum noise source is also used to perform stochastic rounding in the ANN. The PDF of the quantum noise source output is set to a desired value in accordance with the remainder portion of input numbers within the layers of the ANN to be rounded.

IPC Classes  ?

  • G06N 3/02 - Neural networks
  • G06F 7/499 - Denomination or exception handling, e.g. rounding or overflow
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • G06F 7/58 - Random or pseudo-random number generators

4.

System and method of generating quantum unitary noise using silicon based quantum dot arrays

      
Application Number 17522835
Grant Number 11533046
Status In Force
Filing Date 2021-11-09
First Publication Date 2022-05-12
Grant Date 2022-12-20
Owner Equal1.Labs Inc. (USA)
Inventor
  • Redmond, David J.
  • Leipold, Dirk Robert Walter
  • Bashir, Imran
  • Staszewski, Robert Bogdan

Abstract

A novel and useful system and method of generating quantum unitary noise using silicon based quantum dot arrays. Unitary noise is derived from a probability of detecting a particle within a quantum dot array structure comprising position based charge qubits with two time independent basis states |0> and |1>. A two level electron tunneling device such as an interface device, qubit or other quantum structure is used to generate quantum noise. The electron tunneling device includes a reservoir of particles, a quantum dot, and a barrier that is used to control tunneling between the reservoir and the quantum dot. A detector circuit connected to the device outputs a digital stream corresponding to the probability of a particle of being detected. Controlling the bias applied to the barrier controls the probability of detection. Thus, the probability density function (PDF) of the output unitary noise can be controlled to correspond to a desired probability. The unitary noise can be used in stochastic rounding by controlling the bias applied to the barrier in accordance with a remainder of numbers to be rounded.

IPC Classes  ?

  • H03K 3/84 - Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators
  • H01L 29/66 - Types of semiconductor device
  • G06N 3/08 - Learning methods
  • G06N 3/04 - Architecture, e.g. interconnection topology
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • G06N 10/40 - Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
  • G06F 7/499 - Denomination or exception handling, e.g. rounding or overflow
  • G06F 17/18 - Complex mathematical operations for evaluating statistical data
  • H01L 49/00 - Solid state devices not provided for in groups and and not provided for in any other subclass; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • G06N 3/063 - Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means

5.

Accelerated Learning In Neural Networks Incorporating Quantum Unitary Noise And Quantum Stochastic Rounding Using Silicon Based Quantum Dot Arrays

      
Application Number 17522888
Status Pending
Filing Date 2021-11-09
First Publication Date 2022-05-12
Owner equal1.labs Inc. (USA)
Inventor
  • Redmond, David J.
  • Leipold, Dirk Robert Walter
  • Bashir, Imran
  • Staszewski, Robert Bogdan

Abstract

A novel and useful system and method of accelerated learning in neural networks using silicon based quantum dot arrays. Unitary noise is derived from a probability of detecting a particle within a quantum dot array structure comprising position based charge qubits with two time independent basis states |0> and |1>. A two level electron tunneling device such as an interface device, qubit or other quantum structure is used to generate quantum noise. The electron tunneling device includes a reservoir of particles, a quantum dot, and a barrier that is used to control tunneling between the reservoir and the quantum dot. Controlling the bias applied to the barrier controls the probability of detection. Thus, the probability density function (PDF) of the output unitary noise can be controlled to correspond to a desired probability. The quantum unitary noise is injected into one or more layers of an artificial neural network (ANN) to improve the learning and training process. The quantum noise source is also used to perform stochastic rounding in the ANN. The PDF of the quantum noise source output is set to a desired value in accordance with the remainder portion of input numbers within the layers of the ANN to be rounded.

IPC Classes  ?

  • G06N 3/08 - Learning methods
  • H01L 29/66 - Types of semiconductor device
  • H03K 3/84 - Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • G06N 3/063 - Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
  • G06N 3/04 - Architecture, e.g. interconnection topology

6.

SYSTEM AND METHOD OF QUANTUM STOCHASTIC ROUNDING USING SILICON BASED QUANTUM DOT ARRAYS

      
Application Number 17522873
Status Pending
Filing Date 2021-11-09
First Publication Date 2022-05-12
Owner equal1.labs Inc. (USA)
Inventor
  • Redmond, David J.
  • Leipold, Dirk Robert Walter
  • Bashir, Imran
  • Staszewski, Robert Bogdan

Abstract

A novel and useful system and method of quantum stochastic rounding using silicon based quantum dot arrays. Unitary noise is derived from a probability of detecting a particle within a quantum dot array structure comprising position based charge qubits with two time independent basis states |0> and |1>. A two level electron tunneling device such as an interface device, qubit or other quantum structure is used to generate quantum noise. The electron tunneling device includes a reservoir of particles, a quantum dot, and a barrier that is used to control tunneling between the reservoir and the quantum dot. A detector circuit connected to the device outputs a digital stream corresponding to the probability of a particle of being detected. Controlling the bias applied to the barrier controls the probability of detection. Thus, the probability density function (PDF) of the output unitary noise can be controlled to correspond to a desired probability. The unitary noise is used to perform stochastic rounding by controlling the bias applied to the barrier in accordance with a remainder of numbers to be rounded.

IPC Classes  ?

  • G06F 7/499 - Denomination or exception handling, e.g. rounding or overflow
  • H01L 49/00 - Solid state devices not provided for in groups and and not provided for in any other subclass; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • G06F 17/18 - Complex mathematical operations for evaluating statistical data
  • G06N 10/40 - Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
  • G06N 3/04 - Architecture, e.g. interconnection topology

7.

Reprogrammable quantum processor architecture incorporating quantum error correction

      
Application Number 17645047
Grant Number 11635642
Status In Force
Filing Date 2021-12-18
First Publication Date 2022-05-05
Grant Date 2023-04-25
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful quantum computing machine architecture that includes a classic computing core as well as a quantum computing core. A programmable pattern generator executes sequences of instructions that control the quantum core. In accordance with the sequences, a pulse generator functions to generate the control signals that are input to the quantum core to perform quantum operations. A partial readout of the quantum state in the quantum core is generated that is subsequently re-injected back into the quantum core to extend decoherence time. Access gates control movement of quantum particles in the quantum core. Errors are corrected from the partial readout before being re-injected back into the quantum core. Internal and external calibration loops calculate error syndromes and calibrate the control pulses input to the quantum core. Control of the quantum core is provided from an external support unit via the pattern generator or can be retrieved from classic memory where sequences of commands for the quantum core are stored a priori in the memory. A cryostat unit functions to provide several temperatures to the quantum machine including a temperature to cool the quantum computing core to approximately 4 Kelvin.

IPC Classes  ?

  • H03M 13/00 - Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • H03M 13/15 - Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
  • G06N 10/70 - Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation

8.

SYSTEM AND METHOD OF QUANTUM ENHANCED ACCELERATED NEURAL NETWORK TRAINING

      
Application Number 17302402
Status Pending
Filing Date 2021-05-01
First Publication Date 2021-11-04
Owner equal1.labs Inc. (USA)
Inventor
  • Redmond, David J.
  • Leipold, Dirk Robert Walter

Abstract

A novel and useful system and method of quantum enhanced accelerated training of a classic neural network (NN). The quantum system implements an optimizer that accelerates training of the classic NN by exploiting the properties of quantum mechanics and manipulating the quantum system into a state that represents the complete state of the classic NN, including the loss function. The quantum system is then allowed to transition to its “optimum state” and the minimum energy state is read out from detectors and weight updates are calculated and fed back to the classic NN. Mapping and detection helper neural networks learn the characteristics of the quantum system structures. By averaging this over a number of images the learning weight or gradient of descent can be controlled to yield optimum neural network parameters. The time and energy required for training the classic NN as well as for inference is drastically reduced.

IPC Classes  ?

  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • G06N 3/04 - Architecture, e.g. interconnection topology
  • G06N 3/08 - Learning methods

9.

Semiconductor process optimized for quantum structures

      
Application Number 17157062
Grant Number 11611032
Status In Force
Filing Date 2021-01-25
First Publication Date 2021-05-13
Grant Date 2023-03-21
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful modified semiconductor fabrication technique for realizing reliable semiconductor quantum structures. Quantum structures require a minimization of the parasitic capacitance of the control gate and the quantum well. The modified semiconductor process eliminates the fabrication of the metal, contact, and optionally the raised diffusion layers from the quantum wells, thereby resulting in much lower well and gate capacitances and therefore larger Coulomb blockade voltages. This allows easier implementation of the electronic control circuits in that they can have larger intrinsic noise and relaxed analog resolution. Several processes are disclosed including implementations of semiconductor quantum structures with tunneling through an oxide layer as well as tunneling through a local well depleted region. These techniques can be used in both planar semiconductor processes and 3D, e.g., FinFET, semiconductor processes. A dedicated process masking step is used for realizing the raised diffusions. In addition, the edge of the raised diffusion layer may be placed either in the gate region or the active layer region.

IPC Classes  ?

  • H10N 60/10 - Junction-based devices
  • H10N 60/80 - Constructional details
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H10N 60/01 - Manufacture or treatment
  • H10N 60/12 - Josephson-effect devices
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
  • H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof

10.

Reprogrammable quantum processor architecture incorporating quantum error correction

      
Application Number 16446271
Grant Number 11203526
Status In Force
Filing Date 2019-06-19
First Publication Date 2021-03-04
Grant Date 2021-12-21
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful quantum computing machine architecture that includes a classic computing core as well as a quantum computing core. A programmable pattern generator executes sequences of instructions that control the quantum core. In accordance with the sequences, a pulse generator functions to generate the control signals that are input to the quantum core to perform quantum operations. A partial readout of the quantum state in the quantum core is generated that is subsequently re-injected back into the quantum core to extend decoherence time. Access gates control movement of quantum particles in the quantum core. Errors are corrected from the partial readout before being re-injected back into the quantum core. Internal and external calibration loops calculate error syndromes and calibrate the control pulses input to the quantum core. Control of the quantum core is provided from an external support unit via the pattern generator or can be retrieved from classic memory where sequences of commands for the quantum core are stored a priori in the memory. A cryostat unit functions to provide several temperatures to the quantum machine including a temperature to cool the quantum computing core to approximately 4 Kelvin.

IPC Classes  ?

  • H03M 13/00 - Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • H03M 13/15 - Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes

11.

Quantum shift register structures

      
Application Number 16929275
Grant Number 10843924
Status In Force
Filing Date 2020-07-15
First Publication Date 2020-11-24
Grant Date 2020-11-24
Owner equal1.labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful controlled quantum shift register for transporting particles from one quantum dot to another in a quantum structure. The shift register incorporates a succession of qdots with tunneling paths and control gates. Applying appropriate control signals to the control gates, a particle or a split quantum state is made to travel along the shift register. The shift register also includes ancillary double interaction where two pairs of quantum dots provide an ancillary function where the quantum state of one pair is replicated in the second pair. The shift register also provides bifurcation where an access path is split into two or more paths. Depending on the control pulse signals applied, quantum dots are extended into multiple paths. Control of the shift register is provided by electric control pulses. An optional auxiliary magnetic field provides additional control of the shift register.

IPC Classes  ?

  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed

12.

Semiconductor process for quantum structures with staircase active well incorporating shared gate control

      
Application Number 16740567
Grant Number 10861940
Status In Force
Filing Date 2020-01-13
First Publication Date 2020-07-16
Grant Date 2020-12-08
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful modified semiconductor process having staircase active well shapes that provide variable distances between pairs of locations (i.e. quantum dots) resulting in modulation of the quantum interaction strength from weak/negligible at large separations to moderate and then strong at short separations. To achieve a modulation of the distance between pairs of locations, diagonal, lateral, and vertical quantum particle/state transport is employed. As examples, both implementations of semiconductor quantum structures with tunneling through an oxide layer and with tunneling through a local well depleted region are disclosed. These techniques are applicable to both planar semiconductor processes and 3D (e.g. Fin-FET) semiconductor processes. Optical proximity correction is used to accommodate the staircase well layers. Each gate control circuit in the imposer circuitry functions to control more than one set of control gates. Thus, each gate control circuit is shared across several qubits which are located sufficiently far from each other to prevent interference. This substantially reduces the number of control signals and control logic that required in the structure.

IPC Classes  ?

  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/775 - Field-effect transistors with one-dimensional charge carrier gas channel, e.g. quantum wire FET
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells

13.

Semiconductor quantum structures using preferential tunneling through thin insulator layers

      
Application Number 16747445
Grant Number 10868119
Status In Force
Filing Date 2020-01-20
First Publication Date 2020-07-16
Grant Date 2020-12-15
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful semiconductor structures using preferential tunneling through thin insulator layers. Semiconductor quantum structures are implemented using tunneling through a thin oxide layer. The quantum dots are fabricated with semiconductor wells, 3D fins or combinations thereof, while the tunneling path and any optional quantum transport path is implemented with gate layers. The oxide layer between the gate and the well is thin enough in the nanometer semiconductor processes to permit significant tunneling. Having a thin oxide layer on only one side of the well, while having thick oxide layers on all other sides, results in a preferential tunneling direction where tunneling is restricted to a small area resulting in aperture tunneling. The advantage being constraining quantum transport to a very narrow path, which can be approximated as unidimensional. In alternative embodiments, more than one preferential tunneling direction may be used. These techniques can be used in both planar and 3D (e.g., FinFET) semiconductor processes.

IPC Classes  ?

  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/775 - Field-effect transistors with one-dimensional charge carrier gas channel, e.g. quantum wire FET

14.

Semiconductor process optimized for quantum structures

      
Application Number 16734337
Grant Number 10903413
Status In Force
Filing Date 2020-01-05
First Publication Date 2020-07-09
Grant Date 2021-01-26
Owner Equal!.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful modified semiconductor fabrication technique for realizing reliable semiconductor quantum structures. Quantum structures require a minimization of the parasitic capacitance of the control gate and the quantum well. The modified semiconductor process eliminates the fabrication of the metal, contact, and optionally the raised diffusion layers from the quantum wells, thereby resulting in much lower well and gate capacitances and therefore larger Coulomb blockade voltages. This allows easier implementation of the electronic control circuits in that they can have larger intrinsic noise and relaxed analog resolution. Several processes are disclosed including implementations of semiconductor quantum structures with tunneling through an oxide layer as well as tunneling through a local well depleted region. These techniques can be used in both planar semiconductor processes and 3D, e.g., FinFET, semiconductor processes. A dedicated process masking step is used for realizing the raised diffusions. In addition, the edge of the raised diffusion layer may be placed either in the gate region or the active layer region.

IPC Classes  ?

  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof

15.

Integrated quantum computer incorporating quantum core and associated classical control circuitry

      
Application Number 16734346
Grant Number 11423322
Status In Force
Filing Date 2020-01-05
First Publication Date 2020-05-21
Grant Date 2022-08-23
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful fully integrated quantum computer containing both quantum core circuitry and associated classical electronic control circuits on the same monolithic die. The integrated quantum computer avoids ESD loading on the quantum structures and minimizes the need for long interconnects with resultant large parasitic inductances and capacitances. Such parasitics reduce the maximum operating frequency of the realized quantum core structures. A cryostat unit functions to provide several temperatures to the quantum computer including a temperature to cool the quantum core to approximately 4° K and the interface SoC to 77° K. Alternatively, the interface circuitry is also integrated with the main QPU on the same die. A programmable pattern generator executes sequences of instructions that control the quantum core. In accordance with the sequences, a pulse generator functions to generate the control signals that are input to the quantum core to perform quantum operations.

IPC Classes  ?

  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • G06F 1/20 - Cooling means
  • G06F 15/78 - Architectures of general purpose stored program computers comprising a single central processing unit
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs

16.

Semiconductor process for quantum structures with staircase active well

      
Application Number 16740521
Grant Number 10854738
Status In Force
Filing Date 2020-01-13
First Publication Date 2020-05-14
Grant Date 2020-12-01
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful modified semiconductor process having staircase active well shapes that provide variable distances between pairs of locations (i.e. quantum dots) resulting in modulation of the quantum interaction strength from weak/negligible at large separations to moderate and then strong at short separations. To achieve a modulation of the distance between pairs of locations, diagonal, lateral, and vertical quantum particle/state transport is employed. As examples, both implementations of semiconductor quantum structures with tunneling through an oxide layer and with tunneling through a local well depleted region are disclosed. These techniques are applicable to both planar semiconductor processes and 3D (e.g. Fin-FET) semiconductor processes. Optical proximity correction is used to accommodate the staircase well layers. Each gate control circuit in the imposer circuitry functions to control more than one set of control gates. Thus, each gate control circuit is shared across several qubits which are located sufficiently far from each other to prevent interference. This substantially reduces the number of control signals and control logic that required in the structure.

IPC Classes  ?

  • H01L 29/66 - Types of semiconductor device
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 21/8234 - MIS technology
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • B82Y 40/00 - Manufacture or treatment of nanostructures

17.

Topological programmable scalable quantum computing machine utilizing chord line quasi unidimensional aperature tunneling semiconductor structures

      
Application Number 16524259
Grant Number 10873019
Status In Force
Filing Date 2019-07-29
First Publication Date 2020-04-02
Grant Date 2020-12-22
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful topological, scalable, and reprogrammable quantum computing machine having one or more quasi-unidimensional chord lines along which the movement of a particle is constrained. The unidimensional passage has localized energy levels that can be controlled with classic electronics. The chord line has two or more quantum dots between which a quasi-unidimensional channel is formed for the particle to travel from one qdot to the other. The tunneling path may be polysilicon, metal, thin oxide, or induced depletion region. The chord line can be in a two-dimensional space for a planar process or in a three-dimensional space with multiple layers of signal processing for a three dimensional process. A quantum structure has semiconductor dots with a layer that provides the chord line for the quantum particle evolution to occur from one dot to the other. The various layers may include polysilicon, metal, thin oxide, or induced depletion region either fully overlapped or partially overlapped.

IPC Classes  ?

  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
  • H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details

18.

Multistage semiconductor quantum detector circuit incorporating anticorrelation

      
Application Number 16569471
Grant Number 10845496
Status In Force
Filing Date 2019-09-12
First Publication Date 2020-01-02
Grant Date 2020-11-24
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful multistage semiconductor quantum detector circuit incorporating an anticorrelation mechanism. The quantum structure has at least the first stage sensor of the detector merged into the quantum structure in order to minimize loading of the quantum structure. The merged quantum structure and detector sensor may be encapsulated in a metal cage in order to provide enhanced rejection of the environmental parasitic electric and/or magnetic fields. A double boot strapping detector front-end configuration substantially eliminates the loading coming from both the gate-source and the gate-drain parasitic capacitances of the first sensor device of the detector that is connected to the quantum structure. In addition, differential detection aids in rejecting leakage, noise, and correlated interference coupling. Both dummy referenced differential detection as well as self-referenced differential detection may be employed in the detector. Moreover, correlated double sampling is used after preamplification in the detector in order to further reject noise and perturbations in the system.

IPC Classes  ?

  • G01V 3/02 - Electric or magnetic prospecting or detecting; Measuring magnetic field characteristics of the earth, e.g. declination or deviation operating with propagation of electric current
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/66 - Types of semiconductor device
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

19.

Planar quantum structures utilizing quantum particle tunneling through local depleted well

      
Application Number 16445285
Grant Number 11214484
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2022-01-04
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful quantum structures having a continuous well with control gates that control a local depletion region to form quantum dots. Local depleted well tunneling is used to control quantum operations to implement quantum computing circuits. Qubits are realized by modulating gate potential to control tunneling through local depleted region between two or more sections of the well. Complex structures with a higher number of qdots per continuous well and a larger number of wells are fabricated. Both planar and 3D FinFET semiconductor processes are used to build well to gate and well to well tunneling quantum structures. Combining a number of elementary quantum structure, a quantum computing machine is realized. An interface device provides an interface between classic circuitry and quantum circuitry by permitting tunneling of a single quantum particle from the classic side to the quantum side of the device. Detection interface devices detect the presence or absence of a particle destructively or nondestructively.

IPC Classes  ?

  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • H03M 13/15 - Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes

20.

Finfet quantum structures utilizing quantum particle tunneling through local depleted well

      
Application Number 16445325
Grant Number 11454834
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2022-09-27
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful quantum structures having a continuous well with control gates that control a local depletion region to form quantum dots. Local depleted well tunneling is used to control quantum operations to implement quantum computing circuits. Qubits are realized by modulating gate potential to control tunneling through local depleted region between two or more sections of the well. Complex structures with a higher number of qdots per continuous well and a larger number of wells are fabricated. Both planar and 3D FinFET semiconductor processes are used to build well to gate and well to well tunneling quantum structures. Combining a number of elementary quantum structure, a quantum computing machine is realized. An interface device provides an interface between classic circuitry and quantum circuitry by permitting tunneling of a single quantum particle from the classic side to the quantum side of the device. Detection interface devices detect the presence or absence of a particle destructively or nondestructively.

IPC Classes  ?

  • H01L 31/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • H03M 13/15 - Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
  • G06N 10/70 - Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation

21.

FinFET quantum structures utilizing quantum particle tunneling through oxide

      
Application Number 16445332
Grant Number 11327344
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2022-05-10
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful quantum structures having a continuous well with control gates that control a local depletion region to form quantum dots. Local depleted well tunneling is used to control quantum operations to implement quantum computing circuits. Qubits are realized by modulating gate potential to control tunneling through local depleted region between two or more sections of the well. Complex structures with a higher number of qdots per continuous well and a larger number of wells are fabricated. Both planar and 3D FinFET semiconductor processes are used to build well to gate and well to well tunneling quantum structures. Combining a number of elementary quantum structure, a quantum computing machine is realized. An interface device provides an interface between classic circuitry and quantum circuitry by permitting tunneling of a single quantum particle from the classic side to the quantum side of the device. Detection interface devices detect the presence or absence of a particle destructively or nondestructively.

IPC Classes  ?

  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • H03M 13/15 - Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes

22.

Semiconductor controlled quantum Pauli interaction gate

      
Application Number 16445695
Grant Number 11366345
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2022-06-21
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful quantum structures that provide various control functions. Particles are brought into close proximity to interact with one another and exchange information. After entanglement, the particles are moved away from each other but they still carry the information contained initially. Measurement and detection are performed on the particles from the entangled ensemble to determine whether the particle is present or not in a given qdot. A quantum interaction gate is a circuit or structure operating on a relatively small number of qubits. Quantum interaction gates implement several quantum functions including a controlled NOT gate, quantum annealing gate, controlled SWAP gate, a controlled Pauli rotation gate, and ancillary gate. These quantum interaction gates can have numerous shapes including double V shape, H shape, X shape, L shape, I shape, etc.

IPC Classes  ?

  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • H03M 13/15 - Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes

23.

Semiconductor controlled quantum ancillary interaction gate

      
Application Number 16445726
Grant Number 10822231
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2020-11-03
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful quantum structures that provide various control functions. Particles are brought into close proximity to interact with one another and exchange information. After entanglement, the particles are moved away from each other but they still carry the information contained initially. Measurement and detection are performed on the particles from the entangled ensemble to determine whether the particle is present or not in a given qdot. A quantum interaction gate is a circuit or structure operating on a relatively small number of qubits. Quantum interaction gates implement several quantum functions including a controlled NOT gate, quantum annealing gate, controlled SWAP gate, a controlled Pauli rotation gate, and ancillary gate. These quantum interaction gates can have numerous shapes including double V shape, H shape, X shape, L shape, I shape, etc.

IPC Classes  ?

  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices

24.

Quantum shift register incorporating bifurcation

      
Application Number 16446325
Grant Number 10562765
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2020-02-18
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful controlled quantum shift register for transporting particles from one quantum dot to another in a quantum structure. The shift register incorporates a succession of qdots with tunneling paths and control gates. Applying appropriate control signals to the control gates, a particle or a split quantum state is made to travel along the shift register. The shift register also includes ancillary double interaction where two pairs of quantum dots provide an ancillary function where the quantum state of one pair is replicated in the second pair. The shift register also provides bifurcation where an access path is split into two or more paths. Depending on the control pulse signals applied, quantum dots are extended into multiple paths. Control of the shift register is provided by electric control pulses. An optional auxiliary magnetic field provides additional control of the shift register.

IPC Classes  ?

  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena

25.

Classic-quantum injection interface device

      
Application Number 16445307
Grant Number 10934163
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2021-03-02
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful quantum structures having a continuous well with control gates that control a local depletion region to form quantum dots. Local depleted well tunneling is used to control quantum operations to implement quantum computing circuits. Qubits are realized by modulating gate potential to control tunneling through local depleted region between two or more sections of the well. Complex structures with a higher number of qdots per continuous well and a larger number of wells are fabricated. Both planar and 3D FinFET semiconductor processes are used to build well to gate and well to well tunneling quantum structures. Combining a number of elementary quantum structure, a quantum computing machine is realized. An interface device provides an interface between classic circuitry and quantum circuitry by permitting tunneling of a single quantum particle from the classic side to the quantum side of the device. Detection interface devices detect the presence or absence of a particle destructively or nondestructively.

IPC Classes  ?

  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices

26.

Quantum-classic detection interface device

      
Application Number 16445316
Grant Number 11454833
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2022-09-27
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful quantum structures having a continuous well with control gates that control a local depletion region to form quantum dots. Local depleted well tunneling is used to control quantum operations to implement quantum computing circuits. Qubits are realized by modulating gate potential to control tunneling through local depleted region between two or more sections of the well. Complex structures with a higher number of qdots per continuous well and a larger number of wells are fabricated. Both planar and 3D FinFET semiconductor processes are used to build well to gate and well to well tunneling quantum structures. Combining a number of elementary quantum structure, a quantum computing machine is realized. An interface device provides an interface between classic circuitry and quantum circuitry by permitting tunneling of a single quantum particle from the classic side to the quantum side of the device. Detection interface devices detect the presence or absence of a particle destructively or nondestructively.

IPC Classes  ?

  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • H03M 13/15 - Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
  • G06N 10/70 - Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation

27.

Semiconductor controlled quantum interaction gates

      
Application Number 16445645
Grant Number 10865106
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2020-12-15
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful quantum structures that provide various control functions. Particles are brought into close proximity to interact with one another and exchange information. After entanglement, the particles are moved away from each other but they still carry the information contained initially. Measurement and detection are performed on the particles from the entangled ensemble to determine whether the particle is present or not in a given qdot. A quantum interaction gate is a circuit or structure operating on a relatively small number of qubits. Quantum interaction gates implement several quantum functions including a controlled NOT gate, quantum annealing gate, controlled SWAP gate, a controlled Pauli rotation gate, and ancillary gate. These quantum interaction gates can have numerous shapes including double V shape, H shape, X shape, L shape, I shape, etc.

IPC Classes  ?

  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters

28.

Semiconductor controlled quantum annealing interaction gate

      
Application Number 16445658
Grant Number 10793431
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2020-10-06
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful quantum structures that provide various control functions. Particles are brought into close proximity to interact with one another and exchange information. After entanglement, the particles are moved away from each other but they still carry the information contained initially. Measurement and detection are performed on the particles from the entangled ensemble to determine whether the particle is present or not in a given qdot. A quantum interaction gate is a circuit or structure operating on a relatively small number of qubits. Quantum interaction gates implement several quantum functions including a controlled NOT gate, quantum annealing gate, controlled SWAP gate, a controlled Pauli rotation gate, and ancillary gate. These quantum interaction gates can have numerous shapes including double V shape, H shape, X shape, L shape, I shape, etc.

IPC Classes  ?

  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices

29.

Semiconductor controlled quantum swap interaction gate

      
Application Number 16445673
Grant Number 10800654
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2020-10-13
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful quantum structures that provide various control functions. Particles are brought into close proximity to interact with one another and exchange information. After entanglement, the particles are moved away from each other but they still carry the information contained initially. Measurement and detection are performed on the particles from the entangled ensemble to determine whether the particle is present or not in a given qdot. A quantum interaction gate is a circuit or structure operating on a relatively small number of qubits. Quantum interaction gates implement several quantum functions including a controlled NOT gate, quantum annealing gate, controlled SWAP gate, a controlled Pauli rotation gate, and ancillary gate. These quantum interaction gates can have numerous shapes including double V shape, H shape, X shape, L shape, I shape, etc.

IPC Classes  ?

  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device
  • H03M 1/34 - Analogue value compared with reference values
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • H03M 1/66 - Digital/analogue converters
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs

30.

Quantum structure incorporating theta angle control

      
Application Number 16445760
Grant Number 11300816
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2022-04-12
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful electronic and magnetic control of several quantum structures that provide various control functions. An electric field provides control and is created by a voltage applied to a control terminal. Alternatively, an inductor or resonator provides control. An electric field functions as the main control and an auxiliary magnetic field provides additional control on the control gate. The magnetic field is used to control different aspects of the quantum structure. The magnetic field impacts the spin of the electron by tending to align to the magnetic field. The Bloch sphere is a geometrical representation of the state of a two-level quantum system and defined by a vector in x, y, z spherical coordinates. The representation includes two angles θ and φ whereby an appropriate electrostatic gate control voltage signal is generated to control the angle θ of the quantum state and an appropriate control voltage to an interface device generates a corresponding electrostatic field in the quantum structure to control the angle φ.

IPC Classes  ?

  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • H03M 13/15 - Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes

31.

Quantum structure incorporating phi angle control

      
Application Number 16446160
Grant Number 11327345
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2022-05-10
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful electronic and magnetic control of several quantum structures that provide various control functions. An electric field provides control and is created by a voltage applied to a control terminal. Alternatively, an inductor or resonator provides control. An electric field functions as the main control and an auxiliary magnetic field provides additional control on the control gate. The magnetic field is used to control different aspects of the quantum structure. The magnetic field impacts the spin of the electron by tending to align to the magnetic field. The Bloch sphere is a geometrical representation of the state of a two-level quantum system and defined by a vector in x, y, z spherical coordinates. The representation includes two angles θ and φ whereby an appropriate electrostatic gate control voltage signal is generated to control the angle θ of the quantum state and an appropriate control voltage to an interface device generates a corresponding electrostatic field in the quantum structure to control the angle φ.

IPC Classes  ?

  • H01L 29/82 - Types of semiconductor device controllable by variation of the magnetic field applied to the device
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • H03M 13/15 - Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes

32.

Quantum structure incorporating electric and magnetic field control

      
Application Number 16446191
Grant Number 11281030
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2022-03-22
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

Novel and useful electronic and magnetic control of several quantum structures that provide various control functions. An electric field provides control and is created by a voltage applied to a control terminal. Alternatively, an inductor or resonator provides control. An electric field functions as the main control and an auxiliary magnetic field provides additional control on the control gate. The magnetic field is used to control different aspects of the quantum structure. The magnetic field impacts the spin of the electron by tending to align to the magnetic field. The Bloch sphere is a geometrical representation of the state of a two-level quantum system and defined by a vector in x, y, z spherical coordinates. The representation includes two angles θ and φ whereby an appropriate electrostatic gate control voltage signal is generated to control the angle θ of the quantum state and an appropriate control voltage to an interface device generates a corresponding electrostatic field in the quantum structure to control the angle φ.

IPC Classes  ?

  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • H03M 13/15 - Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes

33.

Reprogrammable quantum processor architecture

      
Application Number 16446235
Grant Number 11822163
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2023-11-21
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful quantum computing machine includes classic computing and quantum computing cores. A programmable pattern generator executes instructions that control the quantum core. A pulse generator generates the control signals input to the quantum core to perform quantum operations. A partial readout of the quantum state is re-injected into the quantum core to extend decoherence time. Access gates control movement of quantum particles in the quantum core. Errors are corrected from the readout before being re-injected into the quantum core. Internal and external calibration loops calculate error syndromes and calibrate control pulses input to the quantum core. Control of the quantum core is provided from an external support unit via the pattern generator or retrieved from classic memory where sequences of commands are stored in memory. A cryostat unit functions to cool the quantum computing core to approximately 4 Kelvin.

IPC Classes  ?

  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • G06N 10/40 - Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
  • G06N 10/70 - Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • H03M 13/15 - Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
  • H10N 60/10 - Junction-based devices
  • H10N 69/00 - Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group

34.

Reprogrammable quantum processor architecture incorporating calibration loops

      
Application Number 16446262
Grant Number 11275260
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2022-03-15
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful quantum computing machine architecture that includes a classic computing core as well as a quantum computing core. A programmable pattern generator executes sequences of instructions that control the quantum core. In accordance with the sequences, a pulse generator functions to generate the control signals that are input to the quantum core to perform quantum operations. A partial readout of the quantum state in the quantum core is generated that is subsequently re-injected back into the quantum core to extend decoherence time. Access gates control movement of quantum particles in the quantum core. Errors are corrected from the partial readout before being re-injected back into the quantum core. Internal and external calibration loops calculate error syndromes and calibrate the control pulses input to the quantum core. Control of the quantum core is provided from an external support unit via the pattern generator or can be retrieved from classic memory where sequences of commands for the quantum core are stored a priori in the memory. A cryostat unit functions to provide several temperatures to the quantum machine including a temperature to cool the quantum computing core to approximately 4 Kelvin.

IPC Classes  ?

  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
  • B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
  • G06F 1/20 - Cooling means
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06N 99/00 - Subject matter not provided for in other groups of this subclass
  • G11C 19/32 - Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H03M 1/34 - Analogue value compared with reference values
  • H03M 1/66 - Digital/analogue converters
  • H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
  • H03M 13/15 - Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes

35.

Quantum shift register structures

      
Application Number 16446294
Grant Number 10850978
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2020-12-01
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful controlled quantum shift register for transporting particles from one quantum dot to another in a quantum structure. The shift register incorporates a succession of qdots with tunneling paths and control gates. Applying appropriate control signals to the control gates, a particle or a split quantum state is made to travel along the shift register. The shift register also includes ancillary double interaction where two pairs of quantum dots provide an ancillary function where the quantum state of one pair is replicated in the second pair. The shift register also provides bifurcation where an access path is split into two or more paths. Depending on the control pulse signals applied, quantum dots are extended into multiple paths. Control of the shift register is provided by electric control pulses. An optional auxiliary magnetic field provides additional control of the shift register.

IPC Classes  ?

  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/66 - Types of semiconductor device
  • H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices

36.

Quantum shift register based ancillary quantum interaction gates

      
Application Number 16446313
Grant Number 10562764
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-12-26
Grant Date 2020-02-18
Owner Equal1.Labs Inc. (USA)
Inventor
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian
  • Asker, Michael Albert

Abstract

A novel and useful controlled quantum shift register for transporting particles from one quantum dot to another in a quantum structure. The shift register incorporates a succession of qdots with tunneling paths and control gates. Applying appropriate control signals to the control gates, a particle or a split quantum state is made to travel along the shift register. The shift register also includes ancillary double interaction where two pairs of quantum dots provide an ancillary function where the quantum state of one pair is replicated in the second pair. The shift register also provides bifurcation where an access path is split into two or more paths. Depending on the control pulse signals applied, quantum dots are extended into multiple paths. Control of the shift register is provided by electric control pulses. An optional auxiliary magnetic field provides additional control of the shift register.

IPC Classes  ?

  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena

37.

SEMICONDUCTOR CONTROLLED QUANTUM INTERACTION GATES

      
Application Number IB2019055171
Publication Number 2019/244076
Status In Force
Filing Date 2019-06-19
Publication Date 2019-12-26
Owner EQUAL1.LABS INC. (USA)
Inventor
  • Maxim, George Adrian
  • Leipold, Dirk Robert Walter
  • Asker, Michael Albert

Abstract

Novel and useful quantum structures that provide various control functions. Particles are brought into close proximity to interact with one another and exchange information. After entanglement, the particles are moved away from each other but they still carry the information contained initially. Measurement and detection are performed on the particles from the entangled ensemble to determine whether the particle is present or not in a given qdot. A quantum interaction gate is a circuit or structure operating on a relatively small number of qubits. Quantum interaction gates implement several quantum functions including a controlled NOT gate, quantum annealing gate, controlled SWAP gate, a controlled Pauli rotation gate, and ancillary gate. These quantum interaction gates can have numerous shapes including double V shape, H shape, X shape, L shape, I shape, etc.

IPC Classes  ?

  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed

38.

QUANTUM STRUCTURE INCORPORATING ELECTRIC AND MAGNETIC ANGLE CONTROL

      
Application Number IB2019055174
Publication Number 2019/244078
Status In Force
Filing Date 2019-06-19
Publication Date 2019-12-26
Owner EQUAL1.LABS INC. (USA)
Inventor
  • Asker, Michael Albert
  • Leipold, Dirk Robert Walter
  • Maxim, George Adrian

Abstract

Novel and useful electronic and magnetic control of several quantum structures that provide various control functions. An electric field provides control and is created by a voltage applied to a control terminal. Alternatively, an inductor or resonator provides control. An electric field functions as the main control and an auxiliary magnetic field provides additional control on the control gate. The magnetic field is used to control different aspects of the quantum structure. The magnetic field impacts the spin of the electron by tending to align to the magnetic field. The Bloch sphere is a geometrical representation of the state of a two-level quantum system and defined by a vector in x, y, z spherical coordinates. The representation includes two angles Θ and φ whereby an appropriate electrostatic gate control voltage signal is generated to control the angle Θ of the quantum state and an appropriate control voltage to an interface device generates a corresponding electrostatic field in the quantum structure to control the angle φ.

IPC Classes  ?

  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic