Cypress Semiconductor Corporation

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G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means 162
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H01L 27/115 - Electrically programmable read-only memories; Multistep manufacturing processes therefor 83
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1.

SYSTEMS, METHODS, AND DEVICES FOR LATENCY PARAMETER-BASED COEXISTENCE ENHANCEMENT IN WIRELESS DEVICES

      
Application Number 17968881
Status Pending
Filing Date 2022-10-18
First Publication Date 2024-04-25
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Munukutla, Sandeep Sarma
  • Kencharla, Raghavendra

Abstract

Systems, methods, and devices implement coexistence enhancement for collocated wireless transceivers. Methods include determining, using a processing device, a latency parameter associated with a wireless device comprising a first transceiver compatible with a first communications protocol and a second transceiver compatible with a second communications protocol. Methods also include identifying, using the processing device, a number of anchor points based, at least in part, on the latency parameter, each of the anchor points representing a periodic connection event for the second transceiver. Methods further include updating a radio frequency (RF) active signal to skip at least one transmit operation and receive operation of the second transceiver based on the identified number of anchor points.

IPC Classes  ?

2.

FRAME SYNCHRONIZATION DETECTION WITH FRACTIONAL APPROXIMATION

      
Application Number 17970527
Status Pending
Filing Date 2022-10-19
First Publication Date 2024-04-25
Owner Cypress Semiconductor Corporation (USA)
Inventor Rey, Claudio

Abstract

A wireless device includes a receiver to receive a packet via one or more antennas. A frame synchronization detection circuit coupled to the receiver identifies a frame synchronization pattern within a portion of the packet. A correlation circuit coupled to the frame synchronization detection circuit computes one or more values of a correlation peak using a correlation method. A fractional timing approximation circuit coupled to the correlation circuit determines a pulse shape using the one or more values of the correlation peak; and determines a fractional timing approximation for the packet using the pulse shape.

IPC Classes  ?

3.

RADIO FREQUENCY SENSING AND LOCALIZATION OF OBJECTS

      
Application Number 17965679
Status Pending
Filing Date 2022-10-13
First Publication Date 2024-04-18
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Kolych, Igor
  • Uln, Kiran

Abstract

A device includes a transmitter coupled to an antenna, a receiver coupled to the at least one antenna, and a processing device to: cause the transmitter to radiate a radio frequency (RF) signal; receive, via the receiver, a reflective RF signal based on the radiated RF signal; detect, within a data array of the reflective RF signal, a maximum peak among a plurality of signal peaks, the maximum peak being indicative of a first distance to a first object relative to the at least one antenna; and cancel, using cascading peak cancellation on the spectrum, the maximum peak while detecting a first next-highest peak of the plurality of signal peaks compared to the maximum peak, the first next-highest peak being indicative of a second distance to a second object.

IPC Classes  ?

  • G01S 5/02 - Position-fixing by co-ordinating two or more direction or position-line determinations; Position-fixing by co-ordinating two or more distance determinations using radio waves
  • G01S 5/06 - Position of source determined by co-ordinating a plurality of position lines defined by path-difference measurements

4.

OSCILLATOR FREQUENCY COMPENSATION WITH A FIXED CAPACITOR

      
Application Number 17965702
Status Pending
Filing Date 2022-10-13
First Publication Date 2024-04-18
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Liepold, Carl
  • Chan, Austin

Abstract

A frequency compensation circuit determines a target calibration count of a fixed capacitor coupled to a processing device. The frequency compensation circuit identifies a current calibration count of the fixed capacitor. The frequency compensation circuit determines that the current calibration count satisfies a threshold criterion associated with the target calibration count. In response to determining that the current calibration count satisfies the threshold criterion, the frequency compensation circuit adjusts a frequency of an internal oscillator of the processing device based on the current calibration count and the target calibration count.

IPC Classes  ?

  • H03B 5/04 - Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature
  • H03B 5/06 - Modifications of generator to ensure starting of oscillations
  • H03B 5/12 - Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device

5.

MANAGING DATA DRIFT IN MACHINE LEARNING MODELS USING INCREMENTAL LEARNING AND EXPLAINABILITY

      
Application Number 18178351
Status Pending
Filing Date 2023-03-03
First Publication Date 2024-04-11
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Lyons, Niall
  • Mazumder, Amab Neelim
  • Santra, Avik
  • Dubey, Anand
  • Pandey, Ashutosh

Abstract

Implementations disclosed include methods and systems that include obtaining, by a processing device, a first output from a machine learning model, wherein the first output comprises one or more data samples; identifying a first set of data samples of the one or more data samples that satisfies a threshold criterion; generating, using an explainability tool, a weighted value for each data sample of the first set of data samples; and modifying the machine learning model based at least in part on the weighted value for each data sample of the first set of data samples.

IPC Classes  ?

  • G06N 3/082 - Learning methods modifying the architecture, e.g. adding, deleting or silencing nodes or connections

6.

DETECTION AND MITIGATION OF AGGRESSIVE MEDIUM RESERVATIONS

      
Application Number 17963859
Status Pending
Filing Date 2022-10-11
First Publication Date 2024-04-11
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Lee, Hyun Jong
  • Kang, Dong Seok
  • Lee, Chi Woo

Abstract

Implementations disclosed describe wireless devices and methods for mitigating aggressive medium reservations. A first wireless device comprises a transceiver and a processor coupled to the transceiver. The processor is to detect, within a first transmission received by the transceiver from a second wireless device via a first wireless communication channel, a pattern of medium reservations comprising a reservation duration that satisfies a threshold duration value. The processor is further to cause, in response to detecting the pattern of medium reservations, the transceiver to send a second transmission to an access point (AP) wireless device. The second transmission includes an indication of the pattern of medium reservations. The processor is further to detect a medium reservation mitigation signal within a third transmission received by the transceiver from the AP wireless device.

IPC Classes  ?

7.

BUILDING GENERALIZED MACHINE LEARNING MODELS FROM MACHINE LEARNING MODEL EXPLANATIONS

      
Application Number 18178223
Status Pending
Filing Date 2023-03-03
First Publication Date 2024-04-11
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Lyons, Niall
  • Mazumder, Arnab Neelim
  • Dubey, Anand
  • Pandey, Ashutosh
  • Santra, Avik

Abstract

A system includes a memory and a processing device, operatively coupled to the memory, to receive, from a client device via a user interface, input data comprising an initial version of a machine learning model, initialize an operating mode of the user interface for machine learning model building, and generate an enhanced version of the machine learning model in accordance with the operating mode.

IPC Classes  ?

  • G06N 3/0895 - Weakly supervised learning, e.g. semi-supervised or self-supervised learning

8.

LED FIXTURE, PORTABLE WIRELESS ELECTRONIC DEVICE, AND METHOD OF PROVISIONING LED FIXTURES IN A WIRELESS NETWORK

      
Application Number 17958878
Status Pending
Filing Date 2022-10-03
First Publication Date 2024-04-04
Owner CYPRESS SEMICONDUCTOR CORPORATION (USA)
Inventor
  • Lee, Ho Chun
  • Li, Kam Shing
  • Yu, Wenbin

Abstract

A method of provisioning LED fixtures in a wireless network includes: detecting nonvisible light emitted by each of the LED fixtures, using a portable wireless electronic device that comes into range of each of the LED fixtures one at a time; extracting, from the detected nonvisible light for each of the LED fixtures, a unique node ID assigned to each of the LED fixtures; and provisioning each of the LED fixtures into the wireless network, based on the unique ID extracted from the detected nonvisible light for each of the LED fixtures. Embodiments of the LED fixtures and a portable wireless electronic device used as part of the provisioning method are also described.

IPC Classes  ?

  • H05B 47/19 - Controlling the light source by remote control via wireless transmission
  • H05B 47/155 - Coordinated control of two or more light sources

9.

FLEXIBLE AND OPTIMIZED POWER MANAGEMENT UNIT (PMU) FOR MULTIPLE POWER SUPPLY SCENARIOS

      
Application Number 18379022
Status Pending
Filing Date 2023-10-11
First Publication Date 2024-04-04
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Venkatasubramanian, Radhika
  • Dow, Stephen W.
  • Kotra, Prasad Rao
  • Simileysky, Victor
  • Khan, Ataur Rehman
  • Moeller, David
  • Ballweber, Brian

Abstract

Apparatuses and methods of operating a flexible and optimized power management unit (PMU) for multiple power supply scenarios are described. One integrated circuit includes a first terminal to couple to an unregulated power supply, a second terminal to couple to a regulated power supply, a first regulator, and a second regulator. The first regulator outputs a first supply voltage in a first configuration, and the second regulator outputs a second supply voltage in a second configuration. The first and second regulators do not operate concurrently.

IPC Classes  ?

  • G06F 1/3296 - Power saving characterised by the action undertaken by lowering the supply or operating voltage
  • G06F 1/26 - Power supply means, e.g. regulation thereof
  • G06F 1/28 - Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
  • G06F 1/30 - Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations

10.

MULTIPATH ROBUST ANTENNA DESIGN FOR PHASE-BASED DISTANCE MEASUREMENT

      
Application Number 18485320
Status Pending
Filing Date 2023-10-12
First Publication Date 2024-04-04
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Zhang, Zhuohui
  • Uln, Kiran

Abstract

A system and method reconfiguring an antenna for reducing and/or eliminating the effects of multipath on a phase-based measurement system. The method includes steering an antenna unit into a first direction to cause the antenna unit to generate a first constant tone (CT) signal based on a plurality of multipath signals. The method includes performing a phase measurement on the first CT signal to generate a first phase measurement value. The method includes steering the antenna unit into a second direction to cause the antenna unit to generate a second CT signal based on the plurality of multipath signals. The method includes performing a phase measurement on the second CT signal to generate a second phase measurement value. The method includes determining a change in multipath interference at the antenna unit among the plurality of multipath signals. The method includes re-steering the antenna unit into the first direction.

IPC Classes  ?

  • H01Q 3/24 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the orientation by switching energy from one active radiating element to another, e.g. for beam switching
  • H01Q 3/44 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the electric or magnetic characteristics of reflecting, refracting, or diffracting devices associated with the radiating element

11.

TRANSMIT SPUR DETECTION AND MITIGATION FOR WIRELESS COMMUNICATIONS DEVICES

      
Application Number 18490605
Status Pending
Filing Date 2023-10-19
First Publication Date 2024-04-04
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Mukherjee, Suprojit
  • Sood, Ayush

Abstract

Systems, methods, and devices reduce and mitigate spurs that may occur in transmit waveforms of wireless communications devices. Methods include receiving a plurality of samples of a baseband transmission and generating, using a processing device, an estimated amplitude and an estimated phase of a spur component of the baseband transmission based on the received plurality of samples, the spur component being a spectral spike in a transmit waveform. Methods further include generating, using the processing device, a canceling signal configured to cancel the estimated amplitude and estimated phase of the spur component, and canceling the spur component of the baseband transmission by combining the canceling signal with a transmission of at least a portion of a data packet.

IPC Classes  ?

  • H04L 25/03 - Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
  • H04L 25/497 - Transmitting circuits; Receiving circuits using three or more amplitude levels by correlative coding, e.g. partial response coding or echo modulation coding

12.

System and Method for High Resolution, High Frame Rate Video Capture Using a USB Port

      
Application Number 17957351
Status Pending
Filing Date 2022-09-30
First Publication Date 2024-04-04
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Narayanasamy, Rajagopal
  • Mishra, Sanat Kumar
  • Nair, Ashwin
  • Gandhi, Harsh

Abstract

A system and method are provided for capturing a high resolution, high frame rate video using a Universal Serial Bus (USB) port. Generally, the method involves transmitting a High-Definition Multimedia Interface (HDMI) video including a number of video frames from a HDMI-source. Receiving the HDMI video and buffering and splitting each one of the video frames into a plurality of split video frames. Each of the split video frames is converted into a number of USB data packets. USB data packets from each of the split video frames are then interleaved to form a stream of USB data packets. The stream of USB data packets is coupled to a host system, which executes a program to stitch the USB data packets back together to reassemble each of the video frames, and order the video frames to restore or recreate the HDMI video.

IPC Classes  ?

  • H04N 21/44 - Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to MPEG-4 scene graphs
  • G09G 5/00 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
  • H04N 7/01 - Conversion of standards

13.

DISTRIBUTED STORAGE AND PROCESSING OF VEHICLE SENSOR DATA, INCLUDING TIRE PRESSURE DATA

      
Application Number 17958240
Status Pending
Filing Date 2022-09-30
First Publication Date 2024-04-04
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Stopher, Nicholas
  • Evans, Bradley

Abstract

A method can include generating analog signals from at least one pressure sensor mounted within a tire; by operation of analog-to-digital conversion (ADC) circuits of the pressure sensor, converting the analog signals into initial tire data; transmitting the initial tire data from the pressure sensor according to a first wireless communication protocol; receiving the initial tire data at a first intermediate device according to the first wireless standard, the intermediate device being disposed outside of the tire; and storing the initial tire data in the first intermediate device. By operation of the first intermediate device, relayed tire data configured for reception by a central tire monitoring system can be transmitted. The relayed tire data can correspond to the initial tire data. Corresponding devices and systems are also disclosed.

IPC Classes  ?

  • B60C 23/04 - Signalling devices actuated by tyre pressure mounted on the wheel or tyre
  • G07C 5/00 - Registering or indicating the working of vehicles

14.

AUTONOMOUS FEEDBACK FOR EFFICIENT ALLOCATION OF WIRELESS SUBCARRIERS

      
Application Number 18380079
Status Pending
Filing Date 2023-10-13
First Publication Date 2024-04-04
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Asok, Visakh
  • Mukherjee, Suprojit
  • Sethuraman, Prasanna Kumar

Abstract

Implementations disclosed describe systems and methods to optimize allocation of wireless subcarriers to station devices in wireless networks. In an example implementation, the disclosed techniques may include determining, by a station device in a wireless network, that a current set of wireless subcarriers, allocated by an access point device of the wireless network for the station device, is to be changed, generating, by the station device, a feedback information characterizing a current state of one or more of the wireless subcarriers, and sending, by the station device, the feedback information to the access point device.

IPC Classes  ?

  • H04L 1/00 - Arrangements for detecting or preventing errors in the information received
  • H04B 7/06 - Diversity systems; Multi-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
  • H04L 5/00 - Arrangements affording multiple use of the transmission path
  • H04W 24/02 - Arrangements for optimising operational condition
  • H04W 72/54 - Allocation or scheduling criteria for wireless resources based on quality criteria

15.

DETECTING THE ANGLE OF PASSIVE ROTARY KNOB PARTIALLY LOCATED ON TOUCH SCREEN

      
Application Number 18489761
Status Pending
Filing Date 2023-10-18
First Publication Date 2024-04-04
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Weber, Jens
  • Kuzo, Taras
  • Kremin, Viktor

Abstract

An apparatus and method for detecting the angle of passive rotary knob partially located on a touch screen are described. In embodiments the apparatus includes a touch screen having an array of sensors and a dial that includes a base and a knob attached to the base and rotatable relative to the base. The knob includes a plurality of conductive elements, each positioned a distance from a center point of the knob. A controller is also included, coupled to the touch screen, and configured to receive signals generated by one or more sensors of the array in response to the sensors detecting one or more of the conductive elements. The controller can determine a rotational angle of the knob based on the signals generated by the one or more of the sensors in the array while a portion of the knob does not overlap the array of sensors.

IPC Classes  ?

  • G06F 3/039 - Accessories therefor, e.g. mouse pads
  • G06F 3/0362 - Pointing devices displaced or positioned by the user; Accessories therefor with detection of 1D translations or rotations of an operating part of the device, e.g. scroll wheels, sliders, knobs, rollers or belts
  • G06F 3/038 - Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

16.

SYSTEMS, METHODS, AND DEVICES FOR WIRELESS DETECTION OF RADIO FREQUENCY IDENTIFICATION DEVICES

      
Application Number 17954130
Status Pending
Filing Date 2022-09-27
First Publication Date 2024-03-28
Owner Cypress Semiconductor Corporation (USA)
Inventor Kolych, Igor

Abstract

Systems, methods, and devices detect radio frequency identification devices. Methods include transmitting a signal from a transmitter of a wireless device compatible with a wireless communications protocol, and receiving, using a receiver of the wireless device, a signal from a radio frequency identification (RFID) device, the signal comprising one or more resonance parameters. Methods also include generating sensing information and an estimated distance value based, at least in part, on the received signal, the sensing information representing a sensed condition at the RFID device, and the estimated distance value representing an estimate of a distance between the wireless device and the RFID device.

IPC Classes  ?

  • G06K 7/10 - Methods or arrangements for sensing record carriers by corpuscular radiation

17.

INTERFERENCE-RESISTANT WIRELESS LOCALIZATION AND RANGING

      
Application Number 17954156
Status Pending
Filing Date 2022-09-27
First Publication Date 2024-03-28
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Kolych, Igor
  • Uln, Kiran

Abstract

Implementations disclosed describe devices for improving wireless localization and ranging operations. In an example embodiment, a circuit includes a receive chain configured to receive a first signal of a first frequency in a first frequency band. The circuit includes a transmit chain configured to transmit a second signal of a second frequency in a second frequency band. The circuit includes an active reflection circuit coupled between the receive and transmit chains. The active reflection circuit includes a frequency conversion scheme. The frequency conversion scheme is configured to receive an input signal from the RX chain at the first frequency, convert the input signal to an output signal at the second frequency, and provide the output signal to the TX chain.

IPC Classes  ?

18.

DETECTING PUSH BUTTON PRESS OF A PASSIVE ROTARY KNOB ON A TOUCH SCREEN

      
Application Number 17954182
Status Pending
Filing Date 2022-09-27
First Publication Date 2024-03-28
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Kuzo, Taras
  • Zhao, Shoushuai
  • Kremin, Viktor

Abstract

A touch screen device is disclosed. The touch screen device includes a touch screen panel having a capacitive sense array, and a passive dial including first, second and third conductive parts. The first conductive part and the third conductive part are in proximity to a surface of the touch screen panel, and the second conductive part is conductively coupled to the third conductive part when the passive dial is pressed and is not conductively coupled to the third conductive part when the passive dial is not pressed. A position of the first conductive part above the capacitive sense array corresponds to a touch index in the capacitive sense array and a position the third conductive part above the capacitive sense array corresponds to a button press index in the capacitive sense array. The first, second and third conductive parts are movable in conjunction with a rotation of the passive dial.

IPC Classes  ?

  • H01H 13/20 - Driving mechanisms
  • G06F 3/0362 - Pointing devices displaced or positioned by the user; Accessories therefor with detection of 1D translations or rotations of an operating part of the device, e.g. scroll wheels, sliders, knobs, rollers or belts
  • G06F 3/039 - Accessories therefor, e.g. mouse pads
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
  • H01H 13/14 - Operating parts, e.g. push-button
  • H01H 19/14 - Operating parts, e.g. turn knob

19.

METHODS, DEVICES AND SYSTEMS FOR IMPROVING TRANSMISSION PROTECTION RATES FOR RADIO CIRCUITS THAT COEXIST WITH WLAN CIRCUITS

      
Application Number 17955089
Status Pending
Filing Date 2022-09-28
First Publication Date 2024-03-28
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Sood, Ayush
  • Munukutla, Sandeep Sarma
  • Kencharla, Raghavendra

Abstract

A method can include, by operation of WLAN circuits, determining an estimated duration for communications of a coexisting wireless circuit (coex communications). In response to at least the medium being free, a CTS-to-self frame can be transmitted having a first duration equivalent to the estimated duration for the coex communications. At an actual start for the coex communications, if the first duration is not sufficient to cover the actual duration, a second CTS-to-self frame can be transmitted with a second duration that extends beyond the first duration sufficient to cover the actual duration. Corresponding devices and systems are also disclosed.

IPC Classes  ?

  • H04W 72/12 - Wireless traffic scheduling
  • H04W 74/08 - Non-scheduled access, e.g. random access, ALOHA or CSMA [Carrier Sense Multiple Access]

20.

SYSTEMS, METHODS, AND DEVICES FOR WIRELESS COMMUNICATION DEVICE-BASED DETECTION OF RADIO FREQUENCY IDENTIFICATION DEVICES

      
Application Number 17954101
Status Pending
Filing Date 2022-09-27
First Publication Date 2024-03-28
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Kolych, Igor
  • Uln, Kiran
  • Karpin, Oleksandr

Abstract

Systems, methods, and devices detect radio frequency identification devices. Methods include transmitting a signal from a transmitter of a wireless device compatible with a wireless communications protocol, receiving, using a receiver of the wireless device, an encoded signal from a radio frequency identification (RFID) device, and determining a plurality of data values based, at least in part, on the received encoded signal. Methods further include generating an estimated distance value based, at least in part, on the received encoded signal, the estimated distance value representing an estimate of a distance between the wireless device and the RFID device.

IPC Classes  ?

  • G06K 7/10 - Methods or arrangements for sensing record carriers by corpuscular radiation
  • G06K 19/077 - Constructional details, e.g. mounting of circuits in the carrier

21.

CLOSED LOOP OSCILLATOR

      
Application Number 17954126
Status Pending
Filing Date 2022-09-27
First Publication Date 2024-03-28
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Raimar, Nandakishore
  • Singh, Brajveer
  • Gradinariu, Iulian

Abstract

One or more devices, systems, and/or methods are provided. In an example of the techniques presented herein, an oscillator comprises a voltage controlled oscillator configured to generate an output clock based on a drive signal, a frequency to voltage converter having a time constant and configured to generate a feedback voltage having a decay cycle based on the time constant and a frequency based on a frequency of the output clock, and an integrator configured to generate the drive signal based on an integration of the feedback voltage and a reference voltage.

IPC Classes  ?

  • H03K 3/0231 - Astable circuits
  • H03B 5/04 - Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature
  • H03B 5/24 - Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising resistance and either capacitance or inductance, e.g. phase-shift oscillator active element in amplifier being semiconductor device
  • H03K 3/03 - Astable circuits
  • H03L 7/099 - Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop

22.

SYSTEMS, METHODS, AND DEVICES FOR CHANNEL SCANNING IN WIRELESS DEVICES

      
Application Number 17955335
Status Pending
Filing Date 2022-09-28
First Publication Date 2024-03-28
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Shaw, Amit
  • Sood, Ayush

Abstract

Systems, methods, and devices implement channel scanning for establishing connections between wireless devices. Methods include selecting a first plurality of channels of a wireless device, the first plurality of channels being sub-bands of a wireless device, scanning the first plurality of channels for a transmission from an access point, the first plurality of channels being scanned in parallel, and selecting a second plurality of channels of the wireless device, the second plurality of channels being sub-bands of the wireless device. Methods further include scanning the second plurality of channels for the transmission from the access point, the second plurality of channels being scanned in parallel.

IPC Classes  ?

  • H04W 48/16 - Discovering; Processing access restriction or access information
  • H04L 5/00 - Arrangements affording multiple use of the transmission path
  • H04W 48/14 - Access restriction or access information delivery, e.g. discovery data delivery using user query

23.

LOW ELECTROMAGNETIC INTERFERENCE (EMI) SOLUTION FOR TOUCH PRODUCTS

      
Application Number 18490309
Status Pending
Filing Date 2023-10-19
First Publication Date 2024-03-21
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Sadeghipour, Khosrov D.
  • Lawton, Brendan

Abstract

Apparatuses and methods of differential driving of adjacent electrodes for low electromagnetic interference (EMI) for scanning a touch panel are described. One apparatus generates an in-phase drive signal and an opposite-phase drive signal and applies, at a substantially same time, the in-phase drive signal to a first transmitter electrode and the opposite-phase drive signal to a second transmitter electrode adjacent to the first transmitter electrode. The apparatus receives a first sense signal from a first receiver electrode and a second sense signal from a second receiver electrode adjacent to the first receiver electrode. The apparatus combines the first sense signal and the second sense signal to obtain a third sense signal. The third sense signal represents a first self capacitance associated with the first receiver electrode. The apparatus detects a presence of an object on a touch panel using at least the first self capacitance.

IPC Classes  ?

  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

24.

UNINTENTIONAL TOUCH DETECTION USING COMBINED CAPACITIVE SENSOR NODE

      
Application Number 18329331
Status Pending
Filing Date 2023-06-05
First Publication Date 2024-03-14
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Kaur, Priyadeep
  • Banerjee, Amitava

Abstract

An apparatus comprises a sensor array of capacitive sensors. A capacitive sensor of the sensor array is connected to a transmitting pin and a receiving pin, and the sensing pin and the receiving pin are connected to a sensing device. The apparatus includes the sensing device configured to perform a liquid sensing operation during runtime operation of the apparatus by dynamically ganging together a set of capacitive sensors of the sensor array as a combined capacitive sensor node, wherein the combined capacitive sensor node is connected to the sensing device by transmitting pins and receiving pins of the set of capacitive sensors, sensing the combined capacitive sensor node to create a sensing result, and evaluating the sensing result to determine whether liquid is present on the sensor array.

IPC Classes  ?

  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G01D 5/24 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

25.

SECURITY SIGNATURE FOR BLUETOOTH LOW ENERGY FRAME SYNCH DETECTION

      
Application Number 17896928
Status Pending
Filing Date 2022-08-26
First Publication Date 2024-02-29
Owner Cypress Semiconductor Corporation (USA)
Inventor Rey, Claudio

Abstract

A wireless device includes a transmitter adapted with Bluetooth® low energy (BLE) capability and logic at least one of coupled to or integrated within the transmitter. The logic randomly generates a frequency offset based on bits within a frame synch packet to be transmitted during a keyless access attempt of an enclosure having a receiver. The logic causes the bits of the frame synch packet to be encrypted with an encryption key. The logic causes a frequency of the frame synch packet to modified by the frequency offset before the transmitter transmits the frame synch packet to the receiver.

IPC Classes  ?

  • H04W 12/03 - Protecting confidentiality, e.g. by encryption
  • H04L 9/32 - Arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system
  • H04W 4/80 - Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication

26.

MEDIA ACCESS CONTROL (MAC) ADDRESS PRIVACY HANDLING

      
Application Number 18472433
Status Pending
Filing Date 2023-09-22
First Publication Date 2024-02-29
Owner Cypress Semiconductor Corporation (USA)
Inventor Luo, Hui

Abstract

Implementations disclosed describe techniques to allow wireless devices to initially connect with randomized MAC addresses and send an encrypted permanent MAC for differentiated services. In one method, a first wireless device connects to an access point (AP) using a randomized MAC address. The first wireless device receives a request for a permanent MAC address from the AP. The first wireless device determines whether to send the permanent MAC address. Responsive to determining to send the permanent MAC address, the first wireless device encrypts the permanent MAC address to obtain an encrypted MAC address and sends a response to the request, including the encrypted MAC address, to the AP.

IPC Classes  ?

  • H04W 12/02 - Protecting privacy or anonymity, e.g. protecting personally identifiable information [PII]
  • H04L 9/40 - Network security protocols
  • H04L 47/24 - Traffic characterised by specific attributes, e.g. priority or QoS
  • H04L 61/50 - Address allocation
  • H04W 12/03 - Protecting confidentiality, e.g. by encryption
  • H04W 12/0431 - Key distribution or pre-distribution; Key agreement
  • H04W 12/106 - Packet or message integrity
  • H04W 76/10 - Connection setup

27.

WAKE-UP RECEIVER

      
Application Number 18108928
Status Pending
Filing Date 2023-02-13
First Publication Date 2024-02-29
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Shetty, Darshan Bhaskar
  • Steffan, Christoph
  • Holweg, Gerald

Abstract

One or more devices, systems, and/or methods are provided. In an example of the techniques presented herein, a wake-up receiver includes a power management unit configured to receive a supply voltage generated from an input signal and generate a current reference. An envelope detector is configured to generate a signal corresponding to transitions in the input signal. A signal processing unit is configured to generate an interrupt signal responsive to detecting a wake-up pattern in the signal from the envelope detector. The envelope detector comprises a first diode threshold compensated by the current reference.

IPC Classes  ?

  • H02J 50/27 - Circuit arrangements or systems for wireless supply or distribution of electric power using microwaves or radio frequency waves characterised by the type of receiving antennas, e.g. rectennas
  • G16Y 40/35 - Management of things, i.e. controlling in accordance with a policy or in order to achieve specified objectives
  • H01Q 7/00 - Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop
  • H02J 50/00 - Circuit arrangements or systems for wireless supply or distribution of electric power
  • H03K 17/56 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices

28.

SYSTEMS, METHODS, AND DEVICES FOR WAKEUP WORD DETECTION WITH CONTINUOUS LEARNING

      
Application Number 17820820
Status Pending
Filing Date 2022-08-18
First Publication Date 2024-02-22
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Pandey, Ashutosh
  • Watson, Daniel
  • Smyth, Aidan

Abstract

Systems, methods, and devices detect audio signals. Methods may include receiving an audio input at an audio front end circuit, and identifying, using a first circuit, a wake word based, at least in part, on the received audio signal. Methods may also include determining if the identifying performed by the first circuit should be modified based, at least in part, on a designated threshold of accuracy associated with the first circuit and a result of the identifying, the designated threshold of accuracy being determined based, at least in part, on a language processing model of a second circuit. Moreover, the modifying may include adjusting wake word detection operations of the first circuit based, at least in part, on a result of the determining.

IPC Classes  ?

  • G10L 15/22 - Procedures used during a speech recognition process, e.g. man-machine dialog
  • G06F 1/3206 - Monitoring of events, devices or parameters that trigger a change in power modality

29.

SYSTEMS, METHODS, AND DEVICES FOR STAGED WAKEUP WORD DETECTION

      
Application Number 17820822
Status Pending
Filing Date 2022-08-18
First Publication Date 2024-02-22
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Pandey, Ashutosh
  • Lossio, Rodolfo Gondim
  • Simileysky, Victor
  • Zopf, Robert

Abstract

Systems, methods, and devices detect audio signals. Methods may include receiving an audio input at an audio front end circuit, starting, using a low power circuit, one or more buffers in response to receiving the audio input, and identifying, using the low power circuit, speech included in the audio input. Methods may also include identifying, using the low power circuit and a high performance circuit, a wake word based, at least in part, on the identified speech, the high performance circuit being configured to verify the wake word identified by the low power circuit.

IPC Classes  ?

  • G10L 15/22 - Procedures used during a speech recognition process, e.g. man-machine dialog
  • G06F 1/3206 - Monitoring of events, devices or parameters that trigger a change in power modality

30.

Boost Inductor Recirculation Protection based on Switch Node Detection Method

      
Application Number 18322419
Status Pending
Filing Date 2023-05-23
First Publication Date 2024-02-22
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Zou, Qiong
  • Tan, Soon Hwei

Abstract

Systems and methods are provided to supply a voltage (Vcc) to a primary IC in a switch-mode-power-supply following startup. Briefly, an input voltage (VIN) coupled through a boost-inductor to a switch-pin of the IC is sensed by isolating a DC component (VDC_BSW) of the voltage and checking if VIN is greater than a minimum VIN (VIN_MIN) by comparing VDC_BSW to a starting reference voltage (VREF_START) in the IC. If VDC_BSW is greater than VREF_START, a boost-switch in the IC through which the switch-pin is coupled to ground is cycled on and off to alternately store and discharge energy in the boost-inductor, boosting Vcc. Thereafter, VIN is checked against a maximum input voltage by comparing VDC_BSW to a reference voltage (VREF), greater than VREF_START, and if VDC_BSW is greater than VREF, boost is turned off by turning off and ceasing to cycle the boost-switch, protecting the boost-inductor from current runaway.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/36 - Means for starting or stopping converters
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection

31.

SYSTEMS, METHODS, AND DEVICES FOR LOW-POWER AUDIO SIGNAL DETECTION

      
Application Number 18449237
Status Pending
Filing Date 2023-08-14
First Publication Date 2024-02-22
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Smyth, Aidan
  • Pandey, Ashutosh
  • Lyons, Niall
  • Wada, Ted
  • Zopf, Robert

Abstract

Systems, methods, and devices detect wake signals included in audio signals. Methods include receiving a dataset including raw audio data, the raw audio data comprising a plurality of audio samples and associated metadata, and generating, using one or more processing elements, an augmented dataset based on the raw audio data, the augmented dataset comprising a plurality of annotations identifying types of raw audio data. Methods further include generating, using the one or more processing elements, a feature dataset by extracting features from the augmented dataset based, at least in part, on the plurality of annotations, and generating, using the one or more processing elements, a wake signal detection model based, at least in part, on the feature dataset, the wake signal detection model being a machine learning model trained based on the feature dataset.

IPC Classes  ?

  • G10L 15/06 - Creation of reference templates; Training of speech recognition systems, e.g. adaptation to the characteristics of the speaker's voice
  • G10L 15/02 - Feature extraction for speech recognition; Selection of recognition unit
  • G10L 15/187 - Phonemic context, e.g. pronunciation rules, phonotactical constraints or phoneme n-grams
  • G10L 15/01 - Assessment or evaluation of speech recognition systems

32.

SYSTEMS, METHODS, AND DEVICES FOR LOW-POWER AUDIO SIGNAL DETECTION

      
Application Number US2023030277
Publication Number 2024/039677
Status In Force
Filing Date 2023-08-15
Publication Date 2024-02-22
Owner CYPRESS SEMICONDUCTOR CORPORATION (USA)
Inventor
  • Smyth, Aidan
  • Pandey, Ashutosh
  • Lyons, Niall
  • Wada, Ted
  • Zopf, Robert

Abstract

Systems, methods, and devices detect wake signals included in audio signals. Methods include receiving a dataset including raw audio data, the raw audio data comprising a plurality of audio samples and associated metadata, and generating, using one or more processing elements, an augmented dataset based on the raw audio data, the augmented dataset comprising a plurality of annotations identifying types of raw audio data. Methods further include generating, using the one or more processing elements, a feature dataset by extracting features from the augmented dataset based, at least in part, on the plurality of annotations, and generating, using the one or more processing elements, a wake signal detection model based, at least in part, on the feature dataset, the wake signal detection model being a machine learning model trained based on the feature dataset.

IPC Classes  ?

  • G10L 15/22 - Procedures used during a speech recognition process, e.g. man-machine dialog
  • G10L 19/00 - Speech or audio signal analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
  • G10L 15/02 - Feature extraction for speech recognition; Selection of recognition unit
  • G10L 15/06 - Creation of reference templates; Training of speech recognition systems, e.g. adaptation to the characteristics of the speaker's voice
  • G10L 25/18 - Speech or voice analysis techniques not restricted to a single one of groups characterised by the type of extracted parameters the extracted parameters being spectral information of each sub-band
  • G06F 3/16 - Sound input; Sound output
  • H04N 21/422 - Input-only peripherals, e.g. global positioning system [GPS]
  • G10L 15/08 - Speech classification or search

33.

Received signal strength indicator (RSSI) signature for tire localization

      
Application Number 17890170
Grant Number 11958321
Status In Force
Filing Date 2022-08-17
First Publication Date 2024-02-22
Grant Date 2024-04-16
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Kolych, Igor
  • Simileysky, Victor
  • Uln, Kiran
  • Kandler, Michael

Abstract

Techniques are described for using one or more wireless host devices to perform tire localization of TPMS sensor data by determining received signal strength indicator (RSSI) signatures that are unique to the wireless communication channel between a host device and each TPMS sensor. RSSI signatures represents a periodic variation of the wireless communication channel between a host device on the car body and a TPMS sensor in a rotating tire. Characteristics of the communication channel is a function of the wheel angle and is periodic with wheel rotations. The RSSI signatures may be created by matching RSSI measurements of packets received by the host device from a TPMS sensor with wheel angles derived from wheel speed sensor (WSS) data of the anti-lock braking system (ABS). The RSSI signatures are a unique marker of each wheel that may be used to identify the locations of the TPMS sensors for tire localization.

IPC Classes  ?

  • B60C 23/04 - Signalling devices actuated by tyre pressure mounted on the wheel or tyre
  • B60C 23/00 - Devices for measuring, signalling, controlling, or distributing tyre pressure or temperature, specially adapted for mounting on vehicles; Arrangement of tyre inflating devices on vehicles, e.g. of pumps or of tanks; Tyre cooling arrangements
  • H04B 17/318 - Received signal strength
  • G01S 5/02 - Position-fixing by co-ordinating two or more direction or position-line determinations; Position-fixing by co-ordinating two or more distance determinations using radio waves

34.

NON-COMPLEMENTARY ACTIVE CLAMP FLYBACK (ACF) PRIMARY FIELD-EFFECT TRANSISTORS (FET) CONTROL

      
Application Number 18332600
Status Pending
Filing Date 2023-06-09
First Publication Date 2024-02-08
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Tan, Soon Hwei
  • Karri, Rajesh
  • Chen, Hung-Chun

Abstract

In an example embodiment, a method comprising identifying, by a primary-side controlled Universal Serial Bus Power Delivery (USB-PD) alternating current to direct current (AC-DC) converter, a first pulse, wherein the first pulse is received from a pulse transformer. The method further includes determining that a threshold duration of time is satisfied. In response to determining that the threshold duration of time is satisfied, the method includes identifying a second pulse, wherein the second pulse is received from the pulse transformer. The first pulse and the second pulse are used for control of a high-side field effect transistor (FET) and a low-side FET, where the high-side FET is coupled to an active clamp flyback (ACF) circuit and the low-side FET is coupled to a flyback transformer of the USB-PD AC-DC converter. In response to identifying the second pulse, the method further includes controlling operation of the high-side FET or the low-side FET.

IPC Classes  ?

  • H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H02M 1/44 - Circuits or arrangements for compensating for electromagnetic interference in converters or inverters

35.

DEAD-TIME CALIBRATION SCHEME FOR ACTIVE CLAMP FLYBACK (ACF) PRIMARY FIELD-EFFECT TRANSISTORS (FET)

      
Application Number 18341419
Status Pending
Filing Date 2023-06-26
First Publication Date 2024-02-08
Owner cypress Semiconductor Corporation (USA)
Inventor
  • Jose, Jojy
  • Tan, Soon Hwei
  • Rai, Hariom
  • Khamesra, Arun

Abstract

A method comprising controlling operation, by a secondary-side controlled Universal Serial Bus Power Delivery (USB-PD) alternating current to direct current (AC-DC) converter, a low-side field-effect transistor (FET). In response to controlling operation of the low-side FET, the method further includes triggering a zero-cross detection circuit. The method further includes measuring a first period of time between controlling operation of the low-side FET and triggering the zero-cross detection circuit. The method further includes measuring a second period of time between controlling operation of a high-side FET and triggering the zero-cross detection circuit. The method further includes adjusting a third period of time based on the first period of time and the second period of time, wherein the third period of time corresponds to a dead time between controlling operation of the high-side FET and the low-side FET.

IPC Classes  ?

  • H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H03K 17/691 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors with galvanic isolation between the control circuit and the output circuit using transformer coupling
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H03K 17/10 - Modifications for increasing the maximum permissible switched voltage
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters

36.

HIGH-VOLTAGE TOLERANT, HIGH-SPEED REVERSE CURRENT DETECTION AND PROTECTION FOR BUCK-BOOST CONVERTERS

      
Application Number 18489741
Status Pending
Filing Date 2023-10-18
First Publication Date 2024-02-08
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Mondal, Partha
  • Balia, Tudu
  • Rai, Hariom
  • Shah, Pulkit

Abstract

A controller includes a buck gate driver coupled to first high-side switch and first low-side switch of a buck-boost (BB) converter. A zero crossing detection (ZCD) comparator is coupled to first low-side switch. The ZCD comparator is to, while the BB converter operates in buck mode: detect zero current flow through inductor; and turn off first low-side switch in response to detecting the zero current. A boost gate driver is coupled to second high-side switch and second low-side switch of the BB converter. A reverse current detection (RCD) comparator coupled to second high-side switch. The RCD comparator is to, while the BB converter operates in boost mode: detect zero current flow through second high-side switch; and turn off second high-side switch in response to detecting the zero current.

IPC Classes  ?

  • G01R 19/175 - Indicating the instants of passage of current or voltage through a given value, e.g. passage through zero
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

37.

SHARING TRANSMISSION MEDIUMS IN WIFI-BLUETOOTH COMBINATION SYSTEMS

      
Application Number 18233813
Status Pending
Filing Date 2023-08-14
First Publication Date 2024-02-01
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Sarma, Munukutla Sandeep
  • Kencharla, Raghavendra

Abstract

The embodiments described herein are directed at techniques to sharing a transmission medium in a Bluetooth transceiver/WLAN transceiver combination device. A first device may receive a request from a second device to use the wireless transmission medium. The second device may also transmit timing data to the first device. The first device may determine a period of time to allow the second device to use the wireless transmission medium based on the timing data.

IPC Classes  ?

  • H04W 16/14 - Spectrum sharing arrangements
  • H04W 12/08 - Access security
  • H04W 4/80 - Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication

38.

DEVICES, SYSTEMS AND METHODS FOR SELECTING COMMUNICATION PROTOCOL TRANSMISSION FREQUENCIES

      
Application Number 18449446
Status Pending
Filing Date 2023-08-14
First Publication Date 2024-02-01
Owner Cypress Semiconductor Corporation (USA)
Inventor Kondareddy, Raghunatha

Abstract

A method can include, by operation of first communication circuits, determining a quality of a plurality of communication frequencies according to wireless communications of a first protocol type; recording a quality of the communication frequencies; selecting communication frequencies for use by second communication circuits based on the quality of the communication frequencies; and wirelessly transmitting and receiving data with the second communication circuits according to a second protocol different than the first protocol; wherein the first and second communication circuits are collocated on the same device. Related devices and systems are also disclosed.

IPC Classes  ?

  • H04W 36/00 - Handoff or reselecting arrangements
  • H04W 36/06 - Reselecting a communication resource in the serving access point
  • H04W 72/0453 - Resources in frequency domain, e.g. a carrier in FDMA
  • H04W 36/26 - Reselection being triggered by specific parameters by agreed or negotiated communication parameters
  • H04L 69/18 - Multiprotocol handlers, e.g. single devices capable of handling multiple protocols
  • H04W 36/16 - Performing reselection for specific purposes

39.

SIGNATURE GRAPH METHOD FOR ENABLING HUMAN AUTHENTICATION OF HIGH-ENTROPY DATA

      
Application Number 17878706
Status Pending
Filing Date 2022-08-01
First Publication Date 2024-02-01
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Luo, Hui
  • Van Antwerpen, Hans

Abstract

A signature graph method is proposed to authenticate shared high-entropy data using a graph that can be easily identified by human eyes (or by computer image recognition algorithms). An example method for authenticating a shared data element comprises receiving a data element to be shared; A signature graph method is proposed to authenticate shared high-entropy data using a graph that can be easily identified by human eyes (or by computer image recognition algorithms). An example method for authenticating a shared data element comprises receiving a data element to be shared; transforming the data element to be shared into signature graph data, using at least one collision-resistant one-way mapping function; and rendering a human-perceptible representation of the signature graph data, such as an audible and/or visual representation, for perception by a human user. In some embodiments, transforming the data element comprises applying a cryptographic hash function to the data element, to obtain a first hash output, and applying a cryptographic hash function to the first hash output, to obtain the signature graph data.

IPC Classes  ?

  • H04L 9/32 - Arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system
  • H04L 9/00 - Arrangements for secret or secure communications; Network security protocols

40.

Frame synch detection with rate adaptation

      
Application Number 17876194
Grant Number 11888963
Status In Force
Filing Date 2022-07-28
First Publication Date 2024-01-30
Grant Date 2024-01-30
Owner Cypress Semiconductor Corporation (USA)
Inventor Rey, Claudio

Abstract

A device includes a receiver to receive a packet over a channel at a first frequency and generate a sampled stream of data at a first sample rate corresponding to the first frequency. A data resampler circuit includes a re-timer engine to determine, using a fractional rate between the first sample rate and a crystal oscillator (XO)-divided sample rate, re-timer values including a difference between pulses of a pseudo clock corresponding to the XO-integer-divided sample rate and closest corresponding pulses of a clock corresponding to the first sample rate. The data resampler circuit includes a time shifting circuit to re-sample data values of the sampled stream of data associated with locations of the plurality of re-timer values. A correlation circuit uses the re-sampled data values, pseudo clock, and the re-timer values to match an expected data pattern to a corresponding data pattern detected in a frame delimiter of the packet.

IPC Classes  ?

  • H04L 7/033 - Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal- generating means, e.g. using a phase-locked loop
  • H04L 7/00 - Arrangements for synchronising receiver with transmitter
  • H04L 7/04 - Speed or phase control by synchronisation signals

41.

Unintentional touch detection

      
Application Number 18295084
Grant Number 11928290
Status In Force
Filing Date 2023-04-03
First Publication Date 2024-01-25
Grant Date 2024-03-12
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Gentry, Troy
  • Durlin, David

Abstract

A scanning operation is performed to measure a first capacitance of a first sensor arrangement located proximate a capacitive sensor that corresponds to a function of a device. In response to the first capacitance not exceeding a first threshold, the scanning operation measures a second capacitance of the capacitive sensor to create an output used to control the function of the device. In response to the first capacitance exceeding the first threshold, operation of the scanning operation is modified to skip measuring of the second capacitance or to refrain from transmitting the output to a host of the device for controlling the function.

IPC Classes  ?

  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

42.

SYSTEMS, METHODS, AND DEVICES FOR ENHANCED INTEGRATION OF WIRELESS ENVIRONMENTS

      
Application Number 18352892
Status Pending
Filing Date 2023-07-14
First Publication Date 2024-01-25
Owner Cypress Semiconductor Corporation (USA)
Inventor Medapalli, Kameswara

Abstract

Systems, methods, and devices enhance integration of components of a wireless environment. Methods include determining, using a processing device, a plurality of contextual parameters identifying a plurality of settings associated with an application executed on a central wireless device and a plurality of wireless devices included in an operational environment of the central wireless device. Methods also include determining, using the processing device, a plurality of wireless device parameters and wireless connection parameters for the plurality of wireless devices based on the contextual parameters. Methods further include generating, using the processing device, instructions for each of the plurality of wireless devices based, at least in part, on the plurality of contextual parameters and a native format and wireless protocol of each of the plurality of wireless devices.

IPC Classes  ?

  • H04W 24/02 - Arrangements for optimising operational condition

43.

SYSTEMS, METHODS, AND DEVICES FOR ENHANCED INTEGRATION OF WIRELESS ENVIRONMENTS

      
Application Number US2023027982
Publication Number 2024/019999
Status In Force
Filing Date 2023-07-18
Publication Date 2024-01-25
Owner CYPRESS SEMICONDUCTOR CORPORATION (USA)
Inventor Medapalli, Kameswara

Abstract

Systems, methods, and devices enhance integration of components of a wireless environment. Methods include determining, using a processing device, a plurality of contextual parameters identifying a plurality of settings associated with an application executed on a central wireless device and a plurality of wireless devices included in an operational environment of the central wireless device. Methods also include determining, using the processing device, a plurality of wireless device parameters and wireless connection parameters for the plurality of wireless devices based on the contextual parameters. Methods further include generating, using the processing device, instructions for each of the plurality of wireless devices based, at least in part, on the plurality of contextual parameters and a native format and wireless protocol of each of the plurality of wireless devices.

IPC Classes  ?

  • H04L 69/18 - Multiprotocol handlers, e.g. single devices capable of handling multiple protocols
  • H04L 69/08 - Protocols for interworking; Protocol conversion
  • H04W 36/00 - Handoff or reselecting arrangements
  • H04B 1/38 - Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving

44.

SYSTEMS, METHODS, AND DEVICES FOR COEXISTENCE ENHANCEMENT USING ACKNOWLEDGMENT SIGNALS IN WIRELESS DEVICES

      
Application Number 17810222
Status Pending
Filing Date 2022-06-30
First Publication Date 2024-01-04
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Sarma, Munukutla Sandeep
  • Kencharla, Raghavendra

Abstract

Systems, methods, and devices implement enhanced coexistence of radios within wireless devices. Methods include receiving a data packet at a wireless device, the data packet having a packet structure, the wireless device comprising a first wireless radio collocated with a second wireless radio, and identifying one or more features of the data packet based, at least in part, on the packet structure of the data packet. Methods further include updating a medium access grant signal associated with the second wireless radio based, at least in part, on the one or more features of the data packet, the medium access grant signal determining which of the first or second wireless radios has access to a communications medium.

IPC Classes  ?

  • H04W 72/12 - Wireless traffic scheduling
  • H04W 74/08 - Non-scheduled access, e.g. random access, ALOHA or CSMA [Carrier Sense Multiple Access]
  • H04W 72/14 - Wireless traffic scheduling using a grant channel

45.

INDEPENDENTLY CLOCKING DIGITAL LOOP FILTER BY TIME-TO-DIGITAL CONVERTER IN DIGITAL PHASE-LOCKED LOOP

      
Application Number 18333452
Status Pending
Filing Date 2023-06-12
First Publication Date 2024-01-04
Owner Cypress Semiconductor Corporation (USA)
Inventor Harush, Avri

Abstract

A time-to-digital converter (TDC) circuit includes phase error calculation circuitry to: determine phase error values based on a time difference between a input reference clock and a feedback clock of a digital phase-locked loop (DPLL) circuit, the input reference clock and the feedback clock being unsynchronized; and provide the phase error values to a digital loop filter (DLF) of the DPLL circuit. The TDC circuit further includes clock generation circuitry to: generate a filter clock that asserts a clock pulse in response to detecting each last-received pulse of the input reference clock and the feedback clock; and provide the filter clock to the DLF concurrently with providing the phase error values to the DLF that are synchronized to the filter clock.

IPC Classes  ?

  • H03L 7/093 - Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
  • G04F 10/00 - Apparatus for measuring unknown time intervals by electric means
  • H03L 7/099 - Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop

46.

Method of Forming High-Voltage Transistor with Thin Gate Poly

      
Application Number 18214072
Status Pending
Filing Date 2023-06-26
First Publication Date 2024-01-04
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Chen, Chun
  • Pak, James
  • Kim, Unsoon
  • Kang, Inkuk
  • Kang, Sung-Taeg
  • Chang, Kuo Tung

Abstract

A semiconductor device and method of fabricating the same are disclosed. The method includes depositing a polysilicon gate layer over a gate dielectric formed over a surface of a substrate in a peripheral region, forming a dielectric layer over the polysilicon gate layer and depositing a height-enhancing (HE) film over the dielectric layer. The HE film, the dielectric layer, the polysilicon gate layer and the gate dielectric are then patterned for a high-voltage Field Effect Transistor (HVFET) gate to be formed in the peripheral region. A high energy implant is performed to form at least one lightly doped region in a source or drain region in the substrate adjacent to the HVFET gate. The HE film is then removed, and a low voltage (LV) logic FET formed on the substrate in the peripheral region. In one embodiment, the LV logic FET is a high-k metal-gate logic FET.

IPC Classes  ?

  • H10B 43/40 - EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
  • H10B 41/30 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
  • H10B 41/49 - Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor
  • H10B 43/30 - EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
  • H10B 43/35 - EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
  • H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
  • H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/45 - Ohmic electrodes
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

47.

Method of power management for a hub with a plurality of USB-C ports

      
Application Number 17841256
Grant Number 11907034
Status In Force
Filing Date 2022-06-15
First Publication Date 2023-12-21
Grant Date 2024-02-20
Owner CYPRESS SEMICONDUCTOR CORPORATION (USA)
Inventor
  • Sivaramakrishnan, Karthik
  • Abraham, Simon
  • Desai, Manaskant Dipakkumar

Abstract

A method of power management for a hub having a plurality of Universal Serial Bus (USB)-C ports includes: allocating a guaranteed power budget to each USB-C port of the hub, wherein one of the USB-C ports has a higher power priority and the other USB-C ports have a lower power priority; reducing the guaranteed power budget allocated to a USB-C port with the lower power priority if measured power for that USB-C port is below its currently guaranteed power budget by a predetermined amount; and offering additional power budget to the USB-C port with the higher power priority if the guaranteed power budget allocated to a USB-C port with the lower power priority was previously reduced. Corresponding USB-Power Delivery (PD) integrated circuit (IC) controllers and hubs are also described.

IPC Classes  ?

  • G06F 1/26 - Power supply means, e.g. regulation thereof
  • G06F 1/329 - Power saving characterised by the action undertaken by task scheduling
  • G06F 1/3234 - Power saving characterised by the action undertaken

48.

EFFICIENCY IMPROVEMENT FOR POWER FACTOR CORRECTION BASED AC-DC POWER ADAPTERS

      
Application Number 17836873
Status Pending
Filing Date 2022-06-09
First Publication Date 2023-12-14
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Rai, Hariom
  • Khamesra, Arun
  • Mathad, Aniket Shashikant

Abstract

Controlling power factor correction (PFC) in a secondary-controlled alternating current (AC) to direct current (DC) (AC-DC) power adapter is described. In one embodiment, an apparatus includes a transformer, a primary-side controller coupled to the transformer, a PFC component coupled to the primary-side controller, and a secondary-side controller coupled to the transformer. The secondary-side controller is configured at least to obtain data informative of an amount of power, and control, based on the amount of power, a PFC operating mode of the PFC component.

IPC Classes  ?

  • H02M 1/42 - Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
  • H02M 7/217 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

49.

Synchronous Rectifier Scheme for Continuous Conduction Mode in Primary Side Controlled Fly-Back Converter

      
Application Number 17829130
Status Pending
Filing Date 2022-05-31
First Publication Date 2023-11-30
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Khamesra, Arun
  • Biswal, Pragyan S.
  • Rai, Hariom
  • Murugesan, Saravanan

Abstract

A primary-side-controlled fly-back converter is provided to eliminate cross-conduction between a power-switch (PS) on a primary side and a synchronous-rectifier (SR) on a secondary side when operating in continuous conduction mode (CCM). Generally, the converter includes a transformer having a primary coupled to a rectified AC input through the PS, and a secondary coupled to a DC output through the SR, the SR having a drain coupled to the secondary winding. A fly-back-controller includes a primary-controller operable to control a duty cycle of the PS, and a secondary-controller operable to turn OFF the SR when the PS turns ON in CCM. The secondary-controller includes a CCM zero-crossing-detector comparator having a first input coupled to the drain of the SR through a capacitor, and is operable to detect a sharp change in a drain voltage when the PS turns ON during CCM, and to output a signal to turn OFF the SR.

IPC Classes  ?

  • H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters

50.

ENHANCEMENT OF RANGE AND THROUGHPUT FOR MULTI-ANTENNA WIRELESS COMMUNICATIONS DEVICES

      
Application Number 18324387
Status Pending
Filing Date 2023-05-26
First Publication Date 2023-11-30
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Sethuraman, Prasanna
  • Asok, Visakh
  • Strauch, Paul
  • Gundu Rao, Rajendra Kumar
  • Sood, Ayush

Abstract

Systems, methods, and devices select antennas to enhance the range and throughput of wireless communications devices. Methods include identifying a plurality of combinations of antennas based on a plurality of available antennas for a wireless communications device, and generating, using a processing device included in a multiple-input-multiple-output (MIMO) device, a plurality of quality metrics including at least one quality metric for each of the identified combinations of antennas, where each of the at least one quality metrics represents a signal quality of a signal associated with each of the plurality of antennas, and wherein the signal is a spatial stream. Methods further include selecting at least two antennas from the plurality of combinations of antennas based, at least in part, on the plurality of quality metrics, where the at least two antennas are selected for use by the wireless communications device during a transmitting or receiving operation.

IPC Classes  ?

  • H04B 7/0413 - MIMO systems
  • H04B 7/06 - Diversity systems; Multi-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station

51.

DRIVE SCHEME FOR SECONDARY-CONTROLLED ACTIVE CLAMP FLYBACK (ACF) MODE

      
Application Number 17748616
Status Pending
Filing Date 2022-05-19
First Publication Date 2023-11-23
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Karri, Rejesh
  • Khamesra, Arun
  • Rai, Hariom

Abstract

Controlling an active clamp field effect transistor (FET) and a primary-side FET in a secondary-controlled active clamp converter is described. In one embodiment, an apparatus includes a primary-side FET coupled to a transformer and an active clamp FET disposed on a primary side of the transformer. A secondary-side controller is configured to control the active clamp FET and the primary-side FET across a same galvanic isolation barrier.

IPC Classes  ?

  • H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters

52.

SECURITY ENHANCEMENT FOR MULTI-USER RANGING SYSTEMS USING SIGNATURE ORTHOGONAL CHIRPS

      
Application Number 17748903
Status Pending
Filing Date 2022-05-19
First Publication Date 2023-11-23
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Hosseini, Nozhan
  • Zand, Pouria
  • Uln, Kiran
  • Rey, Claudio
  • Shoarinejad, Kambiz

Abstract

Techniques described here introduce signature frequency modulation to unmodulated pulse signals as frequency chirps to enhance the security of multi-carrier phase-based ranging signals. The characteristics of the chirps may be mutually known by an initiator and a desired reflector of the ranging applications. The characteristics of the chirps may vary between the multi-carrier signals to thwart any attempt by an eavesdropper to predict the chirps. In one aspect, the characteristics of the chirps may be calculated for each timeslot of a ranging cycle by two authorized devices using a ciphering algorithm such as the Advanced Encryption Standard (AES) based on a shared security key. Each call of the AES may generate one or more pseudo-random numbers based on the shared security key and a time-varying initialization vector that increments every timeslot. Fields of the pseudo-random number may be extracted to determine the characteristics of the chirps associated with the timeslot.

IPC Classes  ?

  • G01S 13/34 - Systems for measuring distance only using transmission of continuous waves, whether amplitude-, frequency-, or phase-modulated, or unmodulated using transmission of continuous, frequency-modulated waves while heterodyning the received signal, or a signal derived therefrom, with a locally-generated signal related to the contemporaneously transmitted signal
  • G01S 7/40 - Means for monitoring or calibrating
  • H04B 1/713 - Spread spectrum techniques using frequency hopping

53.

SYSTEM AND METHOD FOR MEASURING BATTERY IMPEDANCE

      
Application Number 17740398
Status Pending
Filing Date 2022-05-10
First Publication Date 2023-11-16
Owner Cypress Semiconductor Corporation (USA)
Inventor Ogirko, Roman

Abstract

One or more circuits and/or methods are provided. In an example, a circuit includes a first sampling capacitor connected to a first battery terminal for connecting to a battery, an excitation circuit connected to the first battery terminal and configured to generate a first excitation signal, and a measurement circuit connected to the first sampling capacitor and configured to measure charge transferred to the first sampling capacitor by the first excitation signal to generate a charge transfer measurement and to determine a first impedance measurement across the first battery terminal and a second battery terminal for connecting to the battery based on the charge transfer measurement.

IPC Classes  ?

  • G01R 31/389 - Measuring internal impedance, internal conductance or related variables
  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

54.

MULTIMODE WIRELESS CHARGING TRANSMITTER CONTROL

      
Application Number 18103547
Status Pending
Filing Date 2023-01-31
First Publication Date 2023-11-09
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Vijayakumar, Prasanna Venkateswaran
  • Ramanujam, Jegannathan Mattapa
  • Bhogineni, Satishbabu
  • Wu, Jhong Yang

Abstract

Systems, methods, and devices are described to improve wireless charging devices. Systems include a power inverter configured to generate a power transfer signal based, at least in part, on a plurality of transmission parameters, a transmission element configured to wirelessly transmit the power transfer signal, and a controller configured to determine a power transfer mode used by the power inverter based, at least in part, on a plurality of operational parameters and a plurality of configuration parameters.

IPC Classes  ?

  • H02J 50/12 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling of the resonant type
  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

55.

VOLTAGE BUS DISCHARGE FOR UNIVERSAL SERIAL BUS POWER DELIVERY

      
Application Number 17737842
Status Pending
Filing Date 2022-05-05
First Publication Date 2023-11-09
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Khamesra, Arun
  • Rai, Hariom

Abstract

A secondary side controller for a flyback converter can include a synchronous rectifier (SR) gate driver pin coupled to a gate of an SR transistor on a secondary side of the flyback converter. An error amplifier is coupled to an output of a voltage bus of the flyback converter, the error amplifier to generate an error signal indicative of a voltage of the output of the voltage bus. Control logic is coupled to the error amplifier and to the SR transistor, the control logic to: detect when the voltage is at least a threshold percentage higher than a sink voltage required by a sink device coupled to the output of the voltage bus; detect assertion of a skip mode signal; and cause the SR transistor to be driven during a skip mode such as to partially discharge an output capacitor coupled to the output of the voltage bus.

IPC Classes  ?

  • H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 3/157 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control

56.

Frame synchronization detection with frequency estimation

      
Application Number 17895992
Grant Number 11811578
Status In Force
Filing Date 2022-08-25
First Publication Date 2023-11-07
Grant Date 2023-11-07
Owner CYPRESS SEMICONDUCTOR CORPORATION (USA)
Inventor Rey, Claudio

Abstract

A wireless device includes a receiver to receive a packet via one or more antennas. A frame synchronization detection circuit coupled to the receiver identifies a frame synchronization pattern within a portion of the packet. A correlation circuit coupled to the frame synchronization detection circuit computes, in response to the identifying of the frame synchronization pattern within the portion of the packet, a frequency offset using a correlation method. A frequency estimation correction circuit coupled to the correlation circuit determines, based on the frame synchronization pattern, a bias value, wherein the bias value corresponds to a data pattern within the frame synchronization pattern indicative of a frequency bias, and applies a correction to the frequency offset, wherein applying the correction to the frequency offset comprises modifying the frequency offset using the bias value.

IPC Classes  ?

57.

TRACKING OF OBJECTS USING RECONSTRUCTION OF DATA CARRIED BY WIRELESS SENSING SIGNALS FROM LIMITED SENSING FREQUENCIES

      
Application Number 17733911
Status Pending
Filing Date 2022-04-29
First Publication Date 2023-11-02
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Kolych, Igor
  • Kravets, Igor
  • Kapshii, Oleg
  • Uln, Kiran

Abstract

Implementations disclosed describe techniques and systems for efficient determination and tracking of trajectories of objects in an environment of a wireless device. The disclosed techniques include, among other things, obtaining multiple sets of sensing values that characterize one or more radio signals received, during a respective sensing event, from an object in an environment of the wireless device. The sensing signals may be carried by waves with randomly selected frequencies representing a portion of all frequencies that are used as working sensing frequencies. Multiple techniques of efficient frequency interpolation and temporal interpolation are disclosed that reconstruct the sensing values to the full range of working frequencies. The reconstructed sensing values may then be used to track objects in the environment.

IPC Classes  ?

  • H04W 4/02 - Services making use of location information
  • H04W 4/38 - Services specially adapted for particular environments, situations or purposes for collecting sensor information
  • H04L 25/02 - Baseband systems - Details

58.

DETERMINATION AND TRACKING OF TRAJECTORIES OF MOVING OBJECTS IN WIRELESS APPLICATIONS

      
Application Number 17733919
Status Pending
Filing Date 2022-04-29
First Publication Date 2023-11-02
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Kolych, Igor
  • Uln, Kiran

Abstract

Implementations disclosed describe techniques and systems for efficient determination and tracking of trajectories of objects in an environment of a wireless device. The disclosed techniques include, among other things, determining multiple sets of sensing values that characterize one or more radio signals received, during a respective sensing event, from an object in an environment of the wireless device. Multiple likelihood vectors may be obtained using the sensing values and characterizing a likelihood that the object is at a certain distance from the wireless device. A likelihood tensor may be generated, based on the likelihood vectors, that characterizes a likelihood that the object is moving along one of a set of trajectories. The likelihood tensor may be used to determine an estimate of the trajectory of the object.

IPC Classes  ?

  • H04W 4/02 - Services making use of location information
  • H04W 4/029 - Location-based management or tracking services
  • G01S 5/02 - Position-fixing by co-ordinating two or more direction or position-line determinations; Position-fixing by co-ordinating two or more distance determinations using radio waves

59.

OPTIMIZATION OF ENVIRONMENTAL SENSING IN WIRELESS NETWORKS

      
Application Number 17733893
Status Pending
Filing Date 2022-04-29
First Publication Date 2023-11-02
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Kolych, Igor
  • Uln, Kiran

Abstract

Implementations disclosed describe techniques and systems for efficient estimation of spatial characteristics of an outside environment of a wireless device. The disclosed techniques include generating multiple covariance matrices (CMs) representative of obtained sensing values. Different CMs may be associated with different frequency increments used in sensing signals to probe the outside environment. The disclosed techniques may further include determining eigenvectors for the CMs, and identifying, based on the determined eigenvectors, one or more spatial characteristics of the object in the outside environment.

IPC Classes  ?

  • G01S 13/00 - Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
  • G01S 7/00 - RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES - Details of systems according to groups , ,

60.

Detecting the angle of passive rotary knob partially located on touch screen

      
Application Number 17886174
Grant Number 11803260
Status In Force
Filing Date 2022-08-11
First Publication Date 2023-10-31
Grant Date 2023-10-31
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Kuzo, Taras
  • Weber, Jens
  • Kremin, Viktor

Abstract

An apparatus and method for detecting the angle of passive rotary knob partially located on a touch screen are described. In embodiments the apparatus includes a touch screen having an array of sensors and a dial that includes a base and a knob attached to the base and rotatable relative to the base. The knob includes a plurality of conductive elements, each positioned a distance from a center point of the knob. A controller is also included, coupled to the touch screen, and configured to receive signals generated by one or more sensors of the array in response to the sensors detecting one or more of the conductive elements. The controller can determine a rotational angle of the knob based on the signals generated by the one or more of the sensors in the array while a portion of the knob does not overlap the array of sensors.

IPC Classes  ?

  • G06F 3/039 - Accessories therefor, e.g. mouse pads
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
  • G06F 3/038 - Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
  • G06F 3/0362 - Pointing devices displaced or positioned by the user; Accessories therefor with detection of 1D translations or rotations of an operating part of the device, e.g. scroll wheels, sliders, knobs, rollers or belts

61.

ESD protection circuit

      
Application Number 17989481
Grant Number 11876090
Status In Force
Filing Date 2022-11-17
First Publication Date 2023-10-26
Grant Date 2024-01-16
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Rogers, David Michael
  • Mann, Eric N.
  • Swindlehurst, Eric Lee
  • Miyamae, Toru
  • Williams, Timothy John
  • Nagai, Ryuta
  • Lee, Sungkwon
  • Kapre, Ravindra M.
  • Qian, Mimi Xuefeng Zhao
  • Yi, Yan
  • Ho, Dung Si
  • Chin-Hua, Boo

Abstract

An electrostatic discharge protection circuit capable of clamping both positive and negative ESD events and passing signals is provided. Generally, the circuit includes a p-channel field-effect transistor (PFET) clamp coupled to a pin to be protected, the PFET clamp including a plurality of PFETs in a DN-well, an n-channel field-effect transistors (NFET) clamp coupled between ground and the pin through the PFET clamp, the NFET clamp including a plurality of NFETs coupled in series, and a bias network for biasing a voltage of the DN well to substantially equal a voltage on the pin when the voltage on the pin is greater than ground potential, and to ground potential when the pin voltage is less than ground potential. The plurality of are PFETs coupled in parallel between the pin and the NFET clamp, each of the PFETs is coupled to the pin though one of a plurality ballast resistors.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier

62.

METHODS, DEVICES AND SYSTEMS FOR AUTOMATICALLY ADDING DEVICES TO NETWORK USING WIRELESS POSITIONING TECHNIQUES

      
Application Number 17726241
Status Pending
Filing Date 2022-04-21
First Publication Date 2023-10-26
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Luo, Hui
  • Dharanipragada, Kalyan
  • Uln, Kiran

Abstract

A method can include, by operation of a configuring device: storing user network information in the configuring device; receiving wireless communications from a target device; authenticating the target device; indicating a pointing direction for the configuring device; executing a wireless positioning operation with the target device to generate positioning data. In response to the configuring device being determined to be pointing at the target device, automatically configuring the target device for the user network with the stored user network information. Corresponding methods for a configuring device, as well as devices and systems are also disclosed.

IPC Classes  ?

  • H04W 4/029 - Location-based management or tracking services
  • H04W 24/02 - Arrangements for optimising operational condition
  • H04W 12/069 - Authentication using certificates or pre-shared keys
  • H04W 76/10 - Connection setup
  • H04W 12/63 - Location-dependent; Proximity-dependent

63.

Short circuit recovery in universal serial bus Type-C power delivery (USB-C/PD) systems based on resistors

      
Application Number 17730028
Grant Number 11862959
Status In Force
Filing Date 2022-04-26
First Publication Date 2023-10-26
Grant Date 2024-01-02
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Khamesra, Arun
  • Rai, Hariom
  • Shah, Pulkit

Abstract

A system includes a first USB Type-C Power Delivery (USB-C/PD) port and a control circuit operatively coupled to the first USB-C/PD port. The control circuit is configured to determine whether a short circuit condition has occurred based on a first threshold voltage. The control circuit is also configured to turn off a ground isolation switch when short circuit condition occurs. The control circuit is further configured to determine a whether a voltage on a ground line is less than a second threshold voltage. The control circuit is further configured to turn on the ground isolation switch when the voltage on the ground line is less than the second threshold voltage. The control circuit may perform one or more error recovery operations after turning on the ground isolation switch.

IPC Classes  ?

  • H02H 3/08 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to excess current
  • H02H 9/02 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
  • H02H 3/06 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection - Details with automatic reconnection

64.

System, method, and apparatus for passive shielding of a capacitive sensing button

      
Application Number 18083111
Grant Number 11853498
Status In Force
Filing Date 2022-12-16
First Publication Date 2023-10-19
Grant Date 2023-12-26
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Healy, Mark
  • O'Keeffe, Daniel

Abstract

Apparatuses and methods of shielding for capacitance-to-digital code conversion are described. One apparatus includes a capacitance-to-digital converter (CDC) for measuring a self-capacitance of a sensor electrode. The capacitance-to-digital code converter can in a first phase, apply a supply voltage to the sensor electrode. The sensor electrode and a shield electrode, the form a mutual capacitance with the sensor electrode. The CDC, in a second phase, couples the shield electrode to a ground potential and the sensor electrode to a first modulation capacitor. The first modulation capacitor is pre-charged to a reference voltage. The CDC, in a third phase, couples the sensor electrode and the shield electrode to the ground potential. The CDC, in a fourth phase, couples the shield electrode to the ground potential and the sensor electrode to a second modulation capacitor. The second modulation capacitor is pre-charged to the reference voltage.

IPC Classes  ?

  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G01R 27/26 - Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

65.

HYDROMETER DEVICE

      
Application Number 17716644
Status Pending
Filing Date 2022-04-08
First Publication Date 2023-10-12
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Bihday, Volodymyr
  • Kapshii, Oleg
  • Krekhovetskyy, Mykhaylo
  • Maharyta, Andriy
  • Mandziy, Vasyl

Abstract

A hydrometer device according to an example includes a floating waterproof device container, and a liquid level sensor positioned in the device container to sense an immersion level of the device container when the device container is floating in a container of liquid. The hydrometer device further includes a conversion circuit positioned in the device container to convert the sensed immersion level to a digital value, and a controller positioned in the device container to determine a liquid density value for the liquid based on the digital value.

IPC Classes  ?

  • G01N 9/14 - Investigating density or specific gravity of materials; Analysing materials by determining density or specific gravity by observing bodies wholly or partially immersed in fluid materials by observing the depth of immersion of the bodies, e.g. hydrometers the body being built into a container
  • G01N 9/36 - Analysing materials by measuring the density or specific gravity, e.g. determining quantity of moisture
  • G01N 9/18 - Special adaptations for indicating, recording, or control

66.

MACHINE LEARNING MODELS WITH INTEGRATED UNCERTAINTY

      
Application Number 18096444
Status Pending
Filing Date 2023-01-12
First Publication Date 2023-10-05
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Lyons, Niall
  • Dubey, Anand
  • Santra, Avik
  • Pandey, Ashutosh

Abstract

A system includes memory and a processing device, operatively coupled to the memory, to obtain an input signal corresponding to data obtained from a data source, extract a set of features using the input signal, generate a set of feature tracking data from the set of features, compress a machine learning model to obtain a compressed model by identifying a subset of features based on the set of tracking data, and use the compressed model to make a prediction based on the set of feature tracking data. The set of features includes a set of confidence features and a set of uncertainty features, and the set of feature tracking data includes a set of confidence feature tracking data and a set of uncertainty feature tracking data.

IPC Classes  ?

67.

Clock signal conversion circuit for high-speed serial data controllers

      
Application Number 17713739
Grant Number 11888483
Status In Force
Filing Date 2022-04-05
First Publication Date 2023-10-05
Grant Date 2024-01-30
Owner CYPRESS SEMICONDUCTOR CORPORATION (USA)
Inventor
  • Hussain, Wasim
  • Bodnaruk, Nicholas Alexander
  • Lilamwala, Murtuza

Abstract

A clock signal conversion circuit includes an amplification circuit configured to amplify a differential clock signal having sub rail-to-rail voltage swings relative to a supply voltage, such that an amplified differential clock signal output by the amplification circuit has complementary positive and negative signal components with full rail-to-rail voltage swings relative to the supply voltage. A duty cycle distortion correction circuit includes: a filter having a cutoff frequency below the frequency of the differential clock signal and configured to output a differential voltage that is proportional to a difference in duty cycle between the positive and negative signal components of the amplified differential clock signal; and a transconductance amplifier configured to convert the differential voltage to a differential current that is provided to the amplification circuit as feedback for reducing the duty cycle difference between the positive and negative signal components of the amplified differential clock signal.

IPC Classes  ?

68.

ENHANCED TRANSMISSION MEDIUM USAGE FOR COLLOCATED WIRELESS DEVICES

      
Application Number 17656615
Status Pending
Filing Date 2022-03-25
First Publication Date 2023-09-28
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Sarma, Munukutla Sandeep
  • Kencharla, Raghavendra
  • Mukherjee, Suprojit
  • Sood, Ayush

Abstract

Systems, methods, and devices improve medium usage of wireless devices. Methods include determining, using one or more processors, multiple protection frames should be used for a first wireless radio and a second wireless radio based, at least in part, on an interference parameter, wherein the first wireless radio and the second wireless radio are collocated in a same wireless device. Methods also include determining, using the one or more processors, one or more transmission parameters associated at least one of the wireless radios, the one or more transmission parameters representing a first duty cycle of the first wireless radio and a second duty cycle of the second wireless radio. Methods further include determining, using the one or more processors, a number of protection frames and a protection frame duration based, at least in part, on the one or more transmission parameters.

IPC Classes  ?

69.

CORE TRANSMIT SUSPENSION IN MULTIPLE CORE WIRELESS DEVICES, SYSTEMS, AND METHODS

      
Application Number 17704786
Status Pending
Filing Date 2022-03-25
First Publication Date 2023-09-28
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Sreepada, Sridhan
  • Sood, Ayush
  • Gopinath, Kempraju

Abstract

Core transmit suspension is provided in multiple core wireless devices, systems, and methods. A first wireless device may transmit a plurality of data packets by a first core and a second core of the first wireless device to a second wireless device at a data rate. A data packet may be transmitted by at least one of the first core or the second core. The first wireless device may receive a first core acknowledgement (ACK) of the data packet by the first core and a second core ACK of the data packet by the second core from the second wireless device. The first wireless device may determine that a function of a power metric of the first core ACK and a power metric of the second core ACK satisfies a threshold to produce a result. The first wireless device may suspend, while the data rate sustains, transmission of the plurality of data packets by a suspended core of the first core or the second core based on the result.

IPC Classes  ?

  • H04W 76/30 - Connection release
  • H04L 5/00 - Arrangements affording multiple use of the transmission path
  • H04B 17/318 - Received signal strength
  • H04L 1/00 - Arrangements for detecting or preventing errors in the information received

70.

APPARATUS FOR ON DEMAND ACCESS AND CACHE ENCODING OF REPAIR DATA

      
Application Number 17703856
Status Pending
Filing Date 2022-03-24
First Publication Date 2023-09-28
Owner Cypress Semiconductor Corporation (USA)
Inventor Kan, Senwen

Abstract

An apparatus for on demand access and cache encoding of repair data. In one embodiment the apparatus includes an integrated circuit having a data cache in data communication with a non-volatile memory, a controller of a built-in self-test-and-repair (BISTR) circuit, and a plurality of registers. The controller is configured to read data from the data cache and store it into a first of the plurality of registers.

IPC Classes  ?

  • G06F 11/10 - Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens
  • G06F 12/0802 - Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
  • G11C 29/12 - Built-in arrangements for testing, e.g. built-in self testing [BIST]

71.

Floating ground architectures in USB type-C controllers for fault detection

      
Application Number 17706481
Grant Number 11768253
Status In Force
Filing Date 2022-03-28
First Publication Date 2023-09-26
Grant Date 2023-09-26
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Maley, Kiran Kumar Reddy
  • Venigalla, Ramakrishna
  • Vispute, Hemant P.

Abstract

A Universal Serial Bus Type-C (USB-C) controller with a floating ground architecture for fault detection is described. A USB-C controller includes a floating ground circuit and a fault detection circuit coupled to a power converter. The floating ground circuit provides a floating ground voltage based on a supply voltage of the power converter. The fault detection circuit includes a comparator with power rails coupled to the supply voltage and the floating ground voltage. The fault detection circuit measures a differential signal across a first terminal and a second terminal, the differential signal representing a current of the power converter. The fault detection circuit compares the differential signal against a threshold using the comparator and outputs an indication of a fault condition in response to the differential signal satisfying the threshold.

IPC Classes  ?

  • G01R 31/52 - Testing for short-circuits, leakage current or ground faults
  • H01R 13/66 - Structural association with built-in electrical component

72.

FLOATING GATE DRIVER WITH PROGRAMMABLE DRIVE STRENGTH FOR A WIDE RANGE OF UNIVERSAL SERIAL BUS (USB) POWER DELIVERY APPLICATIONS

      
Application Number 17696781
Status Pending
Filing Date 2022-03-16
First Publication Date 2023-09-21
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Vispute, Hemant P.
  • Mondal, Partha
  • Balia, Tudu Rushika Banam
  • Khamesra, Arun
  • Shah, Pulkit
  • Rai, Hariom

Abstract

Universal Serial Bus Type-C (USB-C) controllers with a floating gate driver with programmable drive strength for a wide range of USB power delivery applications in electronic devices described. A USB-C controller includes a floating gate driver and control logic. The floating gate driver includes p-channel field-effect transistors (FETs) coupled in parallel between a first terminal and a second terminal and p-channel pre-gate drivers. Each p-channel pre-gate driver is coupled to a gate of one of the p-channel FETs. The floating gate driver includes n-channel FETs coupled in parallel between the second terminal and a third terminal and n-channel pre-gate drivers, each n-channel pre-gate driver being coupled to a gate of one of the plurality of n-channel FETs. The control logic sends one or more control signals to activate a first number of p-channel pre-gate drivers and a second number of n-channel pre-gate drivers based on an output voltage.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

73.

Sigma-delta modulator for high-resolution control of ring oscillator in digital phase-locked loop

      
Application Number 17704511
Grant Number 11764802
Status In Force
Filing Date 2022-03-25
First Publication Date 2023-09-19
Grant Date 2023-09-19
Owner Cypress Semiconductor Corporation (USA)
Inventor Harush, Avri

Abstract

A digitally-controlled oscillator (DCO) circuit includes a digital-to-analog converter (DAC) to generate a first current based on most significant bits of a multi-bit code received from a time-to-digital converter (TDC) of a digital phase-locked loop (PLL). The DCO circuit further includes a sigma-delta modulator (SDM) to modulate least significant bits of the multi-bit code into a set of digital bits based on a first frequency of a feedback clock of the DPLL. The set of digital bits is to cause the DAC to generate a second current. The DCO circuit further includes a ring oscillator coupled to the DAC, the ring oscillator to generate an alternating-current (AC) output signal having a second frequency corresponding to a combination of the first current and the second current.

IPC Classes  ?

  • H03L 7/099 - Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
  • H03M 3/00 - Conversion of analogue values to or from differential modulation
  • G04F 10/00 - Apparatus for measuring unknown time intervals by electric means
  • H03M 1/50 - Analogue/digital converters with intermediate conversion to time interval

74.

Systems, methods, and devices for defect detection in capacitive touch panels

      
Application Number 17654385
Grant Number 11928284
Status In Force
Filing Date 2022-03-10
First Publication Date 2023-09-14
Grant Date 2024-03-12
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Grygorenko, Vadym
  • Kremin, Viktor
  • Bukhtii, Oleksii
  • Pirogov, Oleksandr
  • Weber, Jens
  • Kuzo, Taras

Abstract

Systems, methods, and devices detect defects in touch panels. Methods include scanning, using a designated integration window, a plurality of electrodes of a sensing device to obtain a plurality of measurements and determining a plurality of variance values for the plurality of electrodes based on the plurality of measurements, the plurality of variance values identifying variances in the plurality of measurements between adjacent sense locations of the sensing device. Methods also include determining if a defect is present in the sensing device based, at least in part, on a comparison of the plurality of difference values with the plurality of threshold values.

IPC Classes  ?

  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
  • G01D 5/24 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance
  • G01D 18/00 - Testing or calibrating apparatus or arrangements provided for in groups

75.

Mode-transition Architecture for Buck-boost converter

      
Application Number 18310458
Status Pending
Filing Date 2023-05-01
First Publication Date 2023-09-14
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Karri, Rajesh
  • Khamesra, Arun
  • Shah, Pulkit
  • Rai, Hariom

Abstract

A mode-transition architecture for USB controllers is described herein. In an example embodiment, an integrated circuit (IC) controller includes a controller coupled to a slope compensation circuit, the controller to detect a transition of a buck-boost converter from a first mode having a first duty cycle to a second mode having a second duty cycle that is less or more than the first duty cycle. The controller controls the slope compensation circuit to nullify an error in an output caused by the transition. The controller can cause the slope compensation circuit to apply a charge stored in a capacitor during a first cycle to start a second cycle with a higher voltage than the first cycle.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

76.

Flexible and optimized power management unit (PMU) for multiple power supply scenarios

      
Application Number 17689711
Grant Number 11815981
Status In Force
Filing Date 2022-03-08
First Publication Date 2023-09-14
Grant Date 2023-11-14
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Venkatasubramanian, Radhika
  • Dow, Stephen W.
  • Kotra, Prasad Rao
  • Simileysky, Victor
  • Khan, Ataur Rehman
  • Moeller, David
  • Ballweber, Brian

Abstract

Apparatuses and methods of operating a flexible and optimized power management unit (PMU) for multiple power supply scenarios are described. One integrated circuit includes a first terminal to couple to an unregulated power supply, a second terminal to couple to a regulated power supply, a first regulator, and a second regulator. The first regulator outputs a first supply voltage in a first configuration, and the second regulator outputs a second supply voltage in a second configuration. The first and second regulators do not operate concurrently.

IPC Classes  ?

  • G06F 1/26 - Power supply means, e.g. regulation thereof
  • G06F 1/28 - Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
  • G06F 1/30 - Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
  • G06F 1/32 - Means for saving power
  • G06F 1/3296 - Power saving characterised by the action undertaken by lowering the supply or operating voltage

77.

Systems, methods, and devices for capacitive sensing with sinusodial demodulation

      
Application Number 17722200
Grant Number 11868565
Status In Force
Filing Date 2022-04-15
First Publication Date 2023-09-07
Grant Date 2024-01-09
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Kremin, Viktor
  • Pirogov, Oleksandr
  • Grygorenko, Vadym
  • Weber, Jens

Abstract

Systems, methods, and devices improve the sensitivity of capacitive sensors. Devices may include an attenuator configured to receive an input from at least one sense electrode of a capacitive sensing device. The attenuator may be included in a sensing channel of a capacitive sensor. Devices may further include a signal generator coupled to an input of the attenuator. The signal generator may include one or more processors configured to generate a sinusoidal signal based, at least in part, on one or more noise characteristics of a scan sequence associated with one or more transmit electrodes of the capacitive sensing device, and provide the sinusoidal signal to the input of the attenuator.

IPC Classes  ?

  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

78.

INTEGRATED CIRCUIT DEVICE WITH CROSSBAR TO ROUTE TRAFFIC

      
Application Number 18172978
Status Pending
Filing Date 2023-02-22
First Publication Date 2023-08-31
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Torno, Andreas
  • Richter, Roland
  • Montemayor, Joaquin Ibanez

Abstract

An integrated circuit (IC) device according to an example includes an interconnect bus to communicate with an external memory device, wherein the interconnect bus includes a plurality of different channels to be coupled directly to a first set of masters. The IC device includes a crossbar unit to be coupled to a second set of masters, wherein the crossbar unit is to monitor bandwidth usage at the plurality of different channels, and selectively route traffic between the second set of masters and the plurality of different channels based on the monitored bandwidth usage.

IPC Classes  ?

  • G06F 13/18 - Handling requests for interconnection or transfer for access to memory bus with priority control
  • G06F 13/40 - Bus structure
  • G06F 13/16 - Handling requests for interconnection or transfer for access to memory bus

79.

USB POWER DELIVERY INTEGRATED CIRCUIT CONTROLLER WITH WIRELESS CHARGING STATION CONTROL CAPABILITY

      
Application Number 17669973
Status Pending
Filing Date 2022-02-11
First Publication Date 2023-08-17
Owner CYPRESS SEMICONDUCTOR CORPORATION (USA)
Inventor
  • Smith, Nicholaus
  • Narayana Iyer, Kailas
  • Ramanujam, Jegannathan
  • Subbiah, Palaniappan

Abstract

A Universal Serial Bus (USB)-Power Delivery (PD) integrated circuit (IC) controller is described. The controller includes: a first USB port configured for coupling the USB-PD IC controller to a USB power adaptor; a second port configured for coupling the USB-PD IC controller to a wireless charging station; and logic configured to control a level of a voltage output by the USB power adaptor and to control an output power level of the wireless charging station, wherein an input voltage of the wireless charging station corresponds to the voltage output by the USB power adaptor or is derived from the voltage output by the USB power adaptor. The IC controls both USB-PD and wireless power simultaneously as a system to transmit power and may limit the output power to prevent overload conditions. A corresponding wireless charging system and method of operating the wireless charging system are also described.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • H02J 50/12 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling of the resonant type

80.

System and Method for Efficient Onboarding to a Wireless Network of a Group of WLAN Devices Owned by a User

      
Application Number 17673554
Status Pending
Filing Date 2022-02-16
First Publication Date 2023-08-17
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Kamath, Vinayak
  • Kunjar, Dhruvaraja
  • Sampath, Vinoth

Abstract

Methods for seamlessly onboarding commonly owned wireless local area network (WLAN) enabled devices to a wireless network are provided. Generally, the method includes exchanging an UID, encryption algorithm and key between the devices to form a common-onboarding-group (COG), manually provisioning credentials to onboard a first device of the COG, and automatically provisioning credentials to onboard a second device. In one embodiment, the first device registers with the network the UID and an encrypted-connection-profile encrypted using the algorithm, the network responds to a probe from the second device with the UID and encrypted-connection-profile, and the second device decrypts the encrypted-connection-profile using the secret key and joins the network. In another embodiment, the first device monitors the network and responds to a probe from the second device with the UID and encrypted-connection-profile. Alternatively, after onboarding the first device starts a private network and provisions the second device with the connection-profile.

IPC Classes  ?

81.

Bi-phase mark code asynchronous decoder using SPI block

      
Application Number 17669693
Grant Number 11734220
Status In Force
Filing Date 2022-02-11
First Publication Date 2023-08-17
Grant Date 2023-08-22
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Narayana Iyer, Kailas
  • Nagamangala Muninarayanappa, Jeevith Kumar

Abstract

Disclosed are techniques for using firmware and hardware blocks of a device to decode signals encoded by signal edge positioning within a data bit width, such as bi-phase mark space coding (BMC) used for encoding in-band communication of wireless charging systems. The first device may use general purpose I/O (GPIO) interrupts to detect the start of a packet. The firmware may synchronize and configure the clock of a serial peripheral interface (SPI) to oversample the signals. The SPI may store the sampled data into a buffer, freeing the firmware from having to expend processing cycles to detect the transitions of the data in real-time. The firmware may read the buffered samples to decode the packet data in a post-processing stage. The firmware may detect the end of the packet by polling and GPIO interrupts or based on the samples read from the buffer to stop the clock of the SPI.

IPC Classes  ?

  • G06F 13/42 - Bus transfer protocol, e.g. handshake; Synchronisation
  • G06F 1/12 - Synchronisation of different clock signals

82.

Psuedo digital ASK demodulator with integrated buck boost and USB-PD for wireless charging

      
Application Number 17669706
Grant Number 11892484
Status In Force
Filing Date 2022-02-11
First Publication Date 2023-08-17
Grant Date 2024-02-06
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Vijayakumar, Prasanna Venkateswaran
  • Khamesra, Arun
  • Ramanujam, Jegannathan
  • Konduru, Ravi

Abstract

Disclosed are techniques for using a sense amplifier for the voltage path having an adjustable gain and a current amplifier for the current path having an adjustable sample-hold interval for demodulation of in-band ASK data in power transmitting devices of a wireless charging system. The sample-hold interval may be adjusted as a function of the error rate of the demodulated data and used to sample the modulated current when the adjustable gain of the voltage path is not able to track the modulated voltage. The adjustable sample-hold may function as a variable reference of a comparator used to compare the sampled current to generate the sensed current. A controller may flexibly adjust the gain, adjust the sample-hold interval, and/or select the sensed voltage or the sensed current path for further filtering, demodulation, decoding, and processing depending on the error rate under various loading, coupling scenarios, and phases of power transfer.

IPC Classes  ?

  • G01R 19/10 - Measuring sum, difference, or ratio
  • H02J 50/80 - Circuit arrangements or systems for wireless supply or distribution of electric power involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices
  • G01R 31/30 - Marginal testing, e.g. by varying supply voltage
  • H04L 27/06 - Demodulator circuits; Receiver circuits
  • H02J 50/12 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling of the resonant type

83.

SEAMLESS PLAYBACK AND SWITCHING FOR WIRELESS COMMUNICATIONS DEVICES

      
Application Number 18302568
Status Pending
Filing Date 2023-04-18
First Publication Date 2023-08-10
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Avadhanam, Krishna Kishore
  • Malot, Ashish Kumar
  • Zopf, Robert

Abstract

Systems, methods, and devices seamlessly playback data files using one or more wireless connections. Methods include establishing a first wireless connection between a source device and a sink device, the first wireless connection using a first transmission protocol and transmitting audio data via the first wireless connection. Methods further include determining a switch should be initiated based on one or more signal quality metrics, the one or more signal quality metrics representing, at least in part, an estimate of a quality of the first wireless connection. Methods also include switching to a second wireless connection between the source device and the sink device, the second wireless connection using a second transmission protocol, and the second wireless connection using data packets encapsulated for transmission in accordance with the second transmission protocol.

IPC Classes  ?

  • H04W 36/30 - Reselection being triggered by specific parameters by measured or perceived connection quality data
  • H04W 36/00 - Handoff or reselecting arrangements

84.

GATE DRIVER CIRCUIT FOR A SYNCHRONOUS RECTIFIER OF A WIRELESS POWER RECEIVER SYSTEM

      
Application Number 17741936
Status Pending
Filing Date 2022-05-11
First Publication Date 2023-08-10
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Smith, Nicholaus
  • Khamesra, Arun
  • Vijayakumar, Prasanna Venkateswaran

Abstract

A gate driver circuit for a synchronous rectifier (SR) of a wireless power receiver (WPR) system includes: a first RC filter that outputs a delayed turn-on signal for a first high-side SR switch based on a signal input to the filter that indicates a zero-crossing condition for a coil current of the WPR system in a first direction; a second RC filter that outputs a delayed turn-on signal for a second high-side SR switch based on a signal input to the filter that indicates a zero-crossing condition for the coil current in the opposite direction; a first digital delay-and-hold circuit electrically connected to the output of the first RC filter and that stabilizes the delayed turn-on signal output by the first filter; and a second digital delay-and-hold circuit electrically connected to the output of the second RC filter and that stabilizes the delayed turn-on signal output by the second filter.

IPC Classes  ?

  • H02M 7/217 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H02J 50/12 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling of the resonant type
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters

85.

Foreign object detection using decay counter for Q-estimation

      
Application Number 17669113
Grant Number 11936207
Status In Force
Filing Date 2022-02-10
First Publication Date 2023-08-10
Grant Date 2024-03-19
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Vijayakumar, Prasanna Venkateswaran
  • Kedilaya, Vishwas
  • Nagamangala Muninarayanappa, Jeevith Kumar
  • Balia, Tudu Rushika Banam

Abstract

A method of foreign object detection by a wireless power delivery system is disclosed. A decaying coil voltage signal of a transmitting coil of the wireless power delivery system is detected. A first comparator is used to trigger a cycle count of the decaying coil voltage signal. When the first comparator triggers the cycle count, a second comparator is used to count a number of cycles of the decaying coil voltage signal. A quality factor (Q-factor) of the transmitting coil is determined based on the number of cycles of the decaying coil voltage signal, a reference signal of the first comparator, and a reference signal of the second comparator. Whether a foreign object is present is determined based on the Q-factor and a foreign object detection (FOD) threshold level.

IPC Classes  ?

  • H02J 50/60 - Circuit arrangements or systems for wireless supply or distribution of electric power responsive to the presence of foreign objects, e.g. detection of living beings
  • G01V 3/12 - Electric or magnetic prospecting or detecting; Measuring magnetic field characteristics of the earth, e.g. declination or deviation operating with electromagnetic waves
  • H02J 50/12 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling of the resonant type
  • H02J 7/02 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters

86.

METHODS, DEVICES AND SYSTEMS FOR PREVENTING TRACKING BY USE OF REPLY ATTACKS

      
Application Number 17590728
Status Pending
Filing Date 2022-02-01
First Publication Date 2023-08-03
Owner Cypress Semiconductor Corporation (USA)
Inventor Luo, Hui

Abstract

A method can include establishing a wireless encrypted connection; establishing a long term encryption key (LTK) and an anti-tracking (A-T) count value for a peer device; storing the LTK and A-T count value in a nonvolatile memory circuit; receiving a communication that includes an identity value corresponding to the peer device and a peer hashed anti-tracking count (HATC); generating at least one local HATC by executing a predetermined hash function on at least the LTK and a changed A-T count value that varies from the stored A-T count value by a predetermined amount. The received peer HATC can be authenticated with the at least one local HATC. In response to the peer HATC being authenticated, communications can occur with the peer device. In response to the peer HATC not being authenticated, communications may not occur with the peer device. Related devices and systems are also disclosed.

IPC Classes  ?

  • H04W 12/122 - Counter-measures against attacks; Protection against rogue devices
  • H04W 12/037 - Protecting confidentiality, e.g. by encryption of the control plane, e.g. signalling traffic
  • H04W 12/0431 - Key distribution or pre-distribution; Key agreement
  • H04L 9/32 - Arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system

87.

SYSTEM AND METHOD FOR INHIBITING DEBUGGER IN NON-SECURE REGION

      
Application Number 17892650
Status Pending
Filing Date 2022-08-22
First Publication Date 2023-08-03
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Dobaczewski, Jacek
  • Chen, Yun-Lu

Abstract

One or more computing devices, systems, and/or methods are provided. In an example, a method comprises storing an application image comprising a non-secure portion in a memory. A first debug request comprising a first target address is received. Halting of a processor is inhibited responsive to the first target address being within a protected region for a portion of non-secure code.

IPC Classes  ?

  • G06F 21/53 - Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity, buffer overflow or preventing unwanted data erasure by executing in a restricted environment, e.g. sandbox or secure virtual machine
  • G06F 11/36 - Preventing errors by testing or debugging of software

88.

SYSTEM AND METHOD FOR STORING SYSTEM STATE DATA IN A HARDWARE REGISTER

      
Application Number 17854706
Status Pending
Filing Date 2022-06-30
First Publication Date 2023-07-27
Owner Cypress Semiconductor Corporation (USA)
Inventor Dobaczewski, Jacek

Abstract

One or more computing devices, systems, and/or methods are provided. In an example, a method comprises executing an application image to initialize a computing system. System state data associated with the initializing of the computing system is stored in a hardware register having at least one lockable until reset bit. A fault condition is identified responsive to the system state data not matching an expected value.

IPC Classes  ?

  • G06F 21/57 - Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
  • G06F 21/54 - Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity, buffer overflow or preventing unwanted data erasure by adding security routines or objects to programs
  • G06F 21/55 - Detecting local intrusion or implementing counter-measures

89.

MULTI-LAYERED AUTHENTICATION AND PERMISSION METHODS, SYSTEMS AND APPARATUSES

      
Application Number 17885851
Status Pending
Filing Date 2022-08-11
First Publication Date 2023-07-27
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Evans, Bradley
  • Stopher, Nicholas

Abstract

A method can include receiving user input values via a plurality of inputs of a motor vehicle and determining if each received user input value corresponds to an authenticated user value in a secure memory of the motor vehicle. For each received user input value corresponding to an authenticated user value, a certainty factor corresponding to the authenticated user value can be accessed from a secure memory. A certainty score can be generated from all accessed certainty factors. Each of a plurality of permissions for operating or accessing the motor vehicle can be enabled in response to a comparison between the certainty score and a certainty threshold assigned to each permission. Corresponding devices and systems are also disclosed.

IPC Classes  ?

  • G06F 21/32 - User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
  • G06F 21/43 - User authentication using separate channels for security data wireless channels
  • G06F 21/60 - Protecting data

90.

SYSTEM AND METHOD FOR BLOCKING NON-SECURE INTERRUPTS

      
Application Number 17831175
Status Pending
Filing Date 2022-06-02
First Publication Date 2023-07-27
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Dobaczewski, Jacek
  • Sun, Kuo-Jui

Abstract

One or more computing devices, systems, and/or methods are provided. In an example of the techniques presented herein, a system comprises a processor, a first interrupt source configured to generate a first non-secure interrupt, and an interrupt blocking unit configured to block the first non-secure interrupt responsive to the processor operating in a secure state.

IPC Classes  ?

  • G06F 13/24 - Handling requests for interconnection or transfer for access to input/output bus using interrupt
  • G06F 9/30 - Arrangements for executing machine instructions, e.g. instruction decode

91.

System and method for using virtual addressing to execute application images

      
Application Number 17844583
Grant Number 11928057
Status In Force
Filing Date 2022-06-20
First Publication Date 2023-07-27
Grant Date 2024-03-12
Owner CYPRESS SEMICONDUCTOR CORPORATION (USA)
Inventor Dobaczewski, Jacek

Abstract

One or more computing devices, systems, and/or methods are provided. In an example, a method comprises storing a first application image and a second application image in an application image memory, designating the first application image as active, receiving a first address for accessing the application image memory from a processor, modifying the first address based on a first offset between a base starting address of the first application image and a starting physical address of the first application image in the application image memory to generate a second address, and accessing the application image memory using the second address.

IPC Classes  ?

  • G06F 12/08 - Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
  • G06F 8/61 - Installation
  • G06F 12/02 - Addressing or allocation; Relocation

92.

High-speed, accurate peak and valley sensing for secondary-controlled flyback converter

      
Application Number 17576776
Grant Number 11870363
Status In Force
Filing Date 2022-01-14
First Publication Date 2023-07-20
Grant Date 2024-01-09
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Virunjipuram Murugesan, Saravanan
  • Karri, Rajesh
  • Khamesra, Arun
  • Rai, Hariom

Abstract

A secondary side controller for a flyback converter includes an integrated circuit (IC), which in turn includes: a synchronous rectifier (SR) sense pin coupled to a drain of an SR transistor on a secondary side of the flyback converter; a capacitor having a first side coupled to the SR sense pin, the capacitor to charge or discharge responsive to a voltage sensed at the SR sense pin; a diode-connected transistor coupled between a second side of the capacitor and ground; a first current mirror coupled to the diode-connected transistor and configured to receive, as input current, a reference current from a variable current source; and a peak detect transistor coupled to the diode-connected transistor and to an output of the first current mirror. The peak detect transistor is to output a peak detection signal in response to detecting current from the capacitor drop below the reference current.

IPC Classes  ?

  • H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

93.

Secondary Side Controlled QR Flyback Converter using a Programmable Valley Algorithm

      
Application Number 17575001
Status Pending
Filing Date 2022-01-13
First Publication Date 2023-07-13
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Shah, Pulkit
  • Khamesra, Arun
  • Rai, Hariom

Abstract

A secondary-side-controller for a QR flyback converter and method for operating the same are provided. Generally, the secondary-side-controller includes a driver configured to control a power-switch (PS) on a primary side of converter to turn on the PS when a sinusoidal input voltage to the converter is at one of a plurality of valleys, an analog-to-digital-converter (ADC) to read the input voltage, output voltage, and load current, and generate digital signals based thereon. A valley-controller coupled to the driver, ADC, a look-up-table and a pulse width modulator (PWM) receives the signals from the ADC and using the look-up-table determines at which valley of the plurality of valleys to couple a PWM signal from the PWM to the driver. The valley-controller is operable for each switching cycle of the PS to increment, decrement or leave unchanged the valley at which the PWM signal is coupled from the PWM to the driver.

IPC Classes  ?

  • H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion

94.

ROBUST WLAN RECEPTION IN WIFI-BLUETOOTH COMBINATION SYSTEMS BY INTERFERENCE WHITENING

      
Application Number 17960733
Status Pending
Filing Date 2022-10-05
First Publication Date 2023-07-06
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Sharma, Ankit
  • Mukherjee, Suprojit
  • Sood, Ayush
  • Nimmala, Ashok

Abstract

The embodiments described herein are directed at techniques to de-correlate Bluetooth interference seen across WLAN receive antennas/space in a Bluetooth transceiver/WLAN transceiver combination device. A Bluetooth interference whitening technique may be utilized, wherein a whitening matrix is computed based on a leakage signal resulting from a training signal transmitted by the Bluetooth transceiver. The leakage signal may leak in to the WLAN transceiver and a set of attributes is calculated for each frequency the leakage signal is received on. One or more whitening matrixes are calculated based on the set of attributes for each frequency the leakage signal is received on. In response to the WLAN transceiver receiving a signal of interest, an appropriate whitening matrix from the one or more whitening matrixes is selected and is then applied to the received signal of interest to de-correlate any interference generated as a result of the Bluetooth transmission.

IPC Classes  ?

  • H04L 25/03 - Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
  • H04W 4/80 - Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication
  • H04B 1/525 - Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa with means for reducing leakage of transmitter signal into the receiver

95.

Inductive sensing methods, devices and systems

      
Application Number 18099105
Grant Number 11879919
Status In Force
Filing Date 2023-01-19
First Publication Date 2023-06-29
Grant Date 2024-01-23
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Maharyta, Andriy
  • Krekhovetskyy, Mykhaylo

Abstract

A method can include in a first phase of a sensing operation, controlling at least a first switch to energize a sensor inductance; in a second phase of the sensing operation that follows the first phase, controlling at least a second switch to couple the sensor inductance to a first modulator capacitance to induce a first fly-back current from the sensor inductance, the first fly-back current generating a first modulator voltage at the first modulator capacitance, and in response to the first modulator voltage, controlling at least a third switch to generate a balance current that flows in an opposite direction to the fly-back current at the first modulator node. The first and second phases can be repeated to generate a first modulator voltage at the first modulator capacitance. the modulator voltage can be converted into a digital value representing the sensor inductance. Related devices and systems are also disclosed.

IPC Classes  ?

  • G01R 27/26 - Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants
  • H03K 17/95 - Proximity switches using a magnetic detector
  • G01D 5/22 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature differentially influencing two coils

96.

METHODS, DEVICES AND SYSTEMS FOR ESTIMATING DISTANCE WITH TRANSMITTED FREQUENCY SETS

      
Application Number 17554708
Status Pending
Filing Date 2021-12-17
First Publication Date 2023-06-22
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Kolych, Igor
  • Kravets, Igor
  • Uln, Kiran

Abstract

A method can include determining a plurality of sample sets, each sample set being different from one another and including a plurality of frequencies separated by a uniform frequency range; wirelessly transmitting information identifying the sample sets for at least one remote device; for each sample set, transmitting a tone on each frequency of the sample set, receiving a tone on each frequency of the sample set from another device, and determining phase difference values for the received tones with respect to corresponding transmitted tones. From the phase shift values, a distance to the other device can be estimated. Corresponding devices and systems are also disclosed.

IPC Classes  ?

  • H04W 4/80 - Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication
  • H04W 4/02 - Services making use of location information

97.

ENHANCED PREDICTION OF TIMING OF ACTIVITY FOR WIRELESS DEVICES

      
Application Number 17555171
Status Pending
Filing Date 2021-12-17
First Publication Date 2023-06-22
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Sarma, Munukutla Sandeep
  • Kencharla, Raghavendra
  • Mysore, Manamohan D.
  • Wihardja, James

Abstract

Systems, methods, and devices predict activity of wireless devices. Methods include identifying one or more conditions indicating aperiodic activity will occur at a first radio, the first radio being a wireless radio compatible with a first wireless communications protocol, and receiving, at a second radio, timing information associated with the first radio via an interface between the first radio and the second radio, the second radio being a wireless radio compatible with a second wireless communications protocol, the first radio and the second radio being collocated in a wireless device. Methods also include scheduling wireless activity of the second radio based, at least in part, on the timing information.

IPC Classes  ?

98.

EFFICIENT PROCEDURES TO CREATE BLUETOOTH LE CENTRAL CONNECTION ON AN ADVERTISER

      
Application Number 17555071
Status Pending
Filing Date 2021-12-17
First Publication Date 2023-06-22
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Mysore, Manamohan D.
  • Wihardja, James
  • Zhodzishsky, Victor

Abstract

Disclosed are techniques for a device that wants to be a central device when creating a connection in a communication network such as Bluetooth Low Energy (BLE) to advertise information associated with a connection window to solicit a connection with a scanning peer device. When the scanning peer device receives the information, it may enter a connection as a peripheral device with the advertising device at the advertised connection window, allowing the advertising device to become the central device. Disclosed are also techniques for a device that wants to be a central device to advertise information associated with a scan window of the device to solicit a directed advertisement event from a peer device during the advertised scan window. The peer device initially scans but may advertise during the scan window as advertised to enable the central device to create a connection where the peer device becomes a peripheral device.

IPC Classes  ?

99.

DEVICES FOR CONFIGURING A SYSTEM AS A USER APPROACHES

      
Application Number 17547662
Status Pending
Filing Date 2021-12-10
First Publication Date 2023-06-15
Owner Cypress Semiconductor Corporation (USA)
Inventor
  • Evans, Bradley
  • Stopher, Nicholas

Abstract

A device for a system includes a wireless transceiver, a memory, and a microcontroller. The microcontroller is communicatively coupled to the wireless transceiver and the memory. The microcontroller is configured to receive via the wireless transceiver, user configuration data in response to a user approaching the system. The microcontroller is configured to store the user configuration data in the memory. The microcontroller is configured to transmit the user configuration data to an interface processor of the system to configure the system based on the user configuration data.

IPC Classes  ?

  • H04W 8/18 - Processing of user or subscriber data, e.g. subscribed services, user preferences or user profiles; Transfer of user or subscriber data
  • H04W 4/029 - Location-based management or tracking services
  • H04W 4/30 - Services specially adapted for particular environments, situations or purposes

100.

FRAME SYNCH DETECTION WITH INTRUSION DETECTION

      
Application Number 18078879
Status Pending
Filing Date 2022-12-09
First Publication Date 2023-06-15
Owner Cypress Semiconductor Corporation (USA)
Inventor Rey, Claudio

Abstract

Techniques are described to improve the security of frame synchronization detection between wireless devices in high accuracy positioning (HAP) applications using personal area networks (PANs). A receiver may detect whether a frame synchronization pattern has been manipulated by comparing the sampled data of the received frame synchronization pattern with a reference waveform predicted as the frame synchronization pattern. The receiver may reuse the data in the correlation buffer at the moment a correlator finds a peak and declares that the synchronization pattern is found. The correlator may also provide fractional timing information associated with the correlation peak for the receiver to create a delayed reference phase differential pattern. The receiver may subtract the data in the correlation buffer by the delayed reference differential data and look for absolute deviations in the output of such subtraction that exceed a predetermined threshold. Specific patterns or signatures of error may also be analyzed.

IPC Classes  ?

  • H04W 12/122 - Counter-measures against attacks; Protection against rogue devices
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