H01G 11/28 - Electrodes characterised by their structure, e.g. multi-layered, porosity or surface features arranged or disposed on a current collector; Layers or phases between electrodes and current collectors, e.g. adhesives
H01G 11/36 - Nanostructures, e.g. nanofibres, nanotubes or fullerenes
H01G 11/56 - Solid electrolytes, e.g. gels; Additives therein
H01G 11/68 - Current collectors characterised by their material
H01G 11/70 - Current collectors characterised by their structure
H01M 4/133 - Electrodes based on carbonaceous material, e.g. graphite-intercalation compounds or CFx
H01M 4/36 - Selection of substances as active materials, active masses, active liquids
H01M 4/583 - Carbonaceous material, e.g. graphite-intercalation compounds or CFx
H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
2.
TECHNIQUES FOR MODEL-BASED LUNG FLUID STATUS DETECTION
One embodiment is a method of performing thoracic tomography on a human subject including performing multiple 4-wire impedance measurements on a region of interest to obtain measured impedance data; comparing the measured impedance data to simulated impedance data obtained from a plurality of models of the region of interest; for each of the models, determining a fit of the model based on a comparison between the simulated impedance data obtained from the model and the measured impedance data; and integrating individual resistivity estimates obtained from the models based on a fit of the model such that the individual resistivity estimate from a better fitting model is weighted more heavily in a final resistivity estimate than an individual resistivity estimate from a worse fitting model.
This disclosure relates to multi-phase oscillators for electronic systems. An example system includes multiple level translator circuits and a ring oscillator circuit that includes multiple outputs. Each level translator circuit includes a first input transistor, a second input transistor, and an output. The ring oscillator circuit includes multiple outputs, and each output of the ring oscillator has a different phase. An output of the ring oscillator is coupled to only one input transistor of a level translator circuit, and the other input transistor of the level translator circuit is coupled to an output of another level translator circuit.
H03B 27/00 - Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
H03L 7/093 - Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
H03L 7/099 - Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
4.
CLOCK DOUBLER WITH CORRECTION FOR OUTPUT CLOCK CYCLE AND CLOCK DUTY CYCLE
A synthesizable clock doubler is disclosed. The clock doubler is implemented using unique combination of logic cells from a standard cell library. At the core of the clock doubler is a high-frequency ring oscillator that generates timing information for clock measurements. Replica ring oscillators are used to generate programmable delays for the correction of the output clock imperfection, such as cycle-to-cycle variation and duty cycle of the doubled clock.
Systems and methods related to serial communication devices are provided. An example integrated circuit (IC) device includes interface circuitry coupled to a two-wire serial communication bus having a serial clock (SCL) line and a serial data (SDA) bus line. The IC device further includes bus stuck recovery circuitry to monitor for a local SDA fault condition at the IC device based on a number of clock cycles during which an internal SDA signal (e.g., generated by the IC device) drives the SDA bus line to a first signal state, the clock cycles based on a clock signal received from the SCL line; and responsive to the local SDA fault condition, release the SDA bus line independent of the internal SDA signal, where the SDA bus line is in a second signal state different from the first signal state based on the release.
The present disclosure provides a method of fabricating a sensor assembly in which a sensor surface has an anchor species provided thereon, the anchor species having a first functional group attached. The method further comprises disposing a fluid channel over the surface and subsequently providing an analyte capture species to the fluid channel. The analyte capture species comprises a second functional group configured to react with the first functional group. The surface is then exposed to photo radiation and the first and second functional groups react forming a link between the analyte capture species and the anchor species on the sensing surface.
G01N 27/12 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating resistance of a solid body in dependence upon reaction with a fluid
B01L 3/00 - Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
7.
MULTI-MODAL FAR FIELD USER INTERFACES AND VISION-ASSISTED AUDIO PROCESSING
Far field devices typically rely on audio only for enabling user interaction and involve only audio processing. Adding a vision-based modality can greatly improve the user interface of far field devices to make them more natural to the user. For instance, users can look at the device to interact with it rather than having to repeatedly utter a wakeword. Vision can also be used to assist audio processing, such as to improve the beamformer. For instance, vision can be used for direction of arrival estimation. Combining vision and audio can greatly enhance the user interface and performance of far field devices.
Integrated circuits can include compound semiconductor devices having conductive components that control electrical characteristics of the compound semiconductor devices. In one or more examples, one or more conductive components can be located to increase the concentration of electrons in relation to a source electrical contact or a drain electrical contact. In one or more additional examples, a conductive component can be located to reduce the concentration of electrons in relation to a gate electrical contact. The compound semiconductor devices can include a number of compound semiconductor layers that include one or more materials having at least one Group 13 element and at least one Group 15 element.
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
Methods, and systems, are presented for a Structural Bridge for Electrically Isolated Metal Clips by mounting on a substrate a first and a second circuit. These first and second circuits can include Component on Package (CoP) electronic parts that are electrically contacted to the substrate with metal clips mounted on the surface of the substrate. The metal clips are electrically connected to respective circuit first and second circuits by an electrical connection on or in the substrate. The metal clips are folded over the respective first and second circuits. The folded-over portion of the first metal clip and the folded-over portion of the second metal clip are electrically isolated from each other. A third circuit package that is mounted on and electrically connected to a folded-over portion of the first metal clip and to a folded-over portion of the second metal clip.
G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
10.
TARGET CAPTURE AND SENSOR ASSEMBLY FABRICATION METHOD AND TARGET CAPTURE AND SENSOR ASSEMBLY
The present disclosure provides a method of fabricating a target capture and sensor assembly. The method comprises the steps of: providing a fluid path with a target capture surface comprising an anchor species with a first functional group disposed thereon; providing a target capture species to the target capture surface of the fluid path, wherein each target capture species comprises a target capture part and a second functional group configured to react with the first functional group; and exposing at least a portion of the target capture surface of the fluid path to photo radiation so as to cause a photo-initiated reaction between the first functional group and the second functional group, wherein the target capture and sensor assembly further comprises a sensing surface in the fluid path and wherein the target capture surface and the sensing surface are in fluid communication with one another.
Aspects of the present disclosure include a detection system including a base device including a power source configured to provide electrical energy to a plurality of edge nodes of a sensor network and a base data link configured to transmit a sensor interrogation signal to at least one of the plurality of edge nodes in the detection system and receive reporting information from at least one of the plurality of edge nodes, and the plurality of edge nodes sequentially coupled within the sensor network, wherein each edge node includes an edge data link configured to receive at least a portion of the electrical energy and the sensor interrogation signal, relay the at least a portion of the electrical energy and the sensor interrogation signal to a next edge node of the plurality of edge nodes, and transmit to the base device, in response to the sensor interrogation signal, the reporting information including sensor information associated with the edge node or a no selection match indication.
H04L 67/12 - Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
H04L 41/0654 - Management of faults, events, alarms or notifications using network fault recovery
H04Q 9/00 - Arrangements in telecontrol or telemetry systems for selectively calling a substation from a main station, in which substation desired apparatus is selected for applying a control signal thereto or for obtaining measured values therefrom
12.
FULLY COMPENSATED OPTICAL GAS SENSING SYSTEM AND APPARATUS
System and apparatus for robust, portable gas detection. Specifically, this disclosure describes apparatuses and systems for optical gas detection in a compact package using two optical pathways. There is a need for a very compact, low-power, gas detection system for gases such as CO2, NOx, water vapor, methane, etc. This disclosure provides an ultra-compact and highly stable and efficient optical measurement system based on principals of optical absorption spectroscopy using substantially collinear pathways.
G01N 21/3504 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using infrared light for analysing gases, e.g. multi-gas analysis
G01N 21/01 - Arrangements or apparatus for facilitating the optical investigation
13.
TRANFORMER BASED VOLTAGE REGULATOR WITH FLEXIBLE TRANS-INDUCTOR STRUCTURE
A multi-phase regulator circuit includes one or more switching converter circuits. Each switching converter circuit includes a transformer including a primary winding and a multi-segment secondary winding, a primary side switch circuit configured to connect the primary winding to an input of the multi-phase regulator circuit, and multiple secondary side circuits including multiple coupled-inductor circuits. Each coupled-inductor circuit includes a first winding magnetically coupled to a second winding. Each segment of the transformer multi-segment secondary winding is operatively coupled to the first winding of a coupled-inductor circuit and each of the first windings is connected to an output of the multi-phase regulator circuit.
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
H02M 1/14 - Arrangements for reducing ripples from dc input or output
Digital isolators operable in multiple power modes are described. The digital isolators include a low power mode, in which some circuitry of the isolator operates in a lower power state than in other mode(s) of operation or may be deactivated, and in which data communication across the isolator is not permitted. The isolator may wake from the low power mode in response to a detected event or may periodically wake. Circuitry on one side of the isolator may dictate when and how the isolator wakes from a lower power mode.
A system and method for providing a dynamic region of interest in a lidar system can include scanning a light beam over a field of view to capture a first lidar image, identifying a first object within the captured first lidar image, selecting a first region of interest within the field of view that contains at least a portion of the identified first object, and capturing a second lidar image, where capturing the second lidar image includes scanning the light beam over the first region of interest at a first spatial sampling resolution, and scanning the light beam over the field of view outside of the first region of interest at a second spatial sampling resolution, wherein the second sampling resolution is different the first spatial sampling resolution.
G01S 7/483 - RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES - Details of systems according to groups , , of systems according to group - Details of pulse systems
G01S 7/481 - Constructional features, e.g. arrangements of optical elements
G01S 17/89 - Lidar systems, specially adapted for specific applications for mapping or imaging
G01S 17/931 - Lidar systems, specially adapted for specific applications for anti-collision purposes of land vehicles
16.
SELF-ALIGNED SILICIDE GATE FOR DISCRETE SHIELDED-GATE TRENCH POWER MOSFET
Apparatus and methods for shielded-gate trench power MOSFETs are disclosed herein. The power MOSFETs are fabricated using a self-aligned gate poly silicide to achieve low gate resistance. Accordingly, the power MOSFETs can be used in high speed applications operating with fast transistor switching speeds. Moreover, the self-aligned gate poly silicide processing can be achieved in relatively few processing steps, and thus can avoid the cost and/or complexity associated with conventional silicidation techniques for trench power MOSFETs. In particular, silicidation can include applying a silicide that is self-aligned to a gate oxide without an additional mask.
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
17.
METHODS AND APPARATUS FOR DIGITAL DATA COMMUNICATION WITH BUS POWER OVER INTERCONNECTS
Aspects of the present disclosure include methods and systems for transmitting digital information including generating digital information, converting the digital information to two or more transmission signals, outputting each of the two or more transmission signals onto a respective wire of two wires of a cable for at least a first slave node, and outputting a supply current via the two wires for at least the first slave node.
The present subject matter relates to active balun circuits. An active balun circuit includes a plurality of transistors; an output transmission line connected to output terminals of the transistors; an input transmission line; and a plurality of serial capacitors coupled to an input terminal of the transistors and the input transmission line.
H03D 7/12 - Transference of modulation from one carrier to another, e.g. frequency-changing by means of semiconductor devices having more than two electrodes
Aspects of the present disclosure include a scalable proportional to absolute temperature (PTAT) hybrid circuit, comprising a bias mirror circuit configured to provide a zero temperature coefficient (ZTC) current, a PTAT control circuit configured to generate, based on the ZTC current, a PTAT current with a slope having a non-zero value, alter the PTAT current by at least scaling the PTAT current or changing the slope of the PTAT current to generate an altered PTAT current, and provide the altered PTAT current, a hybrid circuit configured to receive the ZTC current and the altered PTAT current, and output a larger current of the ZTC current and the altered PTAT current as a hybrid current.
G05F 1/567 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
A contact pin printhead for microfluidic array spot printing can include a printhead chassis with a plurality of micro-pins insertable within respective sockets in the printhead chassis. An individual micro-pin can include a micro-pin tip that can be individually biased in a distal direction toward a target substrate via an elastic mechanical biaser associated with the micro-pin. An individual micro-pin can deposit fluid carried within a cavity therein and onto a target substrate during physical contact therewith at a micro-pin tip. Also, an individual micro-pin can retain fluid carried within the cavity, without depositing, absent physical contact at the micro-pin tip.
A system for gas sensing of a biological specimen can include a chamber, such as to receive the biological specimen therewithin. The system can also include a gas sensing unit to be coupled to the chamber and separated therefrom by a moveable separator. A gas sensor included in the gas sensing unit can be selectively exposed to a fluid headspace of the first chamber, such as a gas environment associated with the biological specimen, upon modification or moving of a separator.
An incubation system for gas detection of a biological specimen can include a gas or optical sensor. The sensor can be arranged to be placed in communication with at least one biological specimen vessel for generating an electrical response signal indicating a chemical characteristic associated with the specimen. The specimen can be incubated in a temperature-controlled chamber, such as within a shelf defining a plurality of receptacles. Processing circuitry can be included or used such as to place the sensor and at least one biological specimen vessel in communication with each other.
A target gas composition, such as within ambient gas in an environment, can be detected using a gas chemical detector. A functionalized region of the gas chemical detector can be exposed to the ambient gas. The functionalized region can include an optical property indicative of the target gas composition. An optical response signal can be generated based on the optical property and indicative of the target gas composition within the ambient gas in the environment using the functionalized region. An electrical property can be electrochemically transduced, the electrical property indicative of the target gas composition into an electrical response signal. Both the electrical and optical properties can be used together to determine a presence or other characteristic of a target gas in an ambient environment, such as can be produced by a bacteria or infectious agent of interest.
Embodiments of the disclosure provide improved mismatch shaping for a digital to analog converter, the method including splitting an original input of a circuit into a plurality of time interleaved data streams; element rotation selection (ERS) logic to process the plurality of time interleaved data streams; and directing one of the plurality of time interleaved data streams to the ERS logic according to a decision of a data-weighted sigma-delta (SD) modulator. In other example implementations, the method can further include multiplexing one of the plurality of time interleaved data streams to be provided to a barrel shifter. In yet other examples, the method can include monitoring a difference between the plurality of time interleaved data streams as a basis for the directing such that a data sample rate for the digital to analog converter is reduced over a time interval.
A digital front end processor is proposed that includes a transmit channel and/or a receive channel. The digital front end processor may be a part of a multi-antenna wireless communication system or any other system including multiple data channels for which data output is to be in synchronization. The digital front end processor includes a data buffer to receive input data in synchronization with a first strobe signal and generate output data based in the input data. The digital front end processor is to synchronize the output data of transmit channels or receive channels of a plurality of digital front end processors based on a data delay applied to the input data.
Systems, devices, and methods related to wireless battery management system (wBMS) are provided. For example, a wBMS network manager comprises a memory to store a list of hardware identifiers (IDs), wherein each hardware ID in the list is associated with a respective one of a plurality of battery modules; and mapped, based on a predetermined mapping, to a different one of a plurality of source IDs; an interface to receive, from a remote battery module, a packet including a source ID and a hardware ID associated with the remote battery module; and one or more processing units to search, using the source ID in the received packet and the predetermined mapping, for a first hardware ID from the list of hardware IDs; and authenticating the remote battery module based on a comparison of the hardware ID in the received packet to the first hardware ID from the list.
A fluid sensor cartridge that can be used to monitor composition of constituent materials or characteristics of a sample fluid or a patient's blood. The fluid sensor cartridge can be connected in-line with a medical device during a medical treatment. The fluid sensor cartridge can utilize one or more valves, one or more channels, and one or more reservoirs to enable sampling, sensing, and calibrating of a sample fluid or a patient's blood in one container with minimal amounts of sample/blood and calibration fluid.
Apparatus and methods for frequency compensation of amplifiers are provided herein. In certain embodiments, an amplifier includes an input transistor (which can be part of a differential input pair) electrically connected to a first node, a folded cascode transistor electrically connected between the first node and a second node, a current source electrically connected to a third node, a current source transistor electrically connected between the third node and the first node, a first output transistor having an input (for example, a gate) electrically connected to the second node and an output (for example, a drain) electrically connected to a fourth node, and a frequency compensation capacitor electrically connected between the fourth node and the third node.
H03F 1/22 - Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively
H03F 1/42 - Modifications of amplifiers to extend the bandwidth
29.
TECHNIQUE FOR ESTIMATION OF INTERNAL BATTERY TEMPERATURE
One embodiment is a method for estimating an internal temperature of a battery, the method comprising obtaining multiple terminal impedance measurements, wherein each of the terminal impedance measurements is taken at a different one of a plurality of frequencies; determining model parameters for a multivariable polynomial regression model; and applying the multivariable polynomial regression model to the multiple terminal impedance measurements to estimate the internal temperature of the battery.
A network node device of an area network includes physical layer (PHY) circuitry configured to transmit and receive frames of data via a communication link of the communication network; medium access layer (MAC) circuitry; a receive interface between the PHY circuitry and the MAC circuitry, and timestamp circuitry. The receive interface includes a receive clock signal and a DLL. The timestamp circuitry is configured to produce multiple sample signals derived from the receive clock signal using the DLL and a local clock signal of the network node, and produce a timestamp offset using the multiple sample signals. The timestamp offset is representative of an instantaneous phase offset between a local clock of the network node and a local clock of a neighbor node of the network node.
A gyroscope includes a substrate, a proof mass coupled to the substrate and configured to move in direction of an X axis and in direction of a Y axis orthogonal to the first axis, an X axis shuttle to selectively drive the proof mass along the X axis as a drive axis or sense movement of the proof mass along the X axis as a sense axis in response to the proof mass driven along the Y axis as the drive axis, and a Y axis shuttle to selectively sense movement of the proof mass along the Y axis as a sense axis in response to the proof mass driven along the X axis or drive the proof mass along the Y axis as the drive axis. The X axis shuttle is symmetric to the Y axis shuttle along a diagonal axis that is diagonal to both the X axis and the Y axis. The X and Y axis shuttles have gaps designed for a predetermined DC voltage to generate spring softening (negative cubic nonlinearity) that is equal to spring hardening (positive cubic nonlinearity), ensuring linear motion at high amplitudes (⅓ of the capacitive gap).
G01C 19/5712 - Turn-sensitive devices using vibrating masses, e.g. vibratory angular rate sensors based on Coriolis forces using masses driven in reciprocating rotary motion about an axis the devices involving a micromechanical structure
32.
SYNCHRONOUS AUDIO COMMUNICATION AND BUS POWER OVER MULTI-PAIR CABLES AND CONNECTORS
In some examples of both networks and methods, a data communication network includes a plurality of nodes. The nodes include a main node (MN) and at least one sub node (SNi=SN0, . . . SNX). Each node includes a node transceiver. The node transceiver is operable to perform data communication in accordance with a first network protocol for power over data via a pair of conductors (e.g., the conductors of bus). A physical layer includes a cable segment (e.g., the cable segment of bus) between each node. Each cable segment includes a plurality of pairs of conductors (e.g., pairs) and a connector (e.g., 8P8C connector—though other connectors with multiple pairs of conductors can be used) at each end. A first pair of the conductors (e.g., connected to pin 4 and pin 5 of the 8P8C connector) implements the first network protocol between the nodes. One or more of the remaining pairs of the conductors provide supplemental power to the nodes 102.
A network includes nodes. The nodes include a main node (MN) and a plurality of sub nodes (SNi=SN0, . . . SNX). Each node includes a node transceiver that is operable to perform data communication in accordance with a first network protocol. Each node transceiver includes and a positive power contact (V+) and a negative power contact (V−) operable to power the node transceiver to perform the data communication. The data communication network includes a two conductor combined power and data physical layer/medium. The physical layer connects the SN0 V+ to a bus power source positive power contact (VS+) in a first conductive path. The physical layer connects the MN V− and SNX V− to the bus power source negative power contact (VS−) in a second conductive path. The physical layer connects each SNi V−, for i=0 to X−1, to the SNi+1 V+ in the first conductive path.
A fully symmetrical and balanced monolithic or multi-die integrated circuit transformer device is described. The device can comprise a first and second transformer. The first and second transformer can each comprise a symmetrical bottom coil including electrically conductive crossovers between individual windings of pairs of adjacent windings. Each of the bottom coils can further comprise a first, a second differential terminal, and a center tap third terminal electrically connected to the inner-most winding of the bottom coil. Each transformer can further comprise a spiral top coil electrically connected to an encompassed inner pad and a laterally offset outer pad, the top coil, inner pad, and outer pad including a shared electrically conductive integrated circuit layer. The respective top coils of each transformer can be overlaid and separated from the respective bottom coils by an electrically insulating dielectric layer.
Apparatus and methods for logarithmic current to voltage conversion are disclosed herein. In certain embodiments, a logarithmic current to voltage converter includes an input terminal that receives an input current, an output terminal that provides a logarithmic output voltage, a first field-effect transistor (FET) having a gate connected to the input terminal, a first bipolar transistor having a collector connected to the input terminal and an emitter connected to the output terminal, and a stacked transistor connected to the output terminal and to the first FET to form a feedback loop. For example, the stacked transistor can correspond to a second bipolar transistor having a collector connected to the output terminal and a base connected to the source of the first FET, or to a second FET having a drain connected to the output terminal and a gate connected to the source of the first FET.
G05F 1/59 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load
G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc
H01L 31/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof - Details
Apparatus and methods for control and calibration of external oscillators are provided herein. In certain embodiments, an electronic oscillator system includes a semiconductor die and a controllable oscillator that is external to the semiconductor die. The oscillation frequency of the controllable oscillator is tuned by a first varactor and a second varactor. The semiconductor die includes a phase-locked loop (PLL) that provides fine tuning to the controllable oscillator by controlling the first varactor, and a calibration circuit that provides coarse tuning to the controllable oscillator by controlling the second varactor.
H03L 7/099 - Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
H03L 1/02 - Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only
H03L 7/189 - Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop comprising a D/A converter for generating a coarse tuning voltage
Processes for using a capacitive sensor to control drug delivery are described. The capacitive sensor measures a capacitance across a pair of electrodes arranged along either side of a container. The container includes an air chamber, a fluid chamber, and a stopper separating the air chamber from the fluid chamber. A volume of drug in the fluid chamber may be determined based on the measured capacitance. The volume is compared to a target volume, and if the volume in the fluid chamber is greater than the target volume, a stopper actuator expels a portion of the drug from the fluid chamber.
A method of automatically detecting delay due to cable length between network nodes coupled to a two-wire communication bus of a network. The method includes establishing, by a first node of the network, a first specified delay value of a variable delay setting; discovering a next node on the communication bus using a variable delay setting including the delay setting established at the first specified delay value; after discovering the next node, changing the variable delay setting until the next node drops off the communication bus at a second specified delay value of the variable delay setting; and setting a communication delay setting between the first node and the next node using the first and second specified delay values.
Electrostatic discharge protection for high speed transceiver interface is disclosed. In one aspect, an electrical overstress (EOS) protection device includes an anode terminal and a cathode terminal, a silicon controlled rectifier, a second NPN bipolar transistor including a base connected to the anode terminal and an emitter connected to an emitter of the first PNP bipolar transistor, and a second PNP bipolar transistor including an emitter connected to an emitter of the second NPN bipolar transistor and a base connected to a base of the first PNP bipolar transistor. Two or more paths for current conduction are present during a positive overstress transient that increases a voltage of the anode terminal relative to the cathode terminal, including a first path through the silicon controlled rectifier and a second path through the second NPN bipolar transistor and the second PNP bipolar transistor.
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
40.
NODE DISCOVERY AND CONFIGURATION IN A DAISY-CHAINED NETWORK
Disclosed herein are systems and techniques for node discovery and configuration in a daisy-chained network. For example, in some embodiments, a main node may “auto-discover” the topology and identity of sub nodes in a daisy-chained network so that changes in the topology may be readily adapted to without substantial interruptions in data transfer in the network.
H04L 41/12 - Discovery or management of network topologies
H04L 41/0816 - Configuration setting characterised by the conditions triggering a change of settings the condition being an adaptation, e.g. in response to network events
A sensor module is disclosed. The sensor module can include a housing body that is disposed about a cavity that is sized and shaped to receive a container in which a substance is disposed in an operational configuration of the sensor module. The sensor module can include a first electrode that is coupled to or formed with the housing body. The first electrode is disposed at a first peripheral position on the housing body. The sensor module can include a second electrode that is coupled to or formed with the housing body. The second electrode is disposed at a second peripheral position on the housing body that is opposite the first peripheral position. The cavity is disposed between the first and second electrodes in the operational configuration of the housing body.
G01F 11/02 - Apparatus requiring external operation adapted at each repeated and identical operation to measure and separate a predetermined volume of fluid or fluent solid material from a supply or container, without regard to weight, and to deliver it with measuring chambers which expand or contract during measurement
A61M 5/315 - Pistons; Piston-rods; Guiding, blocking or restricting the movement of the rod; Appliances on the rod for facilitating dosing
Systems and methods are provided for operating an electrolyzer. The systems and methods perform operations comprising obtaining a plurality of impedance measurements of the plurality of electrolytic cells at a plurality of frequencies; tracking changes to the plurality of impedance measurements of the plurality of electrolytic cells over a time period; and generating, based on the changes to the plurality of impedance measurements, a model representing operating conditions of the electrolytic cells on an individual electrolytic cell basis.
During gallium nitride (GaN) semiconductor fabrication, a nucleation layer, e.g., aluminum nitride (AlN) may be formed superjacent a substrate, e.g., silicon carbide (SiC). Next, a semiconductor layer, such as including GaN, may be formed over the nucleation layer. This disclosure describes various techniques for forming a thick enough layer of gallium nitride (GaN) to ensure complete coalescence and minimal surface roughness, then removing the excess GaN until a desired thickness is achieved. In some examples, the GaN removal may be performed by desorption, such as may be performed in-situ by using hydrogen gas close to the growth temperature.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
Herein disclosed are multiple embodiments of a signal-processing circuit that may be utilized in various circuits, including conversion circuitry. The signal-processing circuit may receive an input and produce charges on multiple different capacitors during different phases of operation based on the input. The charges stored on two or more of the multiple different capacitors may be utilized for producing an output of the signal-processing circuit, such as by combing the charges stored on two or more of the multiple different capacitors. Utilizing the charges on the multiple different capacitors may provide for a high level of accuracy and robustness to variations of environmental factors, and/or a low noise level and power consumption when producing the output.
A sensor system that obtains and processes time-of-flight data (TOF) obtained in an arbitrary orientation is provided. A TOF sensor obtains distance data describing various surfaces. A processor identifies a horizontal Z-plane in the environment, and transforms the data to align with the Z-plane. In some embodiments, the environment includes a box, and the processor identifies a bottom and a top of the box in the transformed data. The processor can further determine dimensions of the box, e.g., the height between the top and bottom of the box, and the length and width of the box top.
Battery monitoring techniques, which consume low amounts of power, are described herein. The battery monitoring techniques can be used when the host device (e.g., electric vehicle) is not operating, thus providing a time to use low power techniques. Measurement devices can measure system parameters when a host processor is off or in a low power mode using a heartbeat (HB) sequencing technique. Based on the HB message, the host processor can be alerted and awakened when a fault is detected.
Aspects of the embodiments are directed to auxiliary communication over a pulse density modulated (PDM) interface. Systems utilize a PDM interface between a sigma-delta modulator and a decimation filter to transmit data between devices. In some examples, the PDM interface is used to add non-PDM coded data communication between devices. Devices having a sigma-delta modulator can include microphones and accelerometers. Devices having a decimator can include digital signal processors (DSPs), microcontrollers, and audio codecs. In some examples, non-PDM coded data can be communicated between microphones and a node in a two-wire communication system, between a microphone and a digital signal processor (DSP), or between two microphones.
One embodiment is a baseline restoration (“BLR”) circuit for a photo-counting computed tomography (“PCCT”) signal chain, the BLR circuit comprising a comparator for comparing a shaper voltage output from a shaper component of the PCCT signal chain with a baseline voltage, the comparator outputting a single bit indicative of whether the shaper voltage is above or below the baseline voltage; a low pass filter connected to filter a voltage signal output from the comparator; and a transconductor connected to receive a filtered voltage signal output from the low pass filter, convert the filtered voltage signal to a current signal, and feed the current signal back to an input of the PCCT signal chain.
G01N 23/046 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by transmitting the radiation through the material and forming images of the material using tomography, e.g. computed tomography [CT]
49.
DIGITAL PREDISTORTION WITH NEURAL-NETWORK-ASSISTED PHYSICAL MODELING OF ENVELOPE FEATURES
Systems, devices, and methods related to envelope regulated, digital predistortion (DPD) are provided. An example apparatus includes an envelope regulator circuit to process, based on a parameterized model, an input signal to generate an envelope regulated signal; a digital predistortion (DPD) actuator circuit to process the envelope regulated signal and the input signal based on DPD coefficients associated with a nonlinearity characteristic of a nonlinear component; and a DPD adaptation circuit to update the DPD coefficients based on a feedback signal indicative of an output of the nonlinear component.
H03F 1/32 - Modifications of amplifiers to reduce non-linear distortion
G05B 13/02 - Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric
50.
Electromagnetic connector for for an industrial control system
An electromagnetic connector is disclosed that is configured to form a first magnetic circuit portion comprising a first core member and a first coil disposed of the first core member. The electromagnetic connector is configured to mate with a second electromagnetic connector, where the second electromagnetic connector is configured to form a second magnetic circuit portion comprising a second core member and a second coil disposed of the second core member. The first core member and the second core member are configured to couple the first coil to the second coil with a magnetic circuit formed from the first magnetic circuit portion and the second magnetic circuit portion when the electromagnetic connector is mated with the second electromagnetic connector. The magnetic circuit is configured to induce a signal in the first coil when the second coil is energized.
G06F 13/20 - Handling requests for interconnection or transfer for access to input/output bus
G06F 13/364 - Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
G06F 13/42 - Bus transfer protocol, e.g. handshake; Synchronisation
G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
G06F 15/173 - Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star or snowflake
An electromagnetic connector is disclosed that is configured to form a first magnetic circuit portion comprising multiple coils disposed about a first core member. The electromagnetic connector is configured to mate with a second electromagnetic connector that is configured to form a second magnetic circuit portion comprising a coil disposed about a second core member. When the electromagnetic connector is mated with the second electromagnetic connector, the first core member and the second core member are configured to couple the multiple coils of the electromagnetic connector to the coil of the second electromagnetic connector with a magnetic circuit formed from the first magnetic circuit portion and the second magnetic circuit portion. The magnetic circuit is configured to induce a signal in a first coil of the multiple coils and the coil of the second electromagnetic connector when a second coil of the multiple coils is energized.
H02J 50/80 - Circuit arrangements or systems for wireless supply or distribution of electric power involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices
An analog-to-digital converter (ADC) system, such as a subranging ADC, including a cascade of buffer circuits and signal processing circuitry to measure and cancel the distortion introduced by the buffer circuits. Thus, buffer circuits can be added to the signal path of an input signal without the detrimental effects, such as added distortion, that typically accompany the addition of buffers.
H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
A connector assembly is disclosed. The connector assembly can include first and second connectors. The first connector can include a first electronic component mounted on a first component mount region of the first substrate. The second connector can include a second electronic component mounted on a second component mount region of the second substrate. The first connector and the second connector have different profiles from each other as seen from a top plan view, and can have wider middle portions that overlap when assembled. The first connector can be configured to connect to a sensor panel and a first external substrate or component. The second connector can be configured to connect to the sensor panel and a second external substrate or component.
Herein disclosed in some embodiments is a fault detector for power amplifiers of a communication system. The fault detector can detect a portion of the power amplifiers that are in fault condition and can prevent or limit current flow to the power amplifiers in fault condition while allowing the rest of the power amplifiers to operate normally. The fault detector can further indicate which power amplifiers are in fault condition and/or the cause for the power amplifiers to be in fault condition. Based on the indication, a controller can direct communications away from the power amplifiers in fault condition and/or perform operations to correct the fault condition.
The present disclosure provides designs and techniques to improve turn “off” times of a bootstrapped switch, maximizing the total “on” time of the bootstrapped switch. The techniques described herein provide a protection device coupled to the bootstrapped switch. The protection device may be controlled by an input voltage to the bootstrapped switch during a boosting phase and may be controlled by a constant voltage during a non-boosting phase. The techniques for reducing turn “off” times are particularly useful in high-speed applications, such as high-speed, low-voltage analog-to-digital converters.
H03K 3/017 - Adjustment of width or dutycycle of pulses
H03K 17/041 - Modifications for accelerating switching without feedback from the output circuit to the control circuit
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
A low-profile coupled inductor is disclosed to provide compact and high performance magnetic coupling. The low-profile coupled inductor has an asymmetrical geometry, having a pair of complementary ferrite cores supporting a pair of conducting strips in an alternating serpentine pattern. One or more core gaps exist between the cores to create a strong flux coupling between adjacent magnetic fields of either conducting strip. The alternating serpentine conductors and core gaps serve to increase energy transfer between the magnetic fields and improve the overall power density of the low-profile coupled inductor.
H01F 27/26 - Fastening parts of the core together; Fastening or mounting the core on casing or support
H01F 41/02 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets
57.
QUADRATURE TRIM VERTICAL ELECTRODES FOR YAW AXIS CORIOLIS VIBRATORY GYROSCOPE
Microelectromechanical systems (MEMS) yaw gyroscopes having out-of-plane quadrature trim electrodes are described. The gyroscope includes a proof mass configured to be driven in-plane. The proof mass includes an opening, or a plurality of openings. The out-of-plane quadrature trim electrodes are positioned to laterally overlap edges of the opening in a projection plane. The out-of-plane quadrature trim electrodes trim in-plane motion of the proof mass in one or two directions to limit quadrature motion. The out-of-plane quadrature trim electrodes may be arranged in a symmetric pattern to enable mode switching.
G01C 19/5712 - Turn-sensitive devices using vibrating masses, e.g. vibratory angular rate sensors based on Coriolis forces using masses driven in reciprocating rotary motion about an axis the devices involving a micromechanical structure
Aspects of the present disclosure include a hybrid circuit, including a first current sink configured to sink a zero temperature coefficient (ZTC) current, a second current sink configured to sink a positive temperature coefficient (PTC) current, a first transistor configured to provide a first current, a second transistor configured to provide a second current, a third transistor configured to provide a third current mirroring the ZTC current, a fourth transistor configured to provide a sum current of the first current and the third current, and a current mirror configured provide a hybrid current mirroring the sum current.
G05F 3/16 - Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
G05F 1/567 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
Aspects of the present disclosure include aligning multiple three-dimensional (3D) point clouds into a common 3D point cloud. A first subset of points within a first 3D point cloud generated from one time-of-flight (TOF) view can be associated with a second subset of points within a second 3D point cloud generated from another TOF view based on each point in the first subset of points having a threshold correspondence to a unique counterpart point in the second subset of points. The first subset of points and the second subset of points can be refined, and a relative rotation and translation between the first 3D point cloud and the second 3D point cloud can be determined. The first 3D point cloud and the second 3D point cloud can be aligned within a common coordinate system based on the relative rotation and translation.
An electronic device is disclosed. The electronic device can include a molded integrated device package, where the molded integrated device package comprising a substrate, at least one electronic element mounted to the substrate, and a molding compound in which the electronic element is at least partially embedded, a slot formed through the molding compound. The integrated package can include a conductor comprising a horizontal section and a vertical section extending nonparallel from the horizontal section, the horizontal section having a lower side attached by an adhesive to an upper portion of the molding compound and the vertical section inserted into the slot and electrically connected to the substrate or to pads on the substrate by a conductive adhesive, such as solder.
H01L 23/367 - Cooling facilitated by shape of device
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
61.
TRANS-INDUCTOR VOLTAGE REGULATOR CURRENT SENSING TECHNIQUES
Several current sensing techniques are described that may be used to obtain an accurate current signal, which may help to achieve the best performance with a trans-inductor voltage regulator (TLVR) topology. The techniques may have the coupling effect from the secondary side included, so the current sensing signal is accurate for the regulation and other functions related to the current signal. The current sensing techniques may have more accurate gain and phase information in the middle frequency and high frequency ranges. The coupling effect from the secondary side may be well represented in the current sensing signal. The advantages of TLVR topology may be enhanced with accurate current information.
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
One embodiment is a method for binning charge events in a photon-counting CT scanning system comprising a plurality of discriminators, wherein each discriminator is associated with a respective one of a plurality of threshold voltage levels, the method comprising detecting a transition in a signal output from one of the discriminators; and incrementing a count corresponding to the threshold voltage level associated with the one of the discriminators only if the detected discriminator output signal transition was immediately preceded by an opposite transition in the discriminator output signal.
Systems and apparatus for phase calibration in time-of-flight cameras. In particular, systems and methods are presented for a miniaturized cover design that at least partially encloses the time-of-flight (ToF) module. The geometry of the miniaturized design causes the signals reflected from the calibration device back to the ToF imager to have essentially the same time-of-flight. The design of the calibration device prevents the modulated emissions from leaking out to the environment.
A semiconductor device includes a layer of a first semiconducting material, where the first semiconducting material is epitaxially grown to have a crystal structure of a first substrate. The semiconductor device further includes a layer of a second semiconducting material disposed adjacent to the layer of the first semiconducting material to form a heterojunction with the layer of the first semiconducting material. The semiconductor device further includes a first component that is electrically coupled to the heterojunction, and a second substrate that is bonded to the layer of the first semiconducting material.
H01L 29/205 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds in different semiconductor regions
Aspects of the present disclosure include obtaining images from a time-of-flight (TOF) sensor for determining dimensions of an object including obtaining, from the TOF sensor, multiple images including the object, validating whether the multiple images are taken at desired poses relative to the object, and where the multiple images are validated as taken at the desired poses, providing the multiple images for object dimensioning to compute or display dimensions of the object.
Device for improving an optical detecting smoke apparatus and implementing thereof. Apparatus and methods for detecting the presence of smoke in a small, long-lasting smoke detector are disclosed. Specifically, the present disclosure shows how to build one or more optimized blocking members in a smoke detector to augment signal to noise ratio. This is performed while keeping the reflections from the housing structure to a very low value while satisfying all the other peripheral needs of fast response to smoke and preventing ambient light. This allows very small measurements of light scattering of the smoke particles to be reliable in a device resistant to the negative effects of dust. In particular, geometrical optical elements, e.g., cap and optical deflection elements, are disclosed.
Multiple transmit and receive channels in a communication transceiver may be dynamically configured using corresponding channel registers. In order to support fast frequency hopping, arbitrary sample rate change or profile switching, the present disclosure proposes a profile-based direct memory access (PDMA) that can be used to transfer data from a memory and program specific profile registers in a randomly accessed addressing manner. PDMAs can offload the system processor from reprogramming many system registers based on external or internal events in a multi channels communication system. Furthermore, a PDMA based DMA controller is proposed to configure the fast frequency hopping registers of the transceiver based on PDMA.
Aspects described herein relate to estimating mean arterial pressure (MAP) of a living being. The estimating may include obtaining pulsatile arterial blood pressure (pABP) waveform, obtaining arterial blood flow (ABF) waveform, identifying a set of segments of the pABP waveform in steady state, identifying a set of segments of the ABF waveform in steady state, and estimating the MAP based on the identified segment of the pABP waveform in steady state and the identified segment of the ABF waveform in steady state
Aspects of the present disclosure include isolating a target scene object from multiple images of a time-of-flight (TOF) sensor. Multiple images from a TOF sensor can be transformed into multiple three-dimensional (3D) point clouds. In each of the multiple 3D point clouds, one or more large planes having a minimal threshold size can be identified. A common 3D point cloud can be generated by aligning rotated and translated point clouds corresponding to at least a portion of the multiple 3D point clouds. The common 3D point cloud can be rotated and translated to have one of one or more large planes identified as a ground plane within a common coordinate system of the common 3D point cloud, and a target object can be isolated.
Aspects of the present disclosure include obtaining images from a time-of-flight (TOF) sensor for determining dimensions of an object. A prompt to capture at least one image of an object can be displayed on an interface. At least one image of the object can be captured based on an interaction with the prompt. It can be determined whether multiple images including the at least one image are sufficient for performing object dimensioning, and if so, the images can be provided for performing object dimensioning to compute or display dimensions of the object.
A device emitting mid-infrared light that comprises a semiconductor substrate of GaSb or closely related material. The device can also comprise epitaxial heterostructures of InAs, GaAs, AISb, and related alloys forming light emitting structures cascaded by tunnel junctions. Further, the device can comprise light emission from the front, epitaxial side of the substrate.
H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
H01L 31/024 - Arrangements for cooling, heating, ventilating or temperature compensation
H01L 31/0352 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
H01L 31/0232 - Optical elements or arrangements associated with the device
Apparatus and methods for clock synchronization and frequency translation are provided herein. Clock synchronization and frequency translation integrated circuits (ICs) generate one or more output clock signals having a controlled timing relationship with respect to one or more reference signals. The teachings herein provide a number of improvements to clock synchronization and frequency translation ICs, including, but not limited to, reduction of system clock error, reduced variation in clock propagation delay, lower latency monitoring of reference signals, precision timing distribution and recovery, extrapolation of timing events for enhanced phase-locked loop (PLL) update rate, fast PLL locking, improved reference signal phase shift detection, enhanced phase offset detection between reference signals, and/or alignment to phase information lost in decimation.
H03L 7/107 - Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop - Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
H03L 7/08 - Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop - Details of the phase-locked loop
G06F 1/12 - Synchronisation of different clock signals
Techniques are described for forming a sealed cavity within a semiconductor wafer, where a conductor wafer includes a structure, such as a T-gate electrode or passive component, formed over a substrate. The sealed-cavity structure may be embedded into the wafer without interfering with any subsequent processes. That is, once the cavity is closed, any subsequent backend processes may continue as usual.
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
Herein disclosed are approaches for protecting sensitive information within a fingerprint authentication system that can be snooped and utilized to access the device, secured information, or a secured application. The approaches can utilize encryption keys and hash functions that are unique to the device in which the fingerprint authentication is being performed to protect the sensitive information that can be snooped.
G06F 21/57 - Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
G06F 21/62 - Protecting access to data via a platform, e.g. using keys or access control rules
G06F 21/83 - Protecting input, output or interconnection devices input devices, e.g. keyboards, mice or controllers thereof
According to some aspects, there is provided a microelectromechanical systems (MEMS) device wherein one or more components of the MEMS device exhibit attenuated motion relative to one or more other moving components. The MEMS device may comprise a substrate; a proof mass coupled to the substrate and configured to move along a resonator axis; and a first shuttle coupled to the proof mass and comprising one of a drive structure configured to drive the proof mass along the resonator axis or a sense structure configured to move along a second axis substantially perpendicular to the resonator axis in response to motion of the proof mass along the resonator axis, wherein displacement of at least a first portion of the proof mass is attenuated relative to displacement of the first shuttle and/or a second portion of the proof mass.
G01C 19/5712 - Turn-sensitive devices using vibrating masses, e.g. vibratory angular rate sensors based on Coriolis forces using masses driven in reciprocating rotary motion about an axis the devices involving a micromechanical structure
76.
APPARATUS AND METHODS FOR SWITCH-MODE POWER SUPPLY START-UP
Apparatus and methods for switch-mode power supply start-up are provided herein. In certain embodiments, a switch-mode power supply includes an inductor and one or more power switches used to control a current through the inductor to provide voltage regulation. The switch-mode power supply uses external voltage levels to regulate one or more internal control signals (for example, for opening or closing the one or more power switches) to their zero output current switching state at the appropriate switch duty cycle. Furthermore, the switch-mode power supply can be implemented to provide a first pulse timing signal to establish the inductor current waveform for zero net output current delivery to a load.
H02M 1/36 - Means for starting or stopping converters
H02M 3/157 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
77.
METHODS FOR USING A SURFACE ACOUSTIC WAVE RESONATOR FOR AUTOMOBILE SECURITY
Remote keyless entry (RKE) systems and devices are described. The RKE devices include one or more passive radios that respond to an interrogation signal from an interrogating device such as a vehicle. The passive radio sends a responsive signal that can include a decaying portion representing a ringdown signal. The passive radio includes a SAW resonator in some situations.
A MEMS device is provided comprising a mass configured to move along a first axis and a second axis substantially perpendicular to the first axis; a drive structure coupled to the mass and configured to cause the mass to move along the first axis; a sense structure coupled to the mass and configured to detect motion of the mass along the second axis; a stress relief structure coupled to one of the drive structure or the sense structure; and at least one anchor coupled to an underlying substrate of the MEMS device, wherein the stress relief structure is coupled to the at least one anchor and the at least one anchor is disposed outside of the stress relief structure.
G01C 19/5712 - Turn-sensitive devices using vibrating masses, e.g. vibratory angular rate sensors based on Coriolis forces using masses driven in reciprocating rotary motion about an axis the devices involving a micromechanical structure
Techniques for setting a gain of an amplifier circuit in which the external resistor of the amplifier circuit is used to determine an internal gain setting to select. A voltage across the external resistor can be compared to an on-chip reference, and then used to program the desired gain. The techniques can mitigate or eliminate the need for a high-accuracy external resistor and can allow substantial improvements in initial gain accuracy and gain drift for existing boards and/or systems with only a bill of material change.
Technologies are provided for identification of closed-loop gain response and compensation of power supply devices. In an aspect, a computing device can receive data indicative of a transient output voltage of a power supply device. The computing device also can determine frequency-domain loop response of a control loop of the power supply device by applying a machine-learned model to the data indicative of the transient output voltage. In addition, or in other aspects, the computing device also can adjust one or multiple compensation component(s) of the power supply device in order to achieve a satisfactory performance during operation of the power supply device.
Techniques that enable calibration of digital-to-analog Converters (DACs) with minimal processing overhead. A single frequency bin can be used to calibrate errors between bits. A low frequency feedback path can be included into a low frequency low power ADC to determine the error signal that exists in the calibration bin. The bits are calibrated when this error signal is minimized. The calibration techniques described provide an extremely efficient and optimal calibration at the DAC output of both static and dynamic errors.
A method of providing cyber security to an industrial control system is described. The method includes detecting an anomaly and recording and reporting the detected anomaly to a control system within a network associated with the industrial control system. Detecting the anomaly may include recording all unauthorized attempts to connect to a communication port in the network, capturing identifying information associated with the unauthorized attempts, detecting scanning activity of a hacker in the network, detecting an attempt to manipulate a log file to conceal malicious activity in the network; and recording and reporting the detected anomaly to a controller within the network
G05B 19/418 - Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control (DNC), flexible manufacturing systems (FMS), integrated manufacturing systems (IMS), computer integrated manufacturing (CIM)
84.
DUAL-PHASE COUPLED INDUCTOR WITH DIAGONALLY OVERLAPPED WINDINGS AND GAP CONTROLLED INVERSE COUPLING
A low-profile dual-phase inverse coupled inductor structure can include diagonally overlapped windings and gap controlled inverse coupling, such as can be useful to help achieve strong negative coupling and high saturation current for POL applications. The device may include a coupled inductor structure comprising a first magnetic core piece, and a conductive first winding portion on at least a portion of the first magnetic core piece. An electrical insulator may be included on at least a portion of the first winding portion and a conductive second winding portion may be located such as to cover the insulator. At least a portion of the second winding portion overlaps, and may be separated by the insulator from, at least an underlying portion of the first winding portion. A second magnetic core piece may be located on the second winding portion.
A device may include a coupled inductor structure comprising a first winding portion, a second winding portion, and a magnetic core structure. The magnetic core structure may include a first and second core piece that are at least partially cross-sectionally U-shaped. A first connecting core piece may be attached to a first portion of the first core piece to a first portion of the second core piece, and a second connecting core piece may attach a second portion of the first core piece to a second portion of the second core piece.
H01F 27/30 - Fastening or clamping coils, windings, or parts thereof together; Fastening or mounting coils or windings on core, casing, or other support
H01F 41/02 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets
An apparatus including a bidirectional power converter circuit. The power converter circuit includes a primary circuit side including a plurality of primary switches, an isolation transformer, and a secondary circuit side separated from the primary circuit side by the isolation transformer. The secondary circuit side includes an inductor, a rectifier circuit coupled to the inductor and configured to receive energy from the primary circuit side and provide energy to the primary circuit side, and a clamp circuit coupled to the inductor and configured to provide a reset voltage to the inductor that prevents inductor current runaway.
H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
An analog-to-digital (ADC) converter system and method of using the system that can be used in low power situations. The converter can periodically or recurrently turn off a reference standard in order to conserve power and instead using a stable supply source as a reference voltage. A precise conversion for signal from the analog to the digital domain while maintaining a low quiescent current.
Packaging of microfabricated devices, such as integrated circuits, microelectromechanical systems (MEMS), or sensor devices is described. The packaging is 3D heterogeneous packaging in at least some embodiments. The 3D heterogeneous packaging includes an interposer. The interposer includes stress relief platforms. Thus, stresses originating in the packaging do not propagate to the packaged device. A stress isolation platform is an example of a stress relief feature. A stress isolation platform includes a portion of an interposer coupled to the remainder of the interposer via stress isolation suspensions. Stress isolation suspensions can be formed by etching trenches through the interposer.
In one embodiment, an electronic assembly can include: a first electronic device package configured to be mounted on and electrically connected with a system substrate; a second electronic device package electrically connected to the system substrate; and an electrical pathway configured to extend from the system substrate through the first electronic device package and connected to an input terminal of the second electronic device package, the electrical pathway bypassing processing circuitry of the first electronic device package.
Circuit techniques for providing base-current cancellation of a bipolar junction transistor (BJT) differential pair that compensate for tail current noise and differential voltage transients without penalizing supply headroom.
A signal conditioning circuit to reduce detrimental effects of analog circuit elements. The techniques described herein provide a cascade of buffer circuits and signal processing circuitry to measure and cancel the distortion introduced by the buffer circuits. Thus, a buffer can be added to the signal path of an input signal without the detrimental effects, such as added distortion, that typically accompany the addition of buffers.
H03K 5/1252 - Suppression or limitation of noise or interference
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
A sample testing device is disclosed. The sample testing device can include a first compartment that is configured to receive a test sample, a second compartment that is configured to receive the test sample, a separator that is disposed between and separating the first compartment and the second compartment, and a mechanical lock structure that is configured to lock and unlock a movement of the separator. When the mechanical lock is unlocked, the separator opens to transfer the test sample from the first compartment to the second compartment. The sample testing device can include a sensing assembly.
One embodiment is a method for counting charge events detected by a pixel in a photon-counting computed tomography (PCCT) scanning system comprising a plurality of discriminators, wherein each discriminator is associated with a respective one of a plurality of threshold voltage levels. The method includes detecting a signal output from one of the discriminators; incrementing a quantitative count corresponding to the threshold voltage level associated with the one of the discriminators if the detected discriminator output signal meets a first condition; and incrementing a qualitative count if the detected discriminator output signal meets at least one second condition.
A multiple operating-mode comparator system can be useful for high bandwidth and low power automated testing. The system can include a gain stage configured to drive a high impedance input of a comparator output stage, wherein the gain stage includes a differential switching stage coupled to an adjustable impedance circuit, and an impedance magnitude characteristic of the adjustable impedance circuit corresponds to a bandwidth characteristic of the gain stage. The comparator output stage can include a buffer circuit coupled to a low impedance comparator output node. The buffer circuit can provide a reference voltage for a switched output signal at the output node in a higher speed mode, and the buffer circuit can provide the switched output signal at the output node in a lower power mode.
H03K 5/24 - Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
Apparatus and methods for high-speed drivers are provided herein. In certain embodiments, a high-speed driver multiplexes two or more data streams. The high-speed driver is implemented with a mux-then-driver topology that provides multiplexing in a predriver circuit. Thus, the multiplexer is eliminated from the full rate output path to relax timing. Driver amplitude control schemes are also disclosed in which a controllable driver includes a group of differential series source transistor (SST) driver slices that are connected in parallel with one another to drive a pair of output terminals, and a group of attenuator slices that are connected in parallel with one another across the pair of output terminals. Additionally, the controllable driver includes a control circuit that activates an attenuator slice for each SST driver slice that is decommissioned to provide output amplitude control.
Technologies described herein include a programmable power module for a light detection and ranging (LiDAR) system. In some aspects, the programmable power module includes circuitry that supplies a bias voltage to a photodetector array, and a programmable interface comprising a serial interface and multiple configurable ports. Each one of the multiple configurable ports is configured as one of a digital-to-analog converter (DAC) output port, an analog-to-digital converter (ADC) input port, a digital output port, or a digital input port. The serial interface can be configured to receive program code defining a control voltage that causes the circuitry to set the bias voltage. A first configurable port of the multiple configurable ports can be connected to the circuitry and can be configured as a first DAC output port that outputs the control voltage to the circuitry.
A sensor system that obtains and processes time-of-flight data (TOF) is provided. A TOF sensor obtains raw data describing various surfaces. A processor applies an averaging filter to the raw data to smooth the raw data for increasing signal-to-noise ratio (SNR) of flat surfaces represented in the raw data, performs a depth compute process on the raw data, as filtered, to generate distance data, generates a point cloud based on the distance data, and identifies the Z-planes in the point cloud.
Systems, devices, and methods related to audio systems for providing personalized audio zones are provided. An example audio system includes a first speaker to transmit an ultrasonic signal modulated by a first portion of a first audio signal. The audio system further includes a second speaker to transmit a second portion of the first audio signal, where the second portion is in a lower frequency band than the first portion. The audio system further includes a noise canceller to at least attenuate a second audio signal, where the second audio signal is in a lower frequency band than the first portion of the first audio signal.
H04R 3/12 - Circuits for transducers for distributing signals to two or more loudspeakers
G10K 11/175 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effects; Masking sound
99.
APPARATUS AND METHODS FOR DETECTING MOLECULES AND BINDING ENERGY
The present disclosure provides apparatuses and methods for analyzing the presence of a target analyte. The apparatuses and methods of the present disclosure can be operated in a multiplexed format to perform various assays of clinical significance.
Techniques, methods, and systems are provided for packaging high-voltage packages. On example system package includes circuitries comprising circuit elements; and a plurality of connection pins including low-voltage pins; input/output (IO) pins arranged in regions proximate edges of the system package; and high-voltage pins arranged in an inner region of the system package away from all edges of the system package.
H01L 31/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof - Details
H01L 31/107 - Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
G01S 7/4863 - Detector arrays, e.g. charge-transfer gates
patents
