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2023
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Invention
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Semiconductor device and manufacturing method thereof.
In a method of manufacturing a negative c... |
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Invention
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Method and structure for finfet isolation.
A semiconductor device includes a substrate, a fin pr... |
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Invention
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Memory devices and methods of manufacturing thereof.
A memory cell is disclosed. The memory cell... |
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Invention
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Integrated circuit having current-sensing coil.
An integrated circuit includes a first conductiv... |
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Invention
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Integrated circuit device design method and system.
A method of designing an integrated circuit ... |
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Invention
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Non-transitory computer-readable medium, integrated circuit device and method.
A non-transitory ... |
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Invention
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3dic structure and methods of forming.
A structure and a method of forming are provided. The str... |
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Invention
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Manufacturing method for semiconductor device.
A method of making a semiconductor structure incl... |
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Invention
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Cell layout of semiconductor device.
A device is disclosed. The cell block includes a pin dispos... |
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Invention
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Structure for multiple sense amplifiers of memory device.
A memory device is provided. The memor... |
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G/S
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Custom manufacture of semiconductors, memory chips, wafers and integrated circuits. |
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Invention
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Four cpp wide memory cell with buried power grid, and method of fabricating same.
A memory devic... |
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Invention
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Memory circuit and method of operating same.
A memory circuit includes a sense amplifier coupled... |
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Invention
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Cell having stacked pick-up region.
An integrated circuit includes a p-type active zone located ... |
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Invention
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Silicide-sandwiched source/drain region and method of fabricating same.
A method of manufacturin... |
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Invention
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Layouts for conductive layers in integrated circuits.
Various layouts for conductive interconnec... |
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G/S
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Custom manufacture of semiconductors, memory chips, wafers and integrated circuits |
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Invention
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Gate all around transistor device and fabrication methods thereof.
Embodiments of the present di... |
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Invention
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Ferroelectric memory device using back-end-of-line (beol) thin film access transistors and method... |
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Invention
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Contact structures with deposited silicide layers.
A method of forming a semiconductor device in... |
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Invention
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Semiconductor device structure and methods of forming the same.
An interconnection structure, al... |
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Invention
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Block level design method for heterogeneous pg-structure cells.
A partitioning method for partit... |
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Invention
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Semiconductor device and manufacturing method thereof.
A semiconductor device including a FET in... |
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Invention
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Bit line logic circuits and methods.
A circuit includes a memory cell column coupled to a bit li... |
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Invention
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Method for lithography in semiconductor fabrication.
A method for lithography in semiconductor f... |
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Invention
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Methods of forming photonic devices.
A method includes: forming a first plurality of tiers that ... |
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Invention
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Redistribution lines having nano columns and method forming same.
A method includes forming a se... |
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Invention
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3d package structure and methods of forming same.
An embodiment is method including forming a fi... |
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Invention
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Finfet epi channels having different heights on a stepped substrate.
A structure includes a step... |
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Invention
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Interconnect structures.
Embodiments described herein relate generally to one or more methods fo... |
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2022
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G/S
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Semiconductors; memory chips; semiconductor wafers; integrated circuits; electronic machines; tel... |
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G/S
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Semiconductors; memory chips; semiconductor wafers; integrated circuits; telecommunication device... |
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G/S
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Custom manufacture of semiconductors, memory chips, wafers and integrated circuits Product resear... |
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G/S
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Custom manufacture of semiconductors, memory chips, wafers and integrated circuits. Product resea... |
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Invention
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Semiconductor device and method.
Semiconductor devices including fin-shaped isolation structures... |
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Invention
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Semiconductor device and method of forming the same.
A method of forming a semiconductor device ... |
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Invention
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Resistive memory device with enhanced local electric field and methods of forming the same.
A re... |
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G/S
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Custom manufacture and assembly of semiconductors, semiconductor devices, memory chips, semicondu... |
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Invention
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Method and structure for 3dic power distribution.
Embodiments provide regulated power routing th... |
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Invention
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Metal gate fin electrode structure and method.
Embodiments provide a replacement metal gate in a... |
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Invention
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Staggered metal mesh on backside of device die and method forming same.
A method includes formin... |
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Invention
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Integration of multiple transistors having fin and mesa structures.
A structure includes a bulk ... |
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Invention
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Semiconductor device and methods of manufacturing the same.
Some implementations described herei... |
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Invention
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Patterned semiconductor device and method.
Methods of patterning semiconductor devices and semic... |
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Invention
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Interconnection structure and methods of forming the same.
An interconnection structure includes... |
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Invention
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Transistor source/drain contacts and methods of forming the same.
A method includes depositing a... |
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Invention
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Wafer bonding incorporating thermal conductive paths.
A method includes forming a first bond lay... |
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Invention
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Isolation layers for reducing leakages between contacts.
A structure includes a gate stack over ... |
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Invention
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Semiconductor processing tool and methods of operation.
An illumination system includes a plural... |
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Invention
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Sacvd system and method for reducing obstructions therein.
Systems and methods for reducing obst... |
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Invention
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Laser device and method of using the same.
Some implementations described herein provide a laser... |
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Invention
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Dual damascene structure in forming source/drain contacts.
A method includes forming a transisto... |
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Invention
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Trench-type beol memory cell.
An integrated chip includes a memory cell within a BEOL metal inte... |
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Invention
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Method and apparatus for semiconductor wafer cleaning.
A method of cleaning a semiconductor wafe... |
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Invention
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Semiconductor structures and method for manufacturing the same.
The present disclosure provides ... |
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Invention
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Conductive structures with barriers and liners of varying thicknesses.
A barrier layer is select... |
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Invention
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Structure and formation method of semiconductor device with epitaxial structures.
A semiconducto... |
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2021
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G/S
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Semiconductors; computer memory chips; wafers, namely, silicon wafers and semiconductor wafers; i... |
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2020
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G/S
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Semiconductors, memory chips, wafers and integrated circuits. Custom manufacture of semiconductor... |
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G/S
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Semiconductors; computer memory chips; wafers, namely, silicon wafers and semiconductor wafers; a... |
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G/S
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Semiconductors; computer memory chips, multiprocessor memory chips, semiconductor memory chips, s... |
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2018
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G/S
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Semiconductors; computer memory chips; wafers, namely, silicon wafers and structured semi-conduct... |
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G/S
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Custom manufacture of semiconductors, memory chips, wafers, and integrated circuits Product resea... |
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2011
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G/S
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Semiconductor integrated circuit wafer fabrication services for others; custom fabrication of sem... |
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2008
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G/S
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Semiconductors and integrated circuits. Custom manufacture of semiconductors, memory chips, wafer... |
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G/S
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Semiconductors and integrated circuits |
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G/S
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Custom manufacture of semiconductors, memory chips, wafers and integrated circuits Scientific res... |
