Sandisk Technologies LLC

United States of America

 
Total IP 5,589
Total IP Rank # 160
IP Activity Score 4.1/5.0    3,431
IP Activity Rank # 171
Parent Entity SanDisk Corporation

Patents

Trademarks

4,979 0
0 0
610 0
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Last Patent 2021 - Method of reducing neighboring w...
First Patent 1988 - Highly compact eprom and flash e...

Latest Inventions, Goods, Services

2020 Invention Bonded three-dimensional memory devices and methods of making the same by replacing carrier subst...
Invention Multi-resistance mram. Apparatuses, systems, and methods are disclosed for magnetoresistive rand...
Invention Methods for reusing substrates during manufacture of a bonded assembly including a logic die and ...
Invention Memory device with compensation for program speed variations due to block oxide thinning. Techni...
Invention Sub-block size reduction for 3d non-volatile memory. Systems and methods for reducing the size o...
Invention Multilevel memory stack structure with tapered inter-tier joint region and methods of making ther...
Invention Antiferroelectric memory devices and methods of making the same. An antiferroelectric memory de...
Invention Adaptive vpass for 3d flash memory with pair string structure. Systems and methods for reducing p...
Invention Low latency data transfer. st column in other divisions. This avoids outputting unwanted data at ...
Invention Embedded bonded assembly and method for making the same. A semiconductor structure includes a fir...
Invention Three-dimensional memory device containing ferroelectric memory elements encapsulated by transiti...
Invention Select line voltage waveform real-time monitor for non-volatile memory. An apparatus comprising s...
Invention Three-dimensional memory device containing epitaxial ferroelectric memory elements and methods fo...
Invention A method of reducing neighboring word-line interference. Method for performing an erase program o...
Invention No-verify programming followed by short circuit test in memory device. Techniques are described f...
Invention Temperature dependent impedance mitigation in non-volatile memory. A memory system is provided wi...
Invention Programming to minimize cross-temperature threshold voltage widening. Apparatuses and techniques ...
Invention Ferroelectric memory devices with dual dielectric confinement and methods of forming the same. A ...
Invention Three-dimensional memory device including contact-level bit-line-connection structures and method...
Invention Memory scaling semiconductor device. A semiconductor device is disclosed including a memory modu...
Invention Non-dominant pole tracking compensation for large dynamic current and capacitive load reference g...
Invention Reprogramming memory cells to tighten threshold voltage distributions and improve data retention....
Invention Nand string pre-charge during programming by injecting holes via substrate. Apparatuses and techn...
Invention Erase operation in 3d nand. An apparatus for erasing non-volatile storage elements in a non-volat...
Invention Ferroelectric memory devices including a stack of ferroelectric and antiferroelectric layers and ...
2019 Invention Wordline smart tracking verify. The storage device comprises a non-volatile memory coupled to a c...
Invention Three-dimensional memory device including split memory cells and methods of forming the same. A t...
Invention Three-dimensional memory die containing stress-compensating slit trench structures and methods fo...
Invention Method of reducing neighboring word-line interference. Method for performing an erase program op...
Invention Vhsa-vddsa generator merging scheme. A memory device is provided including physical block circuit...
Invention Three-dimensional memory device containing tubular blocking dielectric spacers. An alternating s...
Invention Ferroelectric memory devices with dual dielectric confinement and methods of forming the same. A...
Invention One selector one resistor ram threshold voltage drift and offset voltage compensation methods. A...
Invention Embedded bonded assembly and method for making the same. A semiconductor structure includes a fi...
Invention Temperature dependent impedance mitigation in non-volatile memory. A memory system is provided w...
Invention Three-dimensional memory device containing horizontal and vertical word line interconnections and...
Invention Programming to minimize cross-temperature threshold voltage widening. Apparatuses and techniques...
Invention Three-dimensional memory device containing alternating stack of source layers and drain layers an...
2018 Invention Three-dimensional memory device using a buried source line with a thin semiconductor oxide tunnel...