2024
|
G/S
|
Computer hardware; computer chips; semiconductors; semiconductor chips and chip sets; microproces... |
2023
|
G/S
|
Clothing, namely, shirts, tank tops, shorts, pants, clothing jerseys, clothing jackets, vests, ho... |
|
Invention
|
Multi-termination scheme interface.
In an embodiment, a method includes programming a control si... |
|
Invention
|
Explicit beamforming in a high efficiency wireless local area network.
A first communication dev... |
|
Invention
|
Wireline transceiver with internal and external clock generation.
An integrated circuit device h... |
|
Invention
|
Gate stack for metal gate transistor.
Forming a metal gate transistor includes forming a semicon... |
|
Invention
|
Efficient signaling scheme for high-speed ultra short reach interfaces.
A multi-chip package inc... |
|
Invention
|
Integrated coherent optical transceiver.
An integrated circuit includes a silicon photonics subs... |
|
Invention
|
Sleep signaling handshake for ethernet.
A first communication device performs a handshaking proc... |
|
Invention
|
Methods and apparatus for providing soft and blind combining for pusch acknowledgement (ack) proc... |
|
Invention
|
Hierarchical statisically multiplexed counters and a method thereof.
Embodiments of the present ... |
|
Invention
|
Power monitor for silicon-photonics-based laser.
A laser device based on silicon photonics with... |
|
Invention
|
Soft fec with parity check.
A method for data transmission includes receiving a data stream from... |
|
Invention
|
Protocol independent programmable switch (pips) for software defined data center networks.
A sof... |
|
Invention
|
A method of using bit vectors to allow expansion and collapse of header layers within packets for... |
|
Invention
|
Reduction of four-wave mixing crosstalk in optical links.
A transmitter includes at least three ... |
|
Invention
|
Out-of-band based independent link training of in-band links between host devices and optical mod... |
|
Invention
|
Gate all-around (gaa) field effect transistors (fets) formed on both sides of a substrate. An ele... |
|
Invention
|
Gate all-around (gaa) field effect transistors (fets) formed on both sides of a substrate.
An el... |
|
Invention
|
Block acknowledgment operation.
A first communication device transmits first bitmap length capab... |
|
Invention
|
Adaptive low-density parity check decoder.
The present disclosure describes apparatuses and meth... |
|
Invention
|
Adaptive low-density parity check decoder. The present disclosure describes apparatuses and metho... |
|
Invention
|
Coherent receiver with polarization diversity clock detection.
A receiver includes an optical fr... |
|
Invention
|
Optical transceiver with multimode interferometers.
An optical transceiver includes optical circ... |
|
Invention
|
Integrated circuit device exposed die package structure with adhesive. An integrated circuit (IC)... |
|
Invention
|
Integrated circuit device exposed die package structure with adhesive.
An integrated circuit (IC... |
|
G/S
|
Semiconductors, integrated circuits, computer networking switches, and computer networking interf... |
|
Invention
|
Digital timing recovery for constant density servo read operations. A method of reading servo wed... |
|
Invention
|
Disk writing mode with timing control of main pole relaxation. When writing data to a magnetic da... |
|
Invention
|
Mixed-dimension order routing.
A circuit and corresponding method employ mixed-dimension order r... |
2022
|
Invention
|
Dual-surface rro write in a storage device servo system. A method for writing repeatable run-out ... |
|
Invention
|
Traffic characteristics for target wake time (twt) negotiation. A first communication device gene... |
|
Invention
|
Disk writing mode providing main pole relaxation. A method for writing data to a magnetic data st... |
|
Invention
|
Optimized path selection for multi-path groups. A packet to be forwarded over a computer network ... |
|
Invention
|
Digital droop detector. A circuit detects a voltage droop exhibited by a power supply. A first si... |
|
G/S
|
Computer hardware; computer chips; semiconductors; semiconductor chips; integrated circuits; micr... |
|
Invention
|
Circuit and method for resource arbitration. A circuit and corresponding method perform resource ... |
|
Invention
|
Silicon photonics integration circuit.
A silicon photonics integration circuit includes a silico... |
|
Invention
|
Circuit and method for timestamp jitter reduction.
A circuit and corresponding method generate a... |
|
Invention
|
Circuit and method for timestamp filtering with input/output format conversion.
A circuit and co... |
|
Invention
|
Circuit and method for timestamp filtering with rls filter.
A circuit and corresponding method p... |
|
Invention
|
Method and apparatus for determining bit-error rate in a data channel. A method for determining a... |
|
Invention
|
Method, system and device of serializing and de-serializing the delivery of scan test data throug... |
|
Invention
|
Bandwidth indication, negotiation and txop protection with multiple channel segments. A communica... |
|
Invention
|
Semiconductor device with mechanism to prevent reverse engineering. A semiconductor device is con... |
|
Invention
|
Managing power in an electronic device.
A network device accesses, from a queue corresponding to... |
|
Invention
|
Multi-port transceiver. A multi-port transceiver comprises a plurality of first ports, a first co... |
|
Invention
|
Method and apparatus for control of congestion in storage area network. In a storage area network... |
|
Invention
|
Common-mode filtering for converting differential signaling to single-ended signaling. An interfa... |
2021
|
Invention
|
System and method for schedule-based i/o multiplexing for integrated circuit (ic) scan test. An a... |
|
Invention
|
Aggregation of frames for transmission in a wireless communication network. A first communication... |
2020
|
Invention
|
System and methods for latency reduction for fuse reload post reset. A new approach is proposed t... |
|
Invention
|
System and methods for firmware security mechanism. A new approach is proposed to support a hardw... |
|
G/S
|
Integrated circuits and semiconductor devices |
|
G/S
|
Scientific, optical, signalling and checking apparatus and instruments; apparatus for recording, ... |
|
G/S
|
Computer hardware; semiconductors; semiconductor chips and chip sets; Integrated circuits, integr... |
|
G/S
|
Computer hardware; semiconductors; semiconductor chips and chip sets; integrated circuits in the ... |
|
G/S
|
Designing computer hardware in the nature of semiconductors, semiconductor chips and chip sets, i... |
|
G/S
|
Designing semiconductors, semiconductor chips and chip sets, integrated circuits, integrated circ... |
|
G/S
|
Telecommunications via a network of computers; electronic and digital transmission of data, docum... |
|
G/S
|
Providing telecommunications connections to a global computer network via a network of computers;... |
2018
|
G/S
|
Semiconductors and integrated circuits incorporating error correction mechanisms for use in flash... |
|
G/S
|
Semiconductors; integrated circuits; circuit boards; formatter boards; microprocessors; microcont... |
|
G/S
|
Network appliances in the nature of computer hardware; server adapters; network adapters; applica... |
|
G/S
|
Semiconductor chips; Multi-core RISC system on chip processors for data center and cloud applicat... |
|
G/S
|
Computer hardware; computer hardware and peripherals; computer networking hardware; computer memo... |
|
G/S
|
Semiconductors, semiconductor chip sets, microprocessors, customized microprocessors and related ... |
2017
|
G/S
|
Feature of an Ethernet switch which automatically links a network or storage adapter to the Ether... |
|
G/S
|
Semiconductors; semiconductor chips and chip sets; microprocessors; customized microprocessors; c... |