2020
|
Invention
|
Multi-bit memory system with adaptive read voltage controller.
According to an embodiment, a sem... |
|
Invention
|
Memory system.
A memory system includes a volatile first storing unit, a nonvolatile second stor... |
|
Invention
|
Semiconductor device and memory system.
A semiconductor device includes a first chip and a secon... |
|
Invention
|
Semiconductor memory device.
According to an embodiment, a semiconductor memory device includes ... |
|
Invention
|
Semiconductor memory device.
A plurality of semiconductor layers have longitudinally a first dir... |
|
Invention
|
Namespace re-sizing.
A data storage device capable of namespace re-sizing comprises a nonvolatil... |
|
Invention
|
Data latch circuit and semiconductor memory device.
A data latch circuit includes a first n-chan... |
|
Invention
|
Electronic device, computer system, and control method.
According to one embodiment, an electron... |
|
Invention
|
Semiconductor memory device and method for manufacturing same.
According to one embodiment, the ... |
|
Invention
|
Semiconductor memory device.
A semiconductor memory device includes first and second wiring laye... |
|
Invention
|
Reconstruction of address mapping in a host of a storage system.
A storage device includes a non... |
|
Invention
|
Memory system.
A memory system of an embodiment includes a memory device including a first set o... |
|
Invention
|
Extending ssd longevity.
A storage appliance includes a first SSD, a second SSD, and a controlle... |
|
Invention
|
Semiconductor memory device.
According to one embodiment, a semiconductor memory device includes... |
|
Invention
|
Semiconductor memory device.
A semiconductor memory device includes a first memory cell, a secon... |
|
Invention
|
Semiconductor memory device.
A semiconductor memory device includes first, second, third, and fo... |
|
Invention
|
Semiconductor memory.
A semiconductor memory includes memory cells, a word line and bit lines of... |
|
Invention
|
Semiconductor device.
A semiconductor device includes a first wiring extending in a first direct... |
|
Invention
|
Semiconductor memory device which stores plural data in a cell.
A memory cell array is configure... |
|
Invention
|
Semiconductor memory device for storing multivalued data.
Data storage circuits are connected to... |
|
Invention
|
Semiconductor memory device.
A controller controls a memory including first and second strings. ... |
|
Invention
|
Semiconductor device and memory system.
A semiconductor device capable of communicating with a h... |
|
Invention
|
Electronic apparatus.
An electronic apparatus includes a top plate, a bottom plate provided unde... |
|
Invention
|
Semiconductor device with sealed semiconductor chip.
A semiconductor device includes a semicondu... |
|
Invention
|
Semiconductor device.
In one embodiment, a semiconductor device includes a first chip including ... |
|
Invention
|
Semiconductor storage device.
A semiconductor storage device includes a first memory cell electr... |
|
Invention
|
Storage device and computer system.
According to one embodiment, a storage device includes a non... |
|
Invention
|
Substrate treatment apparatus and manufacturing method of semiconductor device.
According to an ... |
|
Invention
|
Memory system including multiple memories connected in series.
A memory system includes first, s... |
|
Invention
|
Semiconductor memory device.
A semiconductor memory device includes first and second memory cell... |
|
Invention
|
Memory system.
According to an embodiment, a memory controller obtains first data in a first pag... |
|
Invention
|
Memory device.
A memory device includes a memory cell array configured to store data, a control ... |
|
Invention
|
Pattern formation method, block copolymer, and pattern formation material.
According to one embo... |
|
Invention
|
Semiconductor memory device and method of manufacturing the same.
According to an embodiment, a ... |
|
Invention
|
Semiconductor device and method for manufacturing same.
According to one embodiment, a stacked b... |
|
Invention
|
Manufacturing method of a semiconductor device and method for creating a layout thereof.
A metho... |
|
Invention
|
Memory system, host device and information processing system for error correction processing.
Ac... |
|
Invention
|
Semiconductor device.
According to an embodiment, a semiconductor device includes a substrate, a... |
|
Invention
|
Memory device.
According to one embodiment, a memory device, includes a first memory cell, and a... |
|
Invention
|
Memory system including the semiconductor memory and a controller.
According to one embodiment, ... |
2019
|
Invention
|
Reconfigurable ssd storage pool.
A solid state drive (SSD) includes a first storage region class... |
|
Invention
|
Solid state drive supporting both byte addressable protocol and block addressable protocol.
A so... |
|
Invention
|
Ssd supporting low latency operation.
A method of managing writing data to a Solid State Drive (... |
|
Invention
|
Systems and methods for strong write consistency when replicating data.
A solid state drive is p... |
|
Invention
|
Heat sink with dashed crosshatched fin pattern.
Various implementations described herein relate ... |
|
Invention
|
System and method for decoder assisted dynamic log-likelihood ratio (llr) estimation for nand fla... |
2016
|
Invention
|
Multi-chip package and memory system. A multi-chip package includes a first group of memory chips... |
2012
|
Invention
|
System, device, and method for initializing a plurality of electronic devices using a single pack... |