Abstract

A projector panel includes pixel display, a display controller, and a pattern generator. The pattern generator is operative to output pixel data indicative of at least one application specific predetermined pattern. In a particular embodiment, the projector panel is a liquid- crystal-on-silicon panel. In another particular embodiment, the projector panel is adapted for selective use in either structured light projection systems or conventional video projection systems.

IPC Classes  ?

• G03B 35/00 - Stereoscopic photography
• G03B 21/14 - Projectors or projection-type viewers; Accessories therefor - Details
• G02B 26/10 - Scanning systems

Abstract

Systems and methods for calibrating a 360 degree camera system include imaging reference strips, analyzing the imaged data to correct for pitch, roll, and yaw of cameras of the 360 degree camera system, and analyzing the image data to correct for zoom and shifting of the cameras. Each of the reference strips may include a bullseye component and a dots component to aid in the analyzing and correcting.

IPC Classes  ?

• H04N 5/225 - Television cameras

Abstract

An image sensor having an image acquisition mode and an ambient light sensing mode includes a pixel array having pixel cells organized into rows and columns for capturing image data and ambient light data. Readout circuitry is coupled via column bit lines to the pixels cells to read out the image data along the column bit lines. An ambient light detection ("ALD") unit is selectively coupled to the pixel array to readout the ambient light data and to generate an ambient light signal based on ambient light incident upon the pixel array. Control circuitry is coupled to the pixel array to control time sharing of the pixels cells between the readout circuitry during image acquisition and the ALD unit during ambient light sensing.

IPC Classes  ?

• H04N 5/374 - Addressed sensors, e.g. MOS or CMOS sensors

Abstract

A time of flight pixel includes a photodiode that accumulates charge in response to light incident upon the photodiode. A first transfer transistor is couple between the photodiode and a first charge storage device to selectively transfer charge to the first charge storage device from the photodiode. A second transfer transistor coupled between the photodiode and a second charge storage device to selectively transfer charge to the second charge storage device from the photodiode. An enable transistor is coupled between the first charge storage device and a readout node coupled to the second charge storage device to selectively couple the first charge storage device to the readout node. An amplifier transistor having a gate is also coupled to a readout node.

IPC Classes  ?

• H04N 5/341 - Extracting pixel data from an image sensor by controlling scanning circuits, e.g. by modifying the number of pixels having been sampled or to be sampled
• H04N 13/00 - PICTORIAL COMMUNICATION, e.g. TELEVISION - Details thereof

Abstract

An optical system for generating an image having extended depth of field. The system includes a phase mask and a chromatic wavefront coding lens. The chromatic wavefront coding lens provides axial color separation of light by generating specified chromatic aberration in an image created by the lens. The phase mask causes the optical transfer function of the optical system to remain substantially constant within a specified range away from the image plane, and the optical transfer function of the system contains no zeroes within at least one spectral passband of interest. Digital processing may be performed on the image to generate a final image by reversing a decrease in modulation transfer function generated by the phase mask.

IPC Classes  ?

• G03B 17/02 - Bodies
• G03B 3/02 - Focusing arrangements of general interest for cameras, projectors or printers moving lens along baseboard
• H04N 5/225 - Television cameras

Abstract

A vertically- integrated active pixel sensor includes a sensor layer (103) connected to a circuit layer (105). At least one pixel region (107) on the sensor layer includes a photodetector (200) and a charge-to-voltage converter (204). At least one pixel region (211) on the circuit layer consists of a source follower input transistor (212). A connector (403) connects the charge-to-voltage converter to a gate (220) of the source follower input transistor. The connector is used to transfer a signal from the charge-to-voltage converter to the source follower input transistor.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

An apparatus for a dual-sided image sensor is described. The dual-sided image sensor captures frontside image data incident upon a frontside of the dual-sided image sensor within an array of photosensitive regions integrated into a semiconductor layer of the dual-sided image sensor. Backside image data incident upon a backside of the dual-sided image sensor is also captured within the same array of photosensitive regions.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

An image sensor includes an array of light sensitive elements and a filter array. Each filter element is in optical communication with a respective light sensitive element. The image sensor receives filtered light having a repeating pattern. Light sensitive elements in at least two successive rows alternately receive light having a first color and a second color, and light sensitive elements in common columns of the successive rows alternately receive light having the first color and the second color. Light sensitive elements in at least two additional successive rows alternately receive light having a third and a fourth color, and light sensitive elements in common columns of the additional successive rows alternately receive light having the third color and the fourth color. Output values of pairs of sampled light sensitive elements receiving light of a common color and from successive rows are combined to generate a down-sampled image.

IPC Classes  ?

• H04N 5/335 - Transforming light or analogous information into electric information using solid-state image sensors [SSIS]
• H04N 9/07 - Picture signal generators with one pick-up device only

Abstract

An electrical component includes a semiconductor layer (902) having a first conductivity type and a interconnect layer disposed adjacent to a frontside of the semiconductor layer. At least one bond pad (914) is disposed in the interconnect layer and formed adjacent to the frontside of the semiconductor layer. An opening (912) formed from the backside of the semiconductor layer and through the semiconductor layer exposes at least a portion of the bond pad. A first region (906) having a second conductivity type extends from the backside of the semiconductor layer to the frontside of the semiconductor layer and surrounds the opening. The first region can abut a perimeter of the opening or alternatively, a second region having the first conductivity type can be disposed between the first region and a perimeter of the opening.

IPC Classes  ?

• H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 27/146 - Imager structures
• H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices

Abstract

An electrical component includes a semiconductor layer (902) having a first conductivity type and a interconnect layer disposed adjacent to a frontside of the semiconductor layer. At least one bond (914) pad is disposed in the interconnect layer and formed adjacent to the frontside of the semiconductor layer. An opening (912) formed from the backside of the semiconductor layer and through the semiconductor layer exposes at least a portion of the bond pad. A first region (906) having a second conductivity type extends from the backside of the semiconductor layer to the frontside of the semiconductor layer and surrounds the opening. The first region can abut a perimeter of the opening or alternatively, a second region having the first conductivity type can be disposed between the first region and a perimeter of the opening.

IPC Classes  ?

• H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 27/146 - Imager structures
• H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices

Abstract

An image sensor (800) having an imaging area that includes a substrate layer (806) and a plurality of pixels formed therein. Multiple pixels each include a photodetector (801) formed in the substrate layer and deep isolation regions (803). Isolation layers (804a, 804b, 804c, 804d) are formed in the substrate layer by performing a series of implants of one or more dopants of a first conductivity type into the substrate layer. Each isolation layer implant is performed with a different energy than the other isolation layer implants in the series and each implant implants the one or more dopants into the entire imaging area. The photodetectors are formed in the substrate layer by performing a series of implants of one or more dopants of a second conductivity type into each pixel in the substrate layer. Each photodetector implant (802a, 802b, 802c, 802d) is performed with a different energy than the other photodetector implants in the series.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

An image sensor includes multiple photoactive pixels and multiple dark reference pixels typically arranged in rows and columns to form a pixel array. A dark signal is read out from a given number of dark reference pixels in each column at a first gain level. An initial column offset correction is determined for one or more columns in the pixel array using respective dark signals read out at the first gain level. The initial column offset corrections are repeatedly scaled in response to each detected change to a different gain level. The column offset corrections can be scaled based on an amount of change between each respective different gain level and the first gain level.

IPC Classes  ?

• H04N 5/365 - Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response

Abstract

An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. An analog front end (AFE) circuit processes pixel data output from the output circuits and an AFE clock controller transmits an AFE clocking signal to the AFE circuit to effect processing of the pixel data. A timing generator outputs a column address sequence that is received by a column decoder. During one or more sample operations the AFE clock controller suspends the output of the AFE clocking signal and the timing generator suspends the output of the column address sequence during the sample operation. The output of the AFE clocking signal and the column address sequence resume at the end of the sample operation.

IPC Classes  ?

• H04N 5/357 - Noise processing, e.g. detecting, correcting, reducing or removing noise
• H04N 5/374 - Addressed sensors, e.g. MOS or CMOS sensors

Abstract

An image sensor includes a sensor wafer (2000) and a circuit wafer (2010) electrically connected to the sensor wafer. The sensor wafer includes unit cells with each unit cell having at least one photodetector (1808) and a charge-to-voltage conversion region (2004). The circuit wafer includes unit cells with each unit cell having an electrical node (2014) that is associated with each unit cell on the sensor wafer. An inter-wafer interconnect (1800) is connected between each charge-to-voltage conversion region on the sensor wafer and a respective electrical node on the circuit wafer. A location of a portion of the unit cells on the sensor wafer and a location of a corresponding portion of the unit cells on the circuit wafer are shifted a predetermined distance with respect to the locations of the remaining unit cells on the sensor and circuit wafers.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

An image sensor includes multiple photoactive pixels and multiple dark reference pixels arranged in rows and columns to form a pixel array. A dark signal is read out of one or more dark reference pixels in each column and used to determine a column offset for one or more columns in the pixel array. Each time an image or frame of an image is read out, the column offset for the one or more columns is updated using dark signals read out from a given number of dark reference pixels. The column offset for the one or more columns is scaled when a gain level is changed for a captured image.

IPC Classes  ?

• H04N 5/365 - Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response
• H04N 5/361 - Noise processing, e.g. detecting, correcting, reducing or removing noise applied to dark current

Abstract

An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. An analog front end (AFE) circuit processes pixel data output from the output circuits and an AFE clock controller transmits an AFE clocking signal to the AFE circuit to effect processing of the pixel data. A timing generator outputs a column address sequence that is received by a column decoder. During one or more sample operations the timing generator suspends the column address sequence and subsequently during the one or more sample operations the AFE clock controller suspends the AFE clocking signal. The AFE clocking signal and the column address sequence resume at the end of the one or more sample operations.

IPC Classes  ?

• H04N 5/357 - Noise processing, e.g. detecting, correcting, reducing or removing noise

Abstract

An image sensor (900) includes an array of pixels, with at least one pixel including a photodetector (902) formed in a substrate layer (912) and a transfer gate (910) disposed adjacent to the photodetector. The substrate layer further includes multiple charge-to-voltage conversion regions (1104). A single photodetector can transfer collected charge to a single charge-to-voltage conversion region, or alternatively multiple photodetectors can transfer collected charge to a common charge -to- voltage conversion region shared by the photodetectors. An implant region (1406) formed when dopants are implanted into the substrate layer to form source/drain implant regions is disposed in only a portion of each transfer gate while each charge-to-voltage conversion region is is devoid of the implant region.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

An image sensor includes multiple photoactive pixels and multiple dark reference pixels arranged in rows and columns to form a pixel array. A dark signal is read out of one or more dark reference pixels in each column and used to determine a column offset for one or more columns in the pixel array. An offset window is used for each column in the pixel array to define an acceptable maximum dark signal and an acceptable minimum dark signal for each column. The dark signals from each column are analyzed to determine if there are any dark signals outside the offset window. If any of the dark signals are outside the offset window, the dark signal or signals can be compensated for or discarded.

IPC Classes  ?

• G06T 5/00 - Image enhancement or restoration

Abstract

A system-on-chip (SOC) includes an image sensor, an image signal processor connected to an output of the image sensor, a bypass connected to the output of the image sensor, and a multiplexer connected to an output of the image signal processor and an output of the bypass. The image sensor, image signal processor, bypass, and multiplexer are all integrated on one silicon wafer. An image capture device includes the SOC and applications processor connected to an output of the multiplexer. The image capture device can further include a system memory and a display connected to the applications processor.

IPC Classes  ?

• H04N 5/335 - Transforming light or analogous information into electric information using solid-state image sensors [SSIS]
• H04N 9/04 - Picture signal generators

Abstract

An image sensor includes a sensor wafer (2000) and a circuit wafer (2010) electrically connected to the sensor wafer. The sensor wafer includes unit cells with each unit cell having at least one photodetector (1808) and a charge- to- voltage conversion region (2004). The circuit wafer includes unit cells with each unit cell having an electrical node associated with each unit cell on the sensor wafer. An inter-wafer interconnect (2006) is connected between each unit cell on the sensor wafer and a respective unit cell on the circuit wafer. The location of at least a portion of the inter-wafer interconnects is shifted or disposed at a different location with respect to the location of one or both components connected to the shifted inter- wafer interconnects. The locations of the inter- wafer interconnects can be disposed at different locations with respect to the locations of the charge- to- voltage conversion regions or with respect to the locations of the electrical nodes.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A pixel array in an image sensor includes multiple pixels arranged in rows and columns with each column of pixels electrically connected to a column output line. A sample and hold circuit is electrically connected to each column output line. In one embodiment in accordance with the invention, each sample and hold circuit includes one capacitor for receiving and storing a signal voltage and a second capacitor for receiving and storing a reset voltage. The sample and hold circuits are divided into distinct groups, with each group including two or more sample and hold circuits. A pair of buffers is electrically connected to each distinct group. One global bus receives the signal voltages from at least a portion of buffers and another global bus receives the reset voltages fro at least a portion of the other buffers. The global buses can include one or more signal lines.

IPC Classes  ?

• H04N 5/378 - Readout circuits, e.g. correlated double sampling [CDS] circuits, output amplifiers or A/D converters
• H04N 5/374 - Addressed sensors, e.g. MOS or CMOS sensors

Abstract

An image sensor includes a pixel array (700) having photoactive pixels (702) and dark reference pixels (704). The photoactive pixels can be configured in a sub-array within the pixel array. Well contacts (706) are only placed along opposing sides or edges of the sub-array of photoactive pixels or along opposing sides or edges of the pixel array.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A wafer structure for an image sensor includes a substrate that has a given conductivity type, a given dopant concentration, and a given concentration of oxygen. An intermediate epitaxial layer is formed over the substrate. The intermediate epitaxial layer has the same conductivity type and the same, or substantially the same, dopant concentration as the substrate but a lower oxygen concentration than the substrate. A thickness of the intermediate epitaxial layer is greater than the diffusion length of a minority carrier in the intermediate layer. A device epitaxial layer is formed over the intermediate epitaxial layer. The device epitaxial layer has the same conductivity type but lower dopant and oxygen concentrations than the substrate.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A method for encoding a new unit of video data includes: (1 ) incrementally, in raster order, decoding blocks within a search window of a unit of encoded reference video data into a reference window buffer, and (2) encoding, in raster order, each block of the new unit of video data based upon a decoded block of the reference window buffer. A system for encoding a new unit of video data includes a reference window buffer, a decoding subsystem, and an encoding subsystem. The decoding subsystem is configured to incrementally decode, in raster order, blocks within a search window of a unit of encoded reference video data into the reference window buffer. The encoding subsystem is configured to encode, in raster order, each block of the new unit of video data based upon a decoded block of the reference window buffer.

IPC Classes  ?

• H04N 7/26 - using bandwidth reduction (information reduction by code conversion in general H03M 7/30)

Abstract

An image sensor system and associated method supporting multiple video output standards, such as NTSC and PAL, including a pixel array corresponding in size to the frame size having a smaller line number of the video standards, is described. System and method for resolving discrepancies between standards includes multiple crystal oscillators or frequency synthesis to derive a dot clock, and a standard-specific pixel read-out scheme that provides additional lines when outputting according to the fame size having a larger line number of the video standards. In an embodiment, additional line video data is derived by duplicating a line of image data, and in an alternative embodiment additional line video data is derived by digital vertical interpolation.

IPC Classes  ?

• H04N 5/335 - Transforming light or analogous information into electric information using solid-state image sensors [SSIS]
• H04N 5/225 - Television cameras

Abstract

A back-illuminated image sensor (1540) includes a sensor layer (1502) of a first conductivity type having a frontside (1520) and a backside (1528) opposite the frontside (1520). One or more frontside regions (1512, 1514, 1516) of the first conductivity type are formed in at least a portion of the frontside (1520) of the sensor layer (1502). A backside region (1518) of the first conductivity type is formed in the backside (1528) of the sensor layer (1502). A plurality of frontside photodetectors (1504f, 1506f, 1508f) of a second conductivity type is disposed in the sensor, layer (1502) adjacent to the frontside (1520) of the sensor layer (1502). A distinct plurality of backside photodetectors (1504b, 1506b, 1508b) of the second conductivity type separate from the plurality of frontside photodetectors (1504f, 1506f, 1508f ) are formed in the sensor layer (1502) contiguous to the backside region (1518). One or more channel regions (1510) of the second conductivity type are disposed in respective portions of the sensor layer (1502) between the frontside photodetector (1504f, 1506f, 1508f) and the backside photodetector (1504b, 1506b, 1508b) in each photodetector pair.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A back-illuminated image sensor includes a sensor layer disposed between a circuit layer adjacent to a frontside of the sensor layer and a layer disposed on a backside of the sensor layer. One or more first alignment marks are formed in a layer in the circuit layer. A masking layer is aligned to the one or more first alignment marks. The masking layer includes openings that define locations for one or more second alignment marks. The one or more second alignment marks are then formed in or through the layer disposed on a backside of a sensor layer. One or more elements are formed in or on the backside of the sensor layer. The one or more elements are aligned to one or more second alignment marks.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A back-illuminated image sensor includes a sensor layer (702) of a first conductivity type having a frontside (704) and a backside (706) opposite the front side. An insulating layer (708) is disposed over the backside. A circuit layer (710) is formed adjacent to the front side such that the sensor layer is positioned between the circuit layer and the insulating layer. One or more front side regions (728) of a second conductivity type are formed in at least a portion of the front side of the sensor layer. A backside region (740) of the second conductivity type is formed in the backside of the sensor layer. A plurality of front side photodetectors (718f, 720f, 722f) of the first conductivity type is disposed in the sensor layer. A distinct plurality of backside photodetectors (718b, 720b, 722b) of the first conductivity type separate from the plurality of front side photodetectors is formed in the sensor layer contiguous to portions of the backside region of the second conductivity type.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

Back-illuminated image sensors include one or more contact implant regions disposed adjacent to a backside of a sensor layer. An electrically conductive material, including, but not limited to, a conductive lightshield, is disposed over the backside of the sensor layer. A backside well is formed in the sensor layer adjacent to the backside, and an insulating layer is disposed over the surface of the backside. Contacts formed in the insulating layer electrically connect the electrically conducting material to respective contact implant regions. At least a portion of the contact implant regions are arranged in a shape that corresponds to one or more pixel edges.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A back-illuminated image sensor ( 306) includes a sensor layer (702) of a first conductivity type having a frontside (704) and a backside (706) opposite the frontside. One or more frontside regions (726, 728, 730) of a second conductivity type are formed in at least a portion of the frontside of the sensor layer. A backside region (740) of the second conductivity type is formed in the backside (706) of the sensor layer. A plurality of frontside photodetectors (718f, 72Of, 722f ) of the first conductivity type is disposed in the sensor layer. A distinct plurality of backside photodetectors (718b, 720b, 722b) of the first conductivity type separate from the plurality of frontside photodetectors are formed in the sensor layer contiguous to portions of the region of the second conductivity type. A voltage terminal (732) is disposed on the frontside of the sensor layer. One or more connecting regions (742, 744) of the second conductivity type are disposed in respective portions of the sensor layer between the voltage terminal and the backside region for electrically connecting the voltage terminal to the backside region.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A back-illuminated image sensor includes a sensor layer of a first conductivity type having a frontside and a backside opposite the frontside. One or more regions of a second conductivity type are formed in at least a portion of the sensor layer adjacent to the frontside. The one or more regions are connected to a voltage terminal for biasing these regions to a predetermined voltage. A backside well of the second conductivity type is formed in the sensor layer adjacent to the backside. The backside well is electrically connected to another voltage terminal for biasing the backside well at a second predetermined voltage that is different from the first predetermined voltage.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A method is described for forming a full-color output image from a color filter array image comprising capturing an image using an image sensor including panchromatic pixels and color pixels having at least two different color responses, the pixels being arranged in a rectangular minimal repeating unit wherein for a first color response, the color pixels having the first color response alternate with panchromatic pixels in at least two directions, and for each of the other color responses there is at least one row, column or diagonal of the repeating pattern that only has color pixels of the given color response and panchromatic pixels. The method further comprising, computing an interpolated panchromatic image from the color filter array image; computing an interpolated color image from the color filter array image; and forming the full color output image from the interpolated panchromatic image and the interpolated color image.

IPC Classes  ?

• H04N 9/04 - Picture signal generators
• G06T 3/40 - Scaling of a whole image or part thereof

Abstract

An image sensor for capturing a color image comprising a two dimensional array of light-sensitive pixels including panchromatic pixels and color pixels having at least three different color responses, the pixels being arranged in a rectangular minimal repeating unit having at least eight pixels and having at least two rows and two columns, wherein for a first color response, the color pixels having the first color response alternate with panchromatic pixels in at least two directions, and for each of the other color responses there is at least one row, column or diagonal of the repeating pattern that only has color pixels of the given color response and panchromatic pixels.

IPC Classes  ?

• H04N 9/04 - Picture signal generators
• H04N 9/07 - Picture signal generators with one pick-up device only
• H01L 27/146 - Imager structures

Abstract

A CMOS image sensor or other type of image sensor includes a pixel array comprising at least first and second sets of pixels. Image sensor circuitry is coupled to the pixel array and comprises a signal generator for controlling capture of image data from the first set of pixels of the pixel array using a global shutter process and for controlling capture of image data from the second set of pixels of the pixel array using a rolling shutter process, with the pixels of the second set being different than the pixels of the first set. The image sensor may be implemented in a digital camera or other type of digital imaging device.

IPC Classes  ?

• H04N 5/335 - Transforming light or analogous information into electric information using solid-state image sensors [SSIS]

Abstract

An image sensor for capturing a color image comprising a two dimensional array of light-sensitive pixels including panchromatic pixels and color pixels having at least two different color responses, the pixels being arranged in a repeating pattern having a square minimal repeating unit having at least three rows and three columns, the color pixels being arranged along one of the diagonals of the minimal repeating unit, and all other pixels being panchromatic pixels.

IPC Classes  ?

• H04N 9/04 - Picture signal generators

Abstract

A method of forming a full-color output image from a color filter array image having a plurality of color pixels having at least two different color responses and panchromatic pixels, comprising capturing a color filter array image using an image sensor including panchromatic pixels and color pixels having at least two different color responses, the pixels being arranged in a repeating pattern having a square minimal repeating unit having at least three rows and three columns, the color pixels being arranged along one of the diagonals of the minimal repeating unit, and all other pixels being panchromatic pixels; computing an interpolated panchromatic image from the color filter array image; computing an interpolated color image from the color filter array image; and forming the full color output image from the interpolated panchromatic image and the interpolated color image.

IPC Classes  ?

• H04N 5/335 - Transforming light or analogous information into electric information using solid-state image sensors [SSIS]
• H04N 9/04 - Picture signal generators

Abstract

A method of forming a full-color output image using a color filter array image having a plurality of color channels and a panchromatic channel, comprising capturing a color filter array image having a plurality of color channels and a panchromatic channel, wherein the panchromatic channel is captured using a different exposure time than at least one of the color channels; computing an interpolated color image and an interpolated panchromatic image from the color filter array image; computing a transform relationship from the interpolated color image; and forming the full color output image using the interpolated panchromatic image and the functional relationship.

IPC Classes  ?

• H04N 5/217 - Circuitry for suppressing or minimising disturbance, e.g. moire or halo in picture signal generation
• H04N 5/232 - Devices for controlling television cameras, e.g. remote control
• G06T 5/00 - Image enhancement or restoration
• G06T 3/40 - Scaling of a whole image or part thereof

Abstract

A method for producing a digital image from pixel signals captured by an image sensor array is disclosed. The method includes: providing an image sensor array having at least two groups of pixels wherein the pixels of each group are uniformly distributed over the sensor; exposing the image sensor array to scene light and reading pixel charge from only the first group of pixels to produce a first set of pixel signals; after producing the first set of pixel signals, exposing the image sensor array, and then reading pixel charge from the second group of pixels and reading again pixels from the first group to produce a second set of pixel signals; and using the first and second sets of pixel signals to produce the digital image.

IPC Classes  ?

• H04N 5/335 - Transforming light or analogous information into electric information using solid-state image sensors [SSIS]

Abstract

A method of forming a full-color output image using a color filter array image having a plurality of color channels and a panchromatic channel, comprising capturing a color filter array image having a plurality of color channels and a panchromatic channel, wherein the panchromatic channel is captured using a different exposure time than at least one of the color channels; computing an interpolated color image and an interpolated panchromatic image from the color filter array image; computing a chrominance image from the interpolated color image; and forming the full color output image using the interpolated panchromatic image and the chrominance image.

IPC Classes  ?

• H04N 5/232 - Devices for controlling television cameras, e.g. remote control
• G06T 5/00 - Image enhancement or restoration
• H04N 3/15 -

Abstract

A method for forming a final digital color image with reduced motion blur including of a processor for providing images having panchromatic pixels and color pixels corresponding to at least two color photo responses, interpolating between the panchromatic pixels and color pixels to produce a panchromatic image and a full-resolution color image to produce a full-resolution synthetic panchromatic image from the full-resolution color image; and developing color correction weights in response to the synthetic panchromatic image and the panchromatic image; and using the color correction weights to modify the full-resolution color image to provide a final color digital image.

IPC Classes  ?

• H04N 5/232 - Devices for controlling television cameras, e.g. remote control
• G06T 5/50 - Image enhancement or restoration by the use of more than one image, e.g. averaging, subtraction

Abstract

A method of pre-processing a defocused image of an object includes applying an object-based sharpening filter on the defocused image to produce a sharper image; and quantizing the sharper image using block-wise quantization. A system for generating decoded text data from alphanumeric information printed upon an object includes a camera that obtains image data of the alphanumeric information. The system also includes a pre-processor that (a) performs block- wise quantization of the image data to form conditioned image data, and (b) performs optical character recognition on the conditioned image data to generate the decoded text data.

IPC Classes  ?

• G06K 9/38 - Quantising the analogue image signal

Abstract

A CMOS image sensor or other type of image sensor comprises a pixel array and a signal generator coupled to the pixel array. The pixel array comprises a plurality of pixels each having a photosensitive element coupled to a transfer gate. The signal generator is configured to generate a transfer gate signal for application to at least one of the transfer gates. The transfer gate signal has at least an on state voltage level and first and second off state voltage levels, with the first off state voltage level typically having a higher magnitude than that of the second off state voltage level. In an illustrative embodiment, the second off state voltage level is utilized during a readout operation in order to reduce dark current in floating diffusion regions of the pixel array.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A pinned photodiode structure (400) with peninsula- shaped transfer gate (430, 430b, 430a) which decrease the occurrence of a potential barrier between the photodiode (410) and the floating drain(440), prevents loss of full well capacity (FWC) and decreases occurrences of image lag.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A microshutter array (102) has a frame (204) having a single opening that includes a light transmissive portion (202). Linear microshutter elements (110) extend across the light transmissive portion and in parallel to each other. Each microshutter element has a flat blade (200) extended in a length direction and first and second torsion arms (206) extending outwards from each side of the blade in the length direction, the blade extending across the light transmissive portion. A control circuit provides a separately-controlled and independent voltage that is applied to each of the linear microshutter elements. A controller (112) sets the respective voltages applied to each of the linear microshutter elements. A voltage divider circuit (600) can provide various voltages in order to position the blades at various angles.

IPC Classes  ?

• G02B 26/08 - Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light

Abstract

A back-illuminated image sensor includes a sensor layer having a frontside and a backside opposite the frontside. An insulating layer is situated adjacent the backside and a circuit layer is adjacent the frontside. A plurality of photodetectors of a first type conductivity convert light incident on the backside into photo-generated charges. The photodetectors are disposed in the sensor layer adjacent the frontside. A region of a second type conductivity is formed in at least a portion of the sensor layer adjacent the frontside and is connected to a voltage terminal for biasing the second type conductivity region at a predetermined voltage. A well of the second type conductivity is formed in the sensor layer adjacent the backside. Trench isolations in the sensor layer start at the frontside and extend beyond the depletion region of the photodiodes.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

An image sensor (500) includes one or more ultraviolet (UV) light filter layers (520) disposed between an insulating layer (518) and a color filter array (CFA) layer (522) The one or more UV light filter layers reflect or absorb UV light while transmitting visible light.

IPC Classes  ?

• H01L 27/146 - Imager structures
• H01L 23/552 - Protection against radiation, e.g. light
• G02B 5/20 - Filters
• H01L 31/0232 - Optical elements or arrangements associated with the device

Abstract

An image sensor includes a substrate (120) with a plurality of photosensitive elements. A transparent inorganic layer (111) is situated over the substrate, and a plurality of openings (130) is formed in the transparent inorganic layer. A color filter array (114) has a plurality of panchromatic filter elements (115) that are formed by the transparent inorganic layer, and a plurality of color filter elements are situated in the openings. The panchromatic filter elements and the color filter elements each include top surfaces that are essentially planar with the top surface of the transparent inorganic layer.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

An image sensor apparatus is disclosed. The image sensor apparatus includes an image sensor for generating image data corresponding to an optical image. The image sensor apparatus also includes a color filter customized for a lens distortion model. A processor processes the image data with a plurality of distortion correction routines to generate a digital image.

IPC Classes  ?

• H04N 5/225 - Television cameras
• H04N 9/07 - Picture signal generators with one pick-up device only

Abstract

An image sensor and associated image capture device and method include a sensing wafer with a plurality of charge storage elements. One or more floating diffusions are associated with the plurality of charge storage elements, and charge is transferred among the charge storage elements to the one or more floating diffusions. The one or more floating diffusions on the sensing wafer are electrically connected to support circuitry on a circuit wafer.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

Trenches are formed in a substrate or layer and a solid source doped with one or more dopants is deposited over the image sensor such that the solid source fills the one or more trenches and is disposed on the surface of the substrate. The surface of the image sensor is then planarized so that the solid source remains only in the trenches. A thermal drive operation is performed to cause at least a portion of the one or more dopants in the solid source to diffuse into the portions of the substrate or layer that are immediately adjacent to and surround the sidewall and bottom surfaces of the trenches. The diffused dopant or dopants form passivation regions that passivate the interface between the substrate or layer and the sidewall and bottom surfaces of the trenches.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A gradation image capture is used to test one or more image sensors. The integration periods for the rows of pixels in the array, or for groups of rows of pixels, are varied during each single still frame image capture. The rows of pixels are reset either simultaneously or successively to a predetermined level, and then begin accumulating charges. The rows of pixels, or groups of rows of pixels, are read out at different times to vary the integration periods of the pixels. Some or all of the signals are analyzed or measured to detect any design or manufacturing problems.

IPC Classes  ?

• H04N 17/00 - Diagnosis, testing or measuring for television systems or their details

Abstract

A source/drain region of a transistor or amplifier is formed in a substrate layer and is connected to a voltage source. A glow blocking structure is formed at least partially around the source/drain region and is disposed between the source/drain region and an imaging array of an image sensor. A trench is formed in the substrate layer adjacent to and at least partially around the source/drain region. The glow blocking structure includes an opaque material formed in the trench and one or more layers of light absorbing material overlying the source/drain region and the opaque material.

IPC Classes  ?

• H01L 27/146 - Imager structures
• H01L 27/148 - Charge coupled imagers
• H01L 31/0216 - Coatings

Abstract

An image sensor uses a single row of an array of pixels elements to determine whether a pixel is defective and to recover the defective pixel. The image sensor includes a "maximum of minimum" filter to remove a "black" pixel from a raw image. The image sensor also includes a "minimum of maximum" filter to remove a "white" pixel from the raw image.

IPC Classes  ?

• H04N 5/217 - Circuitry for suppressing or minimising disturbance, e.g. moire or halo in picture signal generation

Abstract

An imaging system includes an imaging array and readout circuitry. The imaging array includes image sensor pixels for capturing image data and one or more non-volatile memory (NVM) pixels for storing NVM data. The readout circuitry is coupled to the imaging array to readout the image data and the non-volatile memory data.

IPC Classes  ?

• H04N 5/335 - Transforming light or analogous information into electric information using solid-state image sensors [SSIS]

Abstract

A backside illuminated imaging pixel (400) with, improved angular response includes a semiconductor layer having a front (207) and a back surface (209) The imaging pixel also includes a photodiode region formed in the semiconductor layer. The photodiode region includes a first (210) and a second (215) n-region. The first n-region has a centerline (213) projecting between the front and back surfaces of the semiconductor layer. The second n-region is disposed between the first n-region and the back surface of the semiconductor layer such that the second n-region is offset from the centerline of the first n-region.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A color pixel array includes first, (300A) second, (300B) and third (300C) pluralities of color pixels each including a photosensitive region (330) disposed within a first semiconductor layer. (325) In one embodiment, a second semiconductor layer (315) including deep dopant regions (320) is disposed below the first semiconductor layer. The deep dopant regions each reside below a corresponding one of the first plurality of color pixels but not below the second and third pluralities of color pixels. In one embodiment, buried wells are disposed beneath the second and third pluralities of color pixels but not below the first plurality of color pixels.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

An integrated circuit includes a clustered memory storage subsystem. The integrated circuit utilizes a baseline design that supports a scalable number of memory clusters. The number of storage devices within an individual memory cluster may also be selected to adjust the memory capacity. A single baseline design of a clustered memory storage subsystem design is customized for a particular integrated circuit with the number of memory clusters and storage devices within memory clusters selected for the memory requirements of a particular application. The design and verification costs to fabricate different versions of the integrated circuit are thus reduced.

IPC Classes  ?

• G06F 19/00 - Digital computing or data processing equipment or methods, specially adapted for specific applications (specially adapted for specific functions G06F 17/00;data processing systems or methods specially adapted for administrative, commercial, financial, managerial, supervisory or forecasting purposes G06Q;healthcare informatics G16H)
• G06F 17/50 - Computer-aided design

Abstract

An image sensor includes a color filter array, sense amplifiers, multiplexing circuitry, and an output. The color filter array acquires image data using an array of M columns and N rows of pixels. The sense amplifiers are coupled to the color filter array for reading out image data from the color filter array. The multiplexing circuitry couples the sense amplifiers to the color filter array, wherein each sense amplifier is time shared across multiple columns and multiple rows. The output is coupled to receive the image data from the sense amplifiers and output the image data off -chip insequential color groups, where each color group includes image data associated with a plurality of same color pixels within the same row, so that in the output signal the transitions between adjacent image values are less abrupt and the transfened output signal therefore requiresless bandwidth, thereby improving the signal quality received at a remote unit.

IPC Classes  ?

• H04N 9/04 - Picture signal generators
• H04N 5/335 - Transforming light or analogous information into electric information using solid-state image sensors [SSIS]
• H04N 3/15 -

Abstract

An imaging circuit includes a pixel array that is arranged to concurrently reset pixels in a pixel array in response to a global reset signal. The pixels are arranged in rows, such that the rows can be individually selected by a row select line. A reset transistor concurrently resets the pixels by coupling a reset voltage to a floating diffusion of the pixel. A transfer gate transistor selectively couples the floating diffusion to a storage region. A storage gate transistor selectively couples the storage region to a photosensitive region so that the reset transistor, the transfer gate transistor, and the storage gate transistor for each of the pixels can be activated in response to the global reset signal. A double correlated sampler may be used to provide a correlated double sample using a first sampled voltage of a reset voltage and a second sampled voltage of a pixel voltage that is produced when a photodiode region is exposed to incident light.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

An image sensor (100) includes a photosensitive region (102,104,106) formed in a substrate (101) of an integrated circuit. The substrate has a first layer of metal (ml) formed over the surface of the substrate so the first layer of metal defines a first aperture that has a first aperture width through with the incident light passes before illuminating the photosensitive region. The first aperture width is equal to or less than the width of the photosensitive region below the first aperture. The substrate also has a second layer of metal (tn2) formed over the first layer of metal. The second aperture has a second aperture width that is wider than the first aperture width. The first and second apertures focus the incident light onto the photosensitive region.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A transistor contact (270) over a gate active area includes a transistor gate (250) formed on a substrate of an integrated circuit. A gate insulator (230) is formed beneath the transistor gate (250) and helps define an active area for the transistor gate. An insulating layer (260) is formed over the transistor gate. A metal contact plug (270) is formed within a portion of the insulating layer that lies over the active area such that the metal contact plug forms an electrical contact with the transistor gate.

IPC Classes  ?

• H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device

Abstract

A packaged image sensor assembly utilizes a spacer paste (408-A) to control the height (h2) of a transparent window (340) above an image sensor die (302) to provide safe wire bond clearance. A dam structure (408-A, 408-B) is used to control the height (h2) of the transparent window (340). The dam (408-A, 408-B) may be formed either entirely from spacer paste (408-A) or by depositing the spacer paste on an underlying patterned mesa (408-B). An additional encapsulant (350) is provided outside of the dam to encapsulate wirebonds (338) and provide additional protection from moisture permeation.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A computer readable storage medium has executable instructions to select a plurality of blocks in a video sequence to be coded as intra-coded blocks. Aggregate intra prediction costs are computed for each intra-coded block relative to a corresponding previous intra-coded block. An intra prediction mode is selected for each intra-coded block based on the aggregate intra prediction costs.

IPC Classes  ?

• H04N 7/34 - using spatial prediction
• H04N 7/32 - involving predictive coding (H04N 7/48, H04N 7/50 take precedence);;

Abstract

A computer readable storage medium has executable instructions to select a plurality of blocks in a video sequence to be coded as intra-coded blocks. Intra prediction modes are selected for all intra-coded blocks m a macroblock based on original pixels of neighboring blocks. The mode selection of all intra-coded blocks can be conducted m parallel. The intra-coded blocks in the macroblock are predicted with the selected intra prediction modes based on reconstructed pixels of neighboring blocks.

IPC Classes  ?

• H04N 7/34 - using spatial prediction
• H04N 7/32 - involving predictive coding (H04N 7/48, H04N 7/50 take precedence);;

Abstract

The disclosure describes embodiments of an apparatus comprising an image sensor including a pixel array having a plurality of pixels and an automatic white balance (AWB) circuit coupled to the pixel array. The AWB circuit is used to determine a local white balance component for each pixel, determine a global white balance component for each pixel, and apply a white balance adjustment to each pixel, the applied white balance adjustment comprising a combination of the local white balance component and the global white balance component. The disclosure also describes embodiment of a process including receiving image data from each pixel in a pixel array, determining a local white balance component for the image data from each pixel, determining a global white balance component for the image data from each pixel, and applying a white balance adjustment to the image data from each pixel, the applied white balance adjustment comprising a combination of the local white balance component and the global white balance component. Other embodiments are also disclosed and claimed.

IPC Classes  ?

• H04N 9/73 - Colour balance circuits, e.g. white balance circuits or colour temperature control

Abstract

An imaging system for imaging a range of field points over on- and off- axis fields includes an image sensor for capturing image data, and first and second optical elements that are spaced apart and cooperate to image light at the image sensor. The first and second optical elements are configured to jointly modify phase of the light transmitted therethrough such that point-spread functions ("PSFs'") corresponding to the range field points are substantially uniform over on- and off-axis fields.

IPC Classes  ?

• G02B 26/06 - Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the phase of light
• G02B 27/00 - Optical systems or apparatus not provided for by any of the groups ,

Abstract

An image sensor includes at least one photosensitive element disposed in a semiconductor substrate. Metal conductors may be disposed on the semiconductor substrate. A filter may be disposed between at least two individual metal conductors and a micro-lens may be disposed on the filter. There may be insulator material disposed between the metal conductors and the semiconductor substrate and/or between individual metal conductors. The insulator material may be removed so that the filter may be disposed on the semiconductor substrate.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A backside illuminated imaging sensor includes a semiconductor substrate having a front surface and a back surface. The semiconductor substrate has at least one imaging array formed on the front surface. The imaging sensor also includes a carrier substrate to provide structural support to the semiconductor substrate, where the carrier substrate has a first surface coupled to the front surface of the semiconductor substrate. A re-distribution layer is formed between the front surface of the semiconductor substrate and the second surface of the carrier substrate to route electrical signals between the imaging array and a second surface of the carrier substrate.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A backside illuminated imaging sensor includes a semiconductor layer having a P-type region. A frontside and backside P+ doped layers are formed within the semiconductor layer. An imaging pixel having a photodiode is formed within the semiconductor layer, where the photodiode is an N- region formed within the P-type region of the semiconductor layer between the frontside P+ doped layer and the backside P+ doped layer.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A backside illuminated imaging sensor includes a semiconductor substrate, a metal interconnect layer and a light attenuating layer. The semiconductor substrate has a front surface, a back surface, and includes at least one imaging pixel formed on the front surface of the semiconductor substrate. The metal interconnect layer is electrically coupled to the imaging pixel and the light attenuating layer is coupled between the metal interconnect layer and the front surface of the semiconductor substrate. In operation, the imaging pixel receives light from the back surface of the semiconductor substrate, where a portion of the received light propagates through the imaging pixel to the light attenuating layer. The light attenuating layer is configured to substantially attenuate the portion of light received from the imaging pixel.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A backside illuminated imaging sensor includes a semiconductor layer, a metal interconnect layer and a suicide light reflecting layer. The semiconductor layer has a front surface and a back surface. An imaging pixel that includes a photodiode region is formed within the semiconductor layer. The metal interconnect layer is electrically coupled to the photodiode region and the suicide light reflecting layer is coupled between the metal interconnect layer and the front surface of the semiconductor layer. In operation, the photodiode region receives light from the back surface of the semiconductor layer, where a portion of the received light propagates through the photodiode region to the suicide light reflecting layer. The suicide light reflecting layer is configured to reflect the portion of light received from the photodiode region.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

What is disclosed is an apparatus comprising a transfer gate formed on a substrate and a photodiode formed in the substrate next to the transfer gate. The photodiode comprises a shallow N-type collector formed in the substrate, a deep N-type collector formed in the substrate, wherein a lateral side of the deep N-type collector extends at least under the transfer gate, and a connecting N-type collector formed in the substrate between the deep N-type collector and the shallow N-type collector, wherein the connecting implant connects the deep N-type collector and the shallow N-type collector. Also disclosed is a process comprising forming a deep N-type collector in the substrate, forming a shallow N-type collector formed in the substrate, and forming a connecting N-type collector in the substrate between the deep N-type collector and the shallow N-type collector, wherein the connecting implant connects the deep N-type collector and the shallow N-type collector. A transfer gate is formed on the substrate next to the deep photodiode, wherein a lateral side of the deep N-type collector extends at least under the transfer gate. Other embodiments are disclosed and claimed.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A backside illuminated imaging sensor pixel includes a photodiode region, a pixel circuitry region, and a storage capacitor. The photodiode region is disposed within a semiconductor die for accumulating an image charge. The pixel circuitry region is disposed on the semiconductor die between a frontside of the semiconductor die and the photodiode region. The pixel circuitry region overlaps at least a portion of the photodiode region. The storage capacitor is included within the pixel circuitry region overlapping the photodiode region and is selectively coupled to the photodiode region to temporarily store image charges accumulated thereon.

IPC Classes  ?

• H04N 5/335 - Transforming light or analogous information into electric information using solid-state image sensors [SSIS]

Abstract

An imaging sensor pixel array includes a semiconductor substrate, a plurality of active pixels and at least one black reference pixel. (500) The plurality of active pixels are disposed in the semiconductor substrate (505) for capturing an image. Each of the active pixels includes a first region for receiving light including a p-n junction for accumulating an image charge and active pixel circuitry coupled to the first region to readout the image charge. The black reference pixel is also disposed within the semiconductor substrate for generating a black level reference value. The black reference pixel includes a second region (521) for receiving light without a p-n junction and black pixel circuitry (TX, RST, SF, SEL) coupled to the photodiode region (521) without the p-n junction to readout a black level reference signal.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

An array of pixels is formed using a substrate having a frontside and a backside that is for receiving incident light. Each pixel typically includes metallization layers included in the frontside of the substrate, a photosensitive region formed in the backside of the substrate, and a trench formed around the photosensitive region in the backside of the substrate. The trench causes the incident light to be directed away from the trench and towards the photosensitive region.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A backside illuminated imaging sensor includes a semiconductor layer and an infrared detecting layer. The semiconductor layer has a front surface and a back surface. An imaging pixel includes a photodiode region formed within the semiconductor layer. The infrared detecting layer is disposed above the front surface of the semiconductor layer to receive infrared light that propagates through the imaging sensor from the back surface of the semiconductor layer.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A backside illuminated ("BSI") imaging sensor pixel (400) includes a photodiode (420) region and pixel circuitry (430) The photodiode region is disposed within a semiconductor die for accumulating an image charge in response to light incident upon a backside of the BSI imaging sensor pixel. The pixel circuitry includes transistor pixel circuitry disposed within the semiconductor die between a frontside of the semiconductor die and the photodiode region. At least a portion of the pixel circuitry overlaps the photodiode region.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

An array of pixels is formed using a substrate, (101) where each pixel has a substrate having an incident side for receiving incident light, (150) a photosensitive region (102, 104, 106) formed in the substrate, and a reflector (140, 142, 144) having a complex-shaped surface. The reflector is formed in a portion of the substrate that is opposed to the incident side such that light (150) incident on the complex- shaped surface of the reflector is reflected towards the photosensitive region.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

A driver circuit (300) provides fast settling times, slew rate control, and power efficiency, while reducing the need for large external capacitors (340). A voltage reference circuit (310) generates a voltage reference signal (Vref ). A comparator (330) compares the voltage reference signal and a driver output signal (320) and generates an output high voltage control signal. An output driver (320) includes a first (321) and a second (322) switch that are coupled together. The first and second switches are further coupled to generate the driver output signal in response to coupling the output high voltage control signal (333) to the control terminal of the first switch and coupling an input signal (power down) to the control terminal of the second switch.

IPC Classes  ?

• H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only

Abstract

A reflowable camera module is implemented using a Chip Scale Package (CSP). An image sensor is formed on one portion of the carrier. A light emitting diode (LED) is formed on another portion of the carrier. The LED serves as an integrated camera flash. Additional optical isolation is provided within the camera module to prevent stray light generated by the LED from degrading image quality.

IPC Classes  ?

• G03B 15/03 - Combinations of cameras with lighting apparatus; Flash units
• H04N 5/225 - Television cameras

Abstract

A transmitter provides fast settling times, slew rate control, and power efficiency while reducing the need for large external capacitors. The transmitter typically includes a pre-driver, driver, and replica circuit. The pre-driver can shift the voltage level of an input signal to produce a shifted signal. The pre-driver can shift the voltage level in response to a selectable load resistance circuit and a voltage regulation feedback signal. The driver receives the shifted signal and generates a driver output signal in response to the received shifted signal. The replica circuit can be a scaled replica of the pre-driver and the driver using scaled components from the pre-driver and driver circuits. The scaled components can be used to generate the voltage regulation feedback signal. The generated voltage regulation feedback signal represents, for example, whether the output voltage of the driver output is above a reference voltage.

IPC Classes  ?

• H03K 19/0185 - Coupling arrangements; Interface arrangements using field-effect transistors only

Abstract

A reflowable camera module has a set of solder joints formed on a bottom surface of the camera module that provide electrical signal and power connections between the camera module and a printed circuit substrate. The solder joints are susceptible to failure caused by shear forces, particularly in corner regions. Additional localized mechanical supports are provided to protect those solder joints carrying power and electrical signals for the camera module. The localized mechanical supports are formed outside of a region containing the solder joints carrying power and electrical signals. The localized mechanical supports may include dummy solder joints formed in corner regions and/or dummy leads used to support the camera module. Solder joint reliability is enhanced without requiring the use of an underfill encapsulant.

IPC Classes  ?

• H04N 5/225 - Television cameras
• H01L 27/14 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy

Abstract

An image sensor apparatus is disclosed. The image sensor apparatus includes an image sensor for generating pixel data corresponding to a scene under a scene illuminant. The image sensor apparatus also includes a memory for storing color correction information corresponding to a subset of candidate illuminants. A color correction module in the image sensor apparatus derives an illuminant-dependent color correction matrix based on the color correction information corresponding to the subset of candidate illuminants and applies the illuminant-dependent color correction matrix to the pixel data to generate a color corrected digital image.

IPC Classes  ?

• H04N 9/64 - Circuits for processing colour signals
• H04N 9/07 - Picture signal generators with one pick-up device only
• H04N 9/73 - Colour balance circuits, e.g. white balance circuits or colour temperature control

Abstract

An image sensor testing apparatus is disclosed. The image sensor testing apparatus includes an electronic test system having a light source for illuminating an image sensor wafer to generate pixel data and a host processor for receiving the pixel data. An interface card coupled to the electronic test system has a programmable processor for processing the pixel data to generate processed data, the processed data transmitted to and analyzed by the host processor together with the pixel data to detect pixel defects in the image sensor wafer.

IPC Classes  ?

• H01L 21/66 - Testing or measuring during manufacture or treatment

Abstract

An image sensor apparatus is disclosed. The image sensor apparatus includes an image sensor for generating pixel data corresponding to a scene under a scene illuminant and a processor. The processor includes an illuminant estimation module for receiving a subset of the pixel data associated with a subset of a color space and finding a chromaticity trend in the pixel data subset to estimate the scene illuminant. A white balance and color correction module in the processor applies white balance and color correction coefficients to the pixel data according to the estimated scene illuminant.

IPC Classes  ?

• H04N 5/235 - Circuitry for compensating for variation in the brightness of the object
• H04N 9/07 - Picture signal generators with one pick-up device only

Abstract

An apparatus for measuring the power frequency of a light source includes a photosensitive transistor, a modulator, and a logic unit. The photo-sensitive transistor generates an electrical signal that is responsive to light incident thereon from the light source. The modulator generates a modulated signal based on the electrical signal that toggles at a rate substantially proportional to the power frequency of the light source. The logic unit is coupled to receive the modulated signal and determine its toggling frequency.

IPC Classes  ?

• H04N 5/235 - Circuitry for compensating for variation in the brightness of the object

Abstract

A switch-capacitor ('SC') amplifier includes a two-stage operational amplifier ('OP-AMP'), an input SC network, and a feedback SC network. The two-stage OP-AMP includes a first OP-AMP stage having an output coupled to an input of a second OP-AMP stage. The input SC network is coupled to an input of the first OP-AMP stage. The feedback SC network is configured to selectively couple the output of the first OP-AMP stage to the input of the first OP-AMP stage during a first phase of operation of the SC amplifier and to couple an output of the second OP-AMP stage to the input of the first OP-AMP stage during a second phase of operation of the SC amplifier.

IPC Classes  ?

• H03F 3/00 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
• H03F 3/45 - Differential amplifiers
• H03F 3/68 - Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics

Abstract

A light pointer apparatus has a light source module for projecting a light beam onto a surface. The light pointer apparatus also has an image sensor module and a transmitter module. The image sensor module detects a position in the surface of a visible light spot generated by the projected light beam striking the surface. The transmitter module transmits the position of the visible light spot to a remote device for remote control of a device.

IPC Classes  ?

• G03B 21/00 - Projectors or projection-type viewers; Accessories therefor
• G06F 3/033 - Pointing devices displaced or positioned by the user; Accessories therefor

Abstract

A dual-mode projection apparatus has a projection module for projecting an image onto a projection surface. An image sensor module captures images of the projection surface and determines spatial and temporal characteristics of a visible light spot superimposed on the projection surface. A communications module transmits the spatial and temporal characteristics of the visible light spot to a remote device for remote control of the device based on the spatial and temporal characteristics of the visible light spot.

IPC Classes  ?

• H04N 5/74 - Projection arrangements for image reproduction, e.g. using eidophor

Abstract

Embodiments of a process comprising receiving a plurality of offset analog signals, each corresponding to one of a plurality of black pixels in a pixel array; obtaining a corresponding digital value for each offset analog signal; computing an average of the digital values; and computing a black-level offset that, if applied to the digital values, would make the average of the digital values equal to a target value. Also disclosed are embodiments of an apparatus comprising an analog-to-digital converter coupled to an analog channel to receive offset analog black pixel signals from the analog channel and to obtain a corresponding digital value for each offset analog signal; circuitry and logic coupled to the analog-to-digital converter to average the digital values corresponding to the black pixels and compute a black-level offset that, if applied to the digital values of the black pixels, would make the average of the digital values of the black pixels equal to a target value.

IPC Classes  ?

• H04N 5/217 - Circuitry for suppressing or minimising disturbance, e.g. moire or halo in picture signal generation

Abstract

Disclosed are embodiments of an apparatus comprising an image sensor comprising a pixel array including a plurality of pixels, a detection circuit coupled to the pixel array to detect potential white/black pixel defects in the pixel array, a correction circuit coupled to the detection circuit to correct potential white/black pixel defects detected by the detection circuit. The apparatus further comprises a digital signal processor coupled to the image sensor, the digital signal processor comprising a memory to have therein a list of defective pixels in the pixel array, and a processor coupled to the memory to cross-check each pixel against the list of defective pixels and correct the digital value of each pixel found in the list of defective pixels. Other embodiments are disclosed and claimed.

IPC Classes  ?

• G02B 5/00 - Optical elements other than lenses
• H04N 5/367 - Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response applied to defects, e.g. non-responsive pixels
• H04N 5/369 - SSIS architecture; Circuitry associated therewith

Abstract

An image sensor has an array of pixels organized into a row and column format. Pixels are read out in a line-by-line sequence and buffered in a line image buffer. An extended dynamic range is supported by varying a column exposure time according to a periodic sequence. As a result, the pixel exposure times vary within each row. A high dynamic range is generated by combining pixel data of adjacent pixels within the same row that are of the same filter type but having different exposure times. Color interpolation is performed on the combined line data.

IPC Classes  ?

• H04N 5/347 - Extracting pixel data from an image sensor by controlling scanning circuits, e.g. by modifying the number of pixels having been sampled or to be sampled by combining or binning pixels in SSIS
• H04N 5/355 - Control of the dynamic range
• H04N 5/376 - Addressing circuits
• H04N 9/07 - Picture signal generators with one pick-up device only
• H04N 9/64 - Circuits for processing colour signals

Abstract

A rail-to-rail high speed subLVDS receiver demonstrates good jitter and duty cycle performance for high-speed signals at low power supply levels. A sample receiver includes a voltage shifter for shifting the voltage levels of a differential input signal so that a shifted differential input signal is produced. The shifted differential input signal can be applied to a first differential pair, and the differential input signal can be applied to a second differential pair. The outputs of the first and second differential pairs can be summed together to produce a differential output signal. The differential output signal can be output using an output block. A clamp circuit can be used to adjust the gain of the first differential pair responsive to a common mode voltage of the first and second differential input signals.

IPC Classes  ?

• H03F 3/45 - Differential amplifiers

Abstract

An apparatus for measuring the power frequency of a light source includes a photo-sensor, a modulator, and a logic unit. The photo-sensor generates an electrical signal that is responsive to light incident thereon from the light source. The modulator generates a modulated signal based on the electrical signal that toggles at a rate substantially proportional to the power frequency of the light source. The logic unit is coupled to receive the modulated signal and determine its toggling frequency.

IPC Classes  ?

• H04N 5/235 - Circuitry for compensating for variation in the brightness of the object