A data-driven misregistration parameter configuration and measurement system and method including simulating a plurality of measurement simulations of at least one multilayered semiconductor device, selected from a batch of multilayered semiconductor devices intended to be identical, using a plurality of sets of measurement parameter configurations, thereby generating simulation data for the at least one multilayered semiconductor device, identifying at least one set of recommended measurement parameter configurations, which is selected from the plurality of sets of measurement parameter configurations, providing a multilayered semiconductor device selected from the batch of multilayered semiconductor devices, providing the at least one recommended set of measurement parameter configurations to a misregistration metrology tool having multiple possible sets of measurement parameter configurations, measuring at least one multilayered semiconductor device, selected from the batch of multilayered semiconductor devices intended to be identical, using the at least one recommended set of measurement parameter configurations, thereby generating measurement data for the at least one multilayered semiconductor device, thereafter identifying a final recommended set of measurement parameter configurations and measuring misregistration of at least one multilayered semiconductor device, selected from the batch of multilayered semiconductor devices intended to be identical, using the final recommended set of measurement parameter configurations.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
2.
FAB MANAGEMENT WITH DYNAMIC SAMPLING PLANS, OPTIMIZED WAFER MEASUREMENT PATHS AND OPTIMIZED WAFER TRANSPORT, USING QUANTUM COMPUTING
Systems and methods of optimizing wafer transport and metrology measurements in a fab are provided. Methods comprise deriving and updating dynamic sampling plans that provide wafer-specific measurement sites and conditions, deriving optimized wafer measurement paths for metrology measurements of the wafers that correspond to the dynamic sampling plan, managing FOUP (Front Opening Unified Pod) transport through the fab, transporting wafers to measurement tools while providing the dynamic sampling plans and the wafer measurement paths to the respective measurement tools before or as the FOUPs with the respective wafers are transported thereto, and carrying out metrology and/or inspection measurements of the respective wafers by the respective measurement tools according to the derived wafer measurement paths. Quantum computing resources may be used to solve the corresponding specific optimization problems, to reduce the required time, improve the calculated solutions and improve the fab yield and accuracy of the produced wafers.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
G05B 19/418 - Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control (DNC), flexible manufacturing systems (FMS), integrated manufacturing systems (IMS), computer integrated manufacturing (CIM)
G05B 21/02 - Systems involving sampling of the variable controlled electric
3.
VACUUM HOLD-DOWN APPARATUS FOR FLATTENING BOWED SEMICONDUCTOR WAFERS
Vacuum hold-down apparatus suitable for retaining a wafer in a desired position and orientation, the apparatus including a vacuum chuck assembly defining a vacuum chuck surface having a vacuum communication aperture, a venturi vacuum generator fixed with respect to the vacuum chuck assembly and communicating with the vacuum chuck surface via the vacuum communication aperture and a positive pressure fluid line communicating with the venturi vacuum generator.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
4.
METHOD FOR MEASURING AND CORRECTING MISREGISTRATION BETWEEN LAYERS IN A SEMICONDUCTOR DEVICE, AND MISREGISTRATION TARGETS USEFUL THEREIN
A method for measurement of misregistration in the manufacture of semiconductor device wafers, the method including measuring misregistration between layers of a semiconductor device wafer at a first instance and providing a first misregistration indication, measuring misregistration between layers of a semiconductor device wafer at a second instance and providing a second misregistration indication, providing a misregistration measurement difference output in response to a difference between the first misregistration indication and the second misregistration indication, prodding a baseline difference output and ameliorating the difference between the misregistration measurement difference output and the baseline difference output.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
5.
DYNAMIC AMELIORATION OF MISREGISTRATION MEASUREMENT
A dynamic misregistration measurement amelioration method including taking at least one misregistration measurement at multiple sites on a first semiconductor device wafer, which is selected from a batch of semiconductor device wafers intended to be identical, analyzing each of the misregistration measurements, using data from the analysis of each of the misregistration measurements to determine ameliorated misregistration measurement parameters at each one of the multiple sites, thereafter ameliorating misregistration metrology tool setup for ameliorated misregistration measurement at the each one of the multiple sites, thereby generating an ameliorated misregistration metrology tool setup and thereafter measuring misregistration at multiple sites on a second semiconductor device wafer, which is selected from the batch of semiconductor device wafers intended to be identical, using the ameliorated misregistration metrology tool setup.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
6.
METHOD OF MEASURING MISREGISTRATION OF SEMICONDUCTOR DEVICES
A method of measuring misregistration in the manufacture of semiconductor devices including providing a multilayered semiconductor device, using a scatterometry metrology tool to perform misregistration measurements at multiple sites on the multilayered semiconductor device, receiving raw misregistration data for each of the misregistration measurements, thereafter providing filtered misregistration data by removing outlying raw misregistration data points from the raw misregistration data for each of the misregistration measurements, using the filtered misregistration data to model misregistration for the multilayered semiconductor device, calculating correctables from the modeled misregistration for the multilayered semiconductor device, providing the correctables to the scatterometry metrology tool, thereafter recalibrating the scatterometry metrology tool based on the correctables and measuring misregistration using the scatterometry metrology tool following the recalibration.
A misregistration metrology system useful in manufacturing semiconductor device wafers including an optical misregistration metrology tool configured to measure misregistration at at least one target between two layers of a semiconductor device which is selected from a batch of semiconductor device wafers which are intended to be identical, an electron beam misregistration metrology tool configured to measure misregistration at the at least one target between two layers of a semiconductor device which is selected from the batch and a combiner operative to combine outputs of the optical misregistration metrology tool and the electron beam misregistration metrology tool to provide a combined misregistration metric.
A target for use in the optical measurement of misregistration in the manufacture of semiconductor devices, the target including a first periodic structure formed on a first layer of a semiconductor device and having a first pitch along an axis and a second periodic structure formed on a second layer of the semiconductor device and having a second pitch along the axis, different from the first pitch, the second periodic structure extending beyond the first periodic structure along the axis.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
9.
SINGLE CELL GREY SCATTEROMETRY OVERLAY TARGETS AND THEIR MEASUREMENT USING VARYING ILLUMINATION PARAMETER(S)
Scatterometry overlay (SCOL) measurement methods, systems and targets are provided to enable efficient SCOL metrology with in-die targets. Methods comprise generating a signal matrix by: illuminating a SCOL target at multiple values of at least one illumination parameter, and at multiple spot locations on the target, wherein the illumination is at a NA (numerical aperture) >1/3 yielding a spot diameter < 1µ, measuring interference signals of zeroth and first diffraction orders, and constructing the signal matrix from the measured signals with respect to the illumination parameters and the spot locations on the target; and deriving a target overlay by analyzing the signal matrix. The SCOL targets may be reduced to be a tenth in size with respect to prior art targets, as less and smaller target cells are required, and be easily set in-die to improve the accuracy and fidelity of the metrology measurements.
Metrology targets, target design methods and metrology measurement methods are provided, which estimate the effects of asymmetric aberrations, independently or in conjunction with metrology overlay estimations. Targets comprise one or more pairs of segmented periodic structures having a same coarse pitch, a same 1:1 line to space ratio and segmented into fine elements at a same fine pitch, wherein the segmented periodic structures differ from each other in that one thereof lacks at least one of its corresponding fine elements and/or in that one thereof comprises two groups of the fine elements which are separated from each other by a multiple of the fine pitch. The missing element(s) and/or central gap enable deriving the estimation of aberration effects from measurements of the corresponding segmented periodic structures. The fine pitches may be selected to correspond to the device fine pitches in the corresponding layer.
Metrology methods and tools are provided, which enhance the accuracy of the measurements and enable simplification of the measurement process as well as improving the correspondence between the metrology targets and the semiconductor devices. Methods comprise illuminating the target in a Littrow configuration to yield a first measurement signal comprising a -1st diffraction order and a 0th diffraction order and a second measurement signal comprising a +1st diffraction order and a 0th diffraction order, wherein the -1st diffraction order of the first measurement signal and the +1st diffraction order of the second measurement signal are diffracted at 180 to a direction of the illumination, performing a first measurement of the first measurement signal and a second measurement of the second measurement signal, and deriving metrology metric(s) therefrom. Optionally, a reflected 0th diffraction order may be split to yield components which interact with the -1st and +1st diffraction orders.
A system is disclosed. The system includes a stage assembly configured to receive a specimen and maintain a height of the specimen at a first working distance height during a first characterization mode and an additional working distance height during an additional characterization mode. The system further includes an illumination source configured to generate an illumination beam. The system further includes an illumination arm including a set of optical elements configured to direct a portion of the illumination beam including illumination of a first wavelength to the specimen during the first characterization mode, and direct a portion of the illumination beam including illumination of an additional wavelength to the specimen during the additional characterization mode. The system further includes a detector assembly configured to receive illumination emanated from the specimen, and a controller configured to determine a specimen height value based on the illumination received by the detector assembly.
Process control methods, metrology targets and production systems are provided for reducing or eliminating process overlay errors. Metrology targets have pair(s) of periodic structures with different segmentations, e.g., no segmentation in one periodic structure and device-like segmentation in the other periodic structure of the pair. Process control methods derive metrology measurements from the periodic structures at the previous layer directly following the production thereof, and prior to production of the periodic structures at the current layer, and use the derived measurements to adjust lithography stage(s) that is part of production of the current layer. Production system integrate lithography tool(s) and metrology tool(s) into a production feedback loop that enables layer-by-layer process adjustments.
A plasma light source with lamp house correction is disclosed. The system may include a pump source configured to generate pump illumination. The pump illumination may be directed, by an elliptical reflector element, to a volume of gas contained within a plasma lamp in order to generate a plasma. The plasma may be configured to generate broadband illumination. The system may also include a correction plate and/or an aspherical elliptical reflector element configured to alter the pump illumination to correct for aberrations introduced by the plasma lamp. The system may also include an additional aspherical correction plate configured to alter the broadband illumination to correct for aberrations introduced by optical elements of the system.
H01J 61/02 - Gas-discharge or vapour-discharge lamps - Details
H01J 65/04 - Lamps in which a gas filling is excited to luminesce by an external electromagnetic field or by external corpuscular radiation, e.g. for indicating
15.
PHASE REVEALING OPTICAL AND X-RAY SEMICONDUCTOR METROLOGY
The embodiments disclosed herein can enable a target on a semiconductor wafer to be reconstructed and/or imaged. A surface of a target on a semiconductor wafer is measured using a wafer metrology tool. A voxel map of the surface is fixed to match geometry measurements and using scattering density of expected materials. Uniform scaling of the scattering density of all fixed surface voxels can occur.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
3D measurements of features on a workpiece, such as ball height, co-planarity, component thickness, or warpage, are determined. The system includes a broadband light source, a microlens array, a tunable color filter, a lens system, and a detector. The microlens array can focus a light beam to a points in a focal plane of the microlens array. The tunable color filter can narrow the light beam to a band at a central wavelength. The lens system can provide longitudinal chromatic aberration whereby different wavelengths are imaged at different distances from the lens system.
A semiconductor-inspection tool scans a semiconductor die using a plurality of optical modes. A plurality of defects on the semiconductor die are identified based on results of the scanning. Respective defects of the plurality of defects correspond to respective pixel sets of the semiconductor-inspection tool. The scanning fails to resolve the respective defects. The results include multi-dimensional data based on pixel intensity for the respective pixel sets, wherein each dimension of the multi-dimensional data corresponds to a distinct mode of the plurality of optical modes. A discriminant function is applied to the results to transform the multi-dimensional data for the respective pixel sets into respective scores. Based at least in part on the respective scores, the respective defects are divided into distinct classes.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
G01N 21/89 - Investigating the presence of flaws, defects or contamination in moving material, e.g. paper, textiles
18.
MAGNETICALLY MICROFOCUSED ELECTRON EMISSION SOURCE
A magnetically microfocused electron emission source apparatus is disclosed. The apparatus may include a magnetic emitter unit, wherein the magnetic emitter unit comprises an emitter. Further, the magnetic emitter unit may include one or more magnetic portions formed from one or more magnetic materials, wherein the one or more magnetic portions of the magnetic emitter unit are configured to generate a magnetic field proximate to a tip of the emitter of the magnetic emitter unit for enhancing focusing of the emitted electrons from the electron emitter.
A thickness measurement system may include an illumination source, a beam splitter to split illumination from the illumination source into two beams, a translation stage configured to translate a reference sample along a measurement direction, a first interferometer to generate a first interferogram between a first surface of a test sample and a first surface of the reference sample, and a second interferometer to generate a second interferogram between a second surface of the test sample and a second surface of the reference sample. A thickness measurement system may further include a controller to receive interference signals from the first and second interferometers as the translation stage scans the reference sample, and determine a thickness of the test sample based on the thickness of the reference sample and a distance travelled by the translation stage between peaks of envelopes of the interference signals.
An assembly for clamping semiconductor wafers includes a plate and an electrostatic chuck mounted on the plate. A plurality of slots extends between respective portions of the electrostatic chuck to receive arms of an end-effector of a wafer-handler. The arms of the end-effector support semiconductor wafers being placed onto and removed from the electrostatic chuck.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H02N 13/00 - Clutches or holding devices using electrostatic attraction, e.g. using Johnson-Rahbek effect
B23Q 3/15 - Devices for holding work using magnetic or electric force acting directly on the work
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
21.
HYBRID DESIGN LAYOUT TO IDENTIFY OPTICAL PROXIMITY CORRECTION-RELATED SYSTEMATIC DEFECTS
Defects can be identified using a hybrid design layout that includes a printable layer and a non-printed layer. The hybrid design layout can be generated by incorporating at least a portion of the non-printable layer layout with the printable layer layout. Defects can be identified using optical or scanning electron beam images.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
22.
PROCESS AND METROLOGY CONTROL, PROCESS INDICATORS AND ROOT CAUSE ANALYSIS TOOLS BASED ON LANDSCAPE INFORMATION
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
23.
CORRELATING SEM AND OPTICAL IMAGES FOR WAFER NOISE NUISANCE IDENTIFICATION
Disclosed are apparatus and methods for inspecting a semiconductor sample. Locations corresponding to candidate defect events on a semiconductor sample are provided from an optical inspector operable to acquire optical images from which such candidate defect events are detected at their corresponding locations across the sample. High-resolution images are acquired from a high-resolution inspector of the candidate defect events at their corresponding locations on the sample. Each of a set of modelled optical images, which have been modeled from a set of the acquired high-resolution images, is correlated with corresponding ones of a set of the acquired optical images, to identify surface noise events, as shown in the set of high-resolution images, as sources for the corresponding candidate events in the set of acquired optical images. Otherwise, a subsurface event is identified as a likely source for a corresponding candidate defect event.
H01L 21/66 - Testing or measuring during manufacture or treatment
G01N 23/2251 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes using incident electron beams, e.g. scanning electron microscopy [SEM]
24.
EMBEDDED PARTICLE DEPTH BINNING BASED ON MULTIPLE SCATTERING SIGNALS
An inspection system may include an illumination source to generate an illumination beam, illumination optics to direct the illumination beam to a sample. The system may further include a first collection channel to collect light from the sample within a first range of solid angles and at a first selected polarization. The system may further include a second collection channel to collect light from the sample within a second angular range, the second range of solid angles and at a second selected polarization. The system may further include a controller to receive two or more scattering signals. The scattering signals may include signals from the first and second collection channels having selected polarizations. The controller may further determine depths of defects in the sample based on comparing the two or more scattering signals to training data including data from a training sample having known defects at known depths.
An image sensor for electrons or short-wavelength light includes a semiconductor membrane, circuit elements formed on one surface of the semiconductor membrane, and a pure boron layer on the other surface of the semiconductor membrane. The circuit elements are connected by metal interconnects comprising a refractory metal. An anti-reflection or protective layer may be formed on top of the pure boron layer. This image sensor has high efficiency and good stability even under continuous use at high flux for multiple years. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor.
H01L 31/103 - Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier being of the PN homojunction type
26.
INTEGRATED SCANNING ELECTRON MICROSCOPY AND OPTICAL ANALYSIS TECHNIQUES FOR ADVANCED PROCESS CONTROL
A sample analysis system includes a scanning electron microscope, an optical and/or eBeam inspection system, and an optical metrology system. The system further includes at least one controller. The controller is configured to receive a first plurality of selected regions of interest of the sample; generate a first critical dimension uniformity map based on a first inspection performed by the scanning electron microscope at the first selected regions of interest; determine a second plurality of selected regions of interest based on the first critical dimension uniformity map; generate a second critical dimension uniformity map based on a second inspection performed by the optical and/or eBeam inspection system at the second selected regions of interest; and determine one or more process tool control parameters based on inspection results and on overlay measurements performed on the sample by the optical metrology system.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
Methods and systems are disclosed for determining overlay in a semiconductor manufacturing process. Radiation reflected from a diffraction pattern in a metrology target may include + 1 and - 1 diffraction patterns at different wavelengths and focal positions. The different wavelengths of radiation may be in a waveband where the sensitivity of contrast to wavelength is at a maximum. The reflected radiation may be analysed to obtain measured values of overlay as well as amplitude and/or phase corresponding to points distributed over the target, for different wavelengths and focal positions. The measured values of overlay may undergo a series of operations to determine the overlay. The determination may use an assumption that the amplitude and phase are unequal in the +1 and -1 diffraction orders.
Methods and systems for performing active learning for defect classifiers are provided. One system includes one or more computer subsystems configured for performing active learning for training a defect classifier. The active learning includes applying an acquisition function to data points for the specimen. The acquisition function selects one or more of the data points based on uncertainty estimations associated with the data points. The active learning also includes acquiring labels for the selected one or more data points and generating a set of labeled data that includes the selected one or more data points and the acquired labels. The computer subsystem(s) are also configured for training the defect classifier using the set of labeled data. The defect classifier is configured for classifying defects detected on the specimen using the images generated by the imaging subsystem.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
A sensor for detecting a temperature distribution imparted on a substrate in an environment is disclosed. The sensor includes a sensor substrate with one or more temperature sensing elements formed on the sensor substrate. In embodiments, a temperature sensing element includes at least one cavity with a thermally expandable material disposed within the cavity and a channel extending from the cavity with a slug disposed within the channel. In embodiments, the cavity has a fixed volume and is enclosed by a cover layer disposed or formed over the cavity. The thermally expandable material is configured to extend from the cavity into the channel to actuate the slug from a first position within the channel to at least a second position within the channel, where the position of the slug is indicative of a temperature of a respective portion of the sensor substrate.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
A high-resolution electron energy analyzer is disclosed. In one embodiment, the electron energy analyzer includes an electrostatic lens configured to generate an energy-analyzing field region, decelerate electrons of an electron beam generated by an electron source, and direct the decelerated electrons of the electron beam to the energy-analyzing field region. In another embodiment, the electron energy analyzer includes an electron detector configured to receive one or more electrons passed through the energy-analyzing field region. In another embodiment, the electron detector is further configured to generate one or more signals based on the one or more received electrons.
Common events between layers on a semiconductor wafer are filtered. Common events should contain the majority of defects of interest. Only nuisance events that are common between layers on the semiconductor wafer remain, which reduces the nuisance rate. Defects that are common across layers can be filtered based on, for example, defect coordinates, a difference image, or defect attributes.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
An imaging system utilizing atomic atoms is provided. The system may include a neutral atom source configured to generate a beam of neutral atoms. The system may also include an ionizer configured to collect neutral atoms scattered from the surface of a sample. The ionizer may also be configured to ionize the collected neutral atoms. The system may also include a selector configured to receive ions from the ionizer and selectively filter received ions. The system may also include one or more optical elements configured to direct selected ions to a detector. The detector may be configured to generate one or more images of the surface of the sample based on the received ions.
A system for generating pump illumination for laser sustained plasma (LSP) is disclosed. In embodiments, the system includes an illumination source configured to output illumination having a first spectral frequency and an optical frequency converter. The optical frequency converter can be configured to receive the illumination having the first spectral frequency from the illumination source and configured to output pump illumination having a second spectral frequency that is different from the first spectral frequency.
Systems and methods to focus and align multiple electron beams are disclosed. A camera produces image data of light from electron beams that is projected at a fiber optics array with multiple targets. An image processing module determines an adjustment to a voltage applied to a relay lens, a field lens, or a multi-pole array based on the image data. The adjustment minimizes at least one of a displacement, a defocus, or an aberration of one of the electron beams. Using a control module, the voltage is applied to the relay lens, the field lens, or the multi-pole array.
H01J 37/02 - Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof - Details
Electron gun systems with a particular inner width dimension, sweep electrodes, or a combination of a particular inner width dimension and sweep electrodes are disclosed. The inner width dimension may be less than twice a value of a Larmor radius of secondary electrons in a channel downstream of a beam limiting aperture, and a Larmor time for the secondary electrons may be greater than 1 ns. The sweep electrode can generates an electric field in a drift region, which can increase kinetic energy of secondary electrons in the channel.
Techniques and systems to achieve more accurate design alignment to an image by improved pixel-to-design alignment (PDA) target selection are disclosed. PDA targets in an image frame of a die can be biased to include a hotspot location in one of the PDA targets. The PDA targets can be evaluated for repetitive patterns by analyzing the uniqueness of the points used as the PDA targets.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or
37.
REFLECTION-MODE ELECTRON-BEAM INSPECTION USING PTYCHOGRAPHIC IMAGING
A particle-beam inspection system may include a reflective particle-beam imaging system providing an image of a selected portion of a sample and a diffraction pattern of the selected portion of the sample and a controller communicatively coupled to the reflective particle-beam imaging system. The controller may receive two or more sample-plane images from the reflective particle-beam imaging system associated with two or more selected portions of the sample, where at least some of the two or more selected portions of the sample overlap. The controller may further receive two or more diffraction-plane images from the reflective particle-beam imaging system associated with the two or more selected portions of the sample. The controller may further construct one or more output images of the two or more selected portions of the sample from the two or more diffraction-plane images using phase information obtained from the two or more sample-plane images.
G01N 23/2251 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes using incident electron beams, e.g. scanning electron microscopy [SEM]
H01J 37/28 - Electron or ion microscopes; Electron- or ion-diffraction tubes with scanning beams
Alignment can be monitored by positioning at least one alignment verification location per alignment frame. The alignment verification location is a coordinate within the alignment frame. A distance between each of the alignment verification locations and a closest instance of an alignment target is determined. An alignment score can be determined based on the distance. The alignment score can include a number of the alignment frames between the alignment verification location and the alignment target. If the alignment score is below a threshold, then alignment setup can be performed.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/68 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for positioning, orientation or alignment
H01L 21/66 - Testing or measuring during manufacture or treatment
39.
METAL PROTECTIVE LAYER FOR ELECTRON EMITTERS WITH A DIFFUSION BARRIER
An emitter with a diameter of 100 nm or less is used with a protective cap layer and a diffusion barrier between the emitter and the protective cap layer. The protective cap layer is disposed on the exterior surface of the emitter. The protective cap layer includes molybdenum or iridium. The emitter can generate an electron beam. The emitter can be pulsed.
Disclosed are methods and apparatus for facilitating defect detection in a multilayer stack. The method includes selection of a set of structure parameters for modeling a particular multilayer stack and a particular defect contained within such particular multilayer stack and a set of operating parameters for an optical inspection system. Based on the set of structure and operating parameters, an electromagnetic simulation is performed of waves scattered from the particular multilayer stack and defect and arriving at a collection pupil of the optical inspection system. Based on the simulated waves at the collection pupil, a design of a phase filter having a plurality of positions for changing a plurality of phases within a plurality of corresponding positions of the collection pupil of the optical inspection tool is determined so as to compensate for an adverse effect of the particular multilayer stack on obtaining a defect signal for the defect within such particular multilayer stack and/or to enhance such defect signal. The design of the phase filter is then provided for fabrication or configuration of a phase filter inserted within the optical inspection system for detection of defects in multilayer stacks with the same structure parameters as the particular multilayer stack. Methods and systems for inspecting a multilayer stack for defects are also disclosed.
Repeater analysis at a first threshold identifies repeater defects. The repeater defects are located at a coordinate that is the same on each reticle. Images on every reticle of the semiconductor wafer at the coordinate are received, and a plurality of signed difference images are obtained. A repeater threshold for signed difference images is calculated, as is consistency of the polarity. The threshold is applied to the images and a number of defects per each repeater that remain are determined. A secondary repeater threshold can be applied for nuisance filtering.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
Methods and systems for creating a sample of defects for a specimen are provided. One method includes detecting defects on a specimen based on output generated by a detector of an output acquisition subsystem. For the defects detected in an array region on the specimen, where the array region includes multiple array cell types, the method includes stacking information for the defects based on the multiple array cell types. The stacking includes overlaying design information for only a first of the multiple array cell types with the information for only the defects detected in the first of the multiple array cell types. In addition, the method includes selecting a portion of the detected defects based on results of the stacking thereby creating a sample of the detected defects.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
43.
CAPTURE OF REPEATER DEFECTS ON A SEMICONDUCTOR WAFER
Repeater analysis at a first threshold identifies repeater defects. The repeater defects are located at a coordinate that is the same on each reticle. Images on every reticle of the semiconductor wafer at the coordinate are received, and a plurality of signed difference images are obtained. A repeater threshold for signed difference images is calculated, as is consistency of the polarity. The threshold is applied to the images and a number of defects per each repeater that remain are determined. A secondary repeater threshold can be applied for nuisance filtering.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
A scanning electron microscopy (SEM) system includes a plurality of electron beam sources configured to generate a primary electron beam. The SEM system includes an electron-optical column array with a plurality of electron-optical columns. An electron-optical column includes a plurality of electron-optical elements. The plurality of electron-optical elements includes a deflector layer configured to be driven via a common controller shared by at least some of the plurality of electron-optical columns and includes a trim deflector layer configured to be driven by an individual controller. The plurality of electron-optical elements is arranged to form an electron beam channel configured to direct the primary electron beam to a sample secured on a stage, which emits an electron beam in response to the primary electron beam. The electron-optical column includes an electron detector. The electron beam channel is configured to direct the electron beam to the electron detector.
A controller is configured to perform at least a first characterization process prior to at least one discrete backside film deposition process on a semiconductor wafer; perform at least an additional characterization process following the at least one discrete backside film deposition process; determine at least one of a film force or one or more in-plane displacements for at least one discrete backside film deposited on the semiconductor wafer via the at least one discrete backside film deposition process based on the at least the first characterization process and the at least the additional characterization process; and provide at least one of the film force or the one or more in-plane displacements to at least one process tool via at least one of a feed forward loop or a feedback loop to improve performance of one or more fabrication processes.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/033 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or comprising inorganic layers
46.
MULTI-SPOT ANALYSIS SYSTEM WITH MULTIPLE OPTICAL PROBES
A system for analyzing a sample includes an illumination source with a plurality of transmitting optical fibers optically coupled to the illumination source and a detector with a plurality of receiving optical fibers optically coupled to the detector. The system further includes a plurality of probes coupled to respective ones of the plurality of transmitting optical fibers and respective ones of the plurality of receiving optical fibers. The plurality of probes are configured to illuminate respective portions of a surface of the sample and configured to receive illumination reflected, refracted, or radiated from the respective portions of the surface of the sample. The system may further include one or more switches and/or splitters configured to optically couple respective ones of the plurality of transmitting optical fibers to the illumination source and/or configured to optically couple respective ones of the plurality of receiving optical fibers to the detector.
A system for measuring an overlay error of a sample is disclosed. The system may include a broadband illumination source configured to emit broadband illumination. The system may also include one or more optical elements configured to direct the broadband illumination to a target disposed on the sample, wherein the one or more optical elements are configured to collect illumination from the target and direct it to a spectrometer, wherein the spectrometer is configured to disperse multiple wavelengths of the illumination collected from the sample to multiple elements of a sensor to generate a plurality of signals. The system may also include a controller configured to calculate an overlay error between a first structure and a second structure of the target by comparing the plurality of signals with a plurality of calculated signals.
An overlay metrology tool providing site-by-site alignment includes a controller coupled to a telecentric imaging system. The controller may receive two or more alignment images of an overlay target on a sample captured at two or more focal positions by the imaging system, generate alignment data indicative of an alignment of the overlay target within the imaging system based on the alignment images, set the alignment images as measurement images when the alignment of the overlay target is within selected alignment tolerances, direct the imaging system to adjust the alignment of the overlay target in the imaging system and further receive one or more measurement images from the imaging system when the alignment of the overlay target is outside the selected alignment tolerances, and determine overlay between two or more layers of the sample based on at least one of the measurement images.
Methods and systems for shape metric based scoring of wafer locations are provided. One method includes selecting shape based grouping (SBG) rules for at least two locations on a wafer. For one of the wafer locations, the selecting step includes modifying distances between geometric primitives in a design for the wafer with metrology data for the one location and determining metrical complexity (MC) scores for SBG rules associated with the geometric primitives in a field of view centered on the one location based on the distances. The selecting step also includes selecting one of the SBG rules for the one location based on the MC scores. The method also includes sorting the at least two locations on the wafer based on the SBG rule selected for the at least two locations.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
50.
TRAINING A NEURAL NETWORK FOR DEFECT DETECTION IN LOW RESOLUTION IMAGES
Methods and systems for training a neural network for defect detection in low resolution images are provided. One system includes an inspection tool that includes high and low resolution imaging subsystems and one or more components that include a high resolution neural network and a low resolution neural network. Computer subsystem(s) of the system are configured for generating a training set of defect images. At least one of the defect images is generated synthetically by the high resolution neural network using an image generated by the high resolution imaging subsystem. The computer subsystem(s) are also configured for training the low resolution neural network using the training set of defect images as input. In addition, the computer subsystem(s) are configured for detecting defects on another specimen by inputting the images generated for the other specimen by the low resolution imaging subsystem into the trained low resolution neural network.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
A system includes a controller with processors configured to execute an auto-correlation module embodied in one or more sets of program instructions stored in memory. The auto-correlation module is configured to cause the processors to receive one or more patterned wafer geometry metrics, receive wafer characterization data from one or more characterization tools, determine a correlation between the one or more patterned wafer geometry metrics and the wafer characterization data, generate a ranking of the one or more patterned wafer geometry metrics based on the determined correlation, construct a composite metric model from a subset of the one or more patterned wafer geometry metrics based on the ranking of the one or more patterned wafer geometry metrics, generate one or more composite wafer metrics from the composite metric model, and generate a statistical process control output based on the one or more composite wafer metrics.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or
H01L 21/66 - Testing or measuring during manufacture or treatment
52.
MULTILAYER TARGETS FOR CALIBRATION AND ALIGNMENT OF X-RAY BASED MEASUREMENT SYSTEMS
Multilayer targets enabling fast and accurate, absolute calibration and alignment of X-ray based measurement systems are described herein. The multilayer calibration targets have very high diffraction efficiency and are manufactured using fast, low cost production techniques. Each target includes a multilayer structure built up with pairs of X-ray transparent and X-ray absorbing materials. The layers of the multilayer target structure is oriented parallel to an incident X-ray beam. Measured diffraction patterns indicate misalignment in position and orientation between the incident X-Ray beam and the multilayer target. In another aspect, a composite multilayer target includes at least two multilayer structures arranged adjacent one another along a direction aligned with the incident X-ray beam, adjacent one another along a direction perpendicular to the incident X-ray beam, or a combination thereof. In some embodiments, the multilayer structures are spatially separated from one another by a gap distance.
G01N 23/201 - Measuring small-angle scattering, e.g. small angle X-ray scattering [SAXS]
G01N 23/205 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by using reflection of the radiation by the materials using diffraction cameras
G01N 23/207 - Diffractometry, e.g. using a probe in a central position and one or more displaceable detectors in circumferential positions
G01B 15/02 - Measuring arrangements characterised by the use of electromagnetic waves or particle radiation, e.g. by the use of microwaves, X-rays, gamma rays or electrons for measuring thickness
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/68 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for positioning, orientation or alignment
Methods and systems for selecting a mode for inspection of a specimen are provided. One method includes determining how separable defects of interest (DOIs) and nuisances detected on a specimen are in one or more modes of an inspection subsystem. The separability of the modes for the DOIs and nuisances is used to select a subset of the modes for inspection of other specimens of the same type. Other characteristics of the performance of the modes may be used in combination with the separability to select the modes. The subset of modes selected based on the separability may also be an initial subset of modes for which additional analysis is performed to determine the final subset of the modes.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
A method of determining OVL in a pattern in a semiconductor wafer manufacturing process comprises capturing images from a cell in a metrology target formed in at least two different layers in the wafer with parts of the target offset in opposing directions with respect to corresponding parts in a different layer. The images may be captured using radiation of multiple different wavelengths, each image including + 1 and - 1 diffraction patterns. A first and second differential signal may be determined for respective pixels in each image by subtracting opposing pixels from the + 1 and - 1 diffraction orders for each of the multiple wavelengths. An OVL for the respective pixels may be determined based on analyzing the differential signals from multiple wavelengths simultaneously. Then an OVL for the pattern may be determined as a weighted average of the OVL of the respective pixels. The weighting may be according to the sensitivity of the OVL to variation in wavelength.
Disclosed is a system that includes a light source for generating an illumination beam and an illumination lens system for directing the illumination beam towards a sample. The system further includes a collection lens system for directing towards a detector output light from the sample in response to the illumination beam and a detector for receiving the output light from the sample. The collection lens system includes a fixed-design compensator plate having individually selectable filters with different configurations for correcting system aberration of the system under different operating conditions. The system also includes a controller operable for: (i) generating and directing the illumination beam towards the sample, (ii) selecting operating conditions and a filter for correcting the system aberration under such selected operating conditions, (iii) generating an image based on the output light, and (iv) determining whether the sample passes inspection or characterizing such sample based on the image.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
56.
SEMI-SUPERVISED ANOMALY DETECTION IN SCANNING ELECTRON MICROSCOPE IMAGES
Autoencoder-based, semi-supervised approaches are used for anomaly detection. Defects on semiconductor wafers can be discovered using these approaches. The model can include a variational autoencoder, such as a one that includes ladder networks. Defect-free or clean images can be used to train the model that is later used to discover defects or other anomalies.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
57.
TARGETED RECALL OF SEMICONDUCTOR DEVICES BASED ON MANUFACTURING DATA
A system for providing a targeted recall includes a metrology sub-system for performing in-line measurements on semiconductor dies after one or more fabrication steps to generate in-line measurement profiles, a failure analysis sub-system for determining a manufacturing fingerprint of a failed die, and a controller. The metrology sub-system may further perform one or more measurements of the semiconductor dies after one or more packaging steps to generate package characterization profiles. The controller may generate manufacturing fingerprints for the semiconductor dies based on the in-line measurement profiles and the package characterization profiles, which are referenced to unique electronic chip identifiers. The controller may further identify at-risk dies by comparing the manufacturing fingerprints of the semiconductor dies with the manufacturing fingerprint of the failed die and direct a targeted recall for the one or more at-risk dies.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
58.
SYSTEM AND METHOD FOR PUMPING LASER SUSTAINED PLASMA AND ENHANCING SELECTED WAVELENGTHS OF OUTPUT ILLUMINATION
A system for pumping laser sustained plasma and enhancing one or more selected wavelengths of output illumination generated by the laser sustained plasma is disclosed. In embodiments, the system includes one or more pump modules configured to generate pump illumination for the laser sustained plasma and one or more enhancing illumination sources configured to generate enhancing illumination at one or more selected wavelengths. The pump illumination may be directed along one or more pump illumination paths that are non-collinear to an output illumination path of the output illumination. The enhancing illumination may be directed along an illumination path that is collinear to the output illumination path of the output illumination so that the enhancing illumination is combined with the output illumination, thereby enhancing the output illumination at the one or more selected wavelengths.
H01J 65/04 - Lamps in which a gas filling is excited to luminesce by an external electromagnetic field or by external corpuscular radiation, e.g. for indicating
H01J 61/02 - Gas-discharge or vapour-discharge lamps - Details
The present disclosure enables a semiconductor manufacturer to determine more accurately the presence of defects that would otherwise have gone unnoticed. It may be embodied as a system, method, or apparatus for novel defect discovery. The present disclosure may comprise providing a nuisance bin in a nuisance filter, partitioning the defect population into a defect population partition, segmenting the defect population partition into a defect population segment, selecting from the defect population segment a selected set of defects, computing one or more statistics of the signal attributes of the defects in the defect population segment, replicating the selected set of defects to yield generated defects, shifting the generated defects outside of the defect population segment, creating a training set, and training a binary classifier.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
G01N 21/95 - Investigating the presence of flaws, defects or contamination characterised by the material or shape of the object to be examined
60.
SYSTEM AND METHOD FOR PHOTOCATHODE ILLUMINATION INSPECTION
A high-brightness electron beam source is disclosed. The electron beam source may include a broadband illumination source configured to generate broadband illumination. A tunable spectral filter may be configured to filter the broadband illumination to provide filtered illumination having an excitation spectrum. The electron beam source may further include a photocathode configured to emit one or more electron beams in response to the filtered illumination, wherein emission from the photocathode is adjustable based on the excitation spectrum of the filtered illumination from the tunable spectral filter.
Methods and systems for improving a measurement recipe describing a sequence of measurements employed to characterize semiconductor structures are described herein. A measurement recipe is repeatedly updated before a queue of measurements defined by the previous measurement recipe is fully executed. In some examples, an improved measurement recipe identifies a minimum set of measurement options that increases wafer throughput while meeting measurement uncertainty requirements. In some examples, measurement recipe optimization is controlled to trade off measurement robustness and measurement time. This enables flexibility in the case of outliers and process excursions. In some examples, measurement recipe optimisation is controlled to minimize any combination of measurement uncertainty, measurement time, move time, and target dose. In. some examples, a measurement recipe is updated while measurement data is being collected. In some examples, a measurement recipe is updated at a site while data is collected at another site.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or
Methods and systems for training a machine learning model using synthetic defect images are provided. One system includes one or more components executed by one or more computer subsystems. The one or more components include a graphical user interface (GUI) configured for displaying one or more images for a specimen and image editing tools to a user and for receiving input from the user that includes one or more alterations to at least one of the images using one or more of the image editing tools. The component(s) also include an image processing module configured for applying the alteration(s) to the at least one image thereby generating at least one modified image and storing the at least one modified image in a training set. The computer subsystem(s) are configured for training a machine learning model with the training set in which the at least one modified image is stored.
A metrology system may include one or more casings that fit within an interior cavity of a sample transport device, an illumination source within one of the one or more casings, one or more illumination optics within one of the one or more casings for directing illumination from the illumination source to a sample located in the interior cavity of the sample transport device, one or more collection optics within one of the one or more casings for light from the sample in response to the illumination from the illumination source, and one or more detectors within one of the one or more casings for generating metrology data based on at least a portion of the light collected by the one or more collection optics.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/673 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components using specially adapted carriers
H01L 21/66 - Testing or measuring during manufacture or treatment
Methods and systems for determining boundaries of patterned features formed on a specimen from an unresolved image of the specimen are provided. One system includes computer subsystem(s) configured for comparing a difference image in which patterned feature(s) are unresolved to different simulated images. The different simulated images are generated by simulating difference images generated for the patterned feature(s) formed on the specimen with different perturbations, respectively. The computer subsystem(s) are configured for, based on the comparing, assigning an amplitude to each of the different perturbations. The computer subsystem(s) are further configured for determining one or more boundaries of the patterned feature(s) formed on the specimen by applying the different perturbations to one or more designed boundaries of the patterned feature(s) with the assigned amplitudes.
A defect in an image of a semiconductor wafer can be classified as an initial defect type based on the pixels in the image. Critical dimension uniformity parameters associated with the defect type can be retrieved from an electronic data storage unit. A level of defectivity of the defect can be quantified based on the critical dimension uniformity parameters. Defects also can be classified based on critical dimension attributes, topography attributes, or contrast attributes to determine a final defect type.
A system includes a controller with one or more processors and memory configured to store one or more sets of program instructions. The one or more processors are configured to execute the one or more sets of program instructions. The one or more sets of program instructions are configured to cause the one or more processors to apply filtering to a semiconductor wafer map: separate the filtered semiconductor wafer map into a plurality of dies; generate a set of die comparison statistics for the plurality of dies; generate at least one excursion map by applying at least one inspection threshold to the set of die comparison statistics; and detect at least one excursion within the at least one excursion map.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
67.
COMBINING SIMULATION AND OPTICAL MICROSCOPY TO DETERMINE INSPECTION MODE
A best optical inspection mode to detect defects can be determined when no defect examples or only a limited number of defect examples are available. A signal for a defect of interest at the plurality of sites and for the plurality of modes can be determined using electromagnetic simulation. A ratio of the signal for the defect of interest to the noise at each combination of the plurality of sites and the plurality of modes can be determined. A mode with optimized signal-to-noise characteristics can be determined based on the ratios.
Methods and systems for determining a layer on which a defect detected on a wafer is located are provided. One method includes detecting defects on a wafer by directing light to the wafer at first and second angles of incidence and determining locations of the defects on the wafer based on the output corresponding to the defects. For one of the defects detected in the output generated for one spot illuminated on the wafer with the light directed to the wafer at the first and second angles, the method includes comparing the locations of the one of the defects determined based on the output generated with the light directed to the one spot on the wafer at the first and second angles. The method further includes determining a layer of the wafer on which the one of the defects is located based on results of the comparing.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
69.
MEASUREMENT MODELS OF NANOWIRE SEMICONDUCTOR STRUCTURES BASED ON RE-USABLE SUB-STRUCTURES
Methods and systems for generating measurement models of nanowire based semiconductor structures based on re-useable, parametric models are presented herein. Metrology systems employing these models are configured to measure structural and material characteristics (e.g., material composition, dimensional characteristics of structures and films, etc.) associated with nanowire semiconductor fabrication processes. The re-useable, parametric models of nanowire based semiconductor structures enable measurement model generation that is substantially simpler, less error prone, and more accurate. As a result, time to useful measurement results is significantly reduced, particularly when modelling complex, nanowire based structures. The re-useable, parametric models of nanowire based semiconductor structures are useful for generating measurement models for both optical metrology and x-ray metrology, including soft x-ray metrology and hard x-ray metrology.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
70.
METROLOGY AND CONTROL OF OVERLAY AND EDGE PLACEMENT ERRORS
An overlay metrology system may include a controller to generate optical tool error adjustments for a hybrid overlay target including optically-resolvable features and device-scale features by measuring a difference between an optical overlay measurement based on the optically-resolvable features and a device-scale overlay measurement based on the device-scale features, generate target-to-device adjustments for the hybrid overlay target based on positions of features within the device area, determine device-relevant overlay measurements for one or more locations in the device area based on at least one of the optical overlay measurement, the optical tool error adjustments, or the target-to-device adjustments, and provide overlay correctables for the device area to a lithography tool to modify exposure conditions for at least one subsequent exposure based on the device-relevant overlay measurements.
Disclosed are apparatus and methods for performing overlay metrology upon a target having at least two layers formed thereon. A target having a plurality of periodic structures for measuring overlay in at least two overlay directions is provided. A charged particle beam is scanned in a first direction across a plurality of scan swaths of the target and at a first tilt with respect to the target so that each edge of the periodic structures is scanned at an angle. The charged particle beam is scanned in a second direction, which is opposite the first direction, across the plurality of scan swaths and at a second tilt that is 180° from the first tilt. The first and second direction scanning operations are then repeated for different first and second tilts and a different plurality of scan swaths of the target so that the target is scanned symmetrically. Images that are generated by the first and second direction scanning operations are combined to form a combined image, and an overlay error of the target is determined and reported based on analyzing the combined image.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
72.
REGION OF INTEREST AND PATTERN OF INTEREST GENERATION FOR CRITICAL DIMENSION MEASUREMENT
Processes to generate regions of interest for critical dimension uniformity measurement are disclosed. A pattern description based on historical data or a coordinate may be used as input. A pattern of interest can be determined, and then a region of interest can be determined. Instructions can be sent to a wafer inspection tool to image the region of interest on the semiconductor wafer.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
73.
VISUALIZATION OF THREE-DIMENSIONAL SEMICONDUCTOR STRUCTURES
A semiconductor metrology tool inspects an area of a semiconductor wafer. The inspected area includes a plurality of instances of a 3D semiconductor structure arranged periodically in at least one dimension. A computer system generates a model of a respective instance of the 3D semiconductor structure based on measurements collected during the inspection. The computer system renders an image of the model that shows a 3D shape of the model and provides the image to a device for display.
H01L 21/66 - Testing or measuring during manufacture or treatment
G01B 15/04 - Measuring arrangements characterised by the use of electromagnetic waves or particle radiation, e.g. by the use of microwaves, X-rays, gamma rays or electrons for measuring contours or curvatures
G01N 23/201 - Measuring small-angle scattering, e.g. small angle X-ray scattering [SAXS]
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 27/108 - Dynamic random access memory structures
74.
DETECTING DIE REPEATING PROGRAMMED DEFECTS LOCATED IN BACKGROUNDS WITH NON-REPEATING FEATURES
Systems and methods for detecting programmed defects on a wafer during inspection of the wafer are provided. One method includes selecting a mode of an inspection subsystem for detecting programmed defects on a wafer that generates output for the wafer having the lowest non-defect signal and at least a minimum signal for the programmed defects. The method also includes selecting a training care area that is mutually exclusive of care area(s) used for detecting the programmed detects during inspection of the wafer. The training care area generates less of the non-defect signal than the care area(s). The method further includes training a programmed defect detection method using the output generated with the selected mode in the training care area and detecting the programmed defects during the inspection of the wafer by applying the trained programmed defect detection method to the output generated in the care area(s) with the selected mode.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
G01N 21/88 - Investigating the presence of flaws, defects or contamination
G01N 21/95 - Investigating the presence of flaws, defects or contamination characterised by the material or shape of the object to be examined
75.
INSPECTION-BEAM SHAPING ON A SAMPLE SURFACE AT AN OBLIQUE ANGLE OF INCIDENCE
A beam shaper for an optical inspection tool includes a focal lens to focus an optical beam onto a target at an oblique angle of incidence and a phase modulator to substantially flatten a top of the optical beam in the plane of the target when the optical beam is focused onto the target at the oblique angle of incidence.
The system includes a photocathode electron source, diffractive optical element, and a microlens array to focus the beamlets. A source directs a radiation beam to the diffractive optical element, which produces a beamlet array to be used in combination with a photocathode surface to generate an array of electron beams from the beamlets.
A multi-beam metrology system includes an illumination source configured to generate a beam array, an illumination sub-system to direct the beam array to a sample at an array of measurement locations, an imaging sub-system to image the array of measurement locations as an array of imaged spots in a detection plane, and a detection assembly to generate detection signal channels associated with each of the imaged spots. The detection assembly includes an array of detection elements configured to receive the imaged spots with separate detection elements, and one or more position detectors to measure positions of the imaged spots in the detection plane. The detection assembly further generates feedback signals for the imaging sub-system based on the measured positions of the imaged spots to adjust the positions of one or more of the imaged spots in the detection plane to maintain alignment of the array of detection elements.
78.
HIGH-POWER SHORT-PASS TOTAL INTERNAL REFLECTION FILTER
An apparatus for generating filtered light may include a broadband illumination source configured to generate broadband illumination and a total internal reflection (TIR) filter formed from a material at least partially transparent to the broadband illumination. The TIR filter may include one or more input faces oriented to receive the broadband illumination. The TIR filter may further be oriented to reflect wavelengths of the broadband illumination beam below a selected cutoff wavelength on one or more filtering faces as filtered broadband illumination and provide the filtered broadband illumination beam through one or more output faces. The cutoff wavelength may further be selected based on total internal reflection on the one or more faces.
79.
HIGH-POWER SHORT-PASS TOTAL INTERNAL REFLECTION FILTER
An apparatus for generating filtered light may include a broadband illumination source configured to generate broadband illumination and a total internal reflection (TIR) filter formed from a material at least partially transparent to the broadband illumination. The TIR filter may include one or more input faces oriented to receive the broadband illumination. The TIR filter may further be oriented to reflect wavelengths of the broadband illumination beam below a selected cutoff wavelength on one or more filtering faces as filtered broadband illumination and provide the filtered broadband illumination beam through one or more output faces. The cutoff wavelength may further be selected based on total internal reflection on the one or more faces.
Metrology systems and methods are provided, which derive metrology target position on the wafer and possibly the target focus position during the movement of the wafer on the system's stage. The positioning data is derived before the target arrives its position (on-the-fly), sparing the time required in the prior art for the acquisition stage and increasing the throughput of the systems and methods. The collection channel may be split to provide for an additional moving-imaging channel comprising at least one TDI (time delay and integration) sensor with an associated analysis unit configured to derive wafer surface information, positioning and/or focusing information of the metrology targets with respect to the objective lens, during wafer positioning movements towards the metrology targets. Additional focusing-during-movement module and possibly feedbacking derived position and/or focus information to the stage may enhance the accuracy of the stopping of the stage.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
81.
APPARATUS AND METHOD FOR TWO DIMENSIONAL NANOINDENTATION
A two-dimensional nanoindentation measurement apparatus includes a first actuator that imparts a first force in a first direction, and a second actuator that imparts a second force in a second direction orthogonal to the first direction. A first elongate member has a first end attached to the first actuator and a second end attached to an indenter tip that engages the surface of the sample. A second elongate member includes a first end attached to the second actuator and a second end connected to the second end of the first elongate member. The first elongate member is rigid in the first direction and compliant in the second direction, and the second elongate member is rigid in the second direction and compliant in the first direction. The first force is imparted to the indenter tip in the first direction through the first elongate member, and the second force is imparted to the indenter tip in the second direction through the second elongate member.
These electron beam separator designs address thermally-induced beam drift in an electron-optical system. A heater coil wrapped around the beam separator unit can maintain constant power. Additional coils also can be wrapped around the beam separator in a bifilar manner, which can maintain constant power in the beam separator coils. Wien power can be determined, and then heater coil current can be determined.
H01J 37/28 - Electron or ion microscopes; Electron- or ion-diffraction tubes with scanning beams
G01N 23/225 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes
83.
METROLOGY TARGETS AND METHODS WITH OBLIQUE PERIODIC STRUCTURES
Metrology targets, design methods and measurement methods thereof are provided with periodic structure(s) which are oblique with respect to orthogonal production axes X and Y of the lithography tool - enabling more accurate overlay measurements of devices having diagonal (oblique, tilted) elements such as DRAM devices. One or more oblique periodic structure(s) may be used to provide one- or two-dimensional signals, with respect to one or more layers, possibly providing overlay measurements for multiple steps applied to one layer. The oblique periodic structure(s) may be used to modify current metrology target designs (e.g., imaging targets and/or scatterometry targets) or to design new targets, and measurement algorithms may be adjusted respectively to derive signals from the oblique periodic structure(s) and/or to provide pre-processed images thereof. The disclosed targets are process compatible and reflect more accurately the device overlays with respect to various process steps.
Methods and systems for x-ray based semiconductor metrology utilizing a broadband, soft X-ray illumination source are described herein. A laser produced plasma (LPP) light source generates high brightness, broadband, soft x-ray illumination. The LPP light source directs a highly focused, short duration laser source to a non-metallic droplet target in a liquid or solid state. In one example, a droplet generator dispenses a sequence of nominally 50 micron droplets of feed material at a rate between 50 and 400 kilohertz. In one aspect, the duration of each pulse of excitation light is less than one nanosecond. In some embodiments, the duration of each pulse of excitation light is less than 0.5 nanoseconds. In some embodiments, the LPP light source includes a gas separation system that separates unspent feed material from other gases in the plasma chamber and provides the separated feed material back to the droplet generator.
H01S 5/02 - Structural details or components not essential to laser action
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
A method of monitoring overlay is used in a manufacturing process in which successive layers are deposited one over another to form a stack. Each layer may include a periodic structure such as a diffraction grating to be aligned with a periodic structure in another layer. The stacked periodic structures may be illuminated to form + and - first order diffraction patterns from the periodic structures. An image of the stacked periodic structures may be captured including + and - diffraction patterns. The + and - diffraction patterns may be compared to calculate the overlay between successive layers.
In some embodiments, a first plurality of electron-microscope images for respective instances of a semiconductor structure is obtained from a first source. The electron-microscope images of the first plurality show different values of one or more semiconductor-fabrication parameters. A model is trained that specifies a relationship between the first plurality of electron-microscope images and the values of the one or more semiconductor-fabrication parameters. A second plurality of electron-microscope images for respective instances of the semiconductor structure on one or more semiconductor wafers is collected. The one or more semiconductor wafers are distinct from the first source. Values of the one or more semiconductor-fabrication parameters for the second plurality of electron-microscope images are predicted using the model.
H01L 21/66 - Testing or measuring during manufacture or treatment
G01N 23/2251 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes using incident electron beams, e.g. scanning electron microscopy [SEM]
87.
COMPENSATING FOR SCANNING ELECTRON MICROSCOPE BEAM DISTORTION-INDUCED METROLOGY ERROR USING DESIGN
Methods and systems for quantifying and correcting for non-uniformities in images used for metrology operations are disclosed. A metrology area image of a wafer and a design clip may be used. The metrology area image may be a scanning electron microscope image. The design clip may be the design clip of the wafer or a synthesized design clip. Tool distortions, including electron beam distortions, can be quantified and corrected. The design clip can be applied to the metrology area image to obtain a synthesized image such that one or more process change variations are suppressed and one or more tool distortions are enhanced.
Systems, methods, apparatuses, and articles of manufacture are provided for recovering a digitized spectrum and may comprise: an optical system configured to transform rays, the optical system including a diffraction grating, a steering mirror, a stage, and an actuator configured to move one of the stage, diffraction grating, or steering mirror according to a movement regime to vary an incidence of the rays on the stage; a sensor array disposed on the stage configured to receive the rays incident from the optical system at a plurality of measurement locations to obtain a plurality of ray spectra; and a processor electrically connected to the sensor array configured to receive the ray spectra, interleave the ray spectra to yield an interleaved spectrum, and deconvolve a point spread function corresponding to the optical system from the interleaved spectrum to yield a recovered digitized spectrum.
Methods and systems for measuring structural and material characteristics of semiconductor structures based on combined x-ray reflectometry (XRR) and x-ray photoelectron spectroscopy (XPS) are presented herein. A combined XRR and XPS system, includes an x-ray illumination source and x-ray illumination optics shared by both the XRI and XPS measurement subsystems. This increases throughput and measurement accuracy by simultaneously collecting XRR and XPS measurement data from the same area of the wafer. A combined XRR and XPS system improves measurement accuracy by employing XRR measurement data to improve measurements performed by the XPS subsystem, and vice-versa. In addition, a combined XRR and XPS system, enables simultaneous analysis of both XRR and XPS measurement data to more accurately estimate values of one of more parameters of interest. In a further aspect, any of measurement spot size, photon flux, beam shape, beam diameter, and illumination energy are independently controlled.
G01N 23/20008 - Constructional details of analysers, e.g. characterised by X-ray source, detector or optical system; Accessories therefor; Preparing specimens therefor
G01N 21/27 - Colour; Spectral properties, i.e. comparison of effect of material on the light at two or more different wavelengths or wavelength bands using photo-electric detection
G01B 15/02 - Measuring arrangements characterised by the use of electromagnetic waves or particle radiation, e.g. by the use of microwaves, X-rays, gamma rays or electrons for measuring thickness
G01B 15/08 - Measuring arrangements characterised by the use of electromagnetic waves or particle radiation, e.g. by the use of microwaves, X-rays, gamma rays or electrons for measuring roughness or irregularity of surfaces
G01J 3/50 - Measurement of colour; Colour measuring devices, e.g. colorimeters using electric radiation detectors
90.
DEFECT DISCOVERY USING ELECTRON BEAM INSPECTION AND DEEP LEARNING WITH REAL-TIME INTELLIGENCE TO REDUCE NUISANCE
A deep learning algorithm is used for defect discovery, such as for semiconductor wafers. A care area is inspected with the wafer inspection tool. The deep learning algorithm is used to identify and classify defects in the care area. This can be repeated for remaining care areas, but similar care areas may be skipped to increase throughput.
Disclosed are methods and apparatus for inspecting a photolithographic reticle. A near field reticle image is generated via a deep learning process based on a reticle database image produced from a design database, and a far field reticle image is simulated at an image plane of an inspection system via a physics-based process based on the near field reticle image. The deep learning process includes training a deep learning model based on minimizing differences between the far field reticle images and a plurality of corresponding training reticle images acquired by imaging a training reticle fabricated from the design database, and such training reticle images are selected for pattern variety and are defect-free. A test area of a test reticle, which is fabricated from the design database, is inspected for defects via a die-to-database process that includes comparing a plurality of references images from a reference far field reticle image to a plurality of test images acquired by the inspection system from the test reticle. The reference far field reticle image is simulated based on a reference near field reticle image that is generated by the trained deep learning model.
A method with increased throughput for measuring positions of structures on a substrate is disclosed. The substrate is taken from a load port of a metrology machine and is placed immediately in a stage of the metrology machine. At least two measurement loops are carried out, wherein a first measurement loop is started at a time when a substrate temperature is different from the temperature at the stage, and at least one second measurement loop is started at a time after the first measurement loop when the substrate temperature is different from the temperature at the stage. A model is used to calculate from the measured data, taken while there is a temperature mismatch between the stage and the substrate, a real grid of positions of structures on the substrate, corresponding to a situation where the temperature of the stage matches the temperature of the substrate.
Metrology targets designs, design methods and measurement methods are provided, which reduce noise and enhance measurement accuracy. Disclosed targets comprise an additional periodic structure which is orthogonal to the measurement direction along which given target structures are periodic. For example, in addition to two or more periodic structures along each measurement direction in imaging or scatterometry targets, a third, orthogonal periodic structure may be introduced, which provides additional information in the orthogonal direction, can be used to reduce noise, enhances accuracy and enables the application of machine learning algorithms to further enhance accuracy. Signals may be analyzed slice-wise with respect to the orthogonal periodic structure, which can be integrated in a process compatible manner in both imaging and scatterometry targets.
An overlay metrology system includes a particle-beam metrology tool to scan a particle beam across an overlay target on a sample including a first-layer target element and a second-layer target element. The overlay metrology system may further include a controller to receive a scan signal from the particle-beam metrology tool, determine symmetry measurements for the scan signal with respect to symmetry metrics, and generate an overlay measurement between the first layer and the second layer based on the symmetry measurements in which an asymmetry of the scan signal is indicative of a misalignment of the second-layer target element with respect to the first-layer target element and a value of the overlay measurement is based on the symmetry measurements.
G01N 21/84 - Systems specially adapted for particular applications
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
95.
SYSTEMS AND METHODS FOR DEVICE-CORRELATED OVERLAY METROLOGY
An overlay metrology system may measure a first-layer pattern placement distance between a pattern of device features and a pattern of reference features on a first layer of an overlay target on a sample. The system may further measure, subsequent to fabricating a second layer including at least the pattern of device features and the pattern of reference features, a second-layer pattern placement distance between the pattern of device features and the pattern of reference features on the second layer. The system may further measure a reference overlay based on relative positions of the pattern of reference features on the first layer and the second layer. The system may further determine a device-relevant overlay for the pattern of device-scale features by adjusting the reference overlay with a difference between the first-layer pattern placement distance and the second-layer pattern placement distance.
A parameterized geometric model of a structure can be determined based on spectra from a wafer metrology tool. The structure can have geometry-induced anisotropic effects. Dispersion parameters of the structure can be determined from the parameterized geometric model. This can enable metrology techniques to measure nanostructures that have geometries and relative positions with surrounding structures that induce non-negligible anisotropic effects. These techniques can be used to characterize process steps involving metal and semiconductor targets in semiconductor manufacturing of, for example, FinFETs or and gate-all-around field-effect transistors.
A method and system for measuring overlay in a semiconductor manufacturing process comprise capturing an image of a feature in an article at a predetermined manufacturing stage, deriving a quantity of an image parameter from the image and converting the quantity into an overlay measurement. The conversion is by reference to an image parameter quantity derived from a reference image of a feature at the same predetermined manufacturing stage with known OVL. The image is not a detailed image and the size of the feature is smaller than the resolution of the imaging tool. There is also disclosed a method of determining a device inspection recipe for use by an inspection tool comprising identifying device patterns as candidate device care areas that may be sensitive to OVL, deriving an OVL response for each identified pattern, correlating the OVL response with measured OVL, and selecting some or all of the device patterns as device care areas based on the correlation. Some embodiments use a novel target which may be printed in a die area or on a die.
Machine learning techniques are used to predict values of fixed parameters when given reference values of critical parameters. For example, a neural network can be trained based on one or more critical parameters and a low-dimensional real-valued vector associated with a spectrum, such as a spectroscopic ellipsometry spectrum or a specular reflectance spectrum. Another neural network can map the low-dimensional real-valued vector. When using two neural networks, one neural network can be trained to map the spectra to the low-dimensional real-valued vector. Another neural network can be trained to predict the fixed parameter based on the critical parameters and the low-dimensional real-valued vector from the other neural network.
A method may include, but is not limited to, receiving a plurality of reference images of a wafer. The method may include, but is not limited to, receiving the plurality of test images of the wafer. The method may include, but is not limited to, aligning the plurality of reference images and the plurality of test images via a coarse alignment process. The method may include, but is not limited to, aligning the plurality of reference images and the plurality of test images via a fine alignment process after alignment via the coarse alignment process. The fine alignment process may include measuring individual offsets and correcting individual offset data between at least one of the plurality of reference images and the plurality of test images.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
Scatterometry overlay (SCOL) single cell targets are provided, along with target design methods and measurement methods which employ the single cell SCOL targets for in-die metrology measurements, utilizing the small size of the target along with maintained optical performance due to the design of the target. Disclosed single cell targets comprise a lattice of elements at two or more layers which is periodic two or more measurement directions. Elements in different layers are offset with respect to each other and may have the same pitch along the measurement directions. Measurement algorithms are also provided to derive metrology measurements such as overlays from the single cell targets, possibly simultaneously in both (or more) measurement directions, reducing measurement time and enhancing the metrology throughput. Positioning the small targets in-die provides more accurate metrology results which are less sensitive to process variation.
patents
