A phase change switch device is provided, including: a first phase change switch including a phase change material, a heater device arranged to heat the phase change material, a first switch terminal electrically coupled to the phase change material, a second switch terminal electrically coupled to the phase change material, a first heater supply terminal electrically coupled to the heater and a second heater supply terminal electrically coupled to the heater, a second phase change switch including a phase change material, a heater device arranged to heat the phase change material, a first switch terminal electrically coupled to the phase change material, a second switch terminal electrically coupled to the phase change material, a first heater supply terminal electrically coupled to the heater and a second heater supply terminal electrically coupled to the heater, wherein the first switch terminal of the second phase change switch is electrically coupled to the first heater supply terminal of the second phase change switch.
A phase change switch device (10) is provided comprising a phase change material (11) and a heater device (12) including a transistor thermally coupled to the phase change material. The transistor is configured to have a first electrical resistance in a first state where current is applied to the heater device (12) for heating the phase change material (11), and have a second electrical resistance higher than the first electrical resistance in a second state outside heating phases of the heater device (12).
H10N 70/00 - Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
H10N 70/20 - Multistable switching devices, e.g. memristors
H10N 79/00 - Integrated devices, or assemblies of multiple devices, comprising at least one solid-state element covered by group
3.
APPARATUS FOR ELECTROCHEMICAL TREATING OF A SEMICONDUCTOR SUBSTRATE AND A PROCESS USING THE APPARATUS
An apparatus for electrochemical treating of a semiconductor substrate comprising at least one first tank filled with an electrolyte and comprising at least one first electrode, at least one second tank filled with an electrolyte and comprising at least one second electrode, and a separation unit that electrically separates the first and second tanks including their electrolytes, an electric power supply connected to the first and second electrodes, a transport means, which is configured for transporting the substrate over the first and second tanks, and a controller for controlling the transport means in a specific manner. Further, a process for electrochemical treating of a semiconductor substrate using the apparatus described herein is disclosed.
C25F 7/00 - Constructional parts, or assemblies thereof, of cells for electrolytic removal of material from objects; Servicing or operating
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
4.
MANUFACTURING AND REUSE OF SEMICONDUCTOR SUBSTRATES
A method of processing a semiconductor wafer includes: forming one or more epitaxial layers over a first main surface of the semiconductor wafer; forming one or more porous layers in the semiconductor wafer or in the one or more epitaxial layers, wherein the semiconductor wafer, the one or more epitaxial layers and the one or more porous layers collectively form a substrate; forming doped regions of a semiconductor device in the one or more epitaxial layers; and after forming the doped regions of the semiconductor device, separating a non- porous part of the semiconductor wafer from a remainder of the substrate along the one or more porous layers.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
5.
MONITORING DEVICE FOR A HIGH-VOLTAGE ONBOARD ELECTRICAL SYSTEM, AND METHOD FOR OPERATING A MONITORING DEVICE
The invention relates to a monitoring device (100) for a high-voltage onboard electrical system (10) of an electrically operatable vehicle, said high-voltage onboard electrical system (10) at least comprising a high-voltage energy storage device (12) which can be coupled to an electrically positive and an electrically negative charge line (30, 32); to the electrically positive charge line (30), which can be coupled to a positive electric voltage of a charging device (16) via a charging connection (14) in order to charge the high-voltage energy storage device (12); and to the electrically negative charge line (32), which can be coupled to a negative electric voltage of the charging device (16) in order to charge the high voltage energy storage device (12), wherein the monitoring device (100) has a control unit (20) with at least one current sensor (22) which is designed to determine the sum of the electric currents of the positive charge line (30) and the negative charge line (32), and the control unit (20) is designed to separate the positive charge line (30) and the negative charge line (32) from the high-voltage onboard electrical system (10) upon detecting a fault. The invention additionally relates to a method for operating a monitoring device (100).
G01R 15/20 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices
G01R 31/00 - Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
G01R 31/52 - Testing for short-circuits, leakage current or ground faults
B60L 3/00 - Electric devices on electrically-propelled vehicles for safety purposes; Monitoring operating variables, e.g. speed, deceleration or energy consumption
B60L 3/04 - Cutting-off the power supply under fault conditions
B60L 53/62 - Monitoring or controlling charging stations in response to charging parameters, e.g. current, voltage or electrical charge
6.
FLIP CHIP PACKAGE AND METHOD FOR FABRICATING A FLIP CHIP PACKAGE
A flip chip package comprises a substrate, a semiconductor die comprising a front side, an opposing backside and lateral sides connecting the front side and the backside, the semi-conductor die being arranged on the substrate such that the front side faces the substrate, a molded body at least partially encapsulating the lateral sides of the semiconductor die, a lid arranged at the backside of the semiconductor die, a layer of thermally conductive material arranged between the backside of the semiconductor die and the lid, and an adhesive mechanically coupling the lid to the semiconductor die and/or to the molded body, the adhesive being arranged at least partially along edges between the backside and the lateral sides of the semiconductor die, wherein the adhesive has an elastic modulus that is at least 50 times greater than an elastic modulus of the thermally conductive material.
A semiconductor package includes a substrate formed of electrically insulating material and having a die mounting surface, a first semiconductor die embedded within the substrate and comprising a first conductive terminal that faces the die mounting surface, a second semiconductor die mounted on the die mounting surface and comprising a first conductive terminal that faces and is spaced apart from the die mounting surface, and a first electrical connection that directly connects the first conductive terminals of the first and second semiconductor dies together, wherein the second semiconductor die partially overlaps with the first semiconductor die.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
The present invention relates to an electrical inverter system (1) comprising at least the components: first heat sink (2), second heat sink (3) and electrical capacitor (4), the components being stacked in said order. The system further comprises at least one fixing means (13A), wherein the three named components are secured by the fixing means such that they cannot move with respect to one another and bear against one another two-dimensionally, at least in part. The system further comprises a semiconductor power module (5), which is clamped between the heat sinks, and electrical contact elements (15), which electrically connect the electrical capacitor and the semiconductor power module.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
H01L 23/485 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
10.
DATA LINK LAYER AUTHENTICITY AND SECURITY FOR AUTOMOTIVE COMMUNICATION SYSTEM
The present disclosure relates to authenticity and data security for bus-based communication networks in a vehicle. The present disclosure teaches a protocol frame, a sender on data link layer, and a receiver on data link layer providing such authenticity and data security as well as a communication network in a vehicle employing the protocol frame, the sender and the receiver according to the present disclosure.
A method of splitting a semiconductor wafer includes: forming one or more epitaxial layers on the semiconductor wafer; forming a plurality of device structures in the one or more epitaxial layers; forming a metallization layer and/or a passivation layer over the plurality of device structures; attaching a carrier to the semiconductor wafer with the one or more epitaxial layers, the carrier protecting the plurality of device structures and mechanically stabilizing the semiconductor wafer; forming a separation region within the semiconductor wafer, the separation region having at least one altered physical property which increases thermo-mechanical stress within the separation region relative to the remainder of the semiconductor wafer; and applying an external force to the semiconductor wafer such that at least one crack propagates along the separation region and the semiconductor wafer splits into two separate pieces, one of the pieces retaining the plurality of device structures.
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
According to an embodiment, a sender configured to participate in an in-vehicle network. The sender is configured to receive a request for transmitting a payload and to generate, in response, a first header in the transport and/or network layer. It is further configured to access a key K of k bytes length and to generate an authentication tag using the key K and at least the first header as additional authentication data. The authentication tag serves to indicate an authenticity of a first frame on the transport and/or network layer as original frame sent from the sender to a receiver. The sender is further configured to generate the first frame comprising the first header, a transport layer payload and the authentication tag and to forward the first frame to the data link layer, the data link layer to generate a second frame on the data link layer and to emit the second frame to the in-vehicle network.
H04L 9/06 - Arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for blockwise coding, e.g. D.E.S. systems
H04L 9/32 - Arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system
H04L 29/06 - Communication control; Communication processing characterised by a protocol
H04L 29/08 - Transmission control procedure, e.g. data link level control procedure
14.
DATA LINK LAYER AUTHENTICITY AND SECURITY FOR AUTOMOTIVE COMMUNICATION SYSTEM
The present disclosure relates to authenticity and data security for bus based communication networks in a vehicle. The present disclosure teaches a protocol frame, a sender on data link layer, and a receiver on data link layer providing such authenticity and data security as well as a communication network in a vehicle employing the protocol frame, the sender and the receiver according to the present disclosure.
The invention relates to a sensor module, to a sensor device, and to an injection-molding tool. The sensor device and/or injection-molding tool have an aligning structure in order to keep the sensor device in a specified position while supplying injection casting material into the injection-molding tool.
A semiconductor device includes a substrate, a structured interlayer on the substrate and having defined edges, and a structured metallization on the structured interlayer and also having defined edges. Each defined edge of the structured interlayer neighbors one of the defined edges of the structured metallization and runs in the same direction as the neighboring defined edge of the structured metallization. Each defined edge of the structured interlayer extends beyond the neighboring defined edge of the structured metallization by at least 0.5 microns so that each defined edge of the structured metallization terminates before reaching the neighboring defined edge of the structured interlayer. The structured interlayer has a compressive residual stress at room temperature.
A method for forming a semiconductor substrate comprises heating a starting semiconductor substrate in order to reduce a concentration of oxygen in the starting semiconductor substrate at least at a depth of 5 µm from a surface of the starting semiconductor substrate to less than 80% of a maximum concentration of oxygen in the starting semiconductor substrate. The maximum concentration of oxygen in the starting semiconductor substrate is less than 3*1017 atoms per cm3. In addition, the starting semiconductor substrate prior to heating has a mean resistivity of at least 1 kΩcm. The method furthermore comprises forming an epitaxial layer at the surface of the starting semiconductor substrate. The epitaxial layer formed has a mean resistivity of at least 1 kΩcm.
In an embodiment, a method includes forming at least one trench in non-device regions of a first surface of a semiconductor wafer, the non-device regions being arranged between component positions, the component positions including device regions and a first metallization structure, applying a first polymer layer to the first surface of a semiconductor wafer such that the trenches and edge regions of the component positions are covered with the first polymer layer and such that at least a portion of the first metallization structure is uncovered by the first polymer layer, removing portions of a second surface of the semiconductor wafer, the second surface opposing the first surface, revealing portions of the first polymer layer in the non-device regions and producing a worked second surface and inserting a separation line through the first polymer layer in the non-device regions to form a plurality of separate semiconductor dies.
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
An insulated chip (100) comprising a semiconductor chip (102) comprising at least one chip pad (106) and an electrically insulating layer (104) surrounding at least part of the semiconductor chip (102).
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
20.
ELECTROMAGNETIC WAVE SENSOR FOR DETERMINING A HYDRATION STATUS OF A BODY TISSUE IN VIVO
An electromagnetic wave sensor (100)for determining a hydration statusof a body tissue (10) in vivocomprises an electromagnetic wave transmitter unit (120), a waveguide unit (110), and an electromagnetic wave receiver unit (130). The electromagnetic wave transmitter unit (120) is configured to emit an electromagnetic wave signal in a frequency range between 1 Hz and 1THz. The waveguide unit (110) is coupled to theelectromagnetic wave transmitter unit (120). The waveguide unit (110) is adapted to be arranged next to the body tissue (10) such that a fringe field (FF) of the electromagnetic wave signal guided by the waveguide unit (110) penetrates the body tissue (10). The electromagnetic wave receiver unit (130) is coupled to the waveguide unit (110). The electromagnetic wave receiver unit (130) is configured to receive the electromagnetic wave signal modified by the body tissue (10) in dependence of the hydration status of the body tissue (10).
A61B 5/05 - Detecting, measuring or recording for diagnosis by means of electric currents or magnetic fields; Measuring using microwaves or radio waves
Representative implementations of devices and techniques provide gain calibration for analog to digital conversion of time-discrete analog inputs. An adjustable capacitance arrangement is used to reduce or eliminate gain error caused by capacitor mismatch within the ADC. For example, the capacitance arrangement may include an array of multiple switched capacitances arranged to track gain error during search algorithm operation.
H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
Representative implementations of devices and techniques provide a built-in self-test (BIST) for an analog-to-digital converter (ADC). Stimuli needed to test an ADC are generated within the chip containing the ADC. Evaluation circuitry is also available on-chip. Generation and evaluation circuits and systems are based on existing circuits and/or components of the chip.
H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
In a magnet assembly, and an angle detection system embodying such a magnet assembly, for detecting a rotational angle of a rotating shaft, a respective magnet portion mounted on the shaft, has geometrical shapes and respective magnetizations with various symmetry features.
G01D 5/12 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
G01D 5/14 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
A sensor arrangement includes a sensor element and a magnet module. The sensor element is configured to measure a magnetic field and is positioned within a shaft. The shaft is configured to shield the magnet module and the sensor element. The magnet module is configured to generate the magnetic field. The sensor element is at least partially positioned within the shaft.
G01D 5/14 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
25.
300 MHZ TO 3 THZ ELECTROMAGNETIC WAVE SENSOR FOR DETERMINING AN INTERSTITIAL FLUID PARAMETER IN VIVO
An electromagnetic wave sensor for determining an interstitial fluid parameter in vivo comprises an implantable housing, and a sensor component hermetically encapsulated within the implantable housing. The sensor component comprises an electromagnetic wave transmitter unit configured to emit an electromagnetic wave signal in a frequency range between 300 MHz and 3 THz penetrating the implantable housing and penetrating an interstitial fluid probe volume, an electromagnetic wave receiver unit configured to receive the electromagnetic wave signal modified by the interstitial fluid probe volume, and a transceiver unit configured to transmit radio frequency signals related to the electromagnetic wave signal modified by the interstitial fluid probe volume. A system for determining an interstitial fluid parameter in vivo comprises the electromagnetic wave sensor and an external reader.
A61B 5/05 - Detecting, measuring or recording for diagnosis by means of electric currents or magnetic fields; Measuring using microwaves or radio waves
A61B 5/145 - Measuring characteristics of blood in vivo, e.g. gas concentration, pH-value
A61B 5/00 - Measuring for diagnostic purposes ; Identification of persons
H01Q 13/08 - Radiating ends of two-conductor microwave transmission lines, e.g. of coaxial lines, of microstrip lines
The invention relates to a system for monitoring at least one physiological parameter. The system comprises a measuring apparatus having a sensor unit (20) for detecting the at least one physiological parameter, and a transmission device (40, 50; 400, 500) and a reading device (90) for receiving data relating to the at least one physiological parameter. The transmission device is activated when the measuring apparatus is within range of the reading device (90).
Devices and methods are provided which facilitate detecting of a disturbance parameter being outside a predetermined range. Such disturbance parameter may for example cause de- pendent failures in redundant circuits, for example redundant circuits being arranged on a same substrate.
A membrane structure is provided. The membrane structure may include: a membrane; at least one hole extending into the membrane configured to receive a fluid. The membrane may include a plurality of electrodes arranged to provide one or more electric fields to control a movement of the fluid within the at least one hole.
B01D 69/02 - Semi-permeable membranes for separation processes or apparatus characterised by their form, structure or properties; Manufacturing processes specially adapted therefor characterised by their properties
A microfluidic device (100, 200, 300, 400, 500, 600, 700) includes at least a semiconductor chip (110) having a main chip surface. The microfluidic device further includes an encapsulation body (120) embedding the semiconductor chip, the encapsulation body having a main body surface (121). A microfluidic component (130) extends over the main chip surface and over the main encapsulation body surface and traverses an outline (110a) of the main chip surface.
In various embodiments, a chip card module is provided that can have: a chip card module support; a wiring structure that is arranged on the chip card module support; an integrated circuit that is arranged on the chip card module support and is electrically coupled to the wiring structure; a chip card module antenna that is arranged on the chip card module support and is electrically coupled to the wiring structure, and a lighting device that is arranged on the chip card module support and is electrically coupled to the wiring structure.
A semiconductor device comprises a transistor formed in a semiconductor body having a first main surface. The transistor comprises a source region, a drain region, a channel region, a drift zone, a source contact electrically connected to the source region, a drain contact electrically connected to the drain region, and a gate electrode at the channel region. The channel region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The channel region has a shape of a first ridge extending along the first direction. One of the source contact and the drain contact is adjacent to the first main surface, the other one of the source contact and the drain contact is adjacent to a second main surface that is opposite to the first main surface.
Some embodiments of the present disclosure relate to an infrared (IR) opto-electronic sensor having a silicon waveguide implemented on a single silicon integrated chip. The IR sensor has a semiconductor substrate having a silicon waveguide extends along a length between a radiation input conduit and a radiation output conduit. The radiation input conduit couples radiation into the silicon waveguide, while the radiation output conduit couples radiation out from the silicon waveguide. The silicon waveguide conveys the IR radiation from the radiation input conduit to the radiation output conduit at a single mode. As the radiation is conveyed by the silicon waveguide, an evanescent field is formed that extends outward from the silicon waveguide to interact with a sample positioned between the radiation input conduit and the radiation output conduit.
G01N 21/77 - Systems in which material is subjected to a chemical reaction, the progress or the result of the reaction being investigated by observing the effect on a chemical indicator
G01N 33/543 - Immunoassay; Biospecific binding assay; Materials therefor with an insoluble carrier for immobilising immunochemicals
The disclosure describes techniques for determining an ion concentration in a sample. An ion concentration of a sample is determined based on detecting a change in an electrical characteristic of an field-effect transistor (FET) semiconductor device due to a gate insulation layer (60) of the semiconductor device placed in contact with the sample.
The invention relates to a control unit (2) for an electric machine (1). The control unit has a power output stage (10) and a processing unit (14) that is connected to the power output stage. The processing unit is designed to actuate the power output stage in order to supply power to the electric machine and in order to produce a magnetic rotary field. The power output stage has at least one semiconductor switch half-bridge comprising two semiconductor switches (30,32;34,36;38,40), particularly field-effect transistors, wherein the semiconductor switches each comprise a diode (31,33) connected in parallel with the semiconductor switch. The power output stage is designed to rectify a voltage produced in the generator mode of the machine. According to the invention, the control unit has a current sensor (12,13) connected to the diodes. The current sensor is designed to sense a current flowing through the diode, and to produce a current signal that represents the current, in the generator mode. The control unit is designed to turn on the semiconductor switch connected in parallel with the diode on the basis of the current signal.
H02M 7/797 - Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
35.
OUTPUT SWITCHING SYSTEMS AND METHODS FOR MAGNETIC FIELD SENSORS
Embodiments relate to predictive output switching threshold determination systems and methods for sensors, for example magnetic field sensors. In embodiments, at least one individual switching threshold is determined predictively, rather than reactively, for each tooth or pole of a ferromagnetic tooth or pole wheel, respectively. For example, in one embodiment, the number of teeth or poles is programmed, and an optimal threshold for each tooth or pole is determined during a rotation of the wheel. The determined optimal threshold for each tooth is then used for that tooth in at least one subsequent rotation of the wheel, with calibration optionally taking place in future subsequent rotations. Thus, in embodiments, thresholds are predictive for each individual tooth or pole rather than reactive to an adjacent tooth or pole.
G01D 5/14 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
36.
METHOD FOR ACTUATING THE SWITCHING TRANSISTORS OF A RECTIFIER
The invention relates to a method for actuating the switching transistors of a rectifier which is provided for converting the phase voltages that are provided by a vehicle generator into a direct current voltage. Each switching transistor comprises a parasitic diode. An activation signal for initiating the conducting phase and a de-activation signal for ending the conducting phase are supplied to each control terminal of the switching transistors. A timer is started simultaneously with the provision of an activation signal and the de-activation signal is provided once a predetermined time period has passed.
H02M 7/219 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
The invention relates to a battery module and to an arrangement comprising a plurality of battery modules connected in series, comprising an energy store (3) having a positive and a negative connection (31, 32), a first and a second connection (A, B), a first and a second compensation connection (C, D), a boost converter (4) having a first and a second converter output (4a, 4b), and a decoupling switch (8), wherein the energy store (3) is connected at the positive connection (31) of the energy store to the first connection (A) and at the negative connection of the energy store to the second connection (B), wherein the first converter output (4a) is connected to the first compensation connection (C) and the second converter output (4b) is connected to the second compensation connection (D), wherein the converter (4) is designed to draw energy from the energy store (3) and to provide said energy to the converter outputs (4a, 4b) of the converter in the form of current, and wherein the decoupling switch (8) is connected at the first connection of the decoupling switch to the first compensation connection (C) and at the second connection of the decoupling switch to the second compensation connection (D).
BRANDENBURGISCHE TECHNISCHE UNIVERSITÄT COTTBUS (Germany)
Inventor
Augustin, Michael
Gössel, Michael
Kraemer, Rolf
Abstract
The invention relates to an electronic circuit arrangement for processing binary input values x ∈ X of the word length n (n > 1), comprising a first combinatorial circuit component (31), which is configured to process the binary input values x into a first binary output value having the word length a1 (a1 ≥ 1) and to provide said first binary output value at the output of the first combinatorial circuit component (31), said output having a number A1 (A1 > 1) of binary outputs, wherein: A1 ≥ a1, a second combinatorial circuit component (32), which is configured to process the binary input values x into a second binary output value, a third combinatorial circuit component (33), which is configured to process the binary input values x into a third binary output value, and a majority voting element (34), the input of which is connected to the output of the first, the second, and the third combinatorial circuit components (31, 32, 33) in order to receive the respective binary output value and which is configured to provide a majority signal at the output of the majority voting element according to the received binary output values, wherein the second and the third combinatorial circuit components (32, 33) are designed, in regard to faults in the processing of the binary input values x in the first combinatorial circuit component (31) for the first binary output value having the word length a1, to process binary input values of a real non-empty subset X1 of the set of the binary input values X in a fault-tolerant manner and to process binary input values of a further non-empty subset X2 of the set of the binary input values X that is different from the real non-empty subset X1 in a non-fault-tolerant manner.
The invention relates to a production method for a unipolar semiconductor component having a drift layer (16), comprising the following step: forming the drift layer (16) with a continuously decreasing concentration of a charge carrier doping (n) along the growth direction (19) of the drift layer (16) by way of epitaxial precipitation of the material of the drift layer (16), which comprises at least one wide band gap material. By using silicon carbide for the drift layer (16) formed by the epitaxial precipitation, a subsequent change of the continuously decreasing concentration of the charge carrier doping (n) due to a diffusion of the dopant atoms in downstream processes is suppressed. The production method can be used in particular to implement a unipolar semiconductor component comprising a drift layer (16), which component has an advantageous ratio of a comparatively high reverse bias voltage with relatively low forward losses, in a simple and/or cost-effective manner. The unipolar semiconductor component can be an active semiconductor component or a passive semiconductor component. The invention furthermore relates to a semiconductor device (10).
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , , or
H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities
H01L 29/808 - Field-effect transistors with field effect produced by a PN or other rectifying junction gate with a PN junction gate
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
40.
METHOD AND COMMUNICATION DEVICES FOR CONTROLLING AN UPLINK SIGNAL TRANSMISSION POWER
In an embodiment, a method for controlling an uplink signal transmission power in a communication device is provided. The method may include receiving a first message in a control channel modification time period, the first message including scheduling information about the timing of the transmission of a second message, the second message including an uplink signal transmission power related information, which will be transmitted by another communication device in the same control channel modification time period, controlling the communication device to receive the second message in accordance with the scheduling information, and controlling the uplink signal transmission power, which is used by the communication device for transmitting signals, depending on the uplink signal transmission power related information.
H04W 52/54 - Signalisation aspects of the TPC commands, e.g. frame structure
H04W 48/16 - Discovering; Processing access restriction or access information
H04W 52/14 - Separate analysis of uplink or downlink
H04W 52/28 - TPC being performed according to specific parameters using user profile, e.g. mobile speed, priority or network state, e.g. standby, idle or non-transmission
41.
METHOD FOR DETERMINING ACTIVE COMMUNICATION SESSIONS, COMMUNICATION SESSION INFORMATION SERVERS, METHOD FOR PROVIDING INFORMATION ABOUT ACTIVE COMMUNICATION SESSIONS AND DOCUMENT MANAGEMENT SERVERS
In a method for determining active communication sessions, a request to determine active communication sessions is received. Respective queries of document contents indicating whether communication sessions are currently active are sent to at least one document management server. The respective query answers that indicate one or more active communication sessions being controlled by a communication session server associated with the respective document management server are received. A first answer that indicates one or more active communication sessions being controlled by the associated communication session servers is sent. A communication session information server carries out the method.
H04L 12/18 - Arrangements for providing special services to substations for broadcast or conference
H04L 29/06 - Communication control; Communication processing characterised by a protocol
42.
RADIO COMMUNICATION TERMINAL DEVICES, RADIO COMMUNICATION NETWORK ARRANGEMENT, METHOD FOR OPERATING A RADIO COMMUNICATION TERMINAL DEVICE, FOR DUAL-CELL RECEPTION WITH TRANSMISSION GAP
In an embodiment, a radio communication terminal device is provided. The radio communication terminal device may include a receiver configured to receive radio data signals via a first frequency carrier and a second frequency carrier, and a controller configured to control the receiver such that the receiver does not receive radio data signals via the first frequency carrier during a transmission gap, and such that the receiver receives radio data signals via the second frequency carrier during the transmission gap.
In an embodiment, a mobile radio communication device is provided. The mobile radio communication device may include a mobile radio communication protocol circuit configured to provide a mobile radio base station function for a mobile radio communication with another mobile radio communication device, a network control interface circuit configured to receive communication control signals from a mobile radio network circuit being controlled by a mobile radio network operator to control the mobile radio communication protocol circuit, and a trusted processing circuit configured to process a computer program in a trusted processing environment to provide a trusted processing result, wherein the trusted processing circuit is outside of the mobile radio network operator's domain.
A method for transmitting a plurality of data symbols using a plurality of transmit antennas and a plurality of transmission resources is described, in which transmission symbols are generated and associated with the transmit antennas and transmission resources in such a way, such that if this association is represented in the form of a matrix, this matrix can be represented as the combination of two matrices comprising as components the data symbols multiplied with at least partially different weighting factors
In a method for determining active communication sessions, a request to determine active communication sessions is received. Queries as to whether communication sessions are currently active are sent to at least two communication session servers. The respective query answers that indicate one or more active communication sessions being controlled by the respective communication server are received. A first answer that indicates one or more active communication sessions being controlled by the at least two respective communication servers is sent. A communication session information server executes the method.
In an embodiment, a radio communication device is provided. The radio communication device may include a radio communication device control message generation circuit configured to generate a radio communication device control message including allocation information to control a radio resource allocation for radio communication devices of at least two groups of radio communication devices, the radio resource allocation being provided by another radio communication device.
In an embodiment, a communication device is provided. The communication device may include a scheduling message generating circuit configured to generate a scheduling message such that the scheduling message includes a receiving scheduling information specifying when to receive an uplink transmission control message, the receiving scheduling information being defined depending on a configuration of an uplink transmission channel, an uplink transmission control message generating circuit configured to generate an uplink transmission control message to control an uplink transmission from another communication device via the uplink transmission channel, and a transmitter circuit configured to transmit the uplink transmission control message in accordance with the receiving scheduling information such that the uplink transmission control message is transmitted via an uplink transmission control downlink channel.
A method of transmitting data is described comprising selecting a transmission mode from atleast a first and a second transmission mode, wherein according to the first transmission mode data is transmitted in at least two first time periods using first communication resources wherein the at least two first time periods are separated by a first time interval, wherein according to the second transmission mode data is transmitted in at least two second time periods using second communication resources wherein the at least two second time periods are separated bya second time interval, and wherein the first time interval is longer than the second and the first communication resources allow the transmission of a higher amount of data than the second communication resources; and transmitting data according to the selected transmission mode.
According to one embodiment of the invention, an ad-hoc communication radio module is provided, comprising an ad-hoc communication receiving circuit and/or an ad-hoc communication transmitting circuit, and comprising an ad-hoc communication protocol stack external control interface for the ad-hoc communication protocol stack external control of the ad-hoc communication receiving circuit and/or the ad-hoc communication transmitting circuit.
In an embodiment, a radio communication device is provided. A radio communication device may include a paging channel capacity setting circuit configured to set a paging channel capacity individually for another radio communication device.
A method for performing a measurement by a communication device is provided comprising selecting at least one measurement type of a plurality of measurement types, wherein each measurement type is assigned to a time slot, wherein the at least one measurement type is selected for a time interval which is pre-defined as a transmission gap of a receiver of the communication device for carrying out measurements by the receiver corresponding to the time slot; and performing a measurement of the at least one measurement type during the time interval.
Embodiments of the invention relate generally to communication devices and to a method for transmitting data. In an embodiment of the invention, a communication device is provided. The communication device may include a first access technology circuit providing signal transmission in accordance with a first access technology to transmit user data encoded in accordance with the first access technology, and a second access technology circuit providing signal transmission in accordance with a second access technology, wherein the second access technology is different from the first access technology, to transmit control data encoded in accordance with the first access technology and to transmit control data encoded in accordance with the second access technology.
L'AIR LIQUIDE, SOCIETE ANONYME POUR L'ETUDE ET L'EXPLOITATION DES PROCEDES GEORGES CLAUDE (France)
INFINEON TECHNOLOGIES AG (Germany)
Inventor
Tikovsky, Andreas
Laumbacher, Matthias
Reichl, Gerhard
Abstract
An arrangement for processing a substrate has an ion source for production of ions for processing the substrate using at least one process gas, and a process gas supply device, which is coupled to the ion source, in order to supply the process gas into the ion source. The process gas supply device has a tube composed of electrically insulating material, as well as a process gas supply regulator, which is designed such that the process gas is supplied at a pressure which is lower than the ambient pressure in the tube.
L'AIR LIQUIDE, SOCIETE ANONYME POUR L'ETUDE ET L'EXPLOITATION DES PROCEDES GEORGES CLAUDE (France)
INFINEON TECHNOLOGIES AG (Germany)
Inventor
Tikovsky, Andreas
Laumbacher, Matthias
Reichl, Gerhard
Abstract
Method for the treatment of a semiconductor substrate (2), in which an ion beam (3) is produced from a doping gas and is directed onto the semiconductor substrate (2), characterized in that the doping gas is fed through a plastic hose (6) to a means (3) for producing an ion beam (4), and is then ionised. The method according to the invention and the device 1 according to the invention advantageously permit the supply of the means 3 for producing an ion beam 4 with a doping gas from customary gas reservoirs 14 such as customary compressed gas cylinders, for example. Voltage flashovers from the deflection means 5 are effectively prevented by the use of a plastic hose 6. The method according to the invention and the device 1 according to the invention thus permit the simple construction of a corresponding ion implantation apparatus in conjunction with possible inexpensive supply thereof with doping gas.
A method for communication resource signaling including determining whether an event has taken place which indicates that communication resources being allocated to a communication terminal for a communication service are currently not needed by the communication terminal for the communication service; and sending a signaling message, if the event has taken place, to the communication terminal indicating that the communication resources continue to be allocated to the communication terminal for the communication service or that the communication resources are no longer allocated to the communication terminal for the communication service.
Disclosed is a contactless transmission system comprising a support substrate (11), an antenna (12) on the support substrate, a semiconductor chip (13), and a connecting means (14', 14') on the support substrate. The antenna and the semiconductor chip are mounted on the connecting means such that an electric current can flow between the antenna and the semiconductor chip.
G06K 19/077 - Constructional details, e.g. mounting of circuits in the carrier
57.
COMMUNICATION TERMINAL DEVICE, COMMUNICATION DEVICE, ELECTRONIC CARD, METHOD FOR A COMMUNICATION TERMINAL DEVICE AND METHOD FOR A COMMUNICATION DEVICE FOR PROVIDING A VERIFICATION
A communication terminal device for providing a certificate may include an application, configured to receive a first message from a requesting communication device, wherein the first message includes a request for a verification and a request for information describing the user. The application is further configured to generate a response message for the requesting communication device, wherein the response message includes the verification including a response to the request, wherein the verification is digitally signed using a secret key of a trusted entity.
The method (100) includes forming a leadframe (leadframe forming 102). The leadframe is directly bonded to the semiconductor chip (leadframe bonding 104). The leadframe is flexed and/or compressed in a mould cavity (leadframe compression 106). The compressed leadframe and the chip are moulded into a package (moulding 108).
A substrate (3) comprises a plurality of protruding contact elements (10) . An electrical circuit (1, 2) is provided on the substrate (3) , the electrical circuit (1, 2) comprising a plurality of electrical contact elements (11) . A layer of substrate adhesive (9) is provided on the substrate (3), the substrate adhesive (9) being in contact with the substrate (3) , with the electrical circuit (1, 2) and with the protruding contact elements (10) . A plurality of wiring elements (7) is connected between the protruding contact elements (10) and the electrical contact elements (11) .
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
60.
METHOD FOR SELECTING IN A SMART CARD OF A COMMUNICATION DEVICE A COMMUNICATION NETWORK TO BE USED BY THE DEVICE
The embodiments of the invention relate to smart cards, to a communication device, methods for selecting a communication network to be used by a communication device and a computer program product.
A transistor outline (TO) package (12) is provided for a semiconductor integrated device suitable for use in a control module of an automobile for connection between a printed circuit board (PCB) and a bus bar of such a module. The package comprises a package housing (14), having a first end (14b) suitable for mounting to a PCB and which has a width (w). The package is also formed with a leadframe which comprises a heat sink and ground plane blade (116) suitable for connection a bus bar, a plurality of connector leads (18) suitable for connection to a PCB and at least one source tab lead (206) suitable for connection to a module connector (10) of such a control module. The plurality of connection leads (18) and the source tab lead (206) extend from the first end (14b) of. the package housing side by side in the direction (D) along and within the width (w) of the first end of the package housing.
An electronic component comprises a plurality of leads and at least one cooling element. The bottom surface of the cooling element is exposed and the material of the cooling element is different from the material of the leads. At least one semiconductor chip is provided on the cooling element. An encapsulating compound covers at least part of the leads, at least part of the semiconductor chip or semiconductor chips, and at least part of the cooling element or cooling elements.
H01L 23/433 - Auxiliary members characterised by their shape, e.g. pistons
H01L 21/68 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for positioning, orientation or alignment
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
A lead frame assembly (2) includes at least one die paddle (3). The die paddle (3) comprises a first landing area (13) for receiving a first semiconductor chip (10) and a second landing area (23) for receiving a second semiconductor chip (20). One or more steps (17) is provided between the first landing area (13) and the second landing area (23).
In accordance with an embodiment of the invention, a method of grouping and assigning a plurality of random access sequences is provided, including assigning each random access sequence to one or a plurality of user equipments, to a plurality of users, type of users or types of communication connection.
Disclosed is a method for generating and transmitting system information in a mobile radio cell. In said method, system information is grouped into several information frames, information required for a mobile user device in order to verify if said mobile user device has access to the mobile radio cell being grouped into a single information frame, and the information frames are fed to the data securing layer by the network layer and are transmitted by means of the physical layer.
A system for controlling amplifier power is provided. The system includes a voltage envelope detector that receives a voltage signal and generates a voltage envelope signal. A current envelope detector receives a current signal and generates a current envelope signal. A power amplifier level controller receives the greater of the voltage envelope signal and the current envelope signal, such as by connecting the output of the voltage envelope detector and the current envelope detector at a common point and conducting the high frequency current components to ground via a capacitor. A power amplifier level control signal is then generated based on the voltage drop across the capacitor.
The invention relates to a method for generating a communication session control message for use in an IMS or Push-to-Talk system, a call control protocol message being generated according to the SIP protocol. For a communication session with a plurality of communication terminals, the call control protocol message contains address information indicating at least one communication terminal to which the call control protocol message is to be applied. Said address information is provided in a section of the call control protocol message outside an address field in which an address of a communication terminal can be indicated.
A semiconductor chip comprising an embedded comparator is provided with an on-chip test circuit for the comparator. The test circuit comprises an analog input unit which, during a test mode of the chip, produces a range of analog voltage signals that are applied to a first input of the comparator and a threshold voltage signal that is applied to a second input of the comparator. A switch control unit is provided to control the application of a predetermined sequential pattern of these analog voltage signals to the first input of the comparator in synchrony with a clock signal supplied to the switch control unit during a predetermined test period. A digital measurement unit is provided to receive output signals from the comparator during the test period in response to said input patterns, to compare the output signals with the clock signal, and to measure and to store data relating thereto.
A rotation sensor has a substrate (112) with a first surface (114) and a second surface (116). A shear-wave transparent mirror (106) is arranged on the first surface (114) of the substrate (112), and a shear-wave isolator (104) is arranged above the shear-wave transparent mirror (106), the shear-wave transparent mirror (106) and the shear-wave isolator (104) being arranged separated from each other to define a Coriolis zone (124) there between. A bulk-acoustic-wave resonator (102) is arranged above the shear-wave isolator (104), and a shear-wave detector (108) is arranged on the substrate (112) in a direction, in which a shear-wave (128) generated by the bulk-acoustic-wave resonator (102) upon rotation propagates.
A semiconductor package (24; 26) comprises a semiconductor component (1) including a circuit carrier (2; 27) , a semiconductor chip (3) and a plurality of electrical connections (4) . An adhesion promotion layer (22) is disposed on at least areas of the semiconductor component (1) and plastic encapsulation material (25) encapsulates at least the semiconductor chip (3), the plurality of electrical connections (4) and the plurality of the inner contact pads (9) . Surface regions (17) of the semiconductor component (1) are selectively activated.
A method of fabricating a semiconductor chip, the method includes the step of providing an adhesive layer (6) on the outer area of the active surface (13) of a device wafer (1) . Next, a rigid body (3) is attached to the active surface (13) of the device wafer (1) by the adhesive layer (6) . After this, the device wafer (1) is thinned by treating the passive surface of the device wafer (1) that is opposite to the active surface (13) . Following this, a first backing tape (21, 23) is connected to the passive surface of the device wafer (1) . Then, the outer portion (32) of the rigid body (3) is separated from the central portion (33) of the rigid body (3) . In addition, the outer portion (12) of the device wafer (1) is separated from the central portion (14) of the device wafer (1) . After this, the central portion (33) of the rigid body (3) is removed from the first backing tape (21, 23) . Next, the outer portion (12) of the device wafer (1) and the outer portion (32) of the rigid body (3) is removed from the first backing tape (21, 23) . After this, the device wafer (1) is diced into semiconductor chips .
H01L 21/68 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for positioning, orientation or alignment
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
An electronic component (46) comprises a lead frame (16). The lead frame (16) includes a heat spreader area (9), a plurality of conductive lead fingers (12), one or more non-conductive tie bars (15), and metal joint (6) connecting the non-conductive tie bar (15) to the heat spreader area (9). A semiconductor chip (8) is provided on a die pad (20) that is located on the heat spreader area (9). An encapsulating body (36) covers at least part of the semiconductor chip (8), at least part of the non-conductive tie bars (15) and part of lead frame (16).
An electronic component (10) comprises lead fingers (2) and a die paddle (4). A tape pad (1) is mounted below the lead fingers (2) and the die paddle (4). A first semiconductor chip (3) is bonded onto the tape pad (1) by a layer of first adhesive (8) and a second semiconductor chip (5) is bonded onto the die paddle (4) by a layer of second adhesive (7). Electrical contacts (11) are provided between the contact areas of the semiconductors (3) and (5), and the lead fingers (2). An encapsulating compound covers part of the lead fingers (2), the tape pad (1), the semiconductor chips (3) and (5) and the electrical contacts (11).
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
An electronic component (53) comprises an encapsulated body (2) with lead fingers (6) attached to the encapsulated body (2). The lead fingers (6) are bent to their final shape and extend away from the encapsulated body (2). A connective bar (3) joins the lead-finger tips (50), and a coating layer (15) covers the lead fingers (6).
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
75.
INTEGRATED CIRCUIT ARRANGEMENT AND METHOD FOR DETERMINING THE PARASITIC NON-REACTIVE RESISTANCE OF AT LEAST THE LEAD OF AT LEAST ONE MEMORY CELL OF AN INTEGRATED CIRCUIT ARRANGEMENT
An integrated circuit arrangement (300) has at least one electronic component (302), and also at least one resistance determining circuit that is coupled to the electronic component and is monolithically integrated with the latter and serves for determining the parasitic non-reactive resistance (303) of at least the lead to the at least one electronic component.
The invention relates to the use of a circuit arrangement for the generation of at least one control bit which may be analysed for error recognition, the circuit arrangement being embodied as follows: a combinator circuit with n binary inputs El,..., En for the input of n (n ≥ 2) information bits xl,..., xn and m binary outputs for the output f m (m ≥ 1) control bits cl,..., cm is provided, said combinator circuit is designed to carry out a Boolean function ci = fi(xil,..., xini) for determining a control bit ci for i = 1,..., m at the i-th output, wherein the number {xil,..., xini} of the ni information bits, determining the control bit ci, is a partial number of all n information bits {xl,..., xn} and the combinatory circuit is furthermore designed to carry out a first Boolean function fl(xll,..., xlnl) of the form cl = fl(xll,..., xlnl) = fll(xll, xl2) XOR fl2(xl3, xl4) XOR... XOR flkl(xl(nl-l), xlnl) to output a first control bit cl at a first output, wherein nl is an even number with nl ≥ 2 and 2 kl = nl and the Boolean functions fll(xll, xl2),..., flkl(xl(nl-l), xlnl) are each non-linear Boolean functions with two variables which may be carried out by logical gates with two inputs and one output, wherein the logical gates each has a determining value cll,..., clkl.
H03M 13/00 - Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
One embodiment of the invention provides a detection system. The detection system includes an analog to digital converter that converts one or more analog vibration signals into one or more digital samples, a filter that analyzes at least a portion of the one or more, digital samples and identifies energy values across a range of frequencies, a frequency selector that selects a subset of the frequencies for analysis according to one or more operational characteristics, and an analyzer that analyzes the subset of frequencies along with threshold values to identify one or more results.
F02D 35/02 - Non-electrical control of engines, dependent on conditions exterior or interior to engines, not otherwise provided for on interior conditions
G01L 23/22 - Devices or apparatus for measuring or indicating or recording rapid changes, such as oscillations, in the pressure of steam, gas, or liquid; Indicators for determining work or energy of steam, internal-combustion, or other fluid-pressure engines from the condition of the working fluid for detecting or indicating knocks in internal-combustion engines; Units comprising pressure-sensitive members combined with ignitors for firing internal-combustion engines
A QFN integrated circuit 29 is mounted on a leadframe having multiple lead lands 23, 25, and resin material 28 encapsulates the integrated circuit 29 leaving the lead lands 23, 25 exposed. Subsequently a sawing operation divides the lead lands.23, 25 into multiple leads, and the lead frame and resin material are partitioned to form packages. The pitch of the resultant leads is not limited by the pitch of the lead lands of the leadframe, so the leadframe can be of the relatively cheap stamped leadframe variety, in which the pitch of the lead lands is higher than the desired pitch of the leads of the completed package. The sawing operation may further include reshaping the diepad area 21 of the leadframe to produce heat sink fins, for improved heat dissipation. The proposed process is suitable both to produce packages including only a single integrated circuit, and also to produce multi-chip modules.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
Embodiments of the invention provide a semiconductor device having dielectric material and its method of manufacture. A manufacturing method comprises forming a layer of silicon over a substrate, forming an opening through the layer of silicon, filling the opening with a conductor; and anodically etching the layer of silicon so as to form porous silicon. Embodiments may further include passivating the porous silicon such as by treating its surface with an organometallic compound. Other embodiments of the invention provide a semiconductor device comprising a layer comprising functional devices; and an interconnect structure over the layer, wherein the interconnect structure comprises a porous silicon dielectric. In an embodiment of the invention, the interconnect structure comprises a dual damascene interconnect structure. Other embodiments may include a passivation step after the step of oxidizing the porous silicon.
A DCXO device comprises a crystal resonator (13), and a binary weighted switched capacitor network (14) with a switchable capacitance. A microprocessor (12) is provided for controlling the switched capacitor network to obtain a desired oscillation frequency of the DCXO device. The microprocessor receives (i) an actual oscillation frequency value (16) of the DCXO device and (ii) a desired oscillation frequency value (17), e.g. from a radio base station. The processor is further arranged to calculate a capacitance difference (ﶴC1) required for tuning the DCXO device from the actual oscillation frequency value to the desired oscillation frequency value based on static (C0) and motional (Cm) capacitances of the crystal resonator, on the capacitance (C1) of the DCXO device, and on the actual and desired oscillation frequency values, and to switch the switched capacitor network in response to the calculated capacitance difference.
H03B 5/32 - Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator
H03J 5/24 - Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with a number of separate pretuned tuning circuits or separate tuning elements selectively brought into circuit, e.g. for waveband selection or for television channel selection
81.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURE THEREOF
Vertically stacked integrated circuits and methods of fabrication thereof are disclosed. Deep vias that provide vertical electrical connection for vertically stacked integrated circuits are formed early in the manufacturing process, before integrated circuits are bonded together to form a three dimensional integrated circuit (3D-IC).
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
82.
METHOD FOR THE PRODUCTION OF A COMPOUND SEMICONDUCTOR FIELD EFFECT TRANSISTOR COMPRISING A FIN STRUCTURE, AND COMPOUND SEMICONDUCTOR FIELD EFFECT TRANSISTOR COMPRISING A FIN STRUCTURE
The invention relates to a method for producing a compound semiconductor field effect transistor comprising a fin structure. Said method encompasses the following steps: a first layer containing a first compound semiconductor material is formed on or above a substrate; a second layer containing a second compound semiconductor material is formed on the first layer; a third layer containing a third compound semiconductor material is formed on the second layer; a covering layer containing a fourth compound semiconductor material is formed in at least one subarea of the third layer; a fin structure is formed by structuring the second layer, the third layer, and the covering layer; a first source/drain region is formed from a first subarea of the covering layer while a second source/drain region is formed from a second subarea of the covering layer; and a gate region is formed in at least one subarea of at least one sidewall of the fin structure and/or in a subarea of a top surface of the third layer.
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
There is provided apparatus for protection against over voltages and/or under voltages. The apparatus comprises a pass transistor through which an input voltage is applied, the input voltage varying between a low voltage (0) and a high voltage (1), and means for selectively varying the gate voltage of the pass transistor when the input voltage is transitioning from the low voltage to the high voltage or from the high voltage to the low voltage. The pass transistor may comprise an NMOS or a PMOS transistor. There is also provided a receiver comprising the aforementioned apparatus and a method for protecting against over voltages and/or under voltages.
A contact structure (14) comprises a base material (6). On the top surface of the base material (6) is provided with a plurality of contact areas (1) and on each contact area (1) is formed a contact stud (3) having the same material as the contact area (9). One or more layers of electrically conductive coating material (5) covers the contact stud (3).
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
85.
ELECTRONIC COMPONENT AND A METHOD OF FABRICATING AN ELECTRONIC COMPONENT
Electronic component and a method of fabricating an electronic component An electronic component comprises a lead frame assembly, an insert, a semiconductor chip and an encapsulation compound. The lead frame assembly includes a mounting hole (7), a die pad, a plurality of bonding fingers (11) and a plurality of lead fingers (12). The insert (6) has a hollow centre and is located at the mounting hole (7) of the lead frame assembly. The semiconductor chip (8) is placed on the die pad. The semiconductor chip (8) has contact areas on the surface of the semiconductor chip. A plurality of electrical contact means (13) links the contact areas of the semiconductor chip (8) to the bonding fingers (11) of the lead frame assembly. An encapsulating compound encloses the insert (6), the semiconductor chip (8), and the contact means (13) but however leaving the hollow centre of the insert (6) uncovered.
A power semiconductor module (1), for example for use in a switched-mode power supply, needs to be able to be fabricated as easily and flexibly as possible. To this end, the power semiconductor module (1) has one or more power semiconductor components arranged on a power substrate (2) and a logic semiconductor chip (6) which is arranged on a connecting substrate (8) and which is provided for controlling the power semiconductor components. To design the power semiconductor module (1) particularly flexibly, the power substrate (2) and the connecting substrate (8) are DC-isolated from one another, so that they initially form two separate modules in the fabrication process. The connecting substrate (8) is connected to the power substrate (2) by means of bonding wires (11) having a diameter d, where d ≤ 1 mm.
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
87.
MIXER CIRCUIT AND RF TRANSMITTER USING SUCH MIXER CIRCUIT
The invention relates to a mixer circuit comprising a mixer core 440 for mixing an input frequency signal with a local oscillator signal. The mixer circuit 400 further comprises a variable current block 430 arranged to feed the mixer core 440 with an amplified input signal, said variable current block 430 comprising transistors M100, M101, M102,..., Mn and switches S0, S1, S2,..., Sn enabling provision of a variable current. By means of the invention the current consumption can be reduced by varying the current required in accordance with power output need. The invention also relates to a RF transmitter comprising such mixer circuit.
According to a method for narrowband compatible wideband voice communication in a DECT system (40) a wideband voice signal (200; 200') is split up into a first and a second component, wherein the first component is a narrowband voice signal (202; 202') having a spectral content of about 300 Hz to about 3.4 kHz and the second component is a wideband residue signal (204; 204'). The narrowband voice signal is encoded by using a G.726 standard encoder (205) creating an encoded narrowband voice signal (206; 206') interpretable by a narrowband capable portable part, whereas the wideband residue signal is encoded by using another encoder (207). The encoded narrowband voice signal (206; 206') and the encoded wideband residue signal (208; 208') are then transmitted to a wideband capable part.
A method is provided for slot assignment in a DECT system, which uses TDMA slot pairs (0-11, 12-23) for communication between portable parts (32-34) and at least one fixed part (41), wherein an ordinary slot pair (0, 12; 2, 14) is assigned for communication between a portable part (32; 33) and a fixed part (41). The method comprises the steps of, during the setting up of a wideband call to or from the portable part, assigning an additional slot pair (4, 16; 3, 15) for communication between the portable part and the fixed part, performing the wideband call using the two time slot pairs assigned, and finishing the wideband call and in connection therewith releasing the additional time slot pair so that the additional time slot pair can be used for communication by another portable part.
To form a semiconductor device, an insulating layer is formed over a conductive region and a pattern transfer layer is formed over the insulating layer. The pattern transfer layer is patterned in the reverse tone of a layout of recesses to be formed in the insulating layer such that the pattern transfer layer remains over regions where the recesses are to be formed. A mask material is formed over the insulating layer and is aligned with the pattern transfer layer. Remaining portions of the pattern transfer layer are removed and recesses are etched in the insulating layer using the mask material as a mask.
The present invention relates to a 3-dimensional multichip module having a first integrated circuit chip (IC1) which has at least one first high-temperature functional area (HTB1) and one first low-temperature functional area (NTB1), and having at least one second integrated circuit chip (IC2) having a second high-temperature functional area (HTB2) and having a second low-temperature functional area (NTB2), with the second high-temperature functional area (HTB2) being arranged opposite the first low-temperature functional area (NTB1). Alternatively, at least one low-temperature chip which has only one low-temperature functional area can also be arranged between the first and the second chip (IC1, IC2).
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
92.
MULTI-FIN COMPONENT ARRANGEMENT AND METHOD FOR PRODUCING A MULTI-FIN COMPONENT ARRANGEMENT
The invention relates to a multi-fin component arrangement comprising a plurality of multi-fin component partial arrangements, each of the multi-fin component partial arrangements comprising a plurality of electronic components having a multi-fin structure. At least one multi-fin component partial arrangement comprises at least one dummy structure which is formed between at least two of the electronic components formed in the at least one multi-fin component partial arrangement. The at least one dummy structure is embodied in such a way that electrical characteristics of the electronic components formed in the multi-fin component partial arrangements are adapted to each other.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/84 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
Semiconductor devices with transistors having different gate dielectric materials and methods of manufacture thereof are disclosed. One embodiment includes a semiconductor device including a workpiece, the workpiece including a first region and a second region proximate the first region. A first transistor is disposed in the first region of the workpiece, the first transistor having at least two first gate electrodes. A first gate dielectric is disposed proximate each of the at least two first gate electrodes, the first gate dielectric comprising a first material. A second transistor is disposed in the second region of the workpiece, the second transistor having at least two second gate electrodes. A second gate dielectric is disposed proximate each of the at least two second gate electrodes, the second gate dielectric comprising a second material. The second material is different than the first material.
H01L 21/84 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
A method for printing contacts utilizes photolithographic pattern reversal. A negative of the contact is printed on a resist layer (205). Unexposed portions of the resist layer are stripped to expose a first layer (305). The first layer is etched to remove exposed portions of the first layer not covered by the negative of the contact and to expose a second layer (215). A pattern reversal is performed to cure exposed portions (505) of the second layer not covered by the first layer.
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 21/033 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or comprising inorganic layers
G03F 7/00 - Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
95.
METHODS OF FABRICATING SEMICONDUCTOR DEVICES AND STRUCTURES THEREOF
Methods of forming spacers on sidewalls of features of semiconductor devices and structures thereof are disclosed. A preferred embodiment comprises a semiconductor device including a workpiece and at least one feature disposed over the workpiece. A first spacer is disposed on the sidewalls of the at least one feature, the first spacer comprising a first material. A first liner is disposed over the first spacer and over a portion of the workpiece proximate the first spacer, the first liner comprising the first material. A second spacer is disposed over the first liner, the second spacer comprising a second material. A second liner is disposed over the second spacer, the second liner comprising the first material.
There is provided a LVDS driver arranged to receive an input signal which switches between two voltage levels. The driver comprises a pre-emphasis block (405) for generating a pre-emphasis signal having a first voltage level for a time period T1 after each switch of the input signal, and a second voltage level at all other times, a differential pair of outputs for generating a differential output voltage across a load resistor (RI); and a driver circuit (401) comprising two parallel branches, each branch being connected to one output and each branch being arranged to receive the pre-emphasis signal. The driver is arranged so that the total current flowing through the driver circuit is constant, and during time period T1, the total current flowing through the driver circuit flows through the load resistor, thereby producing a differential output voltage and at all other times, only some of the total current flowing through the driver circuit flows through the load resistor, thereby reducing the differential output voltage.
A semiconductor chip (19; 20; 21; 22) comprises a crystalline layer (31; 32; 32'; 32'') of semiconductor material having an active surface (27; 28; 28'; 28'') and a passive surface (29; 30; 30'; 30''). The active surface (27; 28; 28'; 28'') com-prises embedded electrical circuits and contact regions (23; 24; 24'; 24'') for contacting the electrical circuits. One or more amorphous layers (25; 26; 26'; 26'') of semiconductor material or of semiconductor oxide material are provided on the passive surface (29; 30; 30'; 30'').
In accordance with one or more aspects of the present invention, a wireless sensing system is disclosed, where the system has particular application to sensing the speed of a vehicle wheel, for example. To sense wheel speed, a sensing unit senses changes in magnetic flux and wirelessly relays a signal indicative thereof back to a base station or control unit.
G07C 5/08 - Registering or indicating performance data other than driving, working, idle, or waiting time, with or without registering driving, working, idle, or waiting time
G01P 3/44 - Devices characterised by the use of electric or magnetic means for measuring angular speed
B60T 8/32 - Arrangements for adjusting wheel-braking force to meet varying vehicular or ground-surface conditions, e.g. limiting or varying distribution of braking force responsive to a speed condition, e.g. acceleration or deceleration
There is provided a method of making an encapsulated component package, comprising providing a support for supporting the components of the package during encapsulation, the support including legs extending beyond the perimeter of the final package, rupturing the support legs, and covering the exposed ends of the legs with an insulating material. There is also provided a package formed in accordance with the method.
Disclosed is a circuit comprising a first data retention member (201) with a second data retention member (202) that is connected in parallel thereto. The second data retention member (202) is provided with a longer setup time than the first data retention member (201).
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