Intel IP Corporation

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H04L 5/00 - Arrangements affording multiple use of the transmission path 355
H04W 72/04 - Wireless resource allocation 203
H04W 74/08 - Non-scheduled access, e.g. random access, ALOHA or CSMA [Carrier Sense Multiple Access] 153
H04L 27/26 - Systems using multi-frequency codes 146
H04W 72/12 - Wireless traffic scheduling 128
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1.

SIGNED-RFDAC ARCHITECTURES ENABLING WIDEBAND AND EFFICIENT 5G TRANSMITTERS

      
Application Number US2020016026
Publication Number 2020/197633
Status In Force
Filing Date 2020-01-31
Publication Date 2020-10-01
Owner
  • INTEL IP CORPORATION (USA)
  • INTEL CORPORATION (USA)
Inventor
  • Ponton, Davide
  • Kalcher, Michael
  • Paussa, Alan
  • Thaller, Edwin
  • Kuttner, Franz
  • Gruber, Daniel

Abstract

A radio frequency digital-to-analog converter (RFDAC) circuit includes an RFDAC array circuit including an array of cells arranged into a plurality of segments. Each segment of the plurality of segments is configured to process input data signals. The RFDAC array circuit is configured to process an input data based on activating a set of segments of the plurality of segments, forming a set of active segments, and when the sign of the input data is changed, deactivate a partially active segment of the set of active segments and activate a sign change segment within the RFDAC array circuit. The sign change segment includes a segment within the plurality of segments of the RFDAC array circuit that is different from the set of active segments.

IPC Classes  ?

  • H03M 1/08 - Continuously compensating for, or preventing, undesired influence of physical parameters of noise
  • H03F 3/24 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
  • H04L 27/00 - Modulated-carrier systems
  • H03M 1/74 - Simultaneous conversion

2.

EMULATION OF RADIO FREQUENCY AND MIXED SIGNAL CIRCUITS SYSTEMS AND METHODS

      
Application Number US2019039799
Publication Number 2020/091852
Status In Force
Filing Date 2019-06-28
Publication Date 2020-05-07
Owner INTEL IP CORPORATION (USA)
Inventor
  • Pessl, Peter
  • Dhar, Bikash
  • Kahl, Alexander
  • Krampl, Gerfried
  • Trautmann, Steffen

Abstract

Systems, methods, and circuitries are disclosed that facilitate simulation and design of circuits, such as radio frequency (RF) and mixed signal (MS) circuits. In one example, a method includes segmenting or allocating the circuit design into one or more building blocks; modeling the building blocks at least partially using existing models; combining the building blocks into a combined model or combined building block; and generating a final netlist using based on the combined model.

IPC Classes  ?

3.

METHODS AND DEVICES FOR DEVICE-TO-DEVICE COMMUNICATIONS

      
Application Number EP2019072389
Publication Number 2020/064227
Status In Force
Filing Date 2019-08-21
Publication Date 2020-04-02
Owner
  • INTEL IP CORPORATION (USA)
  • INTEL CORPORATION (USA)
Inventor
  • Ellenbeck, Jan
  • Badic, Biljana
  • Schaller, Bernd
  • Jakobsen, Erik
  • Goris, Norman
  • Hofmann, Christian
  • Wachsmann, Christian
  • Kotaba, Radoslaw
  • Kiilerich Pratas, Nuno Manuel
  • Drewes, Christian

Abstract

A wireless device may include a controller configured to identify an emergency scenario and to generate an emergency message including information about the emergency scenario, and a transmitter configured to transmit, on a discovery channel allocated for other wireless devices to perform discovery, an emergency indicator beacon that indicates an upcoming transmission of the emergency message, and to transmit the emergency message on a data channel of the wireless device.

IPC Classes  ?

  • H04L 1/18 - Automatic repetition systems, e.g. Van Duuren systems
  • H04W 4/90 - Services for handling of emergency or hazardous situations, e.g. earthquake and tsunami warning systems [ETWS]
  • H04W 76/50 - Connection management for emergency connections
  • G01S 5/02 - Position-fixing by co-ordinating two or more direction or position-line determinations; Position-fixing by co-ordinating two or more distance determinations using radio waves

4.

METHODS AND DEVICES FOR COMMUNICATIONS IN DEVICE-TO-DEVICE NETWORKS

      
Application Number EP2019072483
Publication Number 2020/064231
Status In Force
Filing Date 2019-08-22
Publication Date 2020-04-02
Owner
  • INTEL IP CORPORATION (USA)
  • INTEL CORPORATION (USA)
Inventor
  • Ellenbeck, Jan
  • Zukerman, Gil
  • Badic, Biljana
  • Morsy, Karim
  • Reichelmeir, Thomas Hans-Joerg
  • Yang, Chunyuan
  • Goris, Norman
  • Brendel, Johannes
  • Hofmann, Christian
  • Kiilerich Pratas, Nuno Manuel
  • Drewes, Christian

Abstract

A wireless device may include a selection processor configured to process selection information to set a duration of a selection period and to start the selection period, a receiver configured to receive a synchronization initiation signal, and a transmitter configured to transmit a synchronization initiation signal after the selection period has expired if the receiver has not received a synchronization initiation signal during the selection period.

IPC Classes  ?

5.

SIGNAL IMBALANCE DETECTION SYSTEMS AND METHODS

      
Application Number US2019044423
Publication Number 2020/068267
Status In Force
Filing Date 2019-07-31
Publication Date 2020-04-02
Owner INTEL IP CORPORATION (USA)
Inventor Mrugalla, Florian

Abstract

In a communication device and corresponding methods to determine a phase offset imbalance, an input signal (e.g. oscillator signal) is phase shifted to generate a set of phase-shifted values. The set of phased-shifted values and the input signal are mixed to generate a respective set of mixed signals. The phase offset imbalance (e.g. phase error) is calculated based on the set of mixed signals and a gradient value.

IPC Classes  ?

  • H04L 27/22 - Demodulator circuits; Receiver circuits
  • H03D 3/00 - Demodulation of angle-modulated oscillations
  • H04L 27/01 - Equalisers
  • H04L 27/18 - Phase-modulated carrier systems, i.e. using phase-shift keying

6.

DOWNLINK CONTROL CHANNEL DESIGN IN NEW RADIO SYSTEMS

      
Application Number US2019047851
Publication Number 2020/055572
Status In Force
Filing Date 2019-08-23
Publication Date 2020-03-19
Owner INTEL IP CORPORATION (USA)
Inventor
  • Davydov, Alexei
  • Chatterjee, Debdeep
  • He, Hong
  • Xiong, Gang
  • Kwon, Hwan-Joon

Abstract

An apparatus configured to be employed in a gNodeB associated with a new radio (NR) communication system that support resource sharing between NR physical downlink shared channel (PDSCH) and NR physical downlink control channel (PDCCH) is disclosed. The apparatus comprises a processing circuit configured to generate a PDSCH dynamic rate matching resource set configuration signal comprising information on one or more overlap resource sets, wherein each the one or more overlap resource sets comprises time-frequency resources on which any overlapping PDSCH may or may not be mapped, based on an indication provided within a PDSCH rate matching indicator signal. The apparatus further comprises a radio frequency (RF) interface, configured to provide the generated PDSCH dynamic rate matching resource set configuration signal, to an RF circuitry, for subsequent transmission to a user equipment (UE), in order to enable the UE to identify the one or more overlap resource sets.

IPC Classes  ?

  • H04W 72/04 - Wireless resource allocation
  • H04W 76/27 - Transitions between radio resource control [RRC] states

7.

COMMUNICATION DEVICE AND METHOD FOR PROCESSING A RECEIVED SIGNAL

      
Application Number US2019047122
Publication Number 2020/046620
Status In Force
Filing Date 2019-08-20
Publication Date 2020-03-05
Owner INTEL IP CORPORATION (USA)
Inventor
  • Eder, Franz
  • Scherb, Ansgar
  • Gori, Silvano
  • Mueller-Weinfurtner, Stefan

Abstract

According to various embodiments, a communication device is described comprising a throughput determiner configured to determine, for each of a plurality of signal-to-noise ratio measures, a relation between a throughput prediction and a quantization step size, an estimator configured to estimate a distribution of the signal-to-noise ratio measures in a received signal, a weigher configured to determine a weight for each signal-to-noise ratio measure based on the estimated distribution and weigh the throughput predictions based on the determined weights, a quantization controller configured to determine a quantization step size based on a combination of the weighted throughput predictions and a demodulator configured to demodulate the received signal and quantize the demodulated received signal using the quantization step size.

IPC Classes  ?

  • H04L 25/06 - Dc level restoring means; Bias distortion correction

8.

METHODS AND APPARATUS TO GENERATE AND PROCESS MANAGEMENT FRAMES

      
Application Number US2018045025
Publication Number 2020/027847
Status In Force
Filing Date 2018-08-02
Publication Date 2020-02-06
Owner INTEL IP CORPORATION (USA)
Inventor
  • Stacey, Robert
  • Alpert, Yaron
  • Cariou, Laurent
  • Huang, Po-Kai

Abstract

Methods, apparatus, systems and articles of manufacture are disclosed to generate a management frame identifying an operation mode for a basic service set of a local area network. An example disclosed method includes performing an assessment of a wireless network and determining an operation mode for a basic service set (BSS) bandwidth based on the assessment, the operation mode indicating continuity of a primary segment, a secondary segment, a tertiary segment and a quaternary segment. The example method further includes creating a management frame including information fields based on the BSS bandwidth, the information fields including a first channel width field, a second channel width field, a third channel width field, a first center frequency field, a second center frequency field and a third center frequency field and transmitting the management frame over the wireless network.

IPC Classes  ?

  • H04W 28/16 - Central resource management; Negotiation of resources or communication parameters, e.g. negotiating bandwidth or QoS [Quality of Service]

9.

METHOD AND APPARATUS FOR V2X COMMUNICATIONS

      
Application Number CN2018096506
Publication Number 2020/014979
Status In Force
Filing Date 2018-07-20
Publication Date 2020-01-23
Owner INTEL IP CORPORATION (USA)
Inventor
  • Scholand, Tobias
  • Deparis, Francois
  • Dai, Yanzhong
  • Liu, Dun
  • Zhou, Jun
  • Guo, Qingyun
  • Sun, Weijie
  • Guo, Donghui
  • Wang, Jun
  • Jiang, Wei
  • Li, Daguo
  • Li, Yubao
  • Sun, Baoyu
  • Zhou, Huiqiang
  • Liu, Xuanbing
  • Yu, Zhibin
  • Gao, Ningbo

Abstract

Embodiments disclosed herein provide various aspects that would allow for Vehicle to Everything (V2X) or peer-to-peer (P2P) or sidelink (SL) communications. In an embodiment, a communication device may include: a memory for storing computer-readable instructions; and processing circuitry, configured to process the instructions stored in the memory to: obtain a first path loss between the communication device and a base station, wherein the communication device is coupled to the base station; calculate a second path loss based on one or more sidelink reference signal received power (S-RSRP) indicators received by the communication device, wherein the S-RSRP indicators are received from one or more communication devices within a communication range of the communication device; and determine a transmit (Tx) power of the communication device based on the first path loss and the second path loss.

IPC Classes  ?

  • H04W 52/18 - TPC being performed according to specific parameters

10.

DETERMINISTIC BACKOFF WITH COLLISION AVOIDANCE

      
Application Number US2018039554
Publication Number 2020/005214
Status In Force
Filing Date 2018-06-26
Publication Date 2020-01-02
Owner INTEL IP CORPORATION (USA)
Inventor
  • Cavalcanti, Dave
  • Cariou, Laurent
  • Rashid, Mohammad Mamunur

Abstract

This disclosure describes systems, methods, and devices related to deterministic backoffs and collision avoidance. A device may identify a first transmission received from a first device, wherein the first transmission is over a shared access medium. The device may identify a second transmission received from the first device, wherein the second transmission is over the shared access medium. The device may determine an available transmission slot between the first transmission and the second transmission. The device may transmit, during the available transmission slot, a third transmission.

IPC Classes  ?

  • H04W 74/08 - Non-scheduled access, e.g. random access, ALOHA or CSMA [Carrier Sense Multiple Access]
  • H04W 72/02 - Selection of wireless resources by user or terminal

11.

EFFICIENT CONCURRENT MULTICHANNEL DISCOVERY AND RECEPTION

      
Application Number US2018039920
Publication Number 2020/005245
Status In Force
Filing Date 2018-06-28
Publication Date 2020-01-02
Owner INTEL IP CORPORATION (USA)
Inventor
  • Ben-Sinai, Elkana
  • Micka, Oz
  • Heruti, Sharon
  • Kaidar, Oren

Abstract

This disclosure describes systems, methods, and devices related to efficient concurrent multichannel discovery and reception. A device may determine high performance communications circuitry and low performance communications circuitry within a first component of the device. The device may determine one or more high power radio frequency (RF) chains associated with at least one of a high frequency band or a low frequency band. The device may determine one or more low power RF chains associated with at least one of the high frequency band or the low frequency band. The device may perform a first operation with the high performance communications circuitry using a dynamically selected one of the one or more high power RF chains or the one or more low power RF chains and a second operation with the low performance communications circuitry using a dynamically selected one of the one or more low power RF chains or the one or more high power RF chains, wherein the dynamic selection is based at least in part on a use case, and wherein the first operation and the second operation are performed concurrently.

IPC Classes  ?

  • H04W 88/06 - Terminal devices adapted for operation in multiple networks, e.g. multi-mode terminals
  • H04W 48/16 - Discovering; Processing access restriction or access information
  • H04B 1/401 - Circuits for selecting or indicating operating mode
  • H04B 1/00 - TRANSMISSION - Details of transmission systems not characterised by the medium used for transmission

12.

CIRCUIT FOR ELECTROSTATIC DISCHARGE PROTECTION FOR WIDE FREQUENCY RANGE MULTI-BAND INTERFACES

      
Application Number US2019033430
Publication Number 2020/005420
Status In Force
Filing Date 2019-05-22
Publication Date 2020-01-02
Owner INTEL IP CORPORATION (USA)
Inventor
  • Domanski, Krzysztof
  • Johnsson, David
  • Gossner, Harald
  • Elkind, Jenia

Abstract

A circuit for electrostatic discharge (ESD) protection for wide frequency range multi-band interfaces. The interface may be split into a plurality of signal paths. Each signal path may include an ESD protection circuit configured to shunt an ESD current on each signal path to either ground or supply voltage and a filter configured to block signals from other signal paths. The signal paths are connected to a common signal line such that the signals for the plurality of signal paths can be transported simultaneously. The plurality of signal paths may be a high frequency path and a low frequency path. The low frequency path may include an inductor connected in series and the high frequency path may include a capacitor or transformer connected in series. The ESD protection circuit on each signal path is placed behind the inductor, the capacitor or the transformer.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H02H 9/02 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current

13.

APPARATUS AND METHOD FOR OVER-VOLTAGE PROTECTION

      
Application Number US2019034455
Publication Number 2020/005451
Status In Force
Filing Date 2019-05-29
Publication Date 2020-01-02
Owner INTEL IP CORPORATION (USA)
Inventor
  • Nedalgi, Dharmaray
  • Ns, Karthik
  • Deshpande, Vani
  • Heiss, Leonhard

Abstract

An apparatus is provided which comprises: a dual stack voltage driver, wherein the dual stack voltage driver comprises a first stack of transistors, and a second stack of transistors; and one or more feedback transistors each coupled to a transistor of the second stack of transistors.

IPC Classes  ?

  • H03K 17/082 - Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
  • H03K 19/003 - Modifications for increasing the reliability

14.

THROUGH-SILICON VIA PILLARS FOR CONNECTING DICE AND METHODS OF ASSEMBLING SAME

      
Application Number US2019037238
Publication Number 2020/005583
Status In Force
Filing Date 2019-06-14
Publication Date 2020-01-02
Owner INTEL IP CORPORATION (USA)
Inventor
  • Augustin, Andreas
  • Seidemann, Georg
  • Wagner, Thomas
  • Waidhas, Bernd

Abstract

Reduced-profile semiconductor device apparatus are achieved by thinning a semiconductive device substrate at a backside surface to expose a through-silicon via pillar, forming a recess to further expose the through-silicon via pillar, and by seating an electrical bump in the recess to contact both the through-silicon via pillar and the recess. In an embodiment, the electrical bump contacts a semiconductor package substrate to form a low-profile semiconductor device apparatus. In an embodiment, the electrical bump contacts a subsequent die to form a low-profile semiconductor device apparatus.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/495 - Lead-frames
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

15.

METHOD AND APPARATUS FOR BLIND DETECTION OF PDCCH AND PDSCH USING UE-SPECIFIC REFERENCE SIGNALS

      
Application Number CN2018093889
Publication Number 2020/000478
Status In Force
Filing Date 2018-06-30
Publication Date 2020-01-02
Owner INTEL IP CORPORATION (USA)
Inventor
  • Ma, Xiaojun
  • Yu, Zhibin

Abstract

Provided herein are a method and an apparatus for blind detection of Physical Downlink Control Channel (PDCCH) and Physical Downlink Shared Channel (PDSCH) using UE-specific reference signals. In an embodiment, the disclosure provides an apparatus for a UE, comprising circuitry configured to: measure a UE-specific Demodulation Reference Signal (DMRS) associated with a PDCCH; compute a first measurement metric M1 based on the UE-specific DMRS associated with the PDCCH before decoding the PDCCH; decode the PDCCH based on the first measurement metric M1; and decode PDSCH based on the decoded PDCCH. The disclosure may further, based on the corresponding PDCCH DMRS and/or PDSCH DMRS, determine if a PDSCH grant in a decoded PDCCH is valid or not, detect a repeated PDSCH grant in a slot, and detect cross-slot DMRS phase continuity between continuous slots.

IPC Classes  ?

  • H04L 27/14 - Demodulator circuits; Receiver circuits

16.

DYNAMIC LOW IF MECHANISM FOR BLOCKER AVOIDANCE

      
Application Number US2018039711
Publication Number 2020/005224
Status In Force
Filing Date 2018-06-27
Publication Date 2020-01-02
Owner INTEL IP CORPORATION (USA)
Inventor
  • Schultz, Christoph
  • Duerdodt, Christian
  • Hammes, Markus
  • Kaehlert, Stefan
  • Kreienkamp, Rainer, Dirk
  • Scholand, Tobias

Abstract

A receiver design is provided to address blocker signals not known a priori. The blocker signals may cause a spurious frequency response when downconverted with a particular harmonic of the local oscillator or at unwanted sidebands, and the effect of the blocker signals can thus be shifted out of band by adjusting the LO frequency, which shifts the intermediate frequency (IF) of the downconverted signals. The proposed design implements a diversity receiver architecture in which one or more sets of RF chains are coupled to the main receiver path antennas, but the diversity receiver path signals are downconverted in accordance with different LO frequencies than the main receiver path. The RF chains in the diversity receiver paths may thus be considered being coupled to "virtual" antennas. Algorithms may then be implemented by extending principles of dynamic diversity receiver and best antenna selection used for physical antennas to the virtual antennas.

IPC Classes  ?

17.

WIDEBAND RECONFIGURABLE IMPEDANCE MATCHING NETWORK

      
Application Number US2018039761
Publication Number 2020/005231
Status In Force
Filing Date 2018-06-27
Publication Date 2020-01-02
Owner INTEL IP CORPORATION (USA)
Inventor
  • Yu, Chuanzhao
  • Eschbaumer, Maximilian

Abstract

Embodiments relate to a transformer-based impedance matching network that may dynamically change its characteristic impedance by engaging different inductor branches on a primary side and optionally, on the secondary side. A primary side transformer circuit includes a primary inductor (311) and secondary inductor (321) configured to provide impedance matching over a first frequency band. One or more additional inductor branches (314A, 314B, are switchably coupled to either or both of the primary and secondary inductors to modify the impedance matching characteristics over additional operating frequencies. One or more LC filter branches (321, 322, 326, 327, 336, 330) can be included at the output of the secondary side to filter harmonic frequencies in each of the operating frequency bands.

IPC Classes  ?

  • H03H 7/09 - Filters comprising mutual inductance
  • H03H 7/01 - Frequency selective two-port networks
  • H03H 7/42 - Balance/unbalance networks
  • H03H 7/46 - Networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source
  • H03H 7/38 - Impedance-matching networks

18.

TECHNOLOGIES FOR CROSS-LAYER TASK DISTRIBUTION

      
Application Number US2018040297
Publication Number 2020/005276
Status In Force
Filing Date 2018-06-29
Publication Date 2020-01-02
Owner INTEL IP CORPORATION (USA)
Inventor
  • Yu, Zhibin
  • Badic, Biljana
  • Mueck, Markus D.

Abstract

Technologies for cross-layer task distribution include a compute device configured to identify pending communication tasks and pending compute tasks, and estimate a processing load of the pending communication tasks. The compute device is further configured to determine a total processing budget of communication processor(s) of the compute device based on computation resources of the communication processor(s) and determine whether excess processing budget is available to process at least one of the pending compute tasks. Additionally, in response to a determination that the excess processing budget is available to process one or more pending compute tasks, the compute device is configured to allocate at least one of the pending compute tasks to be processed by at least one of the communication processors. Other embodiments are described and claimed.

IPC Classes  ?

  • G06F 9/50 - Allocation of resources, e.g. of the central processing unit [CPU]
  • H04L 29/08 - Transmission control procedure, e.g. data link level control procedure

19.

INCREASED UTILIZATION OF WIRELESS FREQUENCY CHANNELS PARTIALLY OCCUPIED BY INCUMBENT SYSTEMS

      
Application Number US2018037419
Publication Number 2019/240792
Status In Force
Filing Date 2018-06-13
Publication Date 2019-12-19
Owner INTEL IP CORPORATION (USA)
Inventor
  • Cariou, Laurent
  • Chen, Xiaogang
  • Li, Qinghua
  • Stacey, Robert J.
  • Niu, Huaning

Abstract

A wireless communication device, method and system. The device includes a memory, and a processing circuitry coupled to the memory. The processing circuitry is to: decode at least one signal field portion of a signal field of a Physical Layer Convergence Protocol (PLCP) Data Unit (PPDU) received over a bonded channel, the bonded channel comprising a plurality of subchannels including a punctured subchannel, the signal field portion on at least one unpunctured subchannel of the plurality of subchannels; determine, from the at least one signal field portion, information on a resource allocation for the device, the resource allocation indicating at least one resource unit (RU) used in a data field of the PPDU for the device; and decode a data field portion of the data field of the PPDU, the data field portion received on a part of the punctured subchannel based on the resource allocation.

IPC Classes  ?

  • H04W 72/04 - Wireless resource allocation
  • H04L 5/00 - Arrangements affording multiple use of the transmission path

20.

METHOD, SOFTWARE AND DEVICE FOR GENERATING CHANNEL ESTIMATES

      
Application Number EP2018064988
Publication Number 2019/233581
Status In Force
Filing Date 2018-06-07
Publication Date 2019-12-12
Owner INTEL IP CORPORATION (USA)
Inventor
  • Mursia, Placido
  • Fechtel, Stefan

Abstract

A method of generating channel estimates of a communication channel in an OFDM system includes receiving reference symbols from at least one time-frequency observation block of a predetermined block size in frequency and time. Subspace-transformed reference symbols are generated from the received reference symbols. The subspace-transformed reference symbols are subspace filtered to generate a channel estimate for a communication channel target time. A latency between a communication channel time instant of a currently received reference symbol and the communication channel target time is smaller than the observation block size in time.

IPC Classes  ?

21.

FAN OUT PACKAGE-ON-PACKAGE WITH ADHESIVE DIE ATTACH

      
Application Number US2019027743
Publication Number 2019/221865
Status In Force
Filing Date 2019-04-16
Publication Date 2019-11-21
Owner INTEL IP CORPORATION (USA)
Inventor
  • O'Sullivan, David
  • Waidhas, Bernd
  • Huber, Thomas

Abstract

Fan Out Package-On-Package (PoP) assemblies in which a second chip is adhered to a non-active side of a first chip. An active side of the first chip embedded in a first package material may be electrically coupled through one or more redistribution layers that fan out to package interconnects on a first side of the POP. A second chip may be adhered, with a second package material, to the non-active side of the first chip. An active side of the second chip may be electrically coupled to the package interconnects through a via structure extending through the first package material. Second interconnects between the second chip, or a package thereof, may contact the via structure. Use of the second package material as an adhesive may improve positional stability of the second chip to facilitate wafer-level assembly techniques.

IPC Classes  ?

  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements

22.

ANTENNA BOARDS AND COMMUNICATION DEVICES

      
Application Number US2019026904
Publication Number 2019/217025
Status In Force
Filing Date 2019-04-11
Publication Date 2019-11-14
Owner INTEL IP CORPORATION (USA)
Inventor
  • Thai, Trang
  • Dalmia, Sidharth
  • Sover, Raanan
  • Hagn, Josef
  • Asaf, Omer
  • Svendsen, Simon

Abstract

Disclosed herein are antenna boards, antenna modules, and communication devices. For example, in some embodiments, an antenna board may include: an antenna feed substrate including an antenna feed structure, wherein the antenna feed substrate includes a ground plane, the antenna feed structure includes a first portion perpendicular to the ground plane and a second portion parallel to the ground plane, and the first portion is electrically coupled between the second portion and the first portion; and a millimeter wave antenna patch.

IPC Classes  ?

  • H01Q 9/04 - Resonant antennas
  • H01Q 1/22 - Supports; Mounting means by structural association with other equipment or articles

23.

FLEXIBLE MULTI-ACCESS EDGE COMPUTING (MEC) SERVICES CONSUMPTION THROUGH HOSTS ZONING

      
Application Number US2018067898
Publication Number 2019/199362
Status In Force
Filing Date 2018-12-28
Publication Date 2019-10-17
Owner INTEL IP CORPORATION (USA)
Inventor
  • Roth, Kilian
  • Sabella, Dario
  • Filippou, Miltiadis

Abstract

Systems and methods for establishing, configuring, and operating multi-access edge computing (MEC) services and service consumption through zoning hosts in multi-vendor or multi-system environments. An apparatus operating as a MEC orchestrator to manage services consumption using zones is configurable to perform operations to: receive, from an application executing at a host, a request for a list of services and corresponding proximity zones; in response to receiving the request for the list of services, query a plurality of hosts for performance metrics of respective services offered from the plurality of hosts, the respective services to be used by the application executing at the host; construct a zone map, the zone map maintaining a mapping between the application and the plurality of hosts based on the performance metrics; and manage migration of the application or a service of the respective services, based on the zone map, to ensure QoS of the application.

IPC Classes  ?

  • H04W 4/02 - Services making use of location information
  • H04L 29/08 - Transmission control procedure, e.g. data link level control procedure

24.

APPARATUS, SYSTEM AND METHOD OF COMMUNICATION OVER AN INDOOR-ONLY CHANNEL

      
Application Number US2018026668
Publication Number 2019/199265
Status In Force
Filing Date 2018-04-09
Publication Date 2019-10-17
Owner INTEL IP CORPORATION (USA)
Inventor
  • Ouzieli, Ido
  • Oren, Elad
  • Elad, Yuval
  • D'Angelo, Wilfrid

Abstract

Some demonstrative embodiments may include apparatus, system and method of communication over an indoor-only channel. For example, an apparatus may include logic and circuitry configured to cause a wireless communication station (STA) to receive a frame from a software-enabled Access Point (soft AP) over an indoor-only channel, the frame from the soft AP including a soft AP information element (IE) including an identifier of a source AP to provide network access; and based on reception of one or more frames from the source AP, to allow the STA to connect to the soft AP over the indoor-only channel for the network access.

IPC Classes  ?

  • H04W 48/08 - Access restriction or access information delivery, e.g. discovery data delivery
  • H04W 48/02 - Access restriction performed under specific conditions
  • H04B 17/318 - Received signal strength
  • H04W 84/12 - WLAN [Wireless Local Area Networks]

25.

TRANSMITTERS AND METHODS FOR OPERATING THE SAME

      
Application Number US2018024455
Publication Number 2019/190469
Status In Force
Filing Date 2018-03-27
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor
  • Belitzer, Alexander
  • Yoffe, Yaron
  • Cohen, Yaniv
  • Kerner, Michael

Abstract

A transmitter is provided. The transmitter includes an envelope tracking circuit, wherein the envelope tracking circuit includes an envelope circuit configured to generate, based on a baseband signal, an envelope signal indicating a temporal course of the baseband signal's envelope. Further, the envelope tracking circuit includes a bandwidth reduction circuit configured to generate a bandwidth reduced envelope signal based on the envelope signal, and a DC-to- DC converter configured to generate a supply voltage for a power amplifier of the transmitter based on the bandwidth reduced envelope signal. The transmitter additionally includes a predistortion circuit configured to generate a predistorted baseband signal based on the baseband signal and an adjustable predistortion configuration. The predistortion circuit is further configured to adjust the predistortion configuration based on the bandwidth reduced envelope signal.

IPC Classes  ?

  • H04B 1/62 - TRANSMISSION - Details of transmission systems not characterised by the medium used for transmission for providing a predistortion of the signal in the transmitter and corresponding correction in the receiver, e.g. for improving the signal/noise ratio
  • H04B 1/66 - TRANSMISSION - Details of transmission systems not characterised by the medium used for transmission for improving efficiency of transmission

26.

RANGE EXTENSION FOR INTERFERENCE CANCELLATION ANALOG TO DIGITAL CONVERTER

      
Application Number US2018024789
Publication Number 2019/190497
Status In Force
Filing Date 2018-03-28
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor Boos, Zdravko

Abstract

Systems, methods, and circuitries are provided for extending the range of an analog-to-digital converter (ADC) associated with interference cancellation. In one example a transceiver includes front end circuitry configured to transmit a radio frequency (RF) transmit signal that includes an intended signal and an interference signal. The transceiver includes self-interference cancellation (SIC) circuitry configured to control the front end circuitry based at least on a digital baseband reference transmit signal that comprises a digital representation of the intended signal. ADC range extension circuitry is provided to: receive the RF transmit signal from the front end circuitry; receive the digital baseband reference transmit signal from the SIC circuitry; approximate the interference signal by generating an analog estimated interference signal that corresponds to a difference between the RF transmit signal and the digital baseband reference transmit signal; and provide the analog estimated interference signal to the ADC.

IPC Classes  ?

27.

TECHNIQUES FOR MULTIPLE SIGNAL FAN-OUT

      
Application Number US2018024931
Publication Number 2019/190507
Status In Force
Filing Date 2018-03-28
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor
  • Yu, Chuanzhao
  • Leuschner, Stephan
  • Newman, David

Abstract

Techniques are provided for fanning out a signal from a balun. In various aspects, the system can include a balun configured to receive a signal for transmission at an input and to provide a representation of the signal at an output, a plurality of pass gate circuits, each pass gate circuit configured to receive the representation of the signal at a first node, to receive a control signal at a second node to pass the representation of the signal to a third node when the control signal is in a first state, and to isolate the representation of the signal from the third node when the control signal is in a second state. The first state of the control signal can include a non-zero voltage, and the second state of the control signal can include the non-zero voltage with a polarity opposite the non-zero voltage of the first state.

IPC Classes  ?

28.

CONCEPT OF CAPACITOR SCALING

      
Application Number US2018024983
Publication Number 2019/190512
Status In Force
Filing Date 2018-03-29
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor
  • Ponton, Davide
  • Passamani, Antonio

Abstract

The present disclosure addresses a concept for capacitor scaling. A first capacitor is provided with a first signal capacitance between a first electrode and a second electrode of the first capacitor and with a first parasitic capacitance between the first capacitor's first electrode and AC ground. A sum of the first signal capacitance and the first parasitic capacitance yields a first total capacitance. A second capacitor is provided with a second signal capacitance between a first electrode and a second electrode of the second capacitor and with a second parasitic capacitance between the second capacitor's first electrode and AC ground. A sum of the second signal capacitance and the second parasitic capacitance yields a second total capacitance. While the first signal capacitance differs from the second signal capacitance, the first total capacitance equals the second total capacitance.

IPC Classes  ?

29.

CROSSTALK CANCELLATION FOR DIGITAL PREDISTORTION FEEDBACK LOOP

      
Application Number US2018025009
Publication Number 2019/190515
Status In Force
Filing Date 2018-03-29
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor
  • Cohen, Alon
  • Yoffe (iofedov), Ilia
  • Genossar, Miki
  • Stein, Jeremy

Abstract

Systems, methods, and circuitries are disclosed to determine parameters for predistortion circuitry in a transceiver including a transmit chain and a receive chain. In one example, a method includes providing a training signal to a power amplifier on the transmit chain. A separation circuitry is controlled to provide an amplified training signal and a first feedback signal is received from the receive chain. The separation circuitry is controlled to output a modified amplified training signal and a second feedback signal is received from the receive chain. Parameters for the predistortion circuitry are determined based the first feedback signal and the second feedback signal.

IPC Classes  ?

  • H03F 1/32 - Modifications of amplifiers to reduce non-linear distortion
  • H03F 3/189 - High-frequency amplifiers, e.g. radio frequency amplifiers
  • H03F 3/24 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages

30.

APPARATUS, SYSTEM AND METHOD OF RANGING MEASUREMENT

      
Application Number US2018025065
Publication Number 2019/190519
Status In Force
Filing Date 2018-03-29
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor
  • Abramovsky, Benny
  • Segev, Jonathan
  • Alexander, Danny

Abstract

Some demonstrative embodiments may include apparatus, system and method of ranging measurement. For example, an apparatus may include circuitry and logic configured to cause an initiator wireless communication station (STA) to transmit to a responder STA a ranging measurement request to request to perform a ranging measurement with the responder STA, the ranging measurement request including a field configured to indicate that one or more responder-measured values of the ranging measurement are to be sent from the responder STA to a cloud server; to perform the ranging measurement with the responder STA; and to receive from the cloud server ranging information, which is based on the one or more responder-measured values.

IPC Classes  ?

  • H04W 64/00 - Locating users or terminals for network management purposes, e.g. mobility management
  • H04W 56/00 - Synchronisation arrangements

31.

METHODS AND APPARATUS TO FACILITATE CONFIGURABLE MULTI-CHANNEL COMMUNICATIONS IN INTELLIGENT TRANSPORTATION SYSTEMS FOR VEHICULAR COMMUNICATIONS

      
Application Number US2018025293
Publication Number 2019/190537
Status In Force
Filing Date 2018-03-29
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor
  • Sadeghi, Bahareh
  • Gurevitz, Assaf
  • Reshef, Ehud
  • Hareuveni, Ofer
  • Ginsburg, Noam

Abstract

Methods and apparatus to facilitate configurable multi-channel communications in intelligent transportation systems for vehicular communications are disclosed. An example apparatus includes an interface to receive instructions to transmit a wideband transmission on two or more frequency channels of a frequency band; a digital processor to reserve a time slot for the wideband transmission; and a multi-channel communication determiner to configure the digital processor to transmit the wideband transmission using the two or more frequency channels; and ensure that the wideband transmission occurs concurrently on the two or more frequency channels by performing a wideband transmission synchronization.

IPC Classes  ?

  • H04W 74/08 - Non-scheduled access, e.g. random access, ALOHA or CSMA [Carrier Sense Multiple Access]
  • H04W 28/26 - Resource reservation
  • H04W 56/00 - Synchronisation arrangements

32.

CONCURRENT OPERATION OF INTELLIGENT TRANSPORTATION SYSTEM (ITS) RADIOS IN A SAME FREQUENCY BAND WITH A COMMON ANTENNA

      
Application Number US2018025313
Publication Number 2019/190542
Status In Force
Filing Date 2018-03-30
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor
  • Faerber, Michael
  • Roth, Kilian
  • Saravanan, Visvesh
  • Gomes Baltar, Leonardo

Abstract

Methods and architectures are described to allow concurrent operation of two separate, non-synchronized, radio systems utilizing closely spaced frequency bands, such as IEEE 802.11p and LTE-V2X, or NR-V2X vehicular communications systems, with a common antenna. A full duplex-"like" active interference cancellation process may be employed that includes self-interference cancellation in the RF domain, in the analog domain and the digital baseband domain to reduce complexities and costs of stringent antenna isolation, otherwise required, for a simultaneous TX and RX mode of operation and concurrent RX mode of operation in closely spaced frequency resources.

IPC Classes  ?

  • H04B 1/10 - Means associated with receiver for limiting or suppressing noise or interference
  • H04B 1/525 - Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa with means for reducing leakage of transmitter signal into the receiver
  • H04W 88/06 - Terminal devices adapted for operation in multiple networks, e.g. multi-mode terminals

33.

AUTONOMOUS POWER REDUCTION

      
Application Number US2018025437
Publication Number 2019/190555
Status In Force
Filing Date 2018-03-30
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor Norris, George

Abstract

Aspects of an envelope tracking operation are described. In some aspects, as part of the envelope tracking operation, a device determines a change in a first set of power amplifier (PA) operating conditions, corresponding to a first look up table (LUT), the first LUT defined by a first LUT equation and a maximum supply voltage value. In some aspects, the device autonomously generates a second LUT equation to define a second LUT, having a second set of corresponding PA operating conditions. In some aspects, the device selects values from the first LUT equation, estimates a slope of the second LUT equation, determines an intercept with a maximum power value, and adjusts a supply voltage input for the PA to a supply voltage according to the maximum power value.

IPC Classes  ?

34.

DETECTING HIGH TX LEAKAGE TO IMPROVE LINEARITY

      
Application Number US2018025442
Publication Number 2019/190557
Status In Force
Filing Date 2018-03-30
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor
  • Alam, Mohammed
  • Graham, David
  • Ivonnet, Jorge
  • Khushk, Hasham
  • Mittel, James Gregory
  • Parkes, John J. Jr.

Abstract

An apparatus of user equipment (UE) includes a radio integrated circuit (IC), an adjustable external low noise amplifier (eLNA) external to the radio IC, and processing circuitry. The radio IC includes a receive signal circuit path including an adjustable gain internal low noise amplifier (iLNA), and a transmit signal circuit path including a digital-to-analog converter (DAC) circuit configured to convert digital signals to analog baseband signals for transmitting. The processing circuitry is configured to provide digital values of the digital signals to the DAC circuit and initiate adjusting gain of one or both of the iLNA and the eLNA according to the digital values.

IPC Classes  ?

  • H04L 25/03 - Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
  • H04L 25/06 - Dc level restoring means; Bias distortion correction

35.

SELF-EVALUATING HIGH FREQUENCY, BANDWIDTH, AND DYNAMIC RANGE CELLULAR POLAR TRANSMIT SIGNAL FIDELITY

      
Application Number US2018025525
Publication Number 2019/190563
Status In Force
Filing Date 2018-03-30
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor
  • Raclaw, Andrew
  • Hoque, Anamul
  • Newman, David
  • Rector, Stephen

Abstract

A radio communication device includes a device substrate. A transmitter circuit is coupled to the device substrate to transmit a radio frequency signal to an antenna. The radio communication device also includes a receiver circuit coupled to the device substrate, where the receiver circuit includes an oscillator circuit to generate a baseband signal from a received radio frequency signal. The radio communication device further includes a feedback circuit coupled to the antenna and to the receiver circuit, where the feedback circuit couples a portion of the transmitted radio frequency signal to the oscillator circuit using a transmission line.

IPC Classes  ?

  • H04L 25/02 - Baseband systems - Details
  • H04L 5/04 - Channels characterised by the type of signal the signals being represented by different amplitudes or polarities, e.g. quadriplex

36.

TRANSCEIVER BASEBAND PROCESSING

      
Application Number US2018025534
Publication Number 2019/190564
Status In Force
Filing Date 2018-03-30
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor
  • Yu, Chuanzhao
  • Yoon, Hyun
  • Hausmann, Kurt

Abstract

A buffer circuit includes a first feedback buffer to receive a first component of a current-mode signal and a second feedback buffer to receive a second component of the current-mode signal. The buffer circuit also including a first inverter having a first input coupled to an output of the second feedback buffer and to an input of a first current circuit through a first filter, a first output coupled to an input of the first feedback buffer. The buffer circuit also includes a second inverter having a second input coupled to an output of the first feedback buffer and to an input of a second current circuit through a second filter, and a second output coupled to an input of the second feedback buffer.

IPC Classes  ?

  • H03K 19/0185 - Coupling arrangements; Interface arrangements using field-effect transistors only
  • H04L 25/02 - Baseband systems - Details

37.

ANTENNA BOARDS AND COMMUNICATION DEVICES

      
Application Number US2019020057
Publication Number 2019/190693
Status In Force
Filing Date 2019-02-28
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor
  • Thai, Trang
  • Dalmia, Sidharth

Abstract

Disclosed herein are antenna boards, antenna modules, and communication devices. For example, in some embodiments, an antenna board may include: a substrate including an antenna feed structure; an antenna patch, wherein the antenna patch is a millimeter wave antenna patch; and an air cavity between the antenna patch and the substrate.

IPC Classes  ?

  • H01Q 9/04 - Resonant antennas
  • H01Q 1/24 - Supports; Mounting means by structural association with other equipment or articles with receiving set

38.

ANTENNA MODULES AND COMMUNICATION DEVICES

      
Application Number US2019020066
Publication Number 2019/190694
Status In Force
Filing Date 2019-02-28
Publication Date 2019-10-03
Owner INTEL IP CORPORATION (USA)
Inventor
  • Dalmia, Sidharth
  • Jensen, Jonathan
  • Inac, Ozgur
  • Thai, Trang
  • Lambert, William James
  • Jann, Benjamin

Abstract

Disclosed herein are integrated circuit (IC) packages, antenna boards, antenna modules, and communication devices (e.g., for millimeter wave communications). For example, in some embodiments, an antenna module may include: a logic die; a radio frequency front-end (RFFE) die in electrical communication with the logic die; and an antenna patch, wherein the RFFE die is closer to the antenna patch than the logic die is to the antenna patch.

IPC Classes  ?

  • H01Q 9/04 - Resonant antennas
  • H01Q 1/24 - Supports; Mounting means by structural association with other equipment or articles with receiving set
  • H03F 3/20 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers

39.

TRANSMITTERS AND METHODS FOR OPERATING THE SAME

      
Application Number US2018023446
Publication Number 2019/182574
Status In Force
Filing Date 2018-03-21
Publication Date 2019-09-26
Owner INTEL IP CORPORATION (USA)
Inventor Belitzer, Alexander

Abstract

A transmitter is provided. The transmitter includes a bus system including at least two bus lines. Further, the transmitter includes an envelope tracking circuit coupled to the at least two bus lines, and a plurality of power amplifiers. At least a first one of the plurality of power amplifiers, while in active state, is configured to selectively couple its input to the one of the at least two bus lines which is supplied with a supply voltage or a bias signal by the envelope tracking circuit that is based on an envelope of a first baseband signal related to a first radio frequency signal received by the first one of the plurality of power amplifiers for amplification.

IPC Classes  ?

  • H04L 25/02 - Baseband systems - Details
  • H04L 25/03 - Shaping networks in transmitter or receiver, e.g. adaptive shaping networks

40.

METHODS AND APPARATUS TO PERFORM MULTI-BAND LINK AGGREGATION IN A WIRELESS NETWORK

      
Application Number US2018022696
Publication Number 2019/177615
Status In Force
Filing Date 2018-03-15
Publication Date 2019-09-19
Owner INTEL IP CORPORATION (USA)
Inventor
  • Po-Kai, Huang
  • Glik, Michael
  • Qi, Emily
  • Cordeiro, Carlos
  • Stacey, Robert
  • Cariou, Laurent

Abstract

Methods and apparatus to perform multi-band link aggregation in a wireless network are disclosed. An example apparatus includes a buffer controller to store (A) a first set of data packets that have been received on a first interface and (B) a second set of data packets that have been received on a second interface into a buffer, the first and second sets of data packets being received from a wireless device during a same time frame; and a window determiner to control a first bitmap corresponding to the first set of data packets received on the first interface and a second bitmap corresponding to the second set of data packets received on the second interface, a first size of the first bitmap and a second size of the second bitmap being smaller than a third size of the buffer.

IPC Classes  ?

  • H04W 28/14 - Flow control using intermediate storage
  • H04W 28/16 - Central resource management; Negotiation of resources or communication parameters, e.g. negotiating bandwidth or QoS [Quality of Service]

41.

INTERFACE CIRCUITRY WITH SERIES SWITCH AND SHUNT ATTENUATOR

      
Application Number US2018021296
Publication Number 2019/172903
Status In Force
Filing Date 2018-03-07
Publication Date 2019-09-12
Owner INTEL IP CORPORATION (USA)
Inventor Eschbaumer, Maximilian

Abstract

Methods, systems, and circuities for selectively connecting an RF signal to front end circuitry and selectively attenuating the RF signal are disclosed. In one example, an interface circuitry includes switching circuitry and attenuator circuitry. The switching circuitry is connected in series between an output of an amplifier and a front end circuitry configured to transmit a radio frequency (RF) signal output by the amplifier. The switching circuitry connects the output of the amplifier to a selected one or more front end circuitry inputs to create one or more signal paths. The attenuator circuitry is connected between the output of the amplifier and ground to create an attenuation path in a shunt configuration relative to the one or more signal paths. The attenuator circuitry is configured to attenuate the RF signal.

IPC Classes  ?

  • H03K 17/693 - Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors

42.

METHODS AND DEVICES FOR DEVICE-TO-DEVICE COMMUNICATIONS

      
Application Number EP2018053402
Publication Number 2019/154518
Status In Force
Filing Date 2018-02-12
Publication Date 2019-08-15
Owner INTEL IP CORPORATION (USA)
Inventor
  • Scholand, Tobias
  • Ellenbeck, Jan
  • Badic, Biljana
  • Barbu, Oana-Elena
  • Reichelmeir, Thomas Hans-Joerg
  • Goris, Norman
  • Brendel, Johannes
  • Castel, Lea
  • Kiilerich Pratas, Nuno Manuel
  • Drewes, Christian

Abstract

A terminal device includes a controller configured to identify a data hopping sequence for a first superframe including a plurality of frames, and a transceiver configured to switch hopping frequencies over the plurality of frames according to a data hopping sequence that excludes one or more hopping frequencies scheduled for use by a synchronization hopping sequence in one or more superframes immediately succeeding the first superframe.

IPC Classes  ?

43.

TECHNIQUES FOR CONTROLLING SPECTRUM USAGE OF A HIERARCHICAL COMMUNICATION SYSTEM

      
Application Number US2019015372
Publication Number 2019/156836
Status In Force
Filing Date 2019-01-28
Publication Date 2019-08-15
Owner INTEL IP CORPORATION (USA)
Inventor
  • Mueck, Markus Dominik
  • Drewes, Christian
  • Tsagkaris, Kostas
  • Demestichas, Panagiotis
  • Michalolikos, Michalis
  • Vassaki, Stavroula

Abstract

The disclosure relates to an access point (AP) device for controlling spectrum usage of a hierarchical communication system, in which a spectrum reserved for an Incumbent is usable by at least one user equipment (UE) for transmission when the spectrum is not required by the Incumbent, the AP device comprising a processor configured to: enforce the at least one UE into a mode protecting use of the spectrum by the Incumbent based on a spectrum request indication from the Incumbent; and enable transmission of the at least one UE using the spectrum reserved for the Incumbent based on a spectrum availability indication from the Incumbent.

IPC Classes  ?

  • H04W 16/04 - Traffic adaptive resource partitioning
  • H04W 24/02 - Arrangements for optimising operational condition
  • H04W 24/10 - Scheduling measurement reports
  • H04W 72/04 - Wireless resource allocation

44.

SCORE TREND ANALYSIS FOR REDUCED LATENCY AUTOMATIC SPEECH RECOGNITION

      
Application Number US2019012171
Publication Number 2019/156754
Status In Force
Filing Date 2019-01-03
Publication Date 2019-08-15
Owner INTEL IP CORPORATION (USA)
Inventor
  • Hofer, Joachim
  • Stemmer, Georg
  • Bauer, Josef G.
  • Georges, Munir Nikolai Alexander

Abstract

Techniques are provided for reducing the latency of automatic speech recognition using hypothesis score trend analysis. A methodology implementing the techniques according to an embodiment includes generating complete-phrase hypotheses and partial-phrase hypotheses, along with associated likelihood scores, based on a segment of speech. The method also includes selecting the complete-phrase hypothesis associated with the highest of the complete-phrase hypotheses likelihood scores, and selecting the partial-phrase hypothesis associated with the highest of the partial-phrase hypotheses likelihood scores. The method further includes calculating a relative likelihood score based on a ratio of the likelihood score associated with the selected complete-phrase hypothesis to the likelihood score associated with the selected partial-phrase hypothesis. The method further includes calculating a trend of the relative likelihood score as a function of time and identifying an endpoint of the speech based on a determination that the trend does not decrease over a selected time period.

IPC Classes  ?

  • G10L 15/01 - Assessment or evaluation of speech recognition systems
  • G10L 25/78 - Detection of presence or absence of voice signals
  • G10L 15/08 - Speech classification or search

45.

TECHNIQUES FOR RADIO CELL RESELECTION

      
Application Number US2018015871
Publication Number 2019/151978
Status In Force
Filing Date 2018-01-30
Publication Date 2019-08-08
Owner INTEL IP CORPORATION (USA)
Inventor
  • Kothari, Gaurav
  • Dash, Deepak

Abstract

This disclosure relates to a user equipment (UE) circuitry comprising a processor, wherein the processor is configured to: receive a message indicating a redirection from a first radio network to a second radio network while the UE is registered in the first radio network under a first location area code (LAC); initiate a cell search for radio cells of the second radio network, wherein a specific LAC is assigned to at least one radio cell of the second radio network; and connect to a first radio cell found by the cell search based on a comparison of a LAC of the first radio cell and the first LAC under which the UE is registered in the first radio network.

IPC Classes  ?

  • G06F 15/16 - Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs

46.

APPARATUS, SYSTEM AND METHOD OF COMMUNICATION DURING A TRANSMIT OPPORTUNITY (TXOP)

      
Application Number US2018014170
Publication Number 2019/143332
Status In Force
Filing Date 2018-01-18
Publication Date 2019-07-25
Owner INTEL IP CORPORATION (USA)
Inventor
  • Kedem, Oren
  • Mor, Ran
  • Paz, Nir
  • Pais, Alon
  • Markovich, Dror
  • Brainman, Igor

Abstract

For example, a first STA may be configured to transmit to a second STA a message including a first value to indicate an available memory size at the first STA at a beginning of a TXOP, and a second value to indicate a maximal length of an A-MPDU transmission during the TXOP; to receive an initial A-MPDU from the second STA during the TXOP, a length of the initial A-MPDU is not longer than the first value; to determine a capacity value based on a current available memory size at the first STA, the capacity value to indicate whether the second STA is to be allowed to send to the first STA a subsequent A-MPDU having a length which is not longer than the second value; and to transmit to the second STA an Ack including a buffer capacity field including the capacity value.

IPC Classes  ?

  • H04L 1/16 - Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
  • H04L 1/18 - Automatic repetition systems, e.g. Van Duuren systems
  • H04W 28/06 - Optimising, e.g. header compression, information sizing

47.

III-N DIODES WITH BURIED POLARIZATION LAYERS UNDERNEATH ANODES

      
Application Number US2018013419
Publication Number 2019/139601
Status In Force
Filing Date 2018-01-12
Publication Date 2019-07-18
Owner INTEL IP CORPORATION (USA)
Inventor Giles, Luis Felipe

Abstract

A III-N diode is disclosed. The diode includes a base layer of a III-N material and a stack of various materials provided over the base layer and including layers of a first polarization material provided over the base layer and a second polarization material provided over the first material and forming a heterojunction with the first material, and a cover layer provided over the second material, burying the polarization layers below the surface of the diode. An anode of the diode extends towards the base layer, with the bottom part of the anode interfacing the second material so that a portion of the second polarization material is underneath the anode. Carefully selecting the first and second materials can ensure that 2DEG is formed in the second material and, thereby, extends below the anode, advantageously improving coupling between the 2DEG and the anode and, thus, improving performance of the III-N diode.

IPC Classes  ?

  • H01L 29/861 - Diodes
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT

48.

III-N DEVICES WITH MULTIPLE TWO-DIMENSIONAL CHARGE CARRIER LAYERS

      
Application Number US2018019676
Publication Number 2019/139634
Status In Force
Filing Date 2018-02-26
Publication Date 2019-07-18
Owner INTEL IP CORPORATION (USA)
Inventor
  • Geiger, Richard
  • Baumgartner, Peter
  • Then, Han Wui
  • Giles, Luis Felipe
  • Jovanov, Vase
  • Bechtold, Alexander
  • Radosavljevic, Marko
  • Siprak, Domagoj
  • Dasgupta, Sansaptak
  • Hodel, Uwe
  • Panagopoulos, Georgios

Abstract

Disclosed herein are III-N device assemblies in which multiple two-dimensional charge carrier layers, e.g. multiple 2DEG layers, can be formed during operation. An exemplary assembly is a III-N transistor that includes a first III-N layer over a substrate, a first polarization layer over the first III-N layer, a second III-N layer over the first polarization layer, and a second polarization layer over the second III-N layer. During operation of the transistor, the first and second polarization layers cause formation of 2DEG in regions of respective III-N layers immediately below them. Including the first polarization layer as a polarization layer embedded between the III-N materials below at least a portion of the second polarization layer may enable shielding of electric fields and reduction of coupling of the drain electrode of the transistor to the channel region, which may provide an improvement in performance of III-N transistors with shorter gate lengths.

IPC Classes  ?

  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

49.

POSITIONING RECEIVER

      
Application Number US2018054806
Publication Number 2019/139652
Status In Force
Filing Date 2018-10-08
Publication Date 2019-07-18
Owner INTEL IP CORPORATION (USA)
Inventor
  • Ffoulkes-Jones, Geraint
  • Ramakrishnan, Anjan
  • Zhang, Qiang

Abstract

This disclosure relates to a positioning receiver, comprising a processor configured to: process a GNSS satellite transmitted navigation message received from at least one respective satellite vehicle to provide a navigation message data packet and to determine for each data bit of the navigation message data packet a respective confidence value; and determine positioning data based on the data bits of the navigation message data packet and respective confidence values.

IPC Classes  ?

  • G01S 1/00 - Beacons or beacon systems transmitting signals having a characteristic or characteristics capable of being detected by non-directional receivers and defining directions, positions, or position lines fixed relatively to the beacon transmitters; Receivers co-operating therewith
  • G01S 19/24 - Acquisition or tracking of signals transmitted by the system
  • G01S 19/41 - Differential correction, e.g. DGPS [differential GPS]

50.

CONTROL OF ENVELOPE TRACKER PMIC

      
Application Number US2018064678
Publication Number 2019/139706
Status In Force
Filing Date 2018-12-10
Publication Date 2019-07-18
Owner INTEL IP CORPORATION (USA)
Inventor
  • Sutskover, Ilan
  • Segev, Eran
  • Henzler, Stephan
  • Belitzer, Alexander

Abstract

A tracker circuit configured to provide a variable supply voltage to a power amplifier (PA) circuit is disclosed. The tracker circuit comprises a predefined state machine circuit comprising a plurality of states mapped in accordance with transitions associated with a predefined mapping scheme. In some embodiments, the plurality of states of the state machine circuit identify one or more operational modes associated with the tracker circuit, wherein the one or more operational modes comprises one or more voltage levels respectively associated therewith. In some embodiments, the one or more operational modes comprises at least two active operational modes. In some embodiments, a transition between the one or more operational modes of the tracker circuit is dictated by a decoding of a digital selection signal received from a digital communication interface associated therewith.

IPC Classes  ?

  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F 3/195 - High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
  • H03F 3/24 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages

51.

METHODS OF FREQUENCY DOMAIN INTRA-ORTHOGONAL FREQUENCY-DIVISION MULTIPLEXING (OFDM) SYMBOL MULTI RX-BEAM MEASUREMENT AND DYNAMIC RX BEAM SWEEPING

      
Application Number CN2017119942
Publication Number 2019/127403
Status In Force
Filing Date 2017-12-29
Publication Date 2019-07-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Yu, Zhibin
  • Ruder, Michael
  • Neuhaus, Holger
  • Hwang, Yeong-Sun
  • Gunzelmann, Bertram

Abstract

A communication device comprises a receiver including at least two receive antennas and configured to receive at least one reference signal of a plurality of reference signals, each reference signal being transmitted from at least one base station at a predefined reference signal transmission time; a controller configured to switch between at least two receive configurations of the at least two antennas during a reception period of the at least one reference signal; and a signal quality determiner configured to determine a parameter indicative of a first signal quality of the received reference signal for each receive configuration.

IPC Classes  ?

  • H04L 5/00 - Arrangements affording multiple use of the transmission path
  • H04B 7/08 - Diversity systems; Multi-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station

52.

ENHANCED TIME SENSITIVE NETWORK COORDIATION FOR WIRELESS TRANSMISISONS

      
Application Number US2017068438
Publication Number 2019/132861
Status In Force
Filing Date 2017-12-26
Publication Date 2019-07-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Cavalcanti, Dave
  • Cariou, Laurent
  • Rashid, Mohammad Mamunur
  • Cordeiro, Carlos

Abstract

This disclosure describes systems, methods, and apparatuses related to wireless time sensitive network coordination. A device may determine a transmission schedule. The device may send a first data frame. The device may identify a second data frame. The device may send a measurement report.

IPC Classes  ?

53.

PREDISTORTION CIRCUIT, METHOD FOR GENERATING A PREDISTORTED BASEBAND SIGNAL, CONTROL CIRCUIT FOR A PREDISTORTION CIRCUIT, METHOD TO DETERMINE PARAMETERS FOR A PREDISTORTION CIRCUIT, AND APPARATUS AND METHOD FOR PREDISTORTING A BASEBAND SIGNAL

      
Application Number US2017068859
Publication Number 2019/132949
Status In Force
Filing Date 2017-12-29
Publication Date 2019-07-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Menkhoff, Andreas
  • Kraut, Gunther
  • Langer, Andreas

Abstract

A predistortion circuit for a wireless transmitter includes a signal input configured to receive a baseband signal. Further, the predistortion circuit includes a predistorter configured to generate a predistorted baseband signal using the baseband signal and a select of one of a first predistorter configuration and a second predistorter configuration.

IPC Classes  ?

  • H04L 25/49 - Transmitting circuits; Receiving circuits using three or more amplitude levels
  • H04L 27/34 - Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
  • H04L 27/36 - Modulator circuits; Transmitter circuits

54.

HIERARCHIC RESOURCE ALLOCATION

      
Application Number US2017068465
Publication Number 2019/132868
Status In Force
Filing Date 2017-12-27
Publication Date 2019-07-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Alpert, Yaron
  • Cariou, Laurent
  • Reshef, Ehud

Abstract

This disclosure describes systems, methods, and devices related to hierarchic resource allocation. A device may identify a first resource allocation request received from a first entity of a hierarchic network. The device may identify a second resource allocation request received from a second entity of the hierarchic network. The device may determine a hierarchic resource allocation request associated with the first resource allocation request and the second resource allocation request. The device may cause to send the hierarchic resource allocation request.

IPC Classes  ?

  • H04W 28/16 - Central resource management; Negotiation of resources or communication parameters, e.g. negotiating bandwidth or QoS [Quality of Service]
  • H04W 16/32 - Hierarchical cell structures

55.

METHODS AND APPARATUS TO CREATE DRONE DISPLAYS

      
Application Number US2017068550
Publication Number 2019/132884
Status In Force
Filing Date 2017-12-27
Publication Date 2019-07-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Gurdan, Tobias
  • Gurdan, Daniel

Abstract

Methods and apparatus to create drone displays are disclosed. An example drone display design system includes an audience configuration definer to receive an input representing a configuration of an audience from a user, and a drone display designer to, by executing an instruction with a processor, design a drone display to present content to the audience based on the input.

IPC Classes  ?

  • G09F 21/10 - Mobile visual advertising by aeroplanes, airships, balloons, or kites the advertising matter being arranged on the aircraft illuminated
  • G09F 21/16 - Sky-writing
  • B64C 39/02 - Aircraft not otherwise provided for characterised by special use
  • G05D 1/10 - Simultaneous control of position or course in three dimensions

56.

METHOD AND APPARATUS FOR LOW POWER SYNCHRONIZATION OF BLUETOOTH SYSTEMS

      
Application Number US2017068732
Publication Number 2019/132922
Status In Force
Filing Date 2017-12-28
Publication Date 2019-07-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Zhang, Yuwei
  • Desai, Presanna

Abstract

A method and apparatus for synchronizing a wireless communication receiver such as a Bluetooth receiver, including estimating the condition of the communication channel and operating the receiver either in frequency domain mode or in time domain mode based on the channel condition estimation. A soft threshold is used to estimate the symbols of the access address code. Oversampled data rate received data is processed at symbol rate of the data. Receiver functions are terminated upon determining that no signal that the receiver can decode is being received. Synchronization includes a correlator that processes an entire address code or a correlator that processes the address code in segments.

IPC Classes  ?

  • H04W 52/02 - Power saving arrangements
  • H04W 4/00 - Services specially adapted for wireless communication networks; Facilities therefor
  • H04L 27/156 - Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width

57.

MECHANISM TO ALLOW POWER CONSTRAINED NEIGHBOR AWARENESS NETWORKING DEVICES TO SLEEP

      
Application Number US2017068811
Publication Number 2019/132940
Status In Force
Filing Date 2017-12-28
Publication Date 2019-07-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Das, Dibakar
  • Cavalcanti, Dave
  • Huang, Po-Kai
  • Qi, Emily Hong

Abstract

Some demonstrative embodiments include apparatuses, devices and/or methods. For example, an apparatus may include a memory, and processing circuitry coupled to the memory. The processing circuitry is configured to execute logic stored in the memory to cause a power- constrained Neighbor Awareness Networking (NAN) Device (PD NAN Device) within a NAN Cluster to transition to a non-synchronization- frame (non-Sync-frame) mode based on a triggering event including at least one of: reception, by a NAN layer of the PD NAN Device, of transition instructions from a Service/Application layer of the PD NAN Device; or reception by the PD NAN Device of a management frame from a non-power-constrained NAN Device (non-PD NAN Device), the management frame including information on the PD NAN Device transitioning to a non-Sync-frame transmitter mode.

IPC Classes  ?

  • H04W 52/02 - Power saving arrangements
  • H04W 56/00 - Synchronisation arrangements
  • H04W 84/18 - Self-organising networks, e.g. ad hoc networks or sensor networks

58.

SWITCHED CAPACITOR RADIO FREQUENCY DIGITAL POWER AMPLIFIER AND RADIO FREQUENCY DIGITAL-TO-ANALOG CONVERTER

      
Application Number US2017068853
Publication Number 2019/132948
Status In Force
Filing Date 2017-12-29
Publication Date 2019-07-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Azam, Ali
  • Ravi, Ashoke
  • Degani, Ofir
  • Khamaisi, Bassam

Abstract

A switched capacitor digital power amplifier (DPA) or a digital-to-analog converter (DAC) is disclosed. The DPA/DAC includes a plurality of switched capacitor cells connected in parallel. Each switched capacitor cell includes a capacitor and a switch. The switch selectively drives the capacitor in response to an input digital codeword. The switched capacitor cells are divided into sub-arrays and a series capacitor is inserted in series between two adjacent sub-arrays of switched capacitor cells. All the sub-arrays of switched capacitor cells may be in a unary-coded structure. Alternatively, at least one of the sub-arrays may be in a C-2C structure and at least one another sub-array may be in a unary-coded structure. The switch in the switched capacitor cells is driven by a local oscillator signal, and a phase correction buffer may be added for adjusting a delay of the local oscillator signal supplied to sub-arrays of switched capacitor cells.

IPC Classes  ?

  • H03F 3/00 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
  • H03M 1/66 - Digital/analogue converters

59.

ENHANCED SIGNAL DETECTION FOR WIRELESS COMMUNICATIONS

      
Application Number US2017068954
Publication Number 2019/132980
Status In Force
Filing Date 2017-12-29
Publication Date 2019-07-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Chen, Xiaogang
  • Stacey, Robert
  • Niu, Huaning
  • Cariou, Laurent
  • Li, Qinghua
  • Jiang, Feng

Abstract

This disclosure describes systems, methods, and devices related to signal detection. A device is configured to: determine a physical layer protocol data unit (PPDU); append a common preamble to the PPDU, wherein the preamble comprises a common short training field and a common preamble length field; generate a frame comprising the preamble and the PPDU; and send the frame.

IPC Classes  ?

  • H04L 27/26 - Systems using multi-frequency codes

60.

COMMUNICATION DEVICE AND METHOD FOR DETERMINING A FREQUENCY OFFSET

      
Application Number US2018061161
Publication Number 2019/133151
Status In Force
Filing Date 2018-11-15
Publication Date 2019-07-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Meixner, Michael
  • Rotstein, Ron
  • Schultz, Christoph
  • Meyer, Stefan
  • Hviid, Jan
  • Agrawal, Kapil

Abstract

A communication device is described comprising an oscillator configured to generate a reference frequency; a measurement determiner configured to determine a plurality of measurement pairs, each measurement pair representing a temperature of the oscillator and a frequency offset of the reference frequency; and a frequency offset determiner configured to determine a relation between temperature of the oscillator and frequency offset of the reference frequency over a temperature range based on a least one type of mathematical regression, clean-up of outdated measurement pairs, filtering and weighting of measurement pairs according to their statistical importance and maximum likelihood combination of obtained information based on a priori known statistical data.

IPC Classes  ?

61.

DYNAMIC ENROLLMENT OF USER-DEFINED WAKE-UP KEY-PHRASE FOR SPEECH ENABLED COMPUTER SYSTEM

      
Application Number US2018061728
Publication Number 2019/133153
Status In Force
Filing Date 2018-11-19
Publication Date 2019-07-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Georges, Munir Nikolai Alexander
  • Bocklet, Tobias
  • Stemmer, Georg
  • Hofer, Joachim
  • Bauer, Josef G.

Abstract

Techniques are provided for wake-on-voice (WOV) key-phrase enrollment. A methodology implementing the techniques according to an embodiment includes generating a WOV key-phrase model based on identification of the sequence of sub-phonetic units of a user-provided key-phrase. The WOV key-phrase model is employed by a WOV processor for detection of the user spoken key-phrase and triggering operation of an automatic speech recognition (ASR) processor in response to the detection. The method further includes updating an ASR language model based on the user-provided key-phrase. The update includes one of embedding the WOV key-phrase model into the ASR language model, converting sub-phonetic units of the WOV key-phrase model and embedding the converted WOV key-phrase model into the ASR language model, or generating an ASR key-phrase model by applying a phoneme-syllable based statistical language model to the user-provided key-phrase and embedding the generated ASR key-phrase model into the ASR language model.

IPC Classes  ?

  • G10L 15/02 - Feature extraction for speech recognition; Selection of recognition unit
  • G10L 15/04 - Segmentation; Word boundary detection
  • G10L 15/183 - Speech classification or search using natural language modelling using context dependencies, e.g. language models

62.

METHOD AND APPARATUS FOR CALIBRATING A CLOCK

      
Application Number US2017066920
Publication Number 2019/125350
Status In Force
Filing Date 2017-12-18
Publication Date 2019-06-27
Owner INTEL IP CORPORATION (USA)
Inventor
  • Schmandt, Bernd
  • Huertgen, Frank
  • Meixner, Michael
  • Burnic, Admir
  • Meyer, Stefan
  • Mueller-Weinfurtner, Stefan
  • Schaller, Bernd

Abstract

Examples provide a method for clock calibration. A wireless communication device includes a first clock and a second clock. The first clock is turned off but the second clock runs during the inactive state of the wireless communication device. A frequency offset of the first clock is measured with respect to a reference frequency based on a signal received from a network. A virtual timer, which is a software-based timer is updated based on the frequency offset. A drift of the second clock is measured over a predetermined time interval based on the virtual timer. The virtual timer is restored based on the drift after wake-up from the inactive state. Alternatively, a clock frequency relation between the first clock and the second clock may be measured and a phase locked loop (PLL) may be controlled based on the measured clock frequency relation.

IPC Classes  ?

63.

METHODS AND APPARATUS TO MITIGATE COEXISTENCE INTERFERENCE IN A WIRELESS NETWORK

      
Application Number US2017067043
Publication Number 2019/125374
Status In Force
Filing Date 2017-12-18
Publication Date 2019-06-27
Owner INTEL IP CORPORATION (USA)
Inventor
  • Elad, Yuval
  • Bravo, Daniel F.
  • Solodkin, Shimon

Abstract

Methods and apparatus to mitigate coexistence interference in a wireless network are disclosed. An example apparatus includes a station component interface to receive an expected transmission power from an access point; an index processor to determine a set of preferred resource unit (RU) indexes from a set of available RU indexes for at least one of (A) uplink transmission to the access point based on a comparison of allowable transmission power and the expected transmission power or (B) downlink reception based on a comparison of a noise floor to a noise threshold; and the station component interface to transmit a message including the preferred RU indexes to the access point.

IPC Classes  ?

  • H04W 52/24 - TPC being performed according to specific parameters using SIR [Signal to Interference Ratio] or other wireless path parameters
  • H04W 52/14 - Separate analysis of uplink or downlink
  • H04W 72/04 - Wireless resource allocation
  • H04W 24/02 - Arrangements for optimising operational condition

64.

COMPOUND CAPACITOR STRUCTURES

      
Application Number US2017067094
Publication Number 2019/125385
Status In Force
Filing Date 2017-12-18
Publication Date 2019-06-27
Owner INTEL IP CORPORATION (USA)
Inventor
  • Siprak, Domagoj
  • Fritzin, Jonas
  • Anantha Krishnan, Sundaravadanan

Abstract

Capacitors are disclosed. A capacitor includes a plate-to-plate capacitor and a finger-to-finger capacitor. The plate-to-plate capacitor includes at least a first plate and a second plate. The second plate is in proximity to the first plate. The finger to finger capacitor is in proximity to the first plate. The finger to finger capacitor includes a first plurality of finger elements and a second plurality of finger elements. The second plurality of finger elements is interleaved with the first plurality of finger elements. The first plurality of finger elements is electrically connected to the first plate and the second plurality of finger elements is electrically connected to the second plate. The second plurality of finger elements and the first plate form additional plate-to-plate capacitors.

IPC Classes  ?

65.

METHODS AND APPARATUS FOR INDICATING DATA PACKET ATTRIBUTES IN WIRELESS COMMUNICATION

      
Application Number US2017067384
Publication Number 2019/125416
Status In Force
Filing Date 2017-12-19
Publication Date 2019-06-27
Owner INTEL IP CORPORATION (USA)
Inventor
  • Chen, Xiaogang
  • Jiang, Feng
  • Li, Qinghua
  • Stacey, Robert

Abstract

Methods and apparatus to indicate data packet attributes in wireless communication are disclosed. An example apparatus includes a data packet information determiner to determine a length of a data packet to be transmitted to a receiving device; and a data packet length encoder to encode the length of the data packet using at least one of a subfield of a control information field of the data packet.

IPC Classes  ?

  • H04L 27/34 - Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
  • H04L 27/26 - Systems using multi-frequency codes
  • H04L 1/00 - Arrangements for detecting or preventing errors in the information received

66.

TECHNIQUES FOR RESOURCE SHARING

      
Application Number US2018016790
Publication Number 2019/125508
Status In Force
Filing Date 2018-02-05
Publication Date 2019-06-27
Owner INTEL IP CORPORATION (USA)
Inventor
  • Saxena, Alok
  • Dev, Rishav

Abstract

This disclosure relates to user equipment (UE) circuitry comprising: a lookup table configured to provide for at least one bitrate requirement of a first subscriber identity module (SIM) of a multi-SIM module and at least one bitrate requirement of a second SIM of the multi-SIM module a respective combination of UE categories for both SIMs, wherein a specific UE category indicates a specific hardware resources configuration supported by the UE; and an arbitration entity configured to select a specific combination of UE categories from the lookup table based on a bitrate change request from any one of the first SIM or the second SIM. Next using the NAS-AS Framework in the Protocol Stack the above selected UE Category combination from the Look Up Table is reported to the network in the ECM-Idle state without network detach and network re-attach to minimize the delays using the method provided in the MSCs.

IPC Classes  ?

  • H04W 72/08 - Wireless resource allocation based on quality criteria
  • H04L 12/24 - Arrangements for maintenance or administration
  • H04L 12/801 - Flow control or congestion control
  • H04L 12/807 - Calculation or update of the congestion window
  • H04L 12/825 - Adaptive control, at the source or intermediate nodes, upon congestion feedback, e.g. X-on X-off

67.

NOVEL MULTIFEED PREDISTORTER WITH REALTIME ADAPTATION

      
Application Number US2017066066
Publication Number 2019/117888
Status In Force
Filing Date 2017-12-13
Publication Date 2019-06-20
Owner INTEL IP CORPORATION (USA)
Inventor
  • Kushnir, Igal
  • Zur, Sarit
  • Ben-Bassat, Assaf
  • Gordon, Eshel
  • Horwitz, Lior
  • Langer, Andreas
  • Kraut, Gunther

Abstract

A multi-feed predistorter circuit associated with a power amplifier (PA) system is disclosed. The multi-feed predistorter circuit comprises one or more processors configured to receive an input signal associated with the PA system. The one or more processors is further configured to receive one or more PA measurement signals comprising one or more measured parameter values, respectively associated with a PA circuit in the PA system and generate a predistorted input signal to compensate for non-linearities associated with the PA circuit, based on the input signal and the one or more PA measurement signals. In some embodiments, the one or more measured parameter values comprises measured parameter values that are different from measured parameter values associated with a PA output signal and a PA input signal of the PA circuit.

IPC Classes  ?

  • H03F 1/32 - Modifications of amplifiers to reduce non-linear distortion
  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F 3/195 - High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
  • H03F 3/213 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
  • H03F 3/24 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages

68.

APPARATUS AND METHOD FOR INTERPOLATING BETWEEN A FIRST SIGNAL AND A SECOND SIGNAL

      
Application Number US2017066555
Publication Number 2019/117932
Status In Force
Filing Date 2017-12-15
Publication Date 2019-06-20
Owner INTEL IP CORPORATION (USA)
Inventor
  • Degani, Ofir
  • Banin, Rotem
  • Ben-Bassat, Assaf
  • Asa, Gil
  • Khamaisi, Bassam

Abstract

An apparatus for interpolating between a first signal and a second signal is provided. The apparatus includes a first plurality of interpolation cells configured to generate a first interpolation signal at a first node. At least one of the first plurality of interpolation cells is configured to supply, based on a first number of bits of a control word, at least one of the first signal and the second signal to the first node. The apparatus further includes a second plurality of interpolation cells configured to generate a second interpolation signal at a second node. At least one of the second plurality of interpolation cells is configured to supply, based on a second number of bits of the control word, at least one of the first signal and the second signal to the second node. The apparatus additionally includes an interpolation circuit configured to weight the second interpolation signal based on a weighting factor, and to combine the first interpolation signal and the weighted second interpolation signal to generate a third interpolation signal.

IPC Classes  ?

  • H03L 7/099 - Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
  • H03L 7/081 - Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop - Details of the phase-locked loop provided with an additional controlled phase shifter
  • G04F 10/00 - Apparatus for measuring unknown time intervals by electric means

69.

METHOD AND APPARATUS FOR DIGITAL ENVELOPE TRACKING WITH DYNAMICALLY CHANGING VOLTAGE LEVELS FOR POWER AMPLIFIER

      
Application Number US2017066556
Publication Number 2019/117933
Status In Force
Filing Date 2017-12-15
Publication Date 2019-06-20
Owner INTEL IP CORPORATION (USA)
Inventor
  • Henzler, Stephan
  • Langer, Andreas
  • Schumacher, Otto

Abstract

A device for digital envelope tracking with dynamically changing voltage levels for a radio frequency (RF) power amplifier is disclosed. A power management unit generates a set of supply voltages for a power amplifier based on a control signal. A setpoint generator in the power management integrated circuit gradually increases or decreases a target voltage such that the set of supply voltages output from the voltage converter gradually increase or decrease in response to a gradual transition of the target voltage. A transceiver includes digital models for replicating a behavior of the setpoint generator and a voltage regulator in the voltage converter such that a signal pre-distortion unit may use an instantaneous voltage level for signal predistortion.

IPC Classes  ?

  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F 3/193 - High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices

70.

ENHANCED TIME DIFFERENCE OF ARRIVAL IN RADIO FREQUENCY WIRELESS COMMUNICATIONS

      
Application Number US2018040545
Publication Number 2019/112647
Status In Force
Filing Date 2018-07-02
Publication Date 2019-06-13
Owner INTEL IP CORPORATION (USA)
Inventor
  • Tschirschnitz, Maximilian
  • Wagner, Marcel

Abstract

This disclosure describes systems, methods, and devices related to enhanced time difference of arrival techniques for radio frequency time of flight indoor device positioning. A device may identify a first radio frequency pulse received from a tag device at a first time of arrival. The device may identify a second radio frequency pulse received from the tag device at a second time of arrival. The device may identify a third radio frequency pulse received from another anchor device at a third time of arrival, wherein the third radio frequency pulse is a reflection of the second radio frequency pulse. The device may determine a time difference of arrival (TDOA) based at least in part on a first time of arrival, a second time of arrival, a third time of arrival, a fourth time of arrival, a fifth time of arrival, and a time of departure, wherein the TDOA indicates a difference between the first time of arrival and the fourth time of arrival.

IPC Classes  ?

  • G01S 5/06 - Position of source determined by co-ordinating a plurality of position lines defined by path-difference measurements
  • H04W 64/00 - Locating users or terminals for network management purposes, e.g. mobility management

71.

CHANNEL STATE INFORMATION ESTIMATION WITH CODEWORD INTERFERENCE CANCELLATION

      
Application Number US2018059516
Publication Number 2019/112739
Status In Force
Filing Date 2018-11-07
Publication Date 2019-06-13
Owner INTEL IP CORPORATION (USA)
Inventor
  • Hwang, Yeong-Sun
  • Eder, Franz
  • Muennich, Matthias
  • Ju, Ziyang
  • Tosetti, Carol
  • Malhotra, Anchit

Abstract

A signal processing is provided configured to estimate a first channel quality metric value for a data signal based on a first channel quality metric, if a codeword corresponds to a reference codeword included in the first set of reference codewords, wherein the first channel quality value is smaller than a reference channel quality metric value for the data signal, wherein the reference channel quality metric value for the data signal results from a channel quality estimation based on a predetermined channel quality metric; and to estimate a second channel quality metric value for the data signal based on a second channel quality metric, if the codeword corresponds to a reference codeword included in the second set of reference codewords, wherein the second channel quality value is equal to or larger than the reference channel quality metric value for the data signal.

IPC Classes  ?

  • H04L 25/02 - Baseband systems - Details
  • H04L 25/03 - Shaping networks in transmitter or receiver, e.g. adaptive shaping networks

72.

METHODS AND DEVICES FOR NARROWBAND COMMUNICATIONS

      
Application Number EP2017081000
Publication Number 2019/105557
Status In Force
Filing Date 2017-11-30
Publication Date 2019-06-06
Owner INTEL IP CORPORATION (USA)
Inventor
  • Svensson, Per-Olof
  • Ökvist, Göran
  • Sjöberg, Frank
  • Leblanc, James
  • Nilsson, Magnus
  • Lundberg Nordenvaad, Magnus
  • Öhlund, Anders
  • Potorski, Marcin
  • Cesares Cano, Jose

Abstract

A communication device includes a measurement engine configured to perform a radio measurement to obtain a reception metric, a power reduction database configured to identify a potential power reduction from a plurality of power reductions, a metric scaler configured to scale the reception metric to compensate for the potential power reduction to obtain a reduced reception metric, and a transmit controller configured to select a transmit power or a transmit repetition count for a radio frequency transceiver based on the reduced reception metric.

IPC Classes  ?

  • H04W 52/36 - Transmission power control [TPC] using constraints in the total amount of available transmission power with a discrete range or set of values, e.g. step size, ramping or offsets
  • H04W 52/10 - Open loop power control
  • H04W 52/14 - Separate analysis of uplink or downlink
  • H04W 52/24 - TPC being performed according to specific parameters using SIR [Signal to Interference Ratio] or other wireless path parameters
  • H04W 52/50 - TPC being performed in particular situations at the moment of starting communication in a multiple access environment

73.

ENHANCED POLLING PROCEDURES

      
Application Number EP2017080979
Publication Number 2019/105553
Status In Force
Filing Date 2017-11-30
Publication Date 2019-06-06
Owner INTEL IP CORPORATION (USA)
Inventor
  • Svensson, Per-Olof
  • Ökvist, Göran
  • Sjöberg, Frank
  • Leblanc, James
  • Nilsson, Magnus
  • Lundberg Nordenvaad, Magnus
  • Öhlund, Anders
  • Potorski, Marcin
  • Cesares Cano, Jose

Abstract

A device for wireless communications includes one or more protocol processors for executing a protocol stack, the one or more protocol processors configured to generate a first RLC (Radio Link Control) PDU (Protocol Data Unit) with data from a first upper-layer PDU and transmit the first RLC PDU to a counterpart base station RLC, generate a second RLC PDU, with its poll bit set, with data from a second upper-layer PDU and transmit the second RLC PDU to the counterpart base station RLC, and receive a status PDU from the counterpart base station RLC that indicates a status of the first and second RLC PDUs.

IPC Classes  ?

  • H04L 1/16 - Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals

74.

MULTI-ACCESS EDGE COMPUTING (MEC) TRANSLATION OF RADIO ACCESS TECHNOLOGY MESSAGES

      
Application Number US2018063422
Publication Number 2019/109005
Status In Force
Filing Date 2018-11-30
Publication Date 2019-06-06
Owner INTEL IP CORPORATION (USA)
Inventor
  • Sabella, Dario
  • Mueck, Markus Dominik
  • Filippou, Miltiadis
  • Baltar, Leonardo Gomes
  • Faerber, Michael

Abstract

An architecture to allow the translation or conversion of short-range direct communications between devices with different radio access, such as in a V2X (vehicle-to-everything) communication context, is disclosed. In an example, a translation process, such as is performed by a mobile / multi-access edge computing (MEC) communication entity, includes: obtaining or accessing, at a translation function, a communication message (e.g., IP message) provided from a first device operating with a first radio access technology (e.g., LTE C-V2X), the message addressed to a second device operating with a second radio access technology (e.g., IEEE 802.11p or DSRC/ITS-G5); converting the communication message, with the translation function, into a format compatible with the second radio access technology; and initiating a transmission of the translated communication message, from the translation function, to the second device using the second radio access technology.

IPC Classes  ?

  • H04L 29/08 - Transmission control procedure, e.g. data link level control procedure
  • H04L 29/06 - Communication control; Communication processing characterised by a protocol

75.

APPARATUSES AND METHODS FOR WIRELESS COMMUNICATION

      
Application Number US2017063168
Publication Number 2019/103746
Status In Force
Filing Date 2017-11-23
Publication Date 2019-05-31
Owner INTEL IP CORPORATION (USA)
Inventor
  • Langer, Andreas
  • Bruder, Thomas

Abstract

An apparatus for wireless communication is provided. The apparatus includes a processing circuit configured to receive data to be wirelessly transmitted within a predefined frequency range. Further, the processing circuit is configured to generate a first radio frequency transmit signal of a first frequency range based on the data, and to generate a second radio frequency transmit signal of a second frequency range based on the data. The first frequency range and the second frequency range are subranges of the predefined frequency range. The apparatus further includes a front-end circuit configured to supply the first radio frequency transmit signal to a first antenna, and to supply the second radio frequency transmit signal to a second antenna.

IPC Classes  ?

  • H04B 1/00 - TRANSMISSION - Details of transmission systems not characterised by the medium used for transmission
  • H04B 1/48 - Transmit/receive switching in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter

76.

MULTI-ACCESS EDGE COMPUTING (MEC) BASED MULTI-OPERATOR SUPPORT FOR C-V2X SYSTEMS

      
Application Number US2018062481
Publication Number 2019/104280
Status In Force
Filing Date 2018-11-26
Publication Date 2019-05-31
Owner INTEL IP CORPORATION (USA)
Inventor
  • Sabella, Dario
  • Pinheiro, Ana Lucia

Abstract

A computing device (308) includes communications circuitry to communicate with a first access network (306) and processing circuitry. The processing circuitry is to perform operations to transmit an authorization request for a vehicle-to-everything (V2X) communication to a V2X application function (312) within a service coordinating entity, the request transmitted from the device via the first access network. V2X configuration parameters are received from the service coordinating entity, via the first access network. The V2X configuration parameters are received in response to the authorization request and based on V2X subscription information received by the V2X application function via a V2X application programming interface (API) within the service coordinating entity. A V2X communication link (340) for the V2X communication is established with a second device (326) based on the V2X configuration parameters, the second device associated with a second access network.

IPC Classes  ?

  • H04W 12/08 - Access security
  • H04W 4/40 - Services specially adapted for particular environments, situations or purposes for vehicles, e.g. vehicle-to-pedestrians [V2P]
  • H04L 29/08 - Transmission control procedure, e.g. data link level control procedure

77.

GNSS DEVICE WITH IMPROVED CROSS-CORRELATION IMMUNITY

      
Application Number US2018054818
Publication Number 2019/103795
Status In Force
Filing Date 2018-10-08
Publication Date 2019-05-31
Owner INTEL IP CORPORATION (USA)
Inventor Harel, Ran

Abstract

This disclosure relates to a location positioning device, e.g. a Global Navigation Satellite System (GNSS) device, comprising: an analog front end (AFE) configured to: receive first and second navigation signal components transmitted by a satellite vehicle (SV), lowering the sampling rate of the first and second navigation signal components to a sampling rate of a baseband signal, and convert the first and second navigation signal components at the sampling rate of the baseband signal into digital domain to form a digital baseband first and second navigation signal components; and a baseband processor configured to determine a positioning measurement based on a combination of the digital baseband first and second navigation signal components.

IPC Classes  ?

  • G01S 19/12 - Cooperating elements; Interaction or communication between different cooperating elements or between cooperating elements and receivers providing dedicated supplementary positioning signals wherein the cooperating elements are telecommunication base stations
  • G01S 19/33 - Multimode operation in different systems which transmit time stamped messages, e.g. GPS/GLONASS
  • G01S 19/37 - Hardware or software details of the signal processing chain
  • H04B 1/04 - Circuits
  • H04B 1/10 - Means associated with receiver for limiting or suppressing noise or interference

78.

RESOURCE USAGE OPTIMIZATIONS IN AUTOMATION SYSTEMS

      
Application Number US2018038332
Publication Number 2019/099063
Status In Force
Filing Date 2018-06-19
Publication Date 2019-05-23
Owner INTEL IP CORPORATION (USA)
Inventor
  • Pinheiro, Ana Lucia A.
  • Cavalcanti, Dave
  • Liao, Ching-Yu
  • Jain, Puneet
  • Venkatachalam, Muthaiah

Abstract

Controllers of wireless control systems and apparatuses of Radio Access Network (RAN) nodes and user equipment (UEs) are disclosed. An apparatus of a RAN node configured to store data corresponding to a mapping table received from a controller in a control message. The mapping table is configured to indicate a relationship between a specific data packet header field of the control message and a desired reliability of a data packet to be sent to or received from a particular UE. The apparatus is configured to determine the desired reliability of the data packet to be sent to or received from the particular UE based on the mapping table. The apparatus is further configured to allocate network resources to the data packet to accommodate the desired reliability of the data packet.

IPC Classes  ?

  • H04L 1/18 - Automatic repetition systems, e.g. Van Duuren systems
  • H04W 84/18 - Self-organising networks, e.g. ad hoc networks or sensor networks
  • H04L 12/927 - Allocation of resources based on type of traffic, QoS or priority
  • H04L 12/851 - Traffic type related actions, e.g. QoS or priority

79.

ENHANCED INTERNET PROTOCOL MULTIMEDIA SUBSYSTEM CALL HANDLING

      
Application Number US2018058958
Publication Number 2019/099212
Status In Force
Filing Date 2018-11-02
Publication Date 2019-05-23
Owner INTEL IP CORPORATION (USA)
Inventor
  • Kuppelur, Nitin
  • Dash, Deepak
  • Zaus, Robert
  • T R, Shashanka
  • Gupta, Vivek G.

Abstract

Systems and methods of enabling access for non-emergency voice calls are described. A UE operates in a network supporting voice services via a multitude of RATs. The UE attempts to access the network via a first RAT offering voice services and data services. If the UE does not receive a response from the network within a first time period, the UE re-attempts the access to the network via the first RAT. If the number of access attempts for which the UE does not receive a response is at least a threshold value, the UE refrains during a second time period from further access attempts via the first RAT for the purpose of receiving data services, and continues to attempt access via the first or second RAT for the purpose of receiving voice services.

IPC Classes  ?

  • H04W 76/18 - Management of setup rejection or failure
  • H04W 76/50 - Connection management for emergency connections
  • H04W 76/38 - Connection release triggered by timers
  • H04W 68/00 - User notification, e.g. alerting or paging, for incoming communication, change of service or the like
  • H04W 88/06 - Terminal devices adapted for operation in multiple networks, e.g. multi-mode terminals

80.

ENABLING SUPPORT FOR RELIABLE DATA SERVICE AND PS DATA OFF

      
Application Number US2018061930
Publication Number 2019/100043
Status In Force
Filing Date 2018-11-20
Publication Date 2019-05-23
Owner INTEL IP CORPORATION (USA)
Inventor Gupta, Vivek G.

Abstract

Systems and methods of signaling RDS and PS Data Off in a UE and to a network are described. A UE includes TE and a MT. The TE determines whether RDS and PSDO are to be used for a PDN connection, and generates an AT command for communication to the MT to indicate an RDS status and a PSDO status of the PDN connection. The MT indicates to the network, based on the AT command, the RDS status and PSDO status of the PDN connection at the ME. The AT command enables the TE and allows the ME to communicate support for, and the status of RDS and PSDO, to the MT and enables usage, testing and status reporting of the features.

IPC Classes  ?

  • H04W 28/02 - Traffic management, e.g. flow control or congestion control
  • H04W 28/18 - Negotiating wireless communication parameters
  • H04W 76/10 - Connection setup

81.

MULTI-ACCESS EDGE COMPUTING (MEC) ARCHITECTURE AND MOBILITY FRAMEWORK

      
Application Number US2018060125
Publication Number 2019/094790
Status In Force
Filing Date 2018-11-09
Publication Date 2019-05-16
Owner INTEL IP CORPORATION (USA)
Inventor
  • Mueck, Markus Dominik
  • Sabella, Dario
  • Filippou, Miltiadis
  • Faerber, Michael

Abstract

An architecture to allow the spatial separation of information sources, information processing, and information consumption using objects and tags, including in mobile / multi-access edge computing (MEC) communication environments, is disclosed. In an example, a request for information provided to a network entity (such as a MEC entity) results in the receipt of an object and a tag, as a device operates in an operational area of an information service. The object provides data for the information service, and the tag provides the metadata related to a context of the information service and the object from another entity, for another entity located within the operational area of the location service. The use of this object, including in the form of an application, data, or user object type, allows a transfer and use of data and context for the information service that is independent from the access network.

IPC Classes  ?

  • H04L 29/08 - Transmission control procedure, e.g. data link level control procedure

82.

SEGMENTED NETWORK ARCHITECTURE FOR GENERIC MULTI-ACCESS CONVERGENCE

      
Application Number US2018013355
Publication Number 2019/078911
Status In Force
Filing Date 2018-01-11
Publication Date 2019-04-25
Owner INTEL IP CORPORATION (USA)
Inventor
  • Cariou, Laurent
  • Sadeghi, Bahareh
  • Zhu, Jing

Abstract

Disclosed are methods, devices, and computer readable storage mediums for a split end to end control connection between a station and a network (controller) into two parts, called access and backhaul for convenience. The access link may be between the station and its associated access point (AP). One aspect is an apparatus of an access point (AP) comprising memory; and processing circuitry coupled to the memory, the processing circuitry configured to decode an action frame received from a station to extract a generic multi-access (GMA) control message; and configure the AP to transmit the GMA control message to a controller.

IPC Classes  ?

  • H04W 88/08 - Access point devices
  • H04W 80/02 - Data link layer protocols
  • H04W 84/12 - WLAN [Wireless Local Area Networks]
  • H04B 7/26 - Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile

83.

RELEASE OF EMERGENCY PDN BEARER FOR A VOLTE EMERGENCY CALL WITHOUT EMERGENCY REGISTRATION

      
Application Number US2018041119
Publication Number 2019/078934
Status In Force
Filing Date 2018-07-06
Publication Date 2019-04-25
Owner INTEL IP CORPORATION (USA)
Inventor
  • Pola, Sudhir Shankar
  • Bansal, Gaurav
  • George, Anish

Abstract

e.g.e.g., emergency) calls are properly deactivated. A user equipment ("UE") may maintain an inactivity timer after an emergency call has ended, and may request that the network deactivate the bearer upon expiration of the inactivity timer, if the bearer is still active upon the expiration of the inactivity timer.

IPC Classes  ?

  • H04L 29/06 - Communication control; Communication processing characterised by a protocol
  • H04W 76/50 - Connection management for emergency connections
  • H04W 76/34 - Selective release of ongoing connections
  • H04W 76/38 - Connection release triggered by timers

84.

APPARATUS, SYSTEM AND METHOD OF COLLABORATIVE TIME OF ARRIVAL (CTOA) MEASUREMENT

      
Application Number US2018051921
Publication Number 2019/078996
Status In Force
Filing Date 2018-09-20
Publication Date 2019-04-25
Owner INTEL IP CORPORATION (USA)
Inventor
  • Bar-Shalom, Ofer
  • Amizur, Yuval
  • Banin, Leor
  • Dvorecki, Nir
  • Shabtay, Ophir

Abstract

For example, an apparatus may include circuitry and logic configured to cause a Collaborative Time of Arrival (CToA) client wireless communication station (STA) (cSTA) to measure a Time of Arrival (ToA) of one or more broadcast transmissions from one or more wireless communication devices; to measure a ToA of one or more timing measurement messages from one or more other cSTAs, the timing measurement messages including timing measurement information corresponding to transmissions communicated by the one or more other cSTAs; and to determine a positioning measurement corresponding to a position of the cSTA based at least on the ToA of the one or more broadcast transmissions, the ToA of the timing measurement messages, and the timing measurement information.

IPC Classes  ?

  • G01S 5/06 - Position of source determined by co-ordinating a plurality of position lines defined by path-difference measurements
  • G01S 5/00 - Position-fixing by co-ordinating two or more direction or position-line determinations; Position-fixing by co-ordinating two or more distance determinations

85.

APPARATUS, SYSTEM AND METHOD OF COMMUNICATING A PHYSICAL LAYER PROTOCOL DATA UNIT (PPDU)

      
Application Number US2018052998
Publication Number 2019/079011
Status In Force
Filing Date 2018-09-27
Publication Date 2019-04-25
Owner INTEL IP CORPORATION (USA)
Inventor
  • Lomayev, Artyom
  • Da Silva, Claudio
  • Genossar, Michael
  • Maltsev, Alexander
  • Cordeiro, Carlos

Abstract

For example, an EDMG STA may generate an LDPC coded bit stream for a user based on data bits for the user in an EDMG PPDU, the LDPC coded bit stream for the user including a concatenation of a plurality of LDPC codewords, a count of the plurality of LDPC codewords is based at least on a codeword length for the user and on a code rate for the user; generate encoded and padded bits for the user by concatenating the LDPC coded bit stream with a plurality of coded pad zero bits, a count of the coded pad zero bits is based at least on a count of one or more spatial streams for the user and on the count of the plurality of LDPC codewords for the user; and distribute the encoded and padded bits for the user to the one or more spatial streams for the user.

IPC Classes  ?

  • H04L 1/00 - Arrangements for detecting or preventing errors in the information received
  • H04L 1/06 - Arrangements for detecting or preventing errors in the information received by diversity reception using space diversity
  • H04L 29/08 - Transmission control procedure, e.g. data link level control procedure

86.

LOW-POWER WAKE-UP RADIO DISCOVERY PROCEDURE AND FRAME FORMAT

      
Application Number US2018039996
Publication Number 2019/074558
Status In Force
Filing Date 2018-06-28
Publication Date 2019-04-18
Owner INTEL IP CORPORATION (USA)
Inventor
  • Huang, Po-Kai
  • Bravo, Daniel F.
  • Ginsburg, Noam
  • Stacey, Robert J.

Abstract

A wireless communication device includes a memory, and a processing circuitry coupled to the memory. The processing circuitry is to process a wake-up radio (WUR) frame transmitted by an Access Point (AP), the WUR frame comprising a medium access control (MAC) header and a frame body, the MAC header comprising a Frame Control field, an Address field, and a Type Dependent (TD) Control field, wherein the Frame Control field comprises a Type field; determine, based on a value of the Type field, that the WUR frame is a WUR Discovery frame; determine an identifier (ID) of the AP from the WUR Discovery frame; and in response to a determination that the WUR frame is a WUR Discovery frame, cause a Primary Connectivity Radio (PCR) corresponding to the wireless communication device to communicate with the AP based on the WUR Discovery frame.

IPC Classes  ?

  • H04W 52/02 - Power saving arrangements
  • H04W 48/08 - Access restriction or access information delivery, e.g. discovery data delivery
  • H04W 28/06 - Optimising, e.g. header compression, information sizing

87.

HYBRID AND THINNED MILLIMETER-WAVE ANTENNA SOLUTIONS

      
Application Number US2018053268
Publication Number 2019/070509
Status In Force
Filing Date 2018-09-28
Publication Date 2019-04-11
Owner
  • INTEL IP CORPORATION (USA)
  • INTEL CORPORATION (USA)
Inventor
  • Weisman, Nir
  • Landsberg, Naftali
  • Goldberger, Eyal
  • Herrero, Pablo
  • Skinner, Harry G.

Abstract

Apparatuses and systems for millimeter-wave antennas are described. An apparatus comprises a board assembly, and a first and second antenna disposed within the board assembly. A third antenna can comprise a semiconductor antenna attached to the board assembly. A parasitic layer can be gap-coupled to the first and second antenna. The first and second antenna can include a rectangular patch antenna and an annular ring antenna. Other aspects are described.

IPC Classes  ?

  • H01Q 9/04 - Resonant antennas
  • H01Q 1/38 - Structural form of radiating elements, e.g. cone, spiral, umbrella formed by a conductive layer on an insulating support

88.

BEAMFORMING AND LINK ESTABLISHMENT FOR TIME DIVISION DUPLEX NETWORKS

      
Application Number US2018054010
Publication Number 2019/070746
Status In Force
Filing Date 2018-10-02
Publication Date 2019-04-11
Owner INTEL IP CORPORATION (USA)
Inventor
  • Harel, Tom
  • Kedem, Oren
  • Chen, Cheng
  • Cordeiro, Carlos
  • Glik, Michael

Abstract

This disclosure describes systems, methods, and devices related to beamforming and link establishment. A device may determine a time division duplex (TDD) sector sweep frame comprising beamforming information. The device may determine a first antenna transmit sector of one or more antenna transmit sectors of the initiator corresponds to one or more TDD slots. The device may cause to send a first series of the TDD sector sweep frame to a responder device during a first number of TDD slots corresponding to the first antenna transmit sector. The device may cause to send a second series of the TDD sector sweep frame to the responder device during a second number of TDD slots of the first antenna transmit sector. The device may identify beamforming feedback information, from the responder device, the beamforming feedback information based on the first series of the TDD sector sweep frame and the second series of the TDD sector sweep frame.

IPC Classes  ?

  • H04B 7/0491 - Diversity systems; Multi-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas using two or more sectors, i.e. sector diversity
  • H04B 7/06 - Diversity systems; Multi-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
  • H04B 7/26 - Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile

89.

METHOD AND CIRCUIT FOR DETERMINING PHASE CONTINUITY OF A LOCAL OSCILLATOR SIGNAL, AND LOCAL OSCILLATOR SIGNAL GENERATION CIRCUIT

      
Application Number US2017053866
Publication Number 2019/066835
Status In Force
Filing Date 2017-09-28
Publication Date 2019-04-04
Owner INTEL IP CORPORATION (USA)
Inventor Tertinek, Stefan

Abstract

A method for determining phase continuity of a local oscillator signal generated using a frequency divider is provided. The method includes determining at least one sample of the local oscillator signal. Further, the method includes determining information on the phase continuity using the at least one sample.

IPC Classes  ?

  • H03L 7/099 - Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
  • H03B 21/01 - Generation of oscillations by combining unmodulated signals of different frequencies by beating unmodulated signals of different frequencies

90.

METHOD AND APPARATUS FOR RESOURCE SLOT CONFIGURATION AND ALLOCATING USER EQUIPMENTS TO RESOURCE SLOTS FOR CONTROLLING CHANNEL ACCESS FROM THE USER EQUIPMENTS

      
Application Number US2017054202
Publication Number 2019/066882
Status In Force
Filing Date 2017-09-29
Publication Date 2019-04-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Mueck, Markus
  • Karls, Ingolf
  • Drewes, Christian
  • Youssef, Ziad
  • Majeed, Erfan, H.
  • Jung, Peter
  • Bruck, Guido

Abstract

Examples provide an access node, a network controller, an apparatus for mobile communication, a mobile communication system, a method and a computer program for an access node or a network controller. A control unit in an access node or a central controller may select a time slot configuration. The channel is divided into a plurality of time slots in time domain in accordance with the selected time slot configuration. Wireless communication devices may be grouped into a plurality of groups based on quality of service (QoS) requirements of the wireless communication devices. A group of wireless communication devices may be allocated to a time slot. The group of wireless communication devices may access the channel using a carrier sense multiple access/collision avoidance (CSMA/CA) mechanism. The control unit may monitor occurrences of events at the wireless communication devices and select a new time slot configuration based on the events.

IPC Classes  ?

  • H04W 72/08 - Wireless resource allocation based on quality criteria
  • H04W 72/04 - Wireless resource allocation
  • H04W 74/08 - Non-scheduled access, e.g. random access, ALOHA or CSMA [Carrier Sense Multiple Access]
  • H04W 84/12 - WLAN [Wireless Local Area Networks]

91.

SEMICONDUCTOR PACKAGES, AND METHODS FOR FORMING SEMICONDUCTOR PACKAGES

      
Application Number US2017054209
Publication Number 2019/066884
Status In Force
Filing Date 2017-09-29
Publication Date 2019-04-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Waidhas, Bernd
  • Seidemann, Georg
  • Wagner, Thomas
  • Wolter, Andreas
  • Augustin, Andreas
  • Koller, Sonja
  • Ort, Thomas
  • Mahnkopf, Reinhard

Abstract

A semiconductor package includes a first semiconductor die, a semiconductor device comprising a second semiconductor die, and one or more wire bond structures. The wire bond structure includes a bond interface portion. The wire bond structure is arranged next to the first semiconductor die. The first semiconductor die and the bond interface portion of the wire bond structure are arranged at the same side of the semiconductor device. An interface contact structure of the semiconductor device is electrically connected to the wire bond structure.

IPC Classes  ?

  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

92.

PRINTED WIRING-BOARD ISLANDS FOR CONNECTING CHIP PACKAGES AND METHODS OF ASSEMBLING SAME

      
Application Number US2017054548
Publication Number 2019/066950
Status In Force
Filing Date 2017-09-29
Publication Date 2019-04-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Seidemann, Georg
  • Waidhas, Bernd
  • Koller, Sonja

Abstract

A printed wiring-board island relieves added complexity to a printed circuit board. The printed wiring-board island creates an island form factor in the printed circuit board. Coupling of a semiconductive device package to the printed wiring-board island includes a ball-grid array. The ball-grid array can at least partially penetrate the printed wiring-board island.

IPC Classes  ?

  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/498 - Leads on insulating substrates

93.

BEAM-SPECIFIC POWER CONTROL

      
Application Number US2018026213
Publication Number 2019/067014
Status In Force
Filing Date 2018-04-05
Publication Date 2019-04-04
Owner INTEL IP CORPORATION (USA)
Inventor Miao, Honglei

Abstract

Embodiments of the present disclosure describe methods and apparatuses for beam-specific power control.

IPC Classes  ?

  • H04W 52/42 - TPC being performed in particular situations in systems with time, space, frequency or polarisation diversity
  • H04W 52/08 - Closed loop power control
  • H04W 52/24 - TPC being performed according to specific parameters using SIR [Signal to Interference Ratio] or other wireless path parameters
  • H04W 52/36 - Transmission power control [TPC] using constraints in the total amount of available transmission power with a discrete range or set of values, e.g. step size, ramping or offsets

94.

METHOD AND ARRANGEMENT FOR ALLOCATING RADIO RESOURCES

      
Application Number US2018044460
Publication Number 2019/067082
Status In Force
Filing Date 2018-07-31
Publication Date 2019-04-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Vamanan, Sudeep, M.
  • Pinheiro, Ana, Lucia

Abstract

A method for allocating radio resources to a geographical region is described comprising determining first radio resource requirements which exist in a first geographic region in a first time period, estimating second radio resource requirements which exist in a second geographic region neighboring the first geographic region in a second time period following the first time period based on the first radio resource requirements and based on movement information about communication terminals causing the first radio resource requirements in the first geographic region and allocating radio resources to the second geographic region based on the estimation of the second radio resource requirements.

IPC Classes  ?

95.

PROPELLER CONTACT AVOIDANCE IN AN UNMANNED AERIAL VEHICLE

      
Application Number US2018044461
Publication Number 2019/067083
Status In Force
Filing Date 2018-07-31
Publication Date 2019-04-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Pohl, Daniel
  • Schick, Roman

Abstract

An unmanned aerial vehicle comprising one or more sensors, configured to receive data from an area surrounding the unmanned aerial vehicle; one or more processors, configured to detect movement in a region surrounding the unmanned aerial vehicle using the sensor data; assess the detected movement for fulfillment of a predetermined movement threshold; and upon fulfillment of the predetermined movement threshold, switch between a first operational mode and a second operational mode.

IPC Classes  ?

  • B64C 39/02 - Aircraft not otherwise provided for characterised by special use
  • B64D 45/00 - Aircraft indicators or protectors not otherwise provided for
  • B64D 47/08 - Arrangements of cameras

96.

COMMUNICATION DEVICE AND METHOD FOR RADIO FREQUENCY COMMUNICATION

      
Application Number US2018048209
Publication Number 2019/067135
Status In Force
Filing Date 2018-08-28
Publication Date 2019-04-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Scholand, Tobias
  • Gu, Jian
  • Gunzelmann, Bertram
  • Jordan, Markus
  • Esch, Thomas

Abstract

A communication device is provided that includes a receiver configured to receive a radio frequency signal. The communication device further includes a processor configured to determine a shift frequency based on a component radio frequency signal. The processor is configured to determine a second signal based on the radio frequency signal. The component radio frequency signal is based on the radio frequency signal and associated with a frequency related to the radio frequency signal represented in the frequency domain. The second signal is determined based on shifting frequencies related to the radio frequency signal represented in the frequency domain by the shift frequency.

IPC Classes  ?

  • H04L 27/26 - Systems using multi-frequency codes
  • H04L 5/00 - Arrangements affording multiple use of the transmission path

97.

ON-CHIP OSCILLATORS INCLUDING SHARED INDUCTOR

      
Application Number US2018051923
Publication Number 2019/067296
Status In Force
Filing Date 2018-09-20
Publication Date 2019-04-04
Owner INTEL IP CORPORATION (USA)
Inventor Gu, Zheng

Abstract

Some embodiments include apparatuses and methods of using the apparatuses. One of the apparatuses includes an inductor included in an integrated circuit device, and a first oscillator and a second oscillator included in the integrated circuit device. The first oscillator includes a first terminal coupled to a conductive path of the inductor to provide a first signal. The second oscillator includes a second terminal coupled to the conductive path to provide a second signal. The first and second signals have different frequencies.

IPC Classes  ?

  • H03B 5/24 - Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising resistance and either capacitance or inductance, e.g. phase-shift oscillator active element in amplifier being semiconductor device
  • H04B 1/403 - Circuits using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency

98.

EXTRINSIC CALIBRATION OF CAMERA SYSTEMS

      
Application Number US2018051930
Publication Number 2019/067298
Status In Force
Filing Date 2018-09-20
Publication Date 2019-04-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Natroshvili, Koba
  • Scholl, Kay-Ulrich

Abstract

An extrinsic camera calibration system (ECCS) comprising a surround view system (SVS) interface connecting the ECCS to the SVS. The SVS comprises four cameras mounted to front, back, left, and right sides of a vehicle respectively that are front, back, left, and right cameras, as well as an imaging interface at which images from the four cameras are output. A calibration pattern that comprises a set of features is used by an extrinsic calibration processor. A network interface is connected to the four cameras via the imaging interface. The processor receives, from each camera, an image comprising captured features from the calibration pattern. It determines and stores extrinsic calibration parameters (ECPs) for each camera that map coordinates of the features to camera coordinates and that are usable for subsequent normal operation of the cameras, the ECPs being determined from the image features.

IPC Classes  ?

  • G06T 7/80 - Analysis of captured images to determine intrinsic or extrinsic camera parameters, i.e. camera calibration

99.

COMMUNICATION NETWORK APPARATUS FOR UPLINK SCHEDULING

      
Application Number KR2018011588
Publication Number 2019/066587
Status In Force
Filing Date 2018-09-28
Publication Date 2019-04-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Shrestha, Bharat
  • Zhang, Yujian
  • Heo, Youn Hyoung

Abstract

An apparatus to be used in a UE in a mobile communication network to communicate with a base station, includes a memory configured to store a RRC message, and processing circuitry configured to decode the RRC message to obtain BWP configuration information and mapping information, identify one or more UL BWPs and one or more DL BWPs within a carrier bandwidth per Serving Cell based on the BWP configuration information, identify one or more SR configurations which a LCH is mapped to for the UL BWPs based on the mapping information, the LCH being mapped to none or one SR configuration for each of the UL BWPs, identify activation of a UL BWP of the UL BWPs, and encode an SR on a PUCCH based on a SR configuration for the UL BWP.

IPC Classes  ?

  • H04W 72/04 - Wireless resource allocation
  • H04W 72/12 - Wireless traffic scheduling
  • H04L 5/00 - Arrangements affording multiple use of the transmission path

100.

METHODS AND APPARATUSES FOR CONTROLLING A BANDWIDTH USED FOR PROCESSING A BASEBAND TRANSMIT SIGNAL, RECEIVER FOR A WIRELESS COMMUNICATION SYSTEM, AND METHOD FOR A RECEIVER

      
Application Number US2017053864
Publication Number 2019/066833
Status In Force
Filing Date 2017-09-28
Publication Date 2019-04-04
Owner INTEL IP CORPORATION (USA)
Inventor
  • Kreienkamp, Rainer, Dirk
  • Kaehlert, Stefan
  • Li Puma, Giuseppe
  • Hammes, Markus
  • Clevorn, Thorsten
  • Ellenbeck, Jan
  • Scholand, Tobias
  • Malkowski, Matthias
  • Vishwanathan, Narayan
  • Gupta, Chandra, P.
  • Schlamann, Markus
  • Lopez Soto, Romeo
  • Zhang, Lijun

Abstract

A method for controlling a bandwidth used for processing a baseband transmit signal by a transmit path of a transmitter is provided. The method includes generating a first comparison result by comparing, to a threshold value, a first number of physical resource blocks allocated to the transmitter for a first transmission time interval. Further, the method includes generating a second comparison result by comparing, to the threshold value, a second number of physical resource blocks allocated to the transmitter for a subsequent second transmission time interval. The method additionally includes adjusting the bandwidth based on the first and the second comparison results.

IPC Classes  ?

  • H04L 25/49 - Transmitting circuits; Receiving circuits using three or more amplitude levels
  • H04L 25/03 - Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
  • H04L 1/00 - Arrangements for detecting or preventing errors in the information received
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