Semiconductor Energy Laboratory Co., Ltd.

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IPC Class
H01L 29/786 - Thin-film transistors 2,697
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body 2,376
H01L 29/66 - Types of semiconductor device 1,096
H01L 27/32 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes 1,024
H01L 51/00 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof 898
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1.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 18134185
Status Pending
Filing Date 2023-04-13
First Publication Date 2023-09-28
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Koezuka, Junichi
  • Jintyou, Masami
  • Shima, Yukinori

Abstract

A semiconductor device with favorable electric characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, an oxide semiconductor layer, and first to third conductive layers. The oxide semiconductor layer includes a region in contact with the first insulating layer, the first conductive layer is connected to the oxide semiconductor layer, and the second conductive layer is connected to the oxide semiconductor layer. The second insulating layer includes a region in contact with the oxide semiconductor layer, and the third conductive layer includes a region in contact with the second insulating layer. The oxide semiconductor layer includes first to third regions. The first region and the second region are separated from each other, and the third region is located between the first region and the second region. The third region and the third conductive layer overlap with each other with the second insulating layer located therebetween. The first region and the second region include a region having a higher carbon concentration than the third region.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched

2.

Positive Electrode Active Material, Method for Manufacturing Positive Electrode Active Material, and Secondary Battery

      
Application Number 18202449
Status Pending
Filing Date 2023-05-26
First Publication Date 2023-09-28
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Momma, Yohei
  • Kawakami, Takahiro
  • Ochiai, Teruaki
  • Takahashi, Masahiro

Abstract

Provided is a positive electrode active material for a lithium ion secondary battery having favorable cycle characteristics and high capacity. A covering layer containing aluminum and a covering layer containing magnesium are provided on a superficial portion of the positive electrode active material. The covering layer containing magnesium exists in a region closer to a particle surface than the covering layer containing aluminum is. The covering layer containing aluminum can be formed by a sol-gel method using an aluminum alkoxide. The covering layer containing magnesium can be formed as follows: magnesium and fluorine are mixed as a starting material and then subjected to heating after the sol-gel step, so that magnesium is segregated.

IPC Classes  ?

  • H01M 4/46 - Alloys based on magnesium or aluminium
  • H01M 4/1391 - Processes of manufacture of electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
  • H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • C01G 51/00 - Compounds of cobalt
  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
  • H01M 4/131 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries

3.

GRAPHENE AND POWER STORAGE DEVICE, AND MANUFACTURING METHOD THEREOF

      
Application Number 18205264
Status Pending
Filing Date 2023-06-02
First Publication Date 2023-09-28
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Todoriki, Hiroatsu
  • Saito, Yumiko
  • Kawakami, Takahiro
  • Nomoto, Kuniharu
  • Yukawa, Mikio

Abstract

The formation method of graphene includes the steps of forming a layer including graphene oxide over a first conductive layer; and supplying a potential at which the reduction reaction of the graphene oxide occurs to the first conductive layer in an electrolyte where the first conductive layer as a working electrode and a second conductive layer with a as a counter electrode are immersed. A manufacturing method of a power storage device including at least a positive electrode, a negative electrode, an electrolyte, and a separator includes a step of forming graphene for an active material layer of one of or both the positive electrode and the negative electrode by the formation method.

IPC Classes  ?

  • H01M 4/583 - Carbonaceous material, e.g. graphite-intercalation compounds or CFx
  • H01G 11/22 - Electrodes
  • H01M 4/133 - Electrodes based on carbonaceous material, e.g. graphite-intercalation compounds or CFx
  • H01G 11/32 - Carbon-based
  • H01M 4/04 - Processes of manufacture in general
  • H01M 4/587 - Carbonaceous material, e.g. graphite-intercalation compounds or CFx for inserting or intercalating light metals
  • H01M 4/1393 - Processes of manufacture of electrodes based on carbonaceous material, e.g. graphite-intercalation compounds or CFx
  • B82Y 30/00 - Nanotechnology for materials or surface science, e.g. nanocomposites
  • B82Y 40/00 - Manufacture or treatment of nanostructures
  • C01B 32/23 - Oxidation
  • C01B 32/192 - Preparation by exfoliation starting from graphitic oxides
  • H01G 9/042 - Electrodes characterised by the material
  • H01M 4/139 - Processes of manufacture
  • H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
  • H01M 6/16 - Cells with non-aqueous electrolyte with organic electrolyte
  • H01M 10/0566 - Liquid materials
  • H01G 11/36 - Nanostructures, e.g. nanofibres, nanotubes or fullerenes

4.

MEMORY DEVICE

      
Application Number 18203717
Status Pending
Filing Date 2023-05-31
First Publication Date 2023-09-28
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Onuki, Tatsuya
  • Nagatsuka, Shuhei

Abstract

A memory device that operates at high speed is provided. A memory device that operates at high speed is provided. The memory device includes first and second memory cells, first and second bit lines, first and second switches, and a sense amplifier. The sense amplifier comprises a first node and a second node. The first memory cell is electrically connected to the first node through the first bit line and the first switch, and the second memory cell is electrically connected to the second node through the second bit line and the second switch. The sense amplifier amplifies the potential difference between the first node and the second node. The first memory cell and the second memory cell include an oxide semiconductor in a channel formation region.

IPC Classes  ?

  • G11C 5/06 - Arrangements for interconnecting storage elements electrically, e.g. by wiring
  • G11C 11/4074 - Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
  • G11C 11/4091 - Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
  • H01L 29/786 - Thin-film transistors
  • G11C 7/10 - Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

5.

ORGANIC COMPOUND, LIGHT-EMITTING DEVICE, LIGHT-EMITTING APPARATUS, ELECTRONIC DEVICE, DISPLAY DEVICE, LIGHTING DEVICE

      
Application Number 17923834
Status Pending
Filing Date 2021-05-06
First Publication Date 2023-09-28
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Takeda, Kyoko
  • Suzuki, Kunihiko
  • Osaka, Harue
  • Seo, Satoshi
  • Suzuki, Tsunenori
  • Ishimoto, Takuya
  • Hashimoto, Naoaki

Abstract

A novel organic compound is provided. Alternatively, an organic compound that emits light with favorable chromaticity is provided. Alternatively, an organic compound that emits blue light with favorable chromaticity is provided. Alternatively, a light-emitting element with favorable emission efficiency is provided. Alternatively, an organic compound with an excellent carrier-transport property is provided. The organic compound includes any of a substituted or unsubstituted dibenzofurobisbenzofuran skeleton, a substituted or unsubstituted dibenzothienobisbenzothiophene skeleton, a substituted or unsubstituted benzobisbenzothienobenzofuran skeleton, and a substituted or unsubstituted dibenzothienobisbenzofuran skeleton and one or two amino groups. In the organic compound, the amino group includes a substituted or unsubstituted heteroaryl group and any of a substituted or unsubstituted aromatic hydrocarbon group having 6 to 25 carbon atoms and a substituted or unsubstituted heteroaryl group having 5 to 25 carbon atoms.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • C07D 493/14 - Ortho-condensed systems
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials

6.

SEMICONDUCTOR DEVICE

      
Application Number 18020758
Status Pending
Filing Date 2021-08-17
First Publication Date 2023-09-28
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Yamane, Yasumasa
  • Ando, Yoshinori
  • Komori, Shigeki
  • Hodo, Ryota
  • Onuki, Tatsuya
  • Sasagawa, Shinya

Abstract

A semiconductor device with a small variation in transistor characteristics is provided. The semiconductor device includes a first device layer to an n-th (n is a natural number of 2 or more) device layer, each of which includes a first barrier insulating film, a second barrier insulating film, a third barrier insulating film, an oxide semiconductor device, a first conductor, and a second conductor. In each of the first device layer to the n-th device layer, the oxide semiconductor device is placed over the first barrier insulating film, the second barrier insulating film is placed to cover the oxide semiconductor device, the first conductor is placed so as to be electrically connected to the oxide semiconductor device through an opening formed in the second barrier insulating film, the second conductor is placed over the first conductor, the third barrier insulating film is placed over the second conductor and the second barrier insulating film, and the first barrier insulating film to the third barrier insulating film have a function of inhibiting diffusion of hydrogen.

IPC Classes  ?

7.

SECONDARY BATTERY, ELECTRONIC DEVICE, VEHICLE, AND METHOD OF MANUFACTURING POSITIVE ELECTRODE ACTIVE MATERIAL

      
Application Number 18017893
Status Pending
Filing Date 2021-07-28
First Publication Date 2023-09-28
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Saito, Jo
  • Momma, Yohei
  • Ochiai, Teruaki
  • Yoshitani, Yusuke
  • Abe, Kanta
  • Tanemura, Kazuki
  • Yamazaki, Shunpei

Abstract

A positive electrode active material having a crystal structure that is unlikely to be broken by repeated charging and discharging is provided. A positive electrode active material with high charge and discharge capacity is provided. A projection is provided on the surface of the positive electrode active material. The projection preferably contains zirconium and yttrium and is a rectangular solid. The projection preferably has a crystal structure that is tetragonal, cubic, or a mixture of two phases, tetragonal and cubic. In the positive electrode active material, the transition metal is one or two or more selected from cobalt, nickel, and manganese, and the additive elements are at least two or more selected from magnesium, fluorine, aluminum, zirconium, and yttrium.

IPC Classes  ?

  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
  • H01M 4/505 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of manganese of mixed oxides or hydroxides containing manganese for inserting or intercalating light metals, e.g. LiMn2O4 or LiMn2OxFy
  • H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
  • H01M 4/04 - Processes of manufacture in general

8.

DISPLAY DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE

      
Application Number 18023604
Status Pending
Filing Date 2021-08-30
First Publication Date 2023-09-28
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Eguchi, Shingo
  • Kubota, Daisuke
  • Kusunoki, Koji
  • Watanabe, Kazunori

Abstract

A display device having both a touch detection function and a function of capturing an image of a shape of a fingerprint or a vein is provided. The display device includes a first light-emitting element, a second light-emitting element, a light-receiving element, and a light-blocking layer. The first light-emitting element and the light-receiving element are arranged on the same plane. The light-blocking layer is provided above the first light-emitting element and the light-receiving element. The second light-emitting element is provided above the light-blocking layer. The first light-emitting element has a function of emitting visible light upward. The second light-emitting element has a function of emitting invisible light upward. The light-receiving element is a photoelectric conversion element having sensitivity to visible light and invisible light. In a plan view, the light-blocking layer includes a portion positioned between the first light-emitting element and the light-receiving element. In the plan view, the second light-emitting element overlaps with the light-blocking layer and is positioned inside the outline of the light-blocking layer.

IPC Classes  ?

  • H10K 59/80 - Constructional details
  • H10K 39/34 - Organic image sensors integrated with organic light-emitting diodes [OLED]
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
  • G06V 40/13 - Sensors therefor

9.

IMAGING DEVICE, DISPLAY APPARATUS, AND METHOD FOR MANUFACTURING DISPLAY APPARATUS

      
Application Number 18122773
Status Pending
Filing Date 2023-03-17
First Publication Date 2023-09-28
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kubota, Daisuke
  • Sugimoto, Kazuya

Abstract

A display apparatus with a high aperture ratio can be provided. A display apparatus with a personal authentication function can be provided. A display apparatus having high display quality can be provided. A highly reliable display apparatus can be provided. A display apparatus that can have a higher resolution can be provided. A display apparatus with low power consumption can be provided. An imaging device includes a pixel electrode, a first layer over the pixel electrode, an insulating layer covering part of the top surface of the first layer, and a common electrode covering the first layer and the insulating layer, and the first layer includes a photoelectric conversion layer.

IPC Classes  ?

  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
  • G06V 40/13 - Sensors therefor
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 39/34 - Organic image sensors integrated with organic light-emitting diodes [OLED]

10.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18129120
Status Pending
Filing Date 2023-03-31
First Publication Date 2023-09-28
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kimura, Hajime
  • Matsuzaki, Takanori
  • Kato, Kiyoshi
  • Okamoto, Satoru

Abstract

A semiconductor device with a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening, a first conductor that is over the first insulator and includes a second opening, a second insulator that is over the first insulator and includes a third opening, and an oxide penetrating the first opening, the second opening, and the third opening. The oxide includes a first region at least in the first opening, a second region at least in the second opening, and a third region at least in the third opening. The resistances of the first region and the third region are lower than the resistance of the second region.

IPC Classes  ?

  • H10B 43/27 - EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
  • H10B 43/10 - EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
  • H10B 43/35 - EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
  • H10B 43/40 - EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
  • H10B 43/50 - EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions

11.

SEMICONDUCTOR DEVICE

      
Application Number 18200052
Status Pending
Filing Date 2023-05-22
First Publication Date 2023-09-28
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Koyama, Jun
  • Kato, Kiyoshi

Abstract

An object of the present invention is to provide a semiconductor device having a novel structure in which in a data storing time, stored data can be stored even when power is not supplied, and there is no limitation on the number of writing. A semiconductor device includes a first transistor including a first source electrode and a first drain electrode; a first channel formation region for which an oxide semiconductor material is used and to which the first source electrode and the first drain electrode are electrically connected; a first gate insulating layer over the first channel formation region; and a first gate electrode over the first gate insulating layer. One of the first source electrode and the first drain electrode of the first transistor and one electrode of a capacitor are electrically connected to each other.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 21/84 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
  • H01L 27/118 - Masterslice integrated circuits
  • H10B 10/00 - Static random access memory [SRAM] devices
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 41/00 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
  • H10B 41/30 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
  • H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
  • H01L 29/786 - Thin-film transistors
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or

12.

LITHIUM ION BATTERY, ELECTRONIC DEVICE, AND VEHICLE

      
Application Number 18190365
Status Pending
Filing Date 2023-03-27
First Publication Date 2023-09-28
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Saito, Jo
  • Ogita, Kaori
  • Momma, Yohei
  • Kuriki, Kazutaka
  • Yoshitomi, Shuhei
  • Jinbo, Yasuhiro
  • Kakehata, Tetsuya
  • Yamazaki, Shunpei

Abstract

A lithium ion battery having excellent charge characteristics and discharge characteristics even in a low-temperature environment is provided. The lithium ion battery includes a positive electrode active material and an electrolyte. The positive electrode active material contains cobalt, oxygen, magnesium, aluminum, and nickel. The electrolyte contains lithium hexafluorophosphate, ethylene carbonate, ethyl methyl carbonate, and dimethyl carbonate. Second discharge capacity of the lithium ion battery is higher than or equal to 70% of first discharge capacity. The first discharge capacity is obtained by performing first charge and first discharge at 20° C., and the second discharge capacity is obtained by performing second charge and second discharge at −40° C. The first discharge and the second discharge are constant current discharge with 20 mA/g per positive electrode active material weight.

IPC Classes  ?

  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
  • H01M 10/0569 - Liquid materials characterised by the solvents
  • H01M 4/131 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx

13.

SEMICONDUCTOR DEVICE

      
Application Number 18197785
Status Pending
Filing Date 2023-05-16
First Publication Date 2023-09-28
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Toyotaka, Kouhei
  • Koyama, Jun
  • Miyake, Hiroyuki

Abstract

A semiconductor device includes first and second transistors having the same conductivity type and a circuit. One of a source and a drain of the first transistor is electrically connected to that of the second transistor. First and third potentials are supplied to the circuit through respective wirings. A second potential and a first clock signal are supplied to the others of the sources and the drains of the first and second transistors, respectively. A second clock signal is supplied to the circuit. The third potential is higher than the second potential which is higher than the first potential. A fourth potential is equal to or higher than the third potential. The first clock signal alternates the second and fourth potentials and the second clock signal alternates the first and third potentials. The circuit controls electrical connections between gates of the first and second transistors and the wirings.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • G02F 1/1334 - Constructional arrangements based on polymer-dispersed liquid crystals, e.g. microencapsulated liquid crystals
  • G02F 1/1337 - Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
  • G02F 1/1343 - Electrodes
  • G02F 1/1362 - Active matrix addressed cells
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
  • G09G 3/3258 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • H01L 29/786 - Thin-film transistors

14.

METHOD FOR MANUFACTURING LIGHT-EMITTING DEVICE

      
Application Number 18196651
Status Pending
Filing Date 2023-05-12
First Publication Date 2023-09-28
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Hatano, Kaoru

Abstract

An object of one embodiment of the present invention is to provide a more convenient highly reliable light-emitting device which can be used for a variety of applications. Another object of one embodiment of the present invention is to manufacture, without complicating the process, a highly reliable light-emitting device having a shape suitable for its intended purpose. In a manufacturing process of a light-emitting device, a light-emitting panel is manufactured which is at least partly curved by processing the shape to be molded after the manufacture of an electrode layer and/or an element layer, and a protective film covering a surface of the light-emitting panel which is at least partly curved is formed, so that a light-emitting device using the light-emitting panel has a more useful function and higher reliability.

IPC Classes  ?

  • H10K 50/844 - Encapsulations
  • H10K 50/84 - Passivation; Containers; Encapsulations
  • H10K 50/842 - Containers
  • H10K 71/00 - Manufacture or treatment specially adapted for the organic devices covered by this subclass
  • H10K 77/10 - Substrates, e.g. flexible substrates

15.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18135793
Status Pending
Filing Date 2023-04-18
First Publication Date 2023-09-21
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Takeuchi, Toshihiko
  • Yamade, Naoto
  • Fujiki, Hiroshi
  • Moriwaka, Tomoaki
  • Kimura, Shunsuke

Abstract

A semiconductor device that can be miniaturized or highly integrated is provided. A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.

IPC Classes  ?

  • H01L 29/66 - Types of semiconductor device
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes

16.

Light-Emitting Device, Light-Emitting Apparatus, Electronic Device, and Lighting Device

      
Application Number 18134847
Status Pending
Filing Date 2023-04-14
First Publication Date 2023-09-21
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Seo, Satoshi
  • Suzuki, Tsunenori
  • Takita, Yusuke
  • Okuyama, Takumu
  • Tada, Anna

Abstract

A novel light-emitting device is provided. Alternatively, a light-emitting device with favorable emission efficiency is provided. Alternatively, a light-emitting device with a favorable lifetime is provided. Alternatively, a light-emitting device with a low driving voltage is provided. Provided is a light-emitting device including an anode, a cathode, and a layer including an organic compound that is positioned between the anode and the cathode, in which the layer including the organic compound includes a first layer, a second layer, and a light-emitting layer in this order from the anode side, the first layer includes a first substance and a second substance, the second layer includes a third substance, the first substance is an organic compound a HOMO level of which is higher than or equal to -5.8 eV and lower than or equal to -5.4 eV, the second substance is a substance that has an electron-acceptor property with respect to the first substance, and the third substance is an organic compound having a structure in which at least two substituents comprising carbazole rings are bonded to a naphthalene ring.

IPC Classes  ?

  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/15 - Hole transporting layers

17.

DISPLAY DEVICE, DRIVING METHOD OF DISPLAY DEVICE, AND ELECTRONIC DEVICE

      
Application Number 18201823
Status Pending
Filing Date 2023-05-25
First Publication Date 2023-09-21
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kawashima, Susumu
  • Kusunoki, Koji
  • Takahashi, Kei
  • Yamazaki, Shunpei

Abstract

To provide a display device capable of displaying a plurality of images by superimposition using a plurality of memory circuits provided in a pixel. A plurality of memory circuits are provided in a pixel, and signals corresponding to images for superimposition are retained in each of the plurality of memory circuits. In the pixel, the signals corresponding to the images for superimposition are added to each of the plurality of memory circuits. The signals are added to the signals retained in the memory circuits by capacitive coupling. A display element can display an image corresponding to a signal in which a signal written to a pixel through a wiring is added to the signals retained in the plurality of memory circuits. Reduction in the amount of arithmetic processing for displaying images by superimposition can be achieved.

IPC Classes  ?

  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors
  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

18.

POSITIVE ELECTRODE ACTIVE MATERIAL PARTICLE AND MANUFACTURING METHOD OF POSITIVE ELECTRODE ACTIVE MATERIAL PARTICLE

      
Application Number 18201818
Status Pending
Filing Date 2023-05-25
First Publication Date 2023-09-21
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kawakami, Takahiro
  • Ochiai, Teruaki
  • Momma, Yohei
  • Tsuruta, Ayae
  • Takahashi, Masahiro
  • Mikami, Mayumi

Abstract

Provided is a positive electrode active material which suppresses a reduction in capacity due to charge and discharge cycles when used in a lithium ion secondary battery. A covering layer is formed by segregation on a superficial portion of the positive electrode active material. The positive electrode active material includes a first region and a second region. The first region exists in an inner portion of the positive electrode active material. The second region exists in a superficial portion of the positive electrode active material and part of the inner portion thereof. The first region includes lithium, a transition metal, and oxygen. The second region includes magnesium, fluorine, and oxygen.

IPC Classes  ?

  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • H01M 4/04 - Processes of manufacture in general
  • H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
  • H01G 11/24 - Electrodes characterised by the structural features of powders or particles used therefor
  • H01G 11/86 - Processes for the manufacture of hybrid or EDL capacitors, or components thereof specially adapted for electrodes
  • H01G 11/50 - Electrodes characterised by their material specially adapted for lithium-ion capacitors, e.g. for lithium-doping or for intercalation
  • H01G 11/60 - Liquid electrolytes characterised by the solvent
  • H01M 4/505 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of manganese of mixed oxides or hydroxides containing manganese for inserting or intercalating light metals, e.g. LiMn2O4 or LiMn2OxFy
  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy

19.

SEMICONDUCTOR DEVICE, DISPLAY APPARATUS, AND ELECTRONIC DEVICE

      
Application Number 18199433
Status Pending
Filing Date 2023-05-19
First Publication Date 2023-09-21
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kimura, Hajime
  • Ikeda, Takayuki

Abstract

A semiconductor device includes first to tenth transistors and first to fourth capacitors. Gates of the first and the fourth transistors are electrically connected to each other. First terminals of the first, second, fifth, and eighth transistors are electrically connected to a first terminal of the fourth capacitor. A second terminal of the fifth transistor is electrically connected to a gate of the sixth transistor and a first terminal of the second capacitor. A second terminal of the eighth transistor is electrically connected to a gate of the ninth transistor and a first terminal of the third capacitor. Gates of the second, seventh, and tenth transistors are electrically connected to first terminals of the third and fourth transistors and a first terminal of the first capacitor. First terminals of the sixth and seventh transistors are electrically connected to a second terminal of the second capacitor.

IPC Classes  ?

  • G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix

20.

DRIVING METHOD OF SEMICONDUCTOR DEVICE

      
Application Number 18006323
Status Pending
Filing Date 2021-07-20
First Publication Date 2023-09-21
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kimura, Hajime
  • Kunitake, Hitoshi

Abstract

Provided is a semiconductor device capable of retaining data for a long time. The semiconductor device includes a cell provided with a capacitor, a first transistor, and a second transistor; the capacitor includes a first electrode, a second electrode, and a ferroelectric layer; the ferroelectric layer is provided between the first electrode and the second electrode and polarization reversal occurs by application of a first saturated polarization voltage or a second saturated polarization voltage whose polarity is different from that of the first saturated polarization voltage; and the first electrode, one of a source and a drain of the first transistor, and a gate of the second transistor are electrically connected to one another. In a first period, the first saturated polarization voltage is applied to the ferroelectric layer. In a second period, a voltage having a value between the first saturated polarization voltage and the second saturated polarization voltage is applied to the ferroelectric layer as a data voltage.

IPC Classes  ?

  • G11C 11/22 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
  • H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
  • H10B 51/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors characterised by the memory core region

21.

DISPLAY DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE

      
Application Number 18021024
Status Pending
Filing Date 2021-08-31
First Publication Date 2023-09-21
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Eguchi, Shingo
  • Kubota, Daisuke
  • Kusunoki, Koji
  • Watanabe, Kazunori

Abstract

A display device having both a touch detection function and a function of capturing an image of a shape of a fingerprint or a vein is provided. The display device includes a first substrate, a first light-emitting element, a second light-emitting element, a light-receiving element, a light-blocking layer, a first resin layer, and a second resin layer. The first light-emitting element and the light-receiving element are arranged over the first substrate, and the first resin layer is provided over the first light-emitting element and the light-receiving element. The light-blocking layer is provided over the first resin layer, and the second light-emitting element is provided over the light-blocking layer. The second resin layer is provided over the second light-emitting layer. The first light-emitting element emits visible light upward, and the second light-emitting element emits invisible light upward. The light-receiving element is a photoelectric conversion element having sensitivity to visible light and invisible light. In a plan view, the light-blocking layer includes a portion positioned between the first light-emitting element and the light-receiving element, and the second light-emitting element overlaps with the light-blocking layer and is positioned inside the outline of the light-blocking layer.

IPC Classes  ?

22.

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18021317
Status Pending
Filing Date 2021-08-12
First Publication Date 2023-09-21
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Komatsu, Yoshihiro
  • Ito, Shunichi
  • Kawaguchi, Shinobu
  • Takahashi, Masahiro

Abstract

A semiconductor device with small variation in characteristics and high reliability is provided. In a method for manufacturing the semiconductor device, an oxide is formed, a first insulator is formed over the oxide, a conductor is formed over the first insulator, a second insulator is formed over the conductor, and heat treatment is performed so that hydrogen in the oxide and the first insulator is moved into and absorbed by the second insulator. The second insulator is formed by a sputtering method.

IPC Classes  ?

  • H01L 21/477 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

23.

METHOD OF FORMING POSITIVE ELECTRODE ACTIVE MATERIAL AND METHOD OF FABRICATING SECONDARY BATTERY

      
Application Number 18041424
Status Pending
Filing Date 2021-08-06
First Publication Date 2023-09-21
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kakehata, Tetsuya
  • Ishitani, Tetsuji
  • Momma, Yohei

Abstract

A method of forming a highly purified positive electrode active material is provided. A method of forming a positive electrode active material whose crystal structure is not easily broken even when charge and discharge are repeated is provided. The method of forming a positive electrode active material including lithium and a transition metal includes a first step of preparing a lithium source and a transition metal source and a second step of crushing and mixing the lithium source and the transition metal source to form a composite material. In the first step, a material with a purity of greater than or equal to 99.99% is prepared as the lithium source and a material with a purity of greater than or equal to 99.9% is prepared as the transition metal source. In the second step, crushing and mixing are performed using dehydrated acetone.

IPC Classes  ?

  • C01G 51/00 - Compounds of cobalt
  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy

24.

SEMICONDUCTOR DEVICE

      
Application Number 18013917
Status Pending
Filing Date 2021-07-06
First Publication Date 2023-09-21
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kunitake, Hitoshi
  • Ito, Yuki
  • Yamazaki, Shunpei

Abstract

A novel semiconductor device is provided. The semiconductor device includes an oxide semiconductor as a first semiconductor, silicon as a second semiconductor, and a plurality of memory cells lined up in a first direction; and a memory cell includes a writing transistor and a reading transistor. The first semiconductor and the second semiconductor extend in the first direction, part of the first semiconductor functions as a channel formation region of the writing transistor, and part of the second semiconductor functions as a channel formation region of the reading transistor. The second semiconductor includes a region in contact with a first layer containing a first metal element.

IPC Classes  ?

  • H10B 43/27 - EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
  • H10B 41/27 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
  • H10B 41/35 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
  • H10B 43/35 - EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND

25.

DISPLAY DEVICE AND ELECTRONIC DEVICE

      
Application Number 18136963
Status Pending
Filing Date 2023-04-20
First Publication Date 2023-09-21
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kimura, Hajime
  • Akimoto, Kengo
  • Tsubuku, Masashi
  • Sasaki, Toshinari

Abstract

A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

26.

Positive Electrode Active Material, Method for Manufacturing Positive Electrode Active Material, and Secondary Battery

      
Application Number 18202480
Status Pending
Filing Date 2023-05-26
First Publication Date 2023-09-21
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Ochiai, Teruaki
  • Kawakami, Takahiro
  • Mikami, Mayumi
  • Momma, Yohei
  • Takahashi, Masahiro
  • Tsuruta, Ayae

Abstract

A positive electrode active material which can improve cycle characteristics of a secondary battery is provided. Two kinds of regions are provided in a superficial portion of a positive electrode active material such as lithium cobaltate which has a layered rock-salt crystal structure. The inner region is a non-stoichiometric compound containing a transition metal such as titanium, and the outer region is a compound of representative elements such as magnesium oxide. The two kinds of regions each have a rock-salt crystal structure. The inner layered rock-salt crystal structure and the two kinds of regions in the superficial portion are topotaxy; thus, a change of the crystal structure of the positive electrode active material generated by charging and discharging can be effectively suppressed. In addition, since the outer coating layer in contact with an electrolyte solution is the compound of representative elements which is chemically stable, the secondary battery having excellent cycle characteristics can be obtained.

IPC Classes  ?

  • H01M 4/131 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
  • H01M 4/1315 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx containing halogen atoms, e.g. LiCoOxFy
  • H01M 4/1391 - Processes of manufacture of electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
  • H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
  • H01M 4/13915 - Processes of manufacture of electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx containing halogen atoms, e.g. LiCoOxFy
  • H01M 4/134 - Electrodes based on metals, Si or alloys
  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
  • H01M 4/86 - Inert electrodes with catalytic activity, e.g. for fuel cells

27.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 18201815
Status Pending
Filing Date 2023-05-25
First Publication Date 2023-09-21
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Yamazaki, Shunpei

Abstract

An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/22 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds
  • H01L 29/221 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds including two or more compounds
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/26 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups , , , ,
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/45 - Ohmic electrodes
  • H01L 29/49 - Metal-insulator semiconductor electrodes

28.

CONDUCTOR, POWER STORAGE DEVICE, ELECTRONIC DEVICE, AND METHOD FOR FORMING CONDUCTOR

      
Application Number 18202523
Status Pending
Filing Date 2023-05-26
First Publication Date 2023-09-21
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Ochiai, Teruaki
  • Kawakami, Takahiro
  • Miwa, Takuya

Abstract

A novel electrode is provided. A novel power storage device is provided. A conductor having a sheet-like shape is provided. The conductor has a thickness of greater than or equal to 800 nm and less than or equal to 20 μm. The area of the conductor is greater than or equal to 25 mm2 and less than or equal to 10 m2. The conductor includes carbon and oxygen. The conductor includes carbon at a concentration of higher than 80 atomic % and oxygen at a concentration of higher than or equal to 2 atomic % and lower than or equal to 20 atomic %.

IPC Classes  ?

  • H01M 4/66 - Selection of materials
  • H01M 4/131 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
  • H01M 4/587 - Carbonaceous material, e.g. graphite-intercalation compounds or CFx for inserting or intercalating light metals
  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
  • H01G 11/50 - Electrodes characterised by their material specially adapted for lithium-ion capacitors, e.g. for lithium-doping or for intercalation
  • H01G 11/36 - Nanostructures, e.g. nanofibres, nanotubes or fullerenes
  • H01G 11/86 - Processes for the manufacture of hybrid or EDL capacitors, or components thereof specially adapted for electrodes
  • H01G 11/38 - Carbon pastes or blends; Binders or additives therein

29.

Display Device, Module, and Electronic Device

      
Application Number 18201629
Status Pending
Filing Date 2023-05-24
First Publication Date 2023-09-21
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Isa, Toshiyuki

Abstract

The display defects of a display device are reduced. The display quality of the display device is improved. The display device includes a display panel and a first conductive layer. The display panel includes a display element including a pair of electrodes. An electrode of the pair of electrodes which is closer to one surface of the display panel is supplied with a constant potential. A constant potential is supplied to the first conductive layer. The second conductive layer provided on the other surface of the display panel is in contact with the first conductive layer, whereby the second conductive layer is also supplied with the constant potential. The second conductive layer includes a portion not fixed to the first conductive layer.

IPC Classes  ?

  • H10K 59/40 - OLEDs integrated with touch screens
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • H05B 33/26 - Light sources with substantially two-dimensional radiating surfaces characterised by the composition or arrangement of the conductive material used as an electrode
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 71/80 - Manufacture or treatment specially adapted for the organic devices covered by this subclass using temporary substrates
  • H10K 77/10 - Substrates, e.g. flexible substrates

30.

IMAGING DEVICE, IMAGING MODULE, ELECTRONIC DEVICE, AND IMAGING SYSTEM

      
Application Number 18201217
Status Pending
Filing Date 2023-05-24
First Publication Date 2023-09-21
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Ikeda, Takayuki
  • Fukutome, Takahiro

Abstract

An imaging device connected to a neural network is provided. An imaging device having a neuron in a neural network includes a plurality of first pixels, a first circuit, a second circuit, and a third circuit. Each of the plurality of first pixels includes a photoelectric conversion element. The plurality of first pixels is electrically connected to the first circuit. The first circuit is electrically connected to the second circuit. The second circuit is electrically connected to the third circuit. Each of the plurality of first pixels generates an input signal of the neuron. The first circuit, the second circuit, and the third circuit function as the neuron. The third circuit includes an interface connected to the neural network.

IPC Classes  ?

  • G06N 3/067 - Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using optical means
  • H01L 27/146 - Imager structures
  • G06N 3/065 - Analogue means
  • H04N 23/57 - Mechanical or electrical details of cameras or camera modules specially adapted for being embedded in other devices
  • H04N 25/75 - Circuitry for providing, modifying or processing image signals from the pixel array
  • H04N 25/77 - Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
  • G06N 3/04 - Architecture, e.g. interconnection topology

31.

Triarylamine Derivative, Light-Emitting Substance, Light-Emitting Element, Light-Emitting Device, and Electronic Device

      
Application Number 18200370
Status Pending
Filing Date 2023-05-22
First Publication Date 2023-09-21
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Osaka, Harue
  • Ushikubo, Takahiro
  • Ohsawa, Nobuharu
  • Seo, Satoshi
  • Suzuki, Tsunenori

Abstract

A triarylamine derivative represented by a general formula (G1) given below is provided. Note that in the formula, Ar represents either a substituted or unsubstituted phenyl group or a substituted or unsubstituted biphenyl group; α represents a substituted or unsubstituted naphthyl group; β represents either hydrogen or a substituted or unsubstituted naphthyl group; n and m each independently represent 1 or 2; and R1 to R8 each independently represent any of hydrogen, an alkyl group having 1 to 6 carbon atoms, or a phenyl group. A triarylamine derivative represented by a general formula (G1) given below is provided. Note that in the formula, Ar represents either a substituted or unsubstituted phenyl group or a substituted or unsubstituted biphenyl group; α represents a substituted or unsubstituted naphthyl group; β represents either hydrogen or a substituted or unsubstituted naphthyl group; n and m each independently represent 1 or 2; and R1 to R8 each independently represent any of hydrogen, an alkyl group having 1 to 6 carbon atoms, or a phenyl group.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • C07C 211/54 - Compounds containing amino groups bound to a carbon skeleton having amino groups bound to carbon atoms of six-membered aromatic rings of the carbon skeleton having amino groups bound to two or three six-membered aromatic rings
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H05B 33/14 - Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of the electroluminescent material
  • H10K 85/30 - Coordination compounds
  • C09K 11/02 - Use of particular materials as binders, particle coatings or suspension media therefor

32.

DISPLAY DEVICE

      
Application Number 18133086
Status Pending
Filing Date 2023-04-11
First Publication Date 2023-09-14
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Akimoto, Kengo
  • Komori, Shigeki
  • Uochi, Hideki
  • Futamura, Tomoya
  • Kasahara, Takahiro

Abstract

A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, and a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the first oxide semiconductor layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G02F 1/1362 - Active matrix addressed cells
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/786 - Thin-film transistors
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements

33.

DISPLAY DEVICE AND METHOD FOR DRIVING DISPLAY DEVICE

      
Application Number 18198323
Status Pending
Filing Date 2023-05-17
First Publication Date 2023-09-14
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Watanabe, Kazunori
  • Takahashi, Kei
  • Kusunoki, Koji
  • Fukutome, Takahiro

Abstract

A novel display device where a light-emitting element is turned on by a triangle wave is provided. One embodiment of the present invention is a method for driving a display device including a first pixel, a second pixel, a first wiring, a second wiring, and a third wiring. The first wiring is electrically connected to the first pixel and the second pixel. The second wiring and the third wiring are electrically connected to the first pixel and the second pixel, respectively. At a first time, the first pixel reaches the maximum luminance corresponding to first display data and the second pixel reaches the maximum luminance corresponding to second display data. The first pixel and the second pixel are initialized at a second time different from the first time by input of a reset signal to the first wiring to stop light emission.

IPC Classes  ?

  • G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
  • G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
  • H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors
  • H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
  • H10K 71/00 - Manufacture or treatment specially adapted for the organic devices covered by this subclass
  • H10K 59/90 - Assemblies of multiple devices comprising at least one organic light-emitting element

34.

SEMICONDUCTOR DEVICE

      
Application Number 18200081
Status Pending
Filing Date 2023-05-22
First Publication Date 2023-09-14
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Umezaki, Atsushi
  • Arasawa, Ryo

Abstract

It is an object to provide a semiconductor device which can supply a signal with sufficient amplitude to a scan line while power consumption is kept small. Further, it is an object to provide a semiconductor device which can suppress distortion of a signal supplied to the scan line and shorten a rising time and a falling time while power consumption is kept small. A semiconductor device which includes a plurality of pixels each including a display element and at least one first transistor and a scan line driver circuit supplying a signal for selecting the plurality of pixels to a scan line. A light-transmitting conductive layer is used for a pixel electrode layer of the display element, a gate electrode layer of the first transistor, source and drain electrode layers of the first transistor, and the scan line. The scan line driver circuit includes a second transistor and a capacitor for holding a voltage between a gate electrode layer of the second transistor and a source electrode layer of the second transistor. The source electrode of the second transistor is connected to the scan line.

IPC Classes  ?

  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G11C 19/18 - Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

35.

Positive Electrode Active Material, Method for Manufacturing Positive Electrode Active Material, and Secondary Battery

      
Application Number 18200204
Status Pending
Filing Date 2023-05-22
First Publication Date 2023-09-14
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Ochiai, Teruaki
  • Kawakami, Takahiro
  • Mikami, Mayumi
  • Momma, Yohei
  • Takahashi, Masahiro
  • Tsuruta, Ayae

Abstract

A positive electrode active material which can improve cycle characteristics of a secondary battery is provided. Two kinds of regions are provided in a superficial portion of a positive electrode active material such as lithium cobaltate which has a layered rock-salt crystal structure. The inner region is a non-stoichiometric compound containing a transition metal such as titanium, and the outer region is a compound of representative elements such as magnesium oxide. The two kinds of regions each have a rock-salt crystal structure. The inner layered rock-salt crystal structure and the two kinds of regions in the superficial portion are topotaxy; thus, a change of the crystal structure of the positive electrode active material generated by charging and discharging can be effectively suppressed. In addition, since the outer coating layer in contact with an electrolyte solution is the compound of representative elements which is chemically stable, the secondary battery having excellent cycle characteristics can be obtained.

IPC Classes  ?

  • H01M 4/131 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
  • H01M 4/1315 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx containing halogen atoms, e.g. LiCoOxFy
  • H01M 4/1391 - Processes of manufacture of electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
  • H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
  • H01M 4/13915 - Processes of manufacture of electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx containing halogen atoms, e.g. LiCoOxFy
  • H01M 4/134 - Electrodes based on metals, Si or alloys
  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
  • H01M 4/86 - Inert electrodes with catalytic activity, e.g. for fuel cells

36.

Light-Emitting Device, Light-Emitting Apparatus, Electronic Device, and Lighting Device

      
Application Number 18016717
Status Pending
Filing Date 2021-07-13
First Publication Date 2023-09-14
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kawano, Yuta
  • Ueda, Airi
  • Watabe, Takeyoshi
  • Ohsawa, Nobuharu
  • Tosu, Keito
  • Osaka, Harue
  • Seo, Satoshi

Abstract

Provided is an inexpensive light-emitting device with high emission efficiency. Provided is a light-emitting device including an anode, a cathode, an EL layer positioned between the anode and the cathode; the EL layer includes a hole-transport region, a light-emitting layer, and an electron-transport region; the hole-transport region is positioned between the anode and the light-emitting layer; the electron-transport region is positioned between the cathode and the light-emitting layer; the hole-transport region contains any one of a sulfonic acid compound, a fluorine compound, and a metal oxide; the electron-transport region contains an organic compound having an electron-transport property; and an ordinary refractive index of the organic compound having an electron-transport property with respect to light with a wavelength greater than or equal to 455 nm and less than or equal to 465 nm is higher than or equal to 1.50 and lower than or equal to 1.75.

IPC Classes  ?

  • H10K 50/858 - Arrangements for extracting light from the devices comprising refractive means, e.g. lenses
  • H10K 85/30 - Coordination compounds
  • H10K 85/60 - Organic compounds having low molecular weight
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

37.

METHOD FOR FABRICATING SECONDARY BATTERY AND MANUFACTURING APPARATUS FOR SECONDARY BATTERY

      
Application Number 18017191
Status Pending
Filing Date 2021-07-27
First Publication Date 2023-09-14
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yoshitomi, Shuhei
  • Ishitani, Tetsuji
  • Yamazaki, Shunpei

Abstract

At least part of a fabrication process of a secondary battery is automated. A highly reliable secondary battery is provided. The secondary battery is fabricated by placing a first electrode over a first exterior body; placing a separator over the first electrode; placing a second electrode over the separator; dripping an electrolyte on at least one of the first electrode, the separator, and the second electrode; impregnating the at least one of the first electrode, the separator, and the second electrode with the electrolyte; then placing a second exterior body over the first exterior body to cover the first electrode, the separator, and the second electrode; and sealing the first electrode, the separator, and the second electrode with the first exterior body and the second exterior body. The electrolyte is dripped from a position whose shortest distance from a surface where the electrolyte is dripped is greater than 0 mm and less than or equal to 1 mm.

IPC Classes  ?

  • H01M 10/04 - Construction or manufacture in general
  • H01M 10/0583 - Construction or manufacture of accumulators with folded construction elements except wound ones, i.e. folded positive or negative electrodes or separators, e.g. with ‘’Z’’-shaped electrodes or separators

38.

MANUFACTURING METHOD OF POSITIVE ELECTRODE ACTIVE MATERIAL

      
Application Number 18040286
Status Pending
Filing Date 2021-08-06
First Publication Date 2023-09-14
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kakehata, Tetsuya
  • Ishitani, Tetsuji
  • Momma, Yohei
  • Yoshitani, Yusuke

Abstract

A manufacturing method of a highly purified positive electrode active material is provided. Alternatively, a manufacturing method of a positive electrode active material whose crystal structure is not easily broken even when charging and discharging are repeated is provided. Provided is a manufacturing method of a positive electrode active material containing lithium and a transition metal. The manufacturing method includes a first step of forming a hydroxide containing the transition metal using a basic aqueous solution and an aqueous solution containing the transition metal, a second step of preparing a lithium compound, a third step of mixing the lithium compound and the hydroxide to form a mixture, and a fourth step of heating the mixture to form a composite oxide containing lithium and the transition metal. A material with a purity higher than or equal to 99.99% is prepared as the lithium compound in the second step, and the heating is performed in an oxygen-containing atmosphere with a dew point lower than or equal to −50° C. in the fourth step.

IPC Classes  ?

39.

CONTROL SYSTEM FOR SECONDARY BATTERY

      
Application Number 18040480
Status Pending
Filing Date 2021-08-02
First Publication Date 2023-09-14
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yakubo, Yuto
  • Kadoma, Hiroshi
  • Ogita, Kaori

Abstract

A control system for a secondary battery that effectively performs temperature control of the secondary battery before getting to a charging station, thereby enabling high speed charging, is provided. It relates to a vehicle including a first secondary battery, a second secondary battery, a first temperature control unit, a secondary battery monitoring unit, and an arithmetic unit. The secondary battery monitoring unit acquires remaining amount data of the first secondary battery. The arithmetic unit compares the remaining amount data and a set value. In the case where the remaining amount data is smaller than the set value, the secondary battery monitoring unit acquires the temperature of the first secondary battery. The arithmetic unit calculates an adjustment term required to adjust the temperature of the first secondary battery to a set temperature. The arithmetic unit calculates an arrival term required to get to a set charging station. The first temperature control unit starts adjusting the temperature of the first secondary battery to the set temperature, with electric power fed from the second secondary battery, in the case where the adjustment term is shorter than or equal to the arrival term.

IPC Classes  ?

  • H02J 50/10 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling
  • H01M 10/633 - Control systems - characterised by algorithms, flow charts, software details or the like
  • H01M 10/6551 - Surfaces specially adapted for heat dissipation or radiation, e.g. fins or coatings
  • H01M 10/615 - Heating or keeping warm

40.

ORGANIC COMPOUND, LIGHT-RECEIVING DEVICE, LIGHT-EMITTING AND LIGHT-RECEIVING APPARATUS, AND ELECTRONIC DEVICE

      
Application Number 18113672
Status Pending
Filing Date 2023-02-24
First Publication Date 2023-09-14
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Tada, Anna
  • Kawakami, Sachiko
  • Kubota, Daisuke
  • Kamada, Taisuke
  • Kajiyama, Kazuki

Abstract

A novel organic compound that is highly convenient, useful, or reliable is provided. An organic compound represented by General Formula (G1) is provided. In General Formula (G1), D1 represents a thiophene-diyl group, a furan-diyl group, a thiophene-containing heteroarylene group, or a furan-containing heteroarylene group; Ar1 and Ar2 each independently represent a heteroarylene group or an arylene group; A1 and A2 each independently represent hydrogen, deuterium, a nitro group, an alkyl group, a halogen, an alkyl halide group, a cyano group, an alkoxy group, a vinyl group, or a formyl group; n1 represents an integer of 1 or more; and m1 and k1 each independently represent an integer of 0 to 3. A novel organic compound that is highly convenient, useful, or reliable is provided. An organic compound represented by General Formula (G1) is provided. In General Formula (G1), D1 represents a thiophene-diyl group, a furan-diyl group, a thiophene-containing heteroarylene group, or a furan-containing heteroarylene group; Ar1 and Ar2 each independently represent a heteroarylene group or an arylene group; A1 and A2 each independently represent hydrogen, deuterium, a nitro group, an alkyl group, a halogen, an alkyl halide group, a cyano group, an alkoxy group, a vinyl group, or a formyl group; n1 represents an integer of 1 or more; and m1 and k1 each independently represent an integer of 0 to 3.

IPC Classes  ?

  • C07D 495/04 - Ortho-condensed systems
  • C07D 519/00 - Heterocyclic compounds containing more than one system of two or more relevant hetero rings condensed among themselves or condensed with a common carbocyclic ring system not provided for in groups or
  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 50/16 - Electron transporting layers
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers

41.

DISPLAY DEVICE

      
Application Number 18142341
Status Pending
Filing Date 2023-05-02
First Publication Date 2023-09-14
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Hatsumi, Ryo
  • Kubota, Daisuke
  • Miyake, Hiroyuki

Abstract

A display device with less light leakage and excellent contrast is provided. A display device having a high aperture ratio and including a large-capacitance capacitor is provided. A display device in which wiring delay due to parasitic capacitance is reduced is provided. A display device includes a transistor over a substrate, a pixel electrode connected to the transistor, a signal line electrically connected to the transistor, a scan line electrically connected to the transistor and intersecting with the signal line, and a common electrode overlapping with the pixel electrode and the signal line with an insulating film provided therebetween. The common electrode includes stripe regions extending in a direction intersecting with the signal line.

IPC Classes  ?

42.

Light-Emitting Element, Light-Emitting Device, Electronic Appliance, And Lighting Device

      
Application Number 18199020
Status Pending
Filing Date 2023-05-18
First Publication Date 2023-09-14
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Seo, Hiromi
  • Seo, Satoshi
  • Shitagaki, Satoko

Abstract

A light-emitting element which has low driving voltage and high emission efficiency is provided. The light-emitting element includes, between a pair of electrodes, a hole-transport layer and a light-emitting layer over the hole-transport layer. The light-emitting layer contains a first organic compound having an electron-transport property, a second organic compound having a hole-transport property, and a light-emitting third organic compound converting triplet excitation energy into light emission. A combination of the first organic compound and the second organic compound forms an exciplex. The hole-transport layer contains at least a fourth organic compound whose HOMO level is lower than or equal to that of the second organic compound and a fifth organic compound whose HOMO level is higher than that of the second organic compound.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/15 - Hole transporting layers
  • H10K 85/30 - Coordination compounds

43.

LIGHT-EMITTING DEVICE

      
Application Number 18112788
Status Pending
Filing Date 2023-02-22
First Publication Date 2023-09-07
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Seo, Satoshi
  • Ohsawa, Nobuharu
  • Yoshizumi, Hideko

Abstract

To provide a light-emitting device with high emission efficiency and high reliability. A light-emitting layer of the light-emitting device includes a first substance emitting light from a doublet excited state based on f-d transition and a second substance that is a fluorescent substance. The longest-wavelength absorption edge among absorption edges in the absorption spectrum of the first substance is positioned at a wavelength shorter than the wavelength of the longest-wavelength absorption edge among absorption edges in the absorption spectrum of the second substance. The first substance has a short exciton lifetime and high exciton generation efficiency, and efficient energy transfer occurs between the first substance and the second substance; thus, the light-emitting device can have high emission efficiency and high reliability.

IPC Classes  ?

44.

Semiconductor Device

      
Application Number 18116945
Status Pending
Filing Date 2023-03-03
First Publication Date 2023-09-07
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Umezaki, Atsushi

Abstract

A semiconductor device which shifts a low-level signal is provided. In an example, a first transistor including a first terminal electrically connected to a first wiring and a second terminal electrically connected to a second wiring, a second transistor including a first terminal electrically connected to a third wiring and a second terminal electrically connected to the second wiring, a third transistor including a first terminal electrically connected to a fourth wiring and a second terminal electrically connected to a gate of the second transistor, a fourth transistor including a first terminal electrically connected to a fifth wiring, a second terminal electrically connected to a gate of the third transistor, and a gate electrically connected to a sixth wiring, and a first switch including a first terminal electrically connected to the third wiring and a second terminal electrically connected to a gate of the first transistor are included.

IPC Classes  ?

  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
  • H01L 29/786 - Thin-film transistors

45.

Display Device And Electronic Device

      
Application Number 18196156
Status Pending
Filing Date 2023-05-11
First Publication Date 2023-09-07
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kimura, Hajime
  • Miyaguchi, Atsushi

Abstract

To improve color reproduction areas in a display device having light-emitting elements. A display region has a plurality of picture elements. Each picture element includes: first and second pixels each including a light-emitting element which has a chromaticity whose x-coordinate in a CIE-XY chromaticity diagram is 0.50 or more; third and fourth pixels each including a light-emitting element which has a chromaticity whose y-coordinate in the diagram is 0.55 or more; and fifth and sixth pixels each including a light-emitting element which has a chromaticity whose x-coordinate and y-coordinate in the diagram are 0.20 or less and 0.25 or less, respectively. The light-emitting elements in the first and second pixels have different emission spectrums from each other; the light-emitting elements in the third and fourth pixels have different emission spectrums from each other, and the light-emitting elements in the fifth and sixth pixels have different emission spectrums from each other.

IPC Classes  ?

  • H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
  • H01L 29/786 - Thin-film transistors
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

46.

SEMICONDUCTOR DEVICE

      
Application Number 18016745
Status Pending
Filing Date 2021-07-19
First Publication Date 2023-09-07
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Godo, Hiromichi
  • Tsuda, Kazuki
  • Kurokawa, Yoshiyuki
  • Ohshita, Satoru
  • Kanemura, Takuro
  • Rikimaru, Hidefumi

Abstract

Provided is a semiconductor device having a novel structure. A first transistor, a second transistor, a third transistor, and a capacitor are included. The first transistor has a function of retaining a first potential corresponding to first data supplied to a gate of the third transistor through the first transistor when being in an off state. The capacitor has a function of changing the first potential retained in the gate of the third transistor into a second potential in accordance with a change in potential corresponding to second data supplied to one electrode of the capacitor. The second transistor has a function of setting a potential of one of a source and a drain of the third transistor to a potential corresponding to a potential of a gate of the second transistor. The third transistor has a function of supplying output current corresponding to a potential of the gate of the third transistor to the other of the source and the drain of the third transistor. The output current is current flowing when the third transistor operates in a subthreshold region.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • G11C 11/405 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
  • G11C 11/54 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron

47.

SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

      
Application Number 18016888
Status Pending
Filing Date 2021-07-19
First Publication Date 2023-09-07
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Ikeda, Takayuki
  • Nagatsuka, Shuhei

Abstract

A semiconductor device with high arithmetic performance is provided. The semiconductor device employs the translinear principle, and the semiconductor device includes first to tenth transistors each including a metal oxide in a channel formation region and a first capacitor. A first terminal of the first transistor is electrically connected to a first terminal of the second transistor, a first terminal of the third transistor is electrically connected to a second terminal of the second transistor and a gate of the second transistor through the first capacitor. The second terminal of the second transistor is electrically connected to first terminals of the fourth and the seventh transistors and gates of the fifth and the eighth transistors. A gate of the seventh transistor is electrically connected to first terminals of the fifth and the sixth transistors, and a gate of the tenth transistor is electrically connected to first terminals of the eighth and the ninth transistors.

IPC Classes  ?

  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
  • G06F 7/544 - Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using unspecified devices for evaluating functions by calculation
  • H01L 29/786 - Thin-film transistors

48.

METAL OXIDE AND FIELD-EFFECT TRANSISTOR

      
Application Number 18104817
Status Pending
Filing Date 2023-02-02
First Publication Date 2023-09-07
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Yamazaki, Shunpei

Abstract

To provide a novel material. In a field-effect transistor including a metal oxide, a channel formation region of the transistor includes a material having at least two different energy band widths. The material includes nano-size particles each with a size of greater than or equal to 0.5 nm and less than or equal to 10 nm. The nano-size particles are dispersed or distributed in a mosaic pattern.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/786 - Thin-film transistors

49.

Display Device and Electronic Device

      
Application Number 18196177
Status Pending
Filing Date 2023-05-11
First Publication Date 2023-09-07
Owner Semiconductor Energy Laboratory Co., Ltd (Japan)
Inventor
  • Takahashi, Kei
  • Miyake, Hiroyuki

Abstract

A display device including a display portion with an extremely high resolution is provided. The display device includes a pixel circuit and a light-emitting element. The pixel circuit includes a first element layer including a first transistor and a second element layer including a second transistor. A channel formation region of the first transistor includes silicon. The first transistor has a function of driving the light-emitting element. The second transistor functions as a switch. A channel formation region of the second transistor includes a metal oxide. The metal oxide functions as a semiconductor. The second element layer is provided over the first element layer.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
  • G09G 3/3266 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] - Details of drivers for scan electrodes

50.

LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 18197805
Status Pending
Filing Date 2023-05-16
First Publication Date 2023-09-07
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Hatano, Kaoru

Abstract

Provided is a method to manufacture a liquid crystal display device in which a contact hole for the electrical connection of the pixel electrode and one of the source and drain electrode of a transistor and a contact hole for the processing of a semiconductor layer are formed simultaneously. The method contributes to the reduction of a photography step. The transistor includes an oxide semiconductor layer where a channel formation region is formed.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G02F 1/1333 - Constructional arrangements
  • G02F 1/1343 - Electrodes
  • G02F 1/1362 - Active matrix addressed cells
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/786 - Thin-film transistors

51.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

      
Application Number 18109305
Status Pending
Filing Date 2023-02-14
First Publication Date 2023-08-31
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kakehata, Tetsuya
  • Egi, Yuji
  • Jinbo, Yasuhiro
  • Sakurada, Yujiro

Abstract

A semiconductor device having favorable electrical characteristics is provided. A metal oxide is formed over a substrate by the steps of: introducing a first precursor into a chamber in which the substrate is provided; introducing a first oxidizer after the introduction of the first precursor; introducing a second precursor after the introduction of the first oxidizer; and introducing a second oxidizer after the introduction of the second precursor.

IPC Classes  ?

52.

METHOD FOR DRIVING SEMICONDUCTOR DEVICE

      
Application Number 18141029
Status Pending
Filing Date 2023-04-28
First Publication Date 2023-08-31
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Kimura, Hajime

Abstract

The resolution of a low-resolution image is made high and a stereoscopic image is displayed. Resolution is made high by super-resolution processing. In this case, the super-resolution processing is performed after edge enhancement processing is performed. Accordingly, a stereoscopic image with high resolution and high quality can be displayed. Alternatively, after image analysis processing is performed, edge enhancement processing and super-resolution processing are concurrently performed. Accordingly, processing time can be shortened.

IPC Classes  ?

  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G09G 5/10 - Intensity circuits
  • G09G 3/34 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source

53.

SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, MEMORY DEVICE, AND ELECTRONIC DEVICE

      
Application Number 18142064
Status Pending
Filing Date 2023-05-02
First Publication Date 2023-08-31
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kimura, Hajime

Abstract

A semiconductor device with large memory capacity is provided. A semiconductor device includes first to fourth insulators, a first conductor, a second conductor, and a first semiconductor, and the first semiconductor includes a first surface and a second surface. A first side surface of the first conductor is included on the first surface of the first semiconductor, and a first side surface of the first insulator is included on a second side surface of the first conductor. The second insulator is included in a region including a second side surface and a top surface of the first insulator, a top surface of the first conductor, and the second surface of the first semiconductor. The third insulator is included on a formation surface of the second insulator, and the fourth insulator is included on a formation surface of the third insulator. The second conductor is included in a region overlapping the second surface of the first semiconductor in a region where the fourth insulator is formed. The third insulator has a function of accumulating charge. A tunnel current is induced between the second surface of the first semiconductor and the third insulator with the second insulator therebetween by supply of a potential to the second conductor.

IPC Classes  ?

  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H10B 41/27 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
  • H10B 43/27 - EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels

54.

INPUT/OUTPUT PANEL, INPUT/OUTPUT DEVICE, AND SEMICONDUCTOR DEVICE

      
Application Number 18312104
Status Pending
Filing Date 2023-05-04
First Publication Date 2023-08-31
Owner Semiconductor Energy Laboralory Co., Ltd. (Japan)
Inventor
  • Kimura, Hajime
  • Yamazaki, Shunpei

Abstract

An input/output device includes a first sensor electrode and a second sensor electrode. In addition, the input/output device includes a first electrode and a second electrode which are electrodes for a display element, and a substrate sandwiched between the first sensor electrode and the second sensor electrode. The second sensor electrode is formed concurrently with the first electrode using the same material. The input/output device sensors a change in capacitance of a capacitor formed between the first sensor electrode and the second sensor electrode. Furthermore, a third sensor electrode to which a floating potential is applied may be provided to overlap with the first electrode. In the input/output device, either a liquid crystal element or a light-emitting element may be used, or both the liquid crystal element and the light-emitting element may be used.

IPC Classes  ?

  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
  • G02F 1/1333 - Constructional arrangements
  • G02F 1/1343 - Electrodes
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device

55.

SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

      
Application Number 18007766
Status Pending
Filing Date 2021-07-05
First Publication Date 2023-08-31
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kimura, Hajime
  • Ikeda, Takayuki
  • Kurokawa, Yoshiyuki

Abstract

A semiconductor device that restores degraded data is provided. The semiconductor device includes a first circuit, a storage portion, and an arithmetic portion. The first circuit includes a current source and a first switch. The storage portion includes a first transistor and a first capacitor. The arithmetic portion includes a second transistor. A first terminal of the first transistor is electrically connected to a control terminal of the first switch, a first terminal of the first switch is electrically connected to an output terminal of the current source, and a second terminal of the first switch is electrically connected to a first terminal of the second transistor. When data retained in the arithmetic portion is restored, the first transistor is turned on, and the data retained in the storage portion is supplied to the control terminal of the first switch through the first transistor. The first switch is brought into an on state or an off state in accordance with the data and supplies current from the current source to the arithmetic portion through the second transistor to supply electric charge to a retention portion of the arithmetic portion.

IPC Classes  ?

  • G11C 11/56 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
  • G11C 7/06 - Sense amplifiers; Associated circuits
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • G06G 7/60 - Analogue computers for specific processes, systems, or devices, e.g. simulators for living beings, e.g. their nervous systems
  • H01L 29/786 - Thin-film transistors

56.

LIGHT-EMITTING DEVICE, LIGHT-EMITTING APPARATUS, LIGHT-EMITTING MODULE, ELECTRONIC DEVICE, AND LIGHTING DEVICE

      
Application Number 18005981
Status Pending
Filing Date 2021-07-19
First Publication Date 2023-08-31
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kawano, Yuta
  • Ueda, Airi
  • Watabe, Takeyoshi
  • Ohsawa, Nobuharu
  • Seo, Satoshi

Abstract

A light-emitting device with high emission efficiency is provided. A light-emitting device with a low driving voltage is provided. The light-emitting device includes a first electrode, a first layer over the first electrode, a second layer over the first layer, a light-emitting layer over the second layer, and a second electrode over the light-emitting layer. The first layer includes a first organic compound, and the second layer includes a second organic compound. The proportion of carbon atoms forming bonds by the sp3 hybrid orbitals to the total number of carbon atoms in the first organic compound is higher than or equal to 23 percent and lower than or equal to 55 percent. The second organic compound contains fluorine.

IPC Classes  ?

  • H10K 50/15 - Hole transporting layers
  • H10K 50/858 - Arrangements for extracting light from the devices comprising refractive means, e.g. lenses
  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 85/30 - Coordination compounds

57.

Light-Emitting Device, Light-Emitting Apparatus, Electronic Device, and Lighting Device

      
Application Number 18020490
Status Pending
Filing Date 2021-07-29
First Publication Date 2023-08-31
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kawano, Yuta
  • Ueda, Airi
  • Watabe, Takeyoshi
  • Ohsawa, Nobuharu
  • Tosu, Keito
  • Osaka, Harue
  • Seo, Satoshi

Abstract

An inexpensive light-emitting device with high emission efficiency is provided. A light-emitting device including an anode, a cathode, and an EL layer positioned between the anode and the cathode is provided. The EL layer includes a hole-transport region, a light-emitting layer, and an electron-transport region. The hole-transport region is positioned between the anode and the light-emitting layer. The electron-transport region is positioned between the cathode and the light-emitting layer. The hole-transport region contains a heteropoly acid and an organic compound having a π-electron rich aromatic ring or contains a heteropoly acid and an organic compound having a π-electron rich heteroaromatic ring. The electron-transport region contains an organic compound with an electron-transport property. The ordinary refractive index of the organic compound with an electron-transport property is higher than or equal to 1.50 and lower than or equal to 1.75 for light with a wavelength of greater than or equal to 455 nm and less than or equal to 465 nm.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 50/858 - Arrangements for extracting light from the devices comprising refractive means, e.g. lenses
  • H10K 71/13 - Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
  • C07D 251/24 - Heterocyclic compounds containing 1,3,5-triazine rings not condensed with other rings having three double bonds between ring members or between ring members and non-ring members with hydrogen or carbon atoms directly attached to at least one ring carbon atom to three ring carbon atoms
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials

58.

Control Circuit Of Secondary Battery And Electronic Device

      
Application Number 18024198
Status Pending
Filing Date 2021-08-25
First Publication Date 2023-08-31
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kurokawa, Yoshiyuki
  • Tsuda, Kazuki
  • Godo, Hiromichi
  • Ohshita, Satoru
  • Kanemura, Takuro
  • Rikimaru, Hidefumi
  • Ikeda, Takayuki
  • Yakubo, Yuto
  • Yamazaki, Shunpei

Abstract

A control circuit of a secondary battery with a novel structure is provided. The control circuit of a secondary battery includes a first transistor, a first voltage generation circuit generating a first voltage, and a second voltage generation circuit generating a second voltage. The first voltage generation circuit includes a second transistor and a first capacitor. The second voltage generation circuit includes a third transistor and a second capacitor. The difference between the first voltage and the second voltage is set in accordance with the threshold voltage of the first transistor. When the first transistor includes a back gate, a voltage retention circuit having a function of retaining the voltage of the back gate is included. The voltage retention circuit includes a fourth transistor and a third capacitor. The third capacitor includes a ferroelectric layer between a pair of electrodes. The third capacitor retains a voltage applied to the back gate by being applied with a voltage for polarization inversion in the ferroelectric layer.

IPC Classes  ?

  • G05F 3/24 - Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode-transistor combinations wherein the transistors are of the field-effect type only
  • H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells

59.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 18107559
Status Pending
Filing Date 2023-02-09
First Publication Date 2023-08-31
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Shinohara, Satoshi

Abstract

Provided are a transistor which has electrical characteristics requisite for its purpose and uses an oxide semiconductor layer and a semiconductor device including the transistor. In the bottom-gate transistor in which at least a gate electrode layer, a gate insulating film, and the semiconductor layer are stacked in this order, an oxide semiconductor stacked layer including at least two oxide semiconductor layers whose energy gaps are different from each other is used as the semiconductor layer. Oxygen and/or a dopant may be added to the oxide semiconductor stacked layer.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or

60.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 18134115
Status Pending
Filing Date 2023-04-13
First Publication Date 2023-08-31
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Yamazaki, Shunpei

Abstract

A semiconductor device in which fluctuation in electric characteristics due to miniaturization is less likely to be caused is provided. The semiconductor device includes an oxide semiconductor film including a first region, a pair of second regions in contact with side surfaces of the first region, and a pair of third regions in contact with side surfaces of the pair of second regions; a gate insulating film provided over the oxide semiconductor film; and a first electrode that is over the gate insulating film and overlaps with the first region. The first region is a CAAC oxide semiconductor region. The pair of second regions and the pair of third regions are each an amorphous oxide semiconductor region containing a dopant. The dopant concentration of the pair of third regions is higher than the dopant concentration of the pair of second regions.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/8234 - MIS technology
  • H01L 29/66 - Types of semiconductor device
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/477 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/51 - Insulating materials associated therewith
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

61.

DISPLAY DEVICE

      
Application Number 18143182
Status Pending
Filing Date 2023-05-04
First Publication Date 2023-08-31
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Yoshizumi, Kensuke

Abstract

One embodiment of the present invention provides a highly reliable display device. In particular, a display device to which a signal or a power supply potential can be supplied stably is provided. Further, a bendable display device to which a signal or a power supply potential can be supplied stably is provided. The display device includes, over a flexible substrate, a display portion, a plurality of connection terminals to which a signal from an outside can be input, and a plurality of wirings. One of the plurality of wirings electrically connects one of the plurality of connection terminals to the display portion. The one of the plurality of wirings includes a first portion including a plurality of separate lines and a second portion in which the plurality of lines converge.

IPC Classes  ?

  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 77/10 - Substrates, e.g. flexible substrates
  • G04G 9/00 - Visual time or date indication means

62.

SEMICONDUCTOR DEVICE

      
Application Number 18312021
Status Pending
Filing Date 2023-05-04
First Publication Date 2023-08-31
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Umezaki, Atsushi

Abstract

Provided is a semiconductor device which can operate stably even in the case where a transistor thereof is a depletion transistor. The semiconductor device includes a first transistor for supplying a first potential to a first wiring, a second transistor for supplying a second potential to the first wiring, a third transistor for supplying a third potential at which the first transistor is turned on to a gate of the first transistor and stopping supplying the third potential, a fourth transistor for supplying the second potential to the gate of the first transistor, and a first circuit for generating a second signal obtained by offsetting a first signal. The second signal is input to a gate of the fourth transistor. The potential of a low level of the second signal is lower than the second potential.

IPC Classes  ?

  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • H03K 3/356 - Bistable circuits
  • G11C 19/18 - Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
  • H03K 19/0185 - Coupling arrangements; Interface arrangements using field-effect transistors only
  • H03K 17/06 - Modifications for ensuring a fully conducting state
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H03K 17/081 - Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit

63.

Light-Emitting Element, Display Device, Electronic Device, and Lighting Device

      
Application Number 18136030
Status Pending
Filing Date 2023-04-18
First Publication Date 2023-08-24
Owner Semiconductor Energy Laboratory Co. Ltd. (Japan)
Inventor
  • Seo, Satoshi
  • Watabe, Takeyoshi
  • Mitsumori, Satomi

Abstract

To provide a light-emitting element with high emission efficiency and low driving voltage. The light-emitting element includes a guest material and a host material. A HOMO level of the guest material is higher than a HOMO level of the host material. An energy difference between the LUMO level and a HOMO level of the guest material is larger than an energy difference between the LUMO level and a HOMO level of the host material. The guest material has a function of converting triplet excitation energy into light emission. An energy difference between the LUMO level of the host material and the HOMO level of the guest material is larger than or equal to energy of light emission of the guest material.

IPC Classes  ?

  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • C09K 11/02 - Use of particular materials as binders, particle coatings or suspension media therefor
  • H10K 50/12 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising dopants
  • H10K 85/30 - Coordination compounds
  • H10K 85/60 - Organic compounds having low molecular weight

64.

Liquid Crystal Display Device and Electronic Device

      
Application Number 18137606
Status Pending
Filing Date 2023-04-21
First Publication Date 2023-08-24
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Umezaki, Atsushi

Abstract

To provide a circuit used for a shift register or the like. The basic configuration includes first to fourth transistors and four wirings. The power supply potential VDD is supplied to the first wiring and the power supply potential VSS is supplied to the second wiring. A binary digital signal is supplied to each of the third wiring and the fourth wiring. An H level of the digital signal is equal to the power supply potential VDD, and an L level of the digital signal is equal to the power supply potential VSS. There are four combinations of the potentials of the third wiring and the fourth wiring. Each of the first transistor to the fourth transistor can be turned off by any combination of the potentials. That is, since there is no transistor that is constantly on, deterioration of the characteristics of the transistors can be suppressed.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • H01L 21/84 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
  • G02F 1/133 - Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
  • G02F 1/1362 - Active matrix addressed cells

65.

Display Panel, Display Device, Display Module, Electronic Device, and Manufacturing Method of Display Panel

      
Application Number 18139004
Status Pending
Filing Date 2023-04-25
First Publication Date 2023-08-24
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Nakamura, Daiki
  • Eguchi, Shingo
  • Aoyama, Tomoya
  • Sugisawa, Nozomu
  • Maruyama, Junya
  • Fujita, Kazuhiko
  • Sato, Masataka
  • Kawashima, Susumu

Abstract

Display unevenness in a display panel is suppressed. A display panel with a high aperture ratio of a pixel is provided. The display panel includes a first pixel electrode, a second pixel electrode, a third pixel electrode, a first light-emitting layer, a second light-emitting layer, a third light-emitting layer, a first common layer, a second common layer, a common electrode, and an auxiliary wiring. The first common layer is positioned over the first pixel electrode and the second pixel electrode. The first common layer has a portion overlapping with the first light-emitting layer and a portion overlapping with the second light-emitting layer. The second common layer is positioned over the third pixel electrode. The second common layer has a portion overlapping with the third light-emitting layer. The common electrode has a portion overlapping with the first pixel electrode with the first common layer and the first light-emitting layer provided therebetween, a portion overlapping with the second pixel electrode with the first common layer and the second light-emitting layer provided therebetween, a portion overlapping with the third pixel electrode with the second common layer and the third light-emitting layer provided therebetween, and a portion in contact with a top surface of the auxiliary wiring.

IPC Classes  ?

  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
  • G06F 1/16 - Constructional details or arrangements
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 77/10 - Substrates, e.g. flexible substrates

66.

METAL OXIDE FILM, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD THEREOF

      
Application Number 18043669
Status Pending
Filing Date 2021-08-26
First Publication Date 2023-08-24
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Jinbo, Yasuhiro
  • Kunitake, Hitoshi
  • Egi, Yuji
  • Takahashi, Masahiro
  • Kochi, Shuntaro

Abstract

A material having favorable ferroelectricity is provided. An embodiment of the present invention is a metal oxide film including a first layer and a second layer. The first layer contains first oxygen and hafnium, and the second layer contains second oxygen and zirconium. The hafnium and the zirconium are bonded to each other with the first oxygen positioned therebetween, and the second oxygen is bonded to the zirconium.

IPC Classes  ?

  • H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
  • H10B 53/10 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the top-view layout
  • H01L 29/786 - Thin-film transistors
  • H01L 29/66 - Types of semiconductor device

67.

Method for Manufacturing Semiconductor Device

      
Application Number 18105407
Status Pending
Filing Date 2023-02-03
First Publication Date 2023-08-24
Owner Semiconductor Energy Laboratory Co., Ltd (Japan)
Inventor
  • Kurata, Motomu
  • Hodo, Ryota
  • Iida, Yuta

Abstract

A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.

IPC Classes  ?

  • H01L 27/146 - Imager structures
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/786 - Thin-film transistors

68.

OXIDE SEMICONDUCTOR, THIN FILM TRANSISTOR, AND DISPLAY DEVICE

      
Application Number 18113188
Status Pending
Filing Date 2023-02-23
First Publication Date 2023-08-24
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Ito, Shunichi
  • Sasaki, Toshinari
  • Hosoba, Miyuki
  • Sakata, Junichiro

Abstract

An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO3(ZnO)m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/45 - Ohmic electrodes
  • H01L 29/786 - Thin-film transistors
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/66 - Types of semiconductor device

69.

SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE, OR DISPLAY DEVICE INCLUDING THE SEMICONDUCTOR DEVICE

      
Application Number 18133622
Status Pending
Filing Date 2023-04-12
First Publication Date 2023-08-24
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Oikawa, Yoshiaki
  • Ohsawa, Nobuharu
  • Jintyou, Masami
  • Nakazawa, Yasutaka

Abstract

The transistor includes a first gate electrode, a first insulating film over the first gate electrode, an oxide semiconductor film over the first insulating film, a source electrode over the oxide semiconductor film, a drain electrode over the oxide semiconductor film, a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, and a second gate electrode over the second insulating film. The first insulating film includes a first opening. A connection electrode electrically connected to the first gate electrode through the first opening is formed over the first insulating film. The second insulating film includes a second opening that reaches the connection electrode. The second gate electrode includes an oxide conductive film and a metal film over the oxide conductive film. The connection electrode and the second gate electrode are electrically connected to each other through the metal film.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/45 - Ohmic electrodes

70.

Light-Emitting Element, Display Device, Electronic Device, and Lighting Device

      
Application Number 18138250
Status Pending
Filing Date 2023-04-24
First Publication Date 2023-08-24
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Ohsawa, Nobuharu
  • Seo, Satoshi

Abstract

A light-emitting element having high emission efficiency is provided. A light-emitting element having high emission efficiency is provided. The light-emitting element includes a first organic compound, a second organic compound, and a third organic compound. The first organic compound has a function of converting triplet excitation energy into light emission. The second organic compound is preferably a TADF material. The third organic compound is a fluorescent compound. Light emitted from the light-emitting element is obtained from the third organic compound. Triplet excitation energy in a light-emitting layer is transferred to the third organic compound by reverse intersystem crossing caused by the second organic compound or through the first organic compound.

IPC Classes  ?

  • H10K 50/12 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising dopants
  • C09K 11/02 - Use of particular materials as binders, particle coatings or suspension media therefor
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H10K 50/16 - Electron transporting layers

71.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 18142206
Status Pending
Filing Date 2023-05-02
First Publication Date 2023-08-24
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Yamazaki, Shunpei

Abstract

A region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are formed separately in one oxide semiconductor film. The region containing a high proportion of crystal components is formed so as to serve as a channel formation region and the other region is formed so as to contain a high proportion of amorphous components. It is preferable that an oxide semiconductor film in which a region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are mixed in a self-aligned manner be formed. To separately form the regions which differ in crystallinity in the oxide semiconductor film, first, an oxide semiconductor film containing a high proportion of crystal components is formed and then process for performing amorphization on part of the oxide semiconductor film is conducted.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors
  • H01L 29/66 - Types of semiconductor device
  • H01L 27/146 - Imager structures
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or

72.

Portable information terminal

      
Application Number 29822159
Grant Number D0996423
Status In Force
Filing Date 2022-01-24
First Publication Date 2023-08-22
Grant Date 2023-08-22
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Yoshizumi, Kensuke

73.

CLEANING METHOD OF GLASS SUBSTRATE, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND GLASS SUBSTRATE

      
Application Number 18137553
Status Pending
Filing Date 2023-04-21
First Publication Date 2023-08-17
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Sato, Masataka
  • Idojiri, Satoru
  • Takase, Natsuko

Abstract

A glass substrate is reused. The mass productivity of a semiconductor device is increased. A glass substrate one surface of which includes a first material and a second material. The first material includes one or both of a metal and a metal oxide. The second material includes one or both of a resin and a decomposition product of a resin. A cleaning method of a glass substrate, which includes a step of preparing the glass substrate one surface of which includes a first material and a second material and a step of exposing the first material by removing at least part of the second material.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
  • H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching

74.

ORGANIC COMPOUND, LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, ELECTRONIC DEVICE, AND LIGHTING DEVICE

      
Application Number 18138161
Status Pending
Filing Date 2023-04-24
First Publication Date 2023-08-17
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kadoma, Hiroshi
  • Suzuki, Hiroki
  • Takita, Yusuke
  • Suzuki, Tsunenori
  • Seo, Satoshi

Abstract

A novel organic compound is provided. That is, a novel organic compound that is effective in improving element characteristics and reliability is provided. A novel organic compound is provided. That is, a novel organic compound that is effective in improving element characteristics and reliability is provided. The organic compound includes an anthracene skeleton and a carbazole skeleton, and is represented by the following general formula (G1). A novel organic compound is provided. That is, a novel organic compound that is effective in improving element characteristics and reliability is provided. The organic compound includes an anthracene skeleton and a carbazole skeleton, and is represented by the following general formula (G1). A novel organic compound is provided. That is, a novel organic compound that is effective in improving element characteristics and reliability is provided. The organic compound includes an anthracene skeleton and a carbazole skeleton, and is represented by the following general formula (G1). (In the formula, Ar represents a substituted or unsubstituted arylene group having 6 to 13 carbon atoms, and when the arylene group has substituents, the substituents may be bonded to each other to form a ring. Furthermore, Cz represents a substituted or unsubstituted carbazole skeleton. Furthermore, each of R1 to R9 and R11 to R17 independently represents any of hydrogen, a substituted or unsubstituted alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted cycloalkyl group having 3 to 6 carbon atoms, or a substituted or unsubstituted aryl group having 6 to 13 carbon atoms. Furthermore, at least one of the following pairs may form a fused ring: R12 and R13; R14 and R15; R15 and R16; or R16 and R17.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • C07D 209/86 - Carbazoles; Hydrogenated carbazoles with only hydrogen atoms, hydrocarbon or substituted hydrocarbon radicals, directly attached to carbon atoms of the ring system
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials

75.

LIGHT-EMITTING DEVICE

      
Application Number 18138816
Status Pending
Filing Date 2023-04-25
First Publication Date 2023-08-17
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Miyake, Hiroyuki

Abstract

To provide a light-emitting device in which variation in luminance among pixels caused by variation in threshold voltage of transistors can be suppressed. The light-emitting device includes a transistor including a first gate and a second gate overlapping with each other with a semiconductor film therebetween, a first capacitor maintaining a potential difference between one of a source and a drain of the transistor and the first gate, a second capacitor maintaining a potential difference between one of the source and the drain of the transistor and the second gate, a switch controlling conduction between the second gate of the transistor and a wiring, and a light-emitting element to which drain current of the transistor is supplied.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors
  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

76.

DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 18138866
Status Pending
Filing Date 2023-04-25
First Publication Date 2023-08-17
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Ohno, Masakatsu
  • Adachi, Hiroki
  • Idojiri, Satoru
  • Takeshima, Koichi

Abstract

A first organic resin layer is formed over a first substrate; a first insulating film is formed over the first organic resin layer; a first element layer is formed over the first insulating film; a second organic resin layer is formed over a second substrate; a second insulating film is formed over the second organic resin layer; a second element layer is formed over the second insulating film; the first substrate and the second substrate are bonded; a first separation step in which adhesion between the first organic resin layer and the first substrate is reduced; the first organic resin layer and a first flexible substrate are bonded with a first bonding layer; a second separation step in which adhesion between the second organic resin layer and the second substrate is reduced; and the second organic resin layer and a second flexible substrate are bonded with a second bonding layer.

IPC Classes  ?

  • H10K 59/126 - Shielding, e.g. light-blocking means over the TFTs
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H10K 50/844 - Encapsulations
  • H10K 50/842 - Containers
  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H10K 59/124 - Insulating layers formed between TFT elements and OLED elements
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 71/00 - Manufacture or treatment specially adapted for the organic devices covered by this subclass
  • H10K 71/50 - Forming devices by joining two substrates together, e.g. lamination techniques
  • H10K 71/80 - Manufacture or treatment specially adapted for the organic devices covered by this subclass using temporary substrates
  • H10K 71/40 - Thermal treatment, e.g. annealing in the presence of a solvent vapour
  • H10K 77/10 - Substrates, e.g. flexible substrates
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/786 - Thin-film transistors
  • B23K 26/0622 - Shaping the laser beam, e.g. by masks or multi-focusing by direct control of the laser beam by shaping pulses
  • B23K 26/04 - Automatically aligning, aiming or focusing the laser beam, e.g. using the back-scattered light
  • B23K 26/06 - Shaping the laser beam, e.g. by masks or multi-focusing
  • B23K 26/08 - Devices involving relative movement between laser beam and workpiece

77.

EQUIVALENT CIRCUIT MODEL, PROGRAM, RECORDING MEDIUM, AND SIMULATION DEVICE

      
Application Number 18025213
Status Pending
Filing Date 2021-09-09
First Publication Date 2023-08-17
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kunitake, Hitoshi
  • Baba, Haruyuki

Abstract

A program for executing a simulation of a circuit including an anti-ferroelectric element is provided. An equivalent circuit model of an anti-ferroelectric element is set in the program. The equivalent circuit model includes, between a first terminal and a second terminal, a ferroelectric element, a linear resistor, a first transistor, and a second transistor. The first terminal is electrically connected to one of a pair of electrodes of the ferroelectric element and a first terminal of the linear resistor; the other of the pair of electrodes of the ferroelectric element is electrically connected to one of a source electrode and a drain electrode of the first transistor; a gate electrode of the first transistor is electrically connected to a gate electrode of the second transistor, one of a source electrode and a drain electrode of the second transistor, and a second terminal of the linear resistor; and the second terminal is electrically connected to the other of the source electrode and the drain electrode of the first transistor and the other of the source electrode and the drain electrode of the second transistor.

IPC Classes  ?

  • G06F 30/367 - Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
  • G06F 30/3323 - Design verification, e.g. functional simulation or model checking using formal methods, e.g. equivalence checking or property checking
  • G06F 30/3308 - Design verification, e.g. functional simulation or model checking using simulation

78.

METHOD FOR FABRICATING SECONDARY BATTERY

      
Application Number 18004749
Status Pending
Filing Date 2021-07-13
First Publication Date 2023-08-17
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kakehata, Tetsuya
  • Ishitani, Tetsuji
  • Yoshitomi, Shuhei

Abstract

One embodiment of the present invention achieves a fabrication method that can automate fabrication of a secondary battery. In addition, a fabrication method that can fabricate a secondary battery efficiently in a short time is achieved. Furthermore, a fabrication method that can fabricate a secondary battery with high yield is achieved. Alternatively, a method for fabricating a large secondary battery with a relatively large size is achieved. An electrolyte is dripped on one or more of a positive electrode, a separator, and a negative electrode; the one or more of the positive electrode, the separator, and the negative electrode are impregnated with the electrolyte; pressure is then reduced; and a stack of the positive electrode, the separator, and the negative electrode is sealed with an exterior film. A plurality of stacks may be arranged on an exterior film; a plurality of drops of an electrolyte may be dripped on the stacks; sealing may be performed under reduced pressure; and then the exterior film may be divided into separate secondary batteries.

IPC Classes  ?

  • H01M 10/0585 - Construction or manufacture of accumulators having only flat construction elements, i.e. flat positive electrodes, flat negative electrodes and flat separators

79.

IMAGING DEVICE, ELECTRONIC DEVICE, AND MOVING OBJECT

      
Application Number 18014207
Status Pending
Filing Date 2021-07-16
First Publication Date 2023-08-17
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Inoue, Hiroki
  • Yoneda, Seiichi
  • Negoro, Yusuke
  • Ikeda, Takayuki
  • Kusumoto, Naoto
  • Yoshizumi, Kensuke
  • Yamazaki, Shunpei

Abstract

A highly functional imaging device is provided. A small imaging device is provided. An imaging device or the like capable of high-speed operation is provided. A highly reliable imaging device is provided. The imaging device includes a pixel array, and a light-blocking layer and a transparent conductive layer that are over the pixel array. The light-blocking layer includes a first region overlapping with a first pixel and a second region overlapping with a second pixel. The transparent conductive layer includes a region overlapping with the first region and a region overlapping with the second region. The transparent conductive layer has a light-transmitting property. The transparent conductive layer is electrically connected to the first region and the second region. First light enters the photoelectric conversion device included in the first pixel. Second light enters the photoelectric conversion device included in the second pixel. The imaging device has a function of sensing a focal point in image formation with use of a first electric signal generated by conversion of the first light and a second electric signal generated by conversion of the second light.

IPC Classes  ?

80.

MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

      
Application Number 18015118
Status Pending
Filing Date 2021-08-05
First Publication Date 2023-08-17
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kurata, Motomu
  • Murakawa, Tsutomu
  • Arasawa, Ryo
  • Fukushima, Kunihiro
  • Yamane, Yasumasa
  • Sasagawa, Shinya

Abstract

A semiconductor device with a small variation in transistor characteristics can be provided. A step of forming an opening in a structure body including an oxide semiconductor device to reach the oxide semiconductor device, a step of embedding a first conductor in the opening, a step of forming a second conductor in contact with a top surface of the first conductor, a step of forming a first barrier insulating film by a sputtering method to cover the structure body, the first conductor, and the second conductor, and a step of forming a second barrier insulating film over the first barrier insulating film by an ALD method are included. The first barrier insulating film and the second barrier insulating film each have a function of inhibiting hydrogen diffusion.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices

81.

DISPLAY DEVICE HAVING AN OXIDE SEMICONDUCTOR TRANSISTOR

      
Application Number 18115017
Status Pending
Filing Date 2023-02-28
First Publication Date 2023-08-17
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kondo, Toshikazu
  • Koyama, Jun
  • Yamazaki, Shunpei

Abstract

An object is to reduce parasitic capacitance of a signal line included in a liquid crystal display device. A transistor including an oxide semiconductor layer is used as a transistor provided in each pixel. Note that the oxide semiconductor layer is an oxide semiconductor layer which is highly purified by thoroughly removing impurities (hydrogen, water, or the like) which become electron suppliers (donors). Thus, the amount of leakage current (off-state current) can be reduced when the transistor is off. Therefore, a voltage applied to a liquid crystal element can be held without providing a capacitor in each pixel. In addition, a capacitor wiring extending to a pixel portion of the liquid crystal display device can be eliminated. Therefore, parasitic capacitance in a region where the signal line and the capacitor wiring intersect with each other can be eliminated.

IPC Classes  ?

  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • G02F 1/1362 - Active matrix addressed cells
  • H01L 29/45 - Ohmic electrodes
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors
  • G02F 1/1333 - Constructional arrangements
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals

82.

LIGHT-EMITTING DEVICE

      
Application Number 18130996
Status Pending
Filing Date 2023-04-05
First Publication Date 2023-08-17
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Hirakata, Yoshiharu
  • Endo, Akio

Abstract

A light-emitting device includes a strip-like high flexibility region and a strip-like low flexibility region arranged alternately in a direction. The high flexibility region includes a flexible light-emitting panel. The low flexibility region includes the light-emitting panel and a support panel having a lower flexibility than that of the light-emitting panel and overlapping with the light-emitting panel. It is preferable that the light-emitting panel include an external connection electrode and that a length in the direction of a low flexibility region A that overlaps with the external connection electrode be longer than a length in the direction of a low flexibility region B that is closest to the region A.

IPC Classes  ?

  • F21V 15/01 - Housings, e.g. material or assembling of housing parts
  • H04W 72/23 - Control channels or signalling for resource management in the downlink direction of a wireless link, i.e. towards a terminal
  • H04W 72/566 - Allocation or scheduling criteria for wireless resources based on priority criteria of the information or information source or recipient

83.

DISPLAY APPARATUS AND ELECTRONIC DEVICE

      
Application Number 18134054
Status Pending
Filing Date 2023-04-13
First Publication Date 2023-08-17
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Toyotaka, Kouhei
  • Saito, Motoharu

Abstract

A display apparatus which includes a driver with low power consumption and in which an output voltage of the driver is boosted by a pixel is provided. The source driver in which a logic unit and an amplifier unit operate appropriately by the same low voltage is included, and the pixel has a function of retaining first data, a function of adding second data to the first data to generate third data, and a function of supplying the third data to a display device. Thus, even when a voltage output from the source driver is low, the voltage can be boosted by the pixel; accordingly, the display device can operate appropriately.

IPC Classes  ?

  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals

84.

DISPLAY DEVICE

      
Application Number 18135818
Status Pending
Filing Date 2023-04-18
First Publication Date 2023-08-17
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kobayashi, Hidetomo
  • Takahashi, Kei
  • Yamazaki, Shunpei

Abstract

A display device with favorable display quality is provided. A display portion where a plurality of pixels is arranged in a matrix is divided into Region A and Region B, i.e., regions on the upstream side and the downstream side of a scanning direction. A signal line for supplying an image signal is provided in each of Region A and Region B. Region A and Region B adjoin each other such that a boundary line showing the boundary between the regions is bent. Bending the boundary line suppresses formation of a stripe in a boundary portion. For example, in a given column, the total number of pixels electrically connected to a signal line in Region A is made different from the total number of pixels electrically connected to a signal line in Region B.

IPC Classes  ?

  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G02F 1/1362 - Active matrix addressed cells
  • G02F 1/1343 - Electrodes
  • H01L 29/786 - Thin-film transistors
  • G06F 1/16 - Constructional details or arrangements
  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G02B 27/01 - Head-up displays
  • H04M 1/02 - Constructional features of telephone sets

85.

LIQUID CRYSTAL DISPLAY DEVICE, SEMICONDUCTOR DEVICE, AND ELECTRONIC APPLIANCE

      
Application Number 18136367
Status Pending
Filing Date 2023-04-19
First Publication Date 2023-08-17
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Kimura, Hajime

Abstract

The liquid crystal display device includes an island-shaped first semiconductor film 102 which is formed over a base insulating film 101 and in which a source 102d, a channel forming region 102a, and a drain 102b are formed; a first electrode 102c which is formed of a material same as the first semiconductor film 102 to be the source 102d or the drain 102b and formed over the base insulating film 101; a second electrode 108 which is formed over the first electrode 102c and includes a first opening pattern 112; and a liquid crystal 110 which is provided over the second electrode 108.

IPC Classes  ?

  • G02F 1/1343 - Electrodes
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G02F 1/1333 - Constructional arrangements
  • G02F 1/1335 - Structural association of cells with optical devices, e.g. polarisers or reflectors
  • G02F 1/1337 - Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
  • G02F 1/1362 - Active matrix addressed cells
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • H01L 29/786 - Thin-film transistors

86.

METHOD FOR MANUFACTURING SPUTTERING TARGET, METHOD FOR FORMING OXIDE FILM, AND TRANSISTOR

      
Application Number 18137572
Status Pending
Filing Date 2023-04-21
First Publication Date 2023-08-17
Owner Semiconductor Energy Laboratory Co., Ltd. (USA)
Inventor
  • Yamazaki, Shunpei
  • Tsubuku, Masashi
  • Oota, Masashi
  • Kurosawa, Yoichi
  • Ishihara, Noritaka

Abstract

A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • C23C 14/08 - Oxides
  • C01G 15/00 - Compounds of gallium, indium, or thallium
  • B82Y 30/00 - Nanotechnology for materials or surface science, e.g. nanocomposites
  • C23C 14/34 - Sputtering
  • C30B 23/08 - Epitaxial-layer growth by condensing ionised vapours
  • C30B 29/22 - Complex oxides
  • H01J 37/34 - Gas-filled discharge tubes operating with cathodic sputtering
  • C30B 1/04 - Isothermal recrystallisation
  • C30B 28/02 - Production of homogeneous polycrystalline material with defined structure directly from the solid state
  • C30B 29/68 - Crystals with laminate structure, e.g. "superlattices"
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/786 - Thin-film transistors

87.

SEMICONDUCTOR DEVICE

      
Application Number 18138196
Status Pending
Filing Date 2023-04-24
First Publication Date 2023-08-17
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Atsumi, Tomoaki
  • Kato, Kiyoshi
  • Onuki, Tatsuya
  • Yamazaki, Shunpei

Abstract

A semiconductor device with a high on-state current and high operating speed is provided. The semiconductor device includes a transistor and a first circuit. The transistor includes a first gate and a second gate, and the first gate and the second gate include a region where they overlap each other with a semiconductor layer therebetween. The first circuit includes a temperature sensor and a voltage control circuit. The temperature sensor has a function of obtaining temperature information and outputting the temperature information to the voltage control circuit. The voltage control circuit has a function of converting the temperature information into a control voltage. The first circuit applies the control voltage to the second gate.

IPC Classes  ?

  • G11C 7/04 - Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
  • G11C 5/14 - Power supply arrangements
  • G11C 11/4074 - Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/221 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds including two or more compounds
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

88.

Display Panel, Display Device, Input/Output Device, and Data Processing Device

      
Application Number 18104674
Status Pending
Filing Date 2023-02-01
First Publication Date 2023-08-10
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Suzuki, Tsunenori
  • Niikura, Yasuhiro
  • Hirose, Tomoya
  • Seo, Satoshi

Abstract

A novel display panel that is highly convenient or reliable is provided. The display panel includes a first pixel; the first pixel includes a first display element, a first color conversion layer, and a first absorption layer; the first display element emits first light; the first absorption layer overlaps with the first display element; and the first absorption layer absorbs the first light. Furthermore, the first color conversion layer is sandwiched between the first display element and the first absorption layer; the first color conversion layer converts the first light into second light; and the second light has a spectrum including a high proportion of light with a long wavelength compared with the first light.

IPC Classes  ?

  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

89.

Light-Emitting Device And Electronic Device

      
Application Number 18128507
Status Pending
Filing Date 2023-03-30
First Publication Date 2023-08-10
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Eguchi, Shingo

Abstract

A highly reliable light-emitting device is provided. Damage to an element due to externally applied physical power is suppressed. Alternatively, in a process of pressure-bonding of an FPC, damage to a resin and a wiring which are in contact with a flexible substrate due to heat is suppressed. A neutral plane at which stress-strain is not generated when a flexible light-emitting device including an organic EL element is deformed, is positioned in the vicinity of a transistor and the organic EL element. Alternatively, the hardness of the outermost surface of a light-emitting device is high. Alternatively, a substrate having a coefficient of thermal expansion of 10 ppm/K or lower is used as a substrate that overlaps with a terminal portion connected to an FPC.

IPC Classes  ?

  • H10K 50/844 - Encapsulations
  • H10K 50/84 - Passivation; Containers; Encapsulations
  • H10K 50/842 - Containers
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H10K 59/124 - Insulating layers formed between TFT elements and OLED elements
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals

90.

DISPLAY DEVICE AND DRIVING METHOD THEREOF

      
Application Number 18133625
Status Pending
Filing Date 2023-04-12
First Publication Date 2023-08-10
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yoshida, Yasunori
  • Kimura, Hajime

Abstract

It is an object of the present invention to provide a display device in which problems such as an increase of power consumption and increase of a load of when light is emitted are reduced by using a method for realizing pseudo impulsive driving by inserting an dark image, and a driving method thereof. A display device which displays a gray scale by dividing one frame period into a plurality of subframe periods, where one frame period is divided into at least a first subframe period and a second subframe period; and when luminance in the first subframe period to display the maximum gray scale is Lmax1 and luminance in the second subframe period to display the maximum gray scale is Lmax2, (1/2) Lmax2

IPC Classes  ?

  • G09G 3/34 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G02F 1/01 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
  • G09G 5/10 - Intensity circuits

91.

POSITIVE ELECTRODE ACTIVE MATERIAL, POWER STORAGE DEVICE, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING POSITIVE ELECTRODE, ACTIVE MATERIAL

      
Application Number 18135445
Status Pending
Filing Date 2023-04-17
First Publication Date 2023-08-10
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yoneda, Yumiko
  • Miwa, Takuya

Abstract

A positive electrode active material includes a plurality of groups of particles. The plurality of groups of particles has a particle diameter of more than or equal to 300 nm and less than or equal to 3 μm. Each of the groups includes two or more particles. The two or more particles are each a lithium-containing complex phosphate including one or more of iron, nickel, manganese, and cobalt. The group of particles includes a first particle and a second particle each having a major diameter and a minor diameter in the upper surface when seen from a predetermined direction. The major diameters of the first and second particles are substantially parallel to each other. The major diameter of the first particle is two to six times larger than the minor diameter of the first particle and the minor diameter of the first particle is more than or equal to 20 nm and less than or equal to 130 nm.

IPC Classes  ?

  • H01M 6/10 - Dry cells, i.e. cells wherein the electrolyte is rendered non-fluid with wound or folded electrodes
  • H01M 4/1397 - Processes of manufacture of electrodes based on inorganic compounds other than oxides or hydroxides, e.g. sulfides, selenides, tellurides, halogenides or LiCoFy
  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • H01M 4/58 - Selection of substances as active materials, active masses, active liquids of polyanionic structures, e.g. phosphates, silicates or borates
  • H01M 10/04 - Construction or manufacture in general

92.

DISPLAY DEVICE AND ELECTRONIC DEVICE

      
Application Number 18136665
Status Pending
Filing Date 2023-04-19
First Publication Date 2023-08-10
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Miyake, Hiroyuki
  • Ikeda, Hisao

Abstract

To provide a display device that is suitable for increasing in size, a display device in which display unevenness is suppressed, or a display device that can display an image along a curved surface. The display device includes a first display panel and a second display panel each including a pair of substrates. The first display panel and the second display panel each include a first region which can transmit visible light, a second region which can block visible light, and a third region which can perform display. The third region of the first display panel and the first region of the second display panel overlap each other. The third region of the first display panel and the second region of the second display panel do not overlap each other.

IPC Classes  ?

  • H10K 59/86 - Series electrical configurations of multiple OLEDs
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • G06F 1/16 - Constructional details or arrangements
  • H01K 1/00 - ELECTRIC INCANDESCENT LAMPS - Details
  • H10K 50/814 - Anodes combined with auxiliary electrodes, e.g. ITO layer combined with metal lines
  • H10K 50/824 - Cathodes combined with auxiliary electrodes
  • H10K 59/18 - Tiled displays
  • H10K 77/10 - Substrates, e.g. flexible substrates

93.

DISPLAY DEVICE

      
Application Number 18137259
Status Pending
Filing Date 2023-04-20
First Publication Date 2023-08-10
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Miyake, Hiroyuki

Abstract

A scan line to which a selection signal or a non-selection signal is input from its end, and a transistor in which a clock signal is input to a gate, the non-selection signal input to a source, and a drain is connected to the scan line are provided. A signal input to the end of the scan line is switched from the selection signal to the non-selection signal at the same or substantially the same time as the transistor is turned on. The non-selection signal is input not only from one end but also from both ends of the scan line. This makes it possible to inhibit the potentials of portions in the scan line from being changed at different times.

IPC Classes  ?

  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

94.

DISPLAY APPARATUS AND ELECTRONIC DEVICE

      
Application Number 18012079
Status Pending
Filing Date 2021-06-28
First Publication Date 2023-08-10
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kawashima, Susumu
  • Kusunoki, Koji
  • Watanabe, Kazunori
  • Yoshimoto, Satoshi

Abstract

A display apparatus suitable for wide-grayscale display is provided. The display apparatus includes, in a pixel, two driving transistors and a light-emitting device that are connected in series. One of the transistors is a p-channel transistor and the other of the transistors is an n-channel transistor, and switching therebetween is performed for driving. Such a configuration can inhibit the change in a gate-source voltage in display with a high grayscale level. In addition, the use of a transistor containing a metal oxide in a channel formation region as the n-channel transistor enables an increase in display characteristics in display with a low grayscale level.

IPC Classes  ?

  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 59/65 - OLEDs integrated with inorganic image sensors

95.

Driving Method of Display Device

      
Application Number 18008609
Status Pending
Filing Date 2021-06-02
First Publication Date 2023-08-10
Owner Semiconductor Energy Laboratory Co., Ltd, (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kusunoki, Koji
  • Eguchi, Shingo
  • Okazaki, Kenichi

Abstract

A touch panel or a contactless touch panel, which is capable of highly accurate position detection, is provided. The display device includes a first and a second pixel, and a sensor pixel. The sensor pixel includes a photoelectric conversion element that has sensitivity to light of a first color exhibited by the first pixel and light of a second color exhibited by the second pixel. A method for driving the display device includes a first period in which first image capturing is performed while the first pixel is turned on and the second pixel is turned off; a second period in which first reading is performed while the first pixel and the second pixel are turned off; a third period in which second image capturing is performed while the second pixel is turned on and the first pixel is turned off; and a fourth period in which second reading is performed while the first pixel and the second pixel are turned off.

IPC Classes  ?

  • G06F 3/042 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means

96.

SEMICONDUCTOR DEVICE ELECTRONIC DEVICE

      
Application Number 18011712
Status Pending
Filing Date 2021-07-06
First Publication Date 2023-08-10
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kimura, Hajime
  • Kurokawa, Yoshiyuki

Abstract

A semiconductor device capable of convolutional processing with low power consumption is provided. In the semiconductor device, a first circuit includes a first holding portion and a first transistor, and a second circuit includes a second holding portion and a second transistor. The first and second circuits are electrically connected to first and second input wirings and first and second wirings. The first holding portion has a function of holding a first current flowing through the first transistor, and the second holding portion has a function of holding a second current flowing through the second transistor. The first and second currents are determined by a filter value used for convolutional processing. When a potential corresponding to image data subjected to convolutional processing is input to the first and second input wirings, the first circuit outputs a current to one of the first wiring and the second wiring and the second circuit outputs a current to the other of the first wiring and the second wiring. The amount of current output from the first and second circuits to the first wiring or the second wiring is determined by the filter value and the image data.

IPC Classes  ?

  • G11C 11/417 - Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
  • G11C 5/10 - Arrangements for interconnecting storage elements electrically, e.g. by wiring for interconnecting capacitors

97.

Organic Compound, Light-Emitting Device, Display Device, Electronic Device, Light-Emitting Apparatus, and Lighting Device

      
Application Number 18106786
Status Pending
Filing Date 2023-02-07
First Publication Date 2023-08-10
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamaguchi, Tomoya
  • Kido, Hiromitsu
  • Yoshizumi, Hideko
  • Seo, Satoshi

Abstract

A novel organic compound that is highly convenient, useful, or reliable is provided. The organic compound is represented by General Formula (G0) below. A novel organic compound that is highly convenient, useful, or reliable is provided. The organic compound is represented by General Formula (G0) below. A novel organic compound that is highly convenient, useful, or reliable is provided. The organic compound is represented by General Formula (G0) below. Note that in General Formula (G0), R101 to R111 each independently represent hydrogen or an alkyl group having 1 to 6 carbon atoms, n is 1 or 2, and L represents a ligand represented by General Formula (L0). A novel organic compound that is highly convenient, useful, or reliable is provided. The organic compound is represented by General Formula (G0) below. Note that in General Formula (G0), R101 to R111 each independently represent hydrogen or an alkyl group having 1 to 6 carbon atoms, n is 1 or 2, and L represents a ligand represented by General Formula (L0). A novel organic compound that is highly convenient, useful, or reliable is provided. The organic compound is represented by General Formula (G0) below. Note that in General Formula (G0), R101 to R111 each independently represent hydrogen or an alkyl group having 1 to 6 carbon atoms, n is 1 or 2, and L represents a ligand represented by General Formula (L0). In General Formula (L0), R201 to R208 each independently represent hydrogen, deuterium, or an alkyl group having 1 to 6 carbon atoms, and some or all of hydrogen atoms of the alkyl group may be substituted by deuterium.

IPC Classes  ?

  • C07F 15/00 - Compounds containing elements of Groups 8, 9, 10 or 18 of the Periodic System
  • H10K 85/30 - Coordination compounds

98.

DISPLAY DEVICE

      
Application Number 18134206
Status Pending
Filing Date 2023-04-13
First Publication Date 2023-08-10
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Eguchi, Shingo
  • Kuwabara, Hideaki
  • Yokomizo, Kazune

Abstract

A semiconductor device including a large display portion with improved portability is provided. The display device includes a first display panel, a second display panel, and an adhesive layer. The area of the second display panel is larger than the area of the first display panel. The first display panel includes a first substrate, a second substrate, and a reflective liquid crystal element and a first transistor each positioned between the first substrate and the second substrate. The second display panel includes a first resin layer having flexibility, a second resin layer having flexibility, and a light-emitting element and a second transistor each positioned between the first resin layer and the second resin layer. The liquid crystal element has a function of reflecting light toward the second substrate side. The light-emitting element has a function of emitting light toward the second resin layer side. The first substrate and part of the second resin layer are bonded to each other with the adhesive layer.

IPC Classes  ?

  • G02F 1/1333 - Constructional arrangements
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • G09F 9/46 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character is selected from a number of characters arranged one behind the other
  • H01L 29/786 - Thin-film transistors
  • H05B 33/02 - Electroluminescent light sources - Details
  • H10K 59/50 - OLEDs integrated with light modulating elements, e.g. with electrochromic elements, photochromic elements or liquid crystal elements
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers

99.

DISPLAY UNIT, DISPLAY MODULE, AND ELECTRONIC DEVICE

      
Application Number 18134638
Status Pending
Filing Date 2023-04-14
First Publication Date 2023-08-10
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kamada, Taisuke
  • Hatsumi, Ryo
  • Kubota, Daisuke
  • Hashimoto, Naoaki
  • Suzuki, Tsunenori
  • Osaka, Harue
  • Seo, Satoshi

Abstract

An object is to provide a highly reliable display unit having a function of sensing light. The display unit includes a light-receiving device and a light-emitting device. The light-receiving device includes an active layer between a pair of electrodes. The light-emitting device includes a hole-injection layer, a light-emitting layer, and an electron-transport layer between a pair of electrodes. The light-receiving device and the light-emitting device share one of the electrodes, and may further share another common layer between the pair of electrodes. The hole-injection layer is in contact with an anode and contains a first compound and a second compound. The electron-transport property of the electron-transport layer is low; hence, the light-emitting layer is less likely to have excess electrons. Here, the first compound is the material having a property of accepting electrons from the second compound.

IPC Classes  ?

  • H10K 65/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element and at least one organic radiation-sensitive element, e.g. organic opto-couplers
  • H10K 39/32 - Organic image sensors
  • H10K 50/16 - Electron transporting layers
  • H10K 50/17 - Carrier injection layers
  • H10K 50/86 - Arrangements for improving contrast, e.g. preventing reflection of ambient light
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/40 - OLEDs integrated with touch screens

100.

SEMICONDUCTOR DEVICE, MEMORY DEVICE, AND ELECTRONIC DEVICE

      
Application Number 18135779
Status Pending
Filing Date 2023-04-18
First Publication Date 2023-08-10
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Onuki, Tatsuya
  • Matsuzaki, Takanori
  • Kato, Kiyoshi
  • Yamazaki, Shunpei

Abstract

A memory device in which bit line parasitic capacitance is reduced is provided. The memory device includes a sense amplifier electrically connected to a bit line and a memory cell array stacked over the sense amplifier. The memory cell array includes a plurality of memory cells. The plurality of memory cells are each electrically connected to a bit line. A portion for leading the bit lines is not provided in the memory cell array. Thus, the bit line can be shortened and the bit line parasitic capacitance is reduced.

IPC Classes  ?

  • G11C 11/4091 - Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
  • G11C 5/02 - Disposition of storage elements, e.g. in the form of a matrix array
  • G11C 5/06 - Arrangements for interconnecting storage elements electrically, e.g. by wiring
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
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