A semiconductor device with favorable electric characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, an oxide semiconductor layer, and first to third conductive layers. The oxide semiconductor layer includes a region in contact with the first insulating layer, the first conductive layer is connected to the oxide semiconductor layer, and the second conductive layer is connected to the oxide semiconductor layer. The second insulating layer includes a region in contact with the oxide semiconductor layer, and the third conductive layer includes a region in contact with the second insulating layer. The oxide semiconductor layer includes first to third regions. The first region and the second region are separated from each other, and the third region is located between the first region and the second region. The third region and the third conductive layer overlap with each other with the second insulating layer located therebetween. The first region and the second region include a region having a higher carbon concentration than the third region.
Provided is a positive electrode active material for a lithium ion secondary battery having favorable cycle characteristics and high capacity. A covering layer containing aluminum and a covering layer containing magnesium are provided on a superficial portion of the positive electrode active material. The covering layer containing magnesium exists in a region closer to a particle surface than the covering layer containing aluminum is. The covering layer containing aluminum can be formed by a sol-gel method using an aluminum alkoxide. The covering layer containing magnesium can be formed as follows: magnesium and fluorine are mixed as a starting material and then subjected to heating after the sol-gel step, so that magnesium is segregated.
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
H01M 4/131 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
3.
GRAPHENE AND POWER STORAGE DEVICE, AND MANUFACTURING METHOD THEREOF
The formation method of graphene includes the steps of forming a layer including graphene oxide over a first conductive layer; and supplying a potential at which the reduction reaction of the graphene oxide occurs to the first conductive layer in an electrolyte where the first conductive layer as a working electrode and a second conductive layer with a as a counter electrode are immersed. A manufacturing method of a power storage device including at least a positive electrode, a negative electrode, an electrolyte, and a separator includes a step of forming graphene for an active material layer of one of or both the positive electrode and the negative electrode by the formation method.
A memory device that operates at high speed is provided.
A memory device that operates at high speed is provided.
The memory device includes first and second memory cells, first and second bit lines, first and second switches, and a sense amplifier. The sense amplifier comprises a first node and a second node. The first memory cell is electrically connected to the first node through the first bit line and the first switch, and the second memory cell is electrically connected to the second node through the second bit line and the second switch. The sense amplifier amplifies the potential difference between the first node and the second node. The first memory cell and the second memory cell include an oxide semiconductor in a channel formation region.
G11C 5/06 - Arrangements for interconnecting storage elements electrically, e.g. by wiring
G11C 11/4074 - Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
G11C 11/4091 - Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
A novel organic compound is provided. Alternatively, an organic compound that emits light with favorable chromaticity is provided. Alternatively, an organic compound that emits blue light with favorable chromaticity is provided. Alternatively, a light-emitting element with favorable emission efficiency is provided. Alternatively, an organic compound with an excellent carrier-transport property is provided. The organic compound includes any of a substituted or unsubstituted dibenzofurobisbenzofuran skeleton, a substituted or unsubstituted dibenzothienobisbenzothiophene skeleton, a substituted or unsubstituted benzobisbenzothienobenzofuran skeleton, and a substituted or unsubstituted dibenzothienobisbenzofuran skeleton and one or two amino groups. In the organic compound, the amino group includes a substituted or unsubstituted heteroaryl group and any of a substituted or unsubstituted aromatic hydrocarbon group having 6 to 25 carbon atoms and a substituted or unsubstituted heteroaryl group having 5 to 25 carbon atoms.
A semiconductor device with a small variation in transistor characteristics is provided. The semiconductor device includes a first device layer to an n-th (n is a natural number of 2 or more) device layer, each of which includes a first barrier insulating film, a second barrier insulating film, a third barrier insulating film, an oxide semiconductor device, a first conductor, and a second conductor. In each of the first device layer to the n-th device layer, the oxide semiconductor device is placed over the first barrier insulating film, the second barrier insulating film is placed to cover the oxide semiconductor device, the first conductor is placed so as to be electrically connected to the oxide semiconductor device through an opening formed in the second barrier insulating film, the second conductor is placed over the first conductor, the third barrier insulating film is placed over the second conductor and the second barrier insulating film, and the first barrier insulating film to the third barrier insulating film have a function of inhibiting diffusion of hydrogen.
Provided is a semiconductor device that can be miniaturized or highly integrated. According to the present invention, a semiconductor device includes a metal oxide, a first conductor and a second conductor that are on the metal oxide, a first insulator that is on the first conductor and the second conductor, a second insulator that is on the first insulator, a third insulator that is on the metal oxide between the first conductor and the second conductor, a third conductor that is on the third insulator, a fourth conductor that is on the third conductor and is electrically connected to the third conductor, a fourth insulator that is on the fourth conductor, a fifth insulator that is on the fourth insulator, and a fifth conductor that has a region that coincides with the fourth conductor. The metal oxide has a first region that coincides with the first conductor and extends in a first direction. An end part of the metal oxide is at an end part of the first conductor in the first region. The first direction is parallel to the extension direction of the fifth conductor.
H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
H01L 21/3205 - Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H10B 12/00 - Dynamic random access memory [DRAM] devices
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
H10B 99/00 - Subject matter not provided for in other groups of this subclass
The present invention provides a high definition display device. A first insulation layer covering an end of a pixel electrode is formed; a first layer overlapping a first pixel electrode and a portion of the first insulation layer is formed, and a second pixel electrode and another portion of the first insulation layer are exposed; a second layer overlapping the second pixel electrode and the other portion of the first insulation layer is formed; a second insulation layer covering the first insulation layer is formed; a resin layer overlapping the first insulation layer is formed upon the second insulation layer; and a common electrode is formed so as to cover a first film, a second film, and the resin layer. The first film includes a first light emitting material that emits first light, and the second film includes a second light emitting material that emits second light differing from the first light.
H10K 71/20 - Changing the shape of the active layer in the devices, e.g. patterning
G09F 9/00 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
H10K 59/122 - Pixel-defining structures or layers, e.g. banks
The present invention has a first memory cell, a second memory cell on the first memory cell, a first conductor, and a second conductor on the first conductor, the first memory cell and the second memory cell each having a transistor, a capacitive element, and a first insulator on the transistor, the transistor having a metal oxide, a third conductor, fourth conductor, and second insulator on the metal oxide, a fifth conductor on the second insulator, a third insulator under the metal oxide, and a sixth conductor under the third insulator, the capacitive element having a seventh conductor, a fourth insulator on the seventh conductor, and an eighth conductor on the fourth insulator, the fourth conductor and the seventh conductor being in contact via an opening provided in the first insulator, the first conductor and the second conductor each having a portion in contact with the third conductor, one side end part of the third conductor substantially coinciding with one side end part of the metal oxide, and one side end part of the fourth conductor substantially coinciding with the other side end part of the metal oxide.
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
10.
SECONDARY BATTERY, ELECTRONIC DEVICE, VEHICLE, AND METHOD OF MANUFACTURING POSITIVE ELECTRODE ACTIVE MATERIAL
A positive electrode active material having a crystal structure that is unlikely to be broken by repeated charging and discharging is provided. A positive electrode active material with high charge and discharge capacity is provided. A projection is provided on the surface of the positive electrode active material. The projection preferably contains zirconium and yttrium and is a rectangular solid. The projection preferably has a crystal structure that is tetragonal, cubic, or a mixture of two phases, tetragonal and cubic. In the positive electrode active material, the transition metal is one or two or more selected from cobalt, nickel, and manganese, and the additive elements are at least two or more selected from magnesium, fluorine, aluminum, zirconium, and yttrium.
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
H01M 4/505 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of manganese of mixed oxides or hydroxides containing manganese for inserting or intercalating light metals, e.g. LiMn2O4 or LiMn2OxFy
H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
A display device having both a touch detection function and a function of capturing an image of a shape of a fingerprint or a vein is provided. The display device includes a first light-emitting element, a second light-emitting element, a light-receiving element, and a light-blocking layer. The first light-emitting element and the light-receiving element are arranged on the same plane. The light-blocking layer is provided above the first light-emitting element and the light-receiving element. The second light-emitting element is provided above the light-blocking layer. The first light-emitting element has a function of emitting visible light upward. The second light-emitting element has a function of emitting invisible light upward. The light-receiving element is a photoelectric conversion element having sensitivity to visible light and invisible light. In a plan view, the light-blocking layer includes a portion positioned between the first light-emitting element and the light-receiving element. In the plan view, the second light-emitting element overlaps with the light-blocking layer and is positioned inside the outline of the light-blocking layer.
A display apparatus with a high aperture ratio can be provided. A display apparatus with a personal authentication function can be provided. A display apparatus having high display quality can be provided. A highly reliable display apparatus can be provided. A display apparatus that can have a higher resolution can be provided. A display apparatus with low power consumption can be provided. An imaging device includes a pixel electrode, a first layer over the pixel electrode, an insulating layer covering part of the top surface of the first layer, and a common electrode covering the first layer and the insulating layer, and the first layer includes a photoelectric conversion layer.
H10K 59/122 - Pixel-defining structures or layers, e.g. banks
G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
A semiconductor device with a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening, a first conductor that is over the first insulator and includes a second opening, a second insulator that is over the first insulator and includes a third opening, and an oxide penetrating the first opening, the second opening, and the third opening. The oxide includes a first region at least in the first opening, a second region at least in the second opening, and a third region at least in the third opening. The resistances of the first region and the third region are lower than the resistance of the second region.
H10B 43/27 - EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
H10B 43/10 - EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
H10B 43/35 - EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
H10B 43/40 - EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
H10B 43/50 - EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
An object of the present invention is to provide a semiconductor device having a novel structure in which in a data storing time, stored data can be stored even when power is not supplied, and there is no limitation on the number of writing. A semiconductor device includes a first transistor including a first source electrode and a first drain electrode; a first channel formation region for which an oxide semiconductor material is used and to which the first source electrode and the first drain electrode are electrically connected; a first gate insulating layer over the first channel formation region; and a first gate electrode over the first gate insulating layer. One of the first source electrode and the first drain electrode of the first transistor and one electrode of a capacitor are electrically connected to each other.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/84 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
H10B 41/30 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , , or
15.
LITHIUM ION BATTERY, ELECTRONIC DEVICE, AND VEHICLE
A lithium ion battery having excellent charge characteristics and discharge characteristics even in a low-temperature environment is provided. The lithium ion battery includes a positive electrode active material and an electrolyte. The positive electrode active material contains cobalt, oxygen, magnesium, aluminum, and nickel. The electrolyte contains lithium hexafluorophosphate, ethylene carbonate, ethyl methyl carbonate, and dimethyl carbonate. Second discharge capacity of the lithium ion battery is higher than or equal to 70% of first discharge capacity. The first discharge capacity is obtained by performing first charge and first discharge at 20° C., and the second discharge capacity is obtained by performing second charge and second discharge at −40° C. The first discharge and the second discharge are constant current discharge with 20 mA/g per positive electrode active material weight.
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
H01M 10/0569 - Liquid materials characterised by the solvents
H01M 4/131 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
A semiconductor device includes first and second transistors having the same conductivity type and a circuit. One of a source and a drain of the first transistor is electrically connected to that of the second transistor. First and third potentials are supplied to the circuit through respective wirings. A second potential and a first clock signal are supplied to the others of the sources and the drains of the first and second transistors, respectively. A second clock signal is supplied to the circuit. The third potential is higher than the second potential which is higher than the first potential. A fourth potential is equal to or higher than the third potential. The first clock signal alternates the second and fourth potentials and the second clock signal alternates the first and third potentials. The circuit controls electrical connections between gates of the first and second transistors and the wirings.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
G02F 1/1334 - Constructional arrangements based on polymer-dispersed liquid crystals, e.g. microencapsulated liquid crystals
G02F 1/1337 - Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
G09G 3/3258 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
An object of one embodiment of the present invention is to provide a more convenient highly reliable light-emitting device which can be used for a variety of applications. Another object of one embodiment of the present invention is to manufacture, without complicating the process, a highly reliable light-emitting device having a shape suitable for its intended purpose. In a manufacturing process of a light-emitting device, a light-emitting panel is manufactured which is at least partly curved by processing the shape to be molded after the manufacture of an electrode layer and/or an element layer, and a protective film covering a surface of the light-emitting panel which is at least partly curved is formed, so that a light-emitting device using the light-emitting panel has a more useful function and higher reliability.
The present invention provides a lithium ion battery which comprises a novel electrolyte or the like. A lithium ion battery according to the present invention is provided with: a positive electrode active material that contains nickel, cobalt and manganese; and an electrolyte that contains a fluorinated cyclic carbonate and a fluorinated chain carbonate. With respect to this lithium ion battery, the discharge capacity that is obtained by charging a half cell, which comprises the positive electrode active material and the electrolyte, with a constant current at a rate of 0.1 C until the voltage reaches 4.5 V, then charging the half cell with a constant voltage of 4.5 V until the current value falls to 0.05 C in an environment with an ambient temperature of 25°C, and subsequently discharging the half cell with a constant current at a rate of 0.1 C until the voltage falls to 2.5 V in an environment with an ambient temperature of -40°C is equal to or greater than 50% of the discharge capacity that is obtained by arranging the half cell in an environment with an ambient temperature of 25°C.
H01M 4/505 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of manganese of mixed oxides or hydroxides containing manganese for inserting or intercalating light metals, e.g. LiMn2O4 or LiMn2OxFy
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
H01M 10/0567 - Liquid materials characterised by the additives
H01M 10/0569 - Liquid materials characterised by the solvents
H01M 50/414 - Synthetic resins, e.g. .thermoplastics or thermosetting resins
A semiconductor device that can be miniaturized or highly integrated is provided.
A semiconductor device that can be miniaturized or highly integrated is provided.
The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
20.
Light-Emitting Device, Light-Emitting Apparatus, Electronic Device, and Lighting Device
A novel light-emitting device is provided. Alternatively, a light-emitting device with favorable emission efficiency is provided. Alternatively, a light-emitting device with a favorable lifetime is provided. Alternatively, a light-emitting device with a low driving voltage is provided. Provided is a light-emitting device including an anode, a cathode, and a layer including an organic compound that is positioned between the anode and the cathode, in which the layer including the organic compound includes a first layer, a second layer, and a light-emitting layer in this order from the anode side, the first layer includes a first substance and a second substance, the second layer includes a third substance, the first substance is an organic compound a HOMO level of which is higher than or equal to -5.8 eV and lower than or equal to -5.4 eV, the second substance is a substance that has an electron-acceptor property with respect to the first substance, and the third substance is an organic compound having a structure in which at least two substituents comprising carbazole rings are bonded to a naphthalene ring.
To provide a display device capable of displaying a plurality of images by superimposition using a plurality of memory circuits provided in a pixel. A plurality of memory circuits are provided in a pixel, and signals corresponding to images for superimposition are retained in each of the plurality of memory circuits. In the pixel, the signals corresponding to the images for superimposition are added to each of the plurality of memory circuits. The signals are added to the signals retained in the memory circuits by capacitive coupling. A display element can display an image corresponding to a signal in which a signal written to a pixel through a wiring is added to the signals retained in the plurality of memory circuits. Reduction in the amount of arithmetic processing for displaying images by superimposition can be achieved.
G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
22.
POSITIVE ELECTRODE ACTIVE MATERIAL PARTICLE AND MANUFACTURING METHOD OF POSITIVE ELECTRODE ACTIVE MATERIAL PARTICLE
Provided is a positive electrode active material which suppresses a reduction in capacity due to charge and discharge cycles when used in a lithium ion secondary battery. A covering layer is formed by segregation on a superficial portion of the positive electrode active material. The positive electrode active material includes a first region and a second region. The first region exists in an inner portion of the positive electrode active material. The second region exists in a superficial portion of the positive electrode active material and part of the inner portion thereof. The first region includes lithium, a transition metal, and oxygen. The second region includes magnesium, fluorine, and oxygen.
H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
H01G 11/24 - Electrodes characterised by the structural features of powders or particles used therefor
H01G 11/86 - Processes for the manufacture of hybrid or EDL capacitors, or components thereof specially adapted for electrodes
H01G 11/50 - Electrodes characterised by their material specially adapted for lithium-ion capacitors, e.g. for lithium-doping or for intercalation
H01G 11/60 - Liquid electrolytes characterised by the solvent
H01M 4/505 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of manganese of mixed oxides or hydroxides containing manganese for inserting or intercalating light metals, e.g. LiMn2O4 or LiMn2OxFy
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
23.
SEMICONDUCTOR DEVICE, DISPLAY APPARATUS, AND ELECTRONIC DEVICE
A semiconductor device includes first to tenth transistors and first to fourth capacitors. Gates of the first and the fourth transistors are electrically connected to each other. First terminals of the first, second, fifth, and eighth transistors are electrically connected to a first terminal of the fourth capacitor. A second terminal of the fifth transistor is electrically connected to a gate of the sixth transistor and a first terminal of the second capacitor. A second terminal of the eighth transistor is electrically connected to a gate of the ninth transistor and a first terminal of the third capacitor. Gates of the second, seventh, and tenth transistors are electrically connected to first terminals of the third and fourth transistors and a first terminal of the first capacitor. First terminals of the sixth and seventh transistors are electrically connected to a second terminal of the second capacitor.
G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
Provided is a semiconductor device capable of retaining data for a long time. The semiconductor device includes a cell provided with a capacitor, a first transistor, and a second transistor; the capacitor includes a first electrode, a second electrode, and a ferroelectric layer; the ferroelectric layer is provided between the first electrode and the second electrode and polarization reversal occurs by application of a first saturated polarization voltage or a second saturated polarization voltage whose polarity is different from that of the first saturated polarization voltage; and the first electrode, one of a source and a drain of the first transistor, and a gate of the second transistor are electrically connected to one another. In a first period, the first saturated polarization voltage is applied to the ferroelectric layer. In a second period, a voltage having a value between the first saturated polarization voltage and the second saturated polarization voltage is applied to the ferroelectric layer as a data voltage.
G11C 11/22 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
H10B 51/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors characterised by the memory core region
25.
DISPLAY DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE
A display device having both a touch detection function and a function of capturing an image of a shape of a fingerprint or a vein is provided. The display device includes a first substrate, a first light-emitting element, a second light-emitting element, a light-receiving element, a light-blocking layer, a first resin layer, and a second resin layer. The first light-emitting element and the light-receiving element are arranged over the first substrate, and the first resin layer is provided over the first light-emitting element and the light-receiving element. The light-blocking layer is provided over the first resin layer, and the second light-emitting element is provided over the light-blocking layer. The second resin layer is provided over the second light-emitting layer. The first light-emitting element emits visible light upward, and the second light-emitting element emits invisible light upward. The light-receiving element is a photoelectric conversion element having sensitivity to visible light and invisible light. In a plan view, the light-blocking layer includes a portion positioned between the first light-emitting element and the light-receiving element, and the second light-emitting element overlaps with the light-blocking layer and is positioned inside the outline of the light-blocking layer.
A semiconductor device with small variation in characteristics and high reliability is provided. In a method for manufacturing the semiconductor device, an oxide is formed, a first insulator is formed over the oxide, a conductor is formed over the first insulator, a second insulator is formed over the conductor, and heat treatment is performed so that hydrogen in the oxide and the first insulator is moved into and absorbed by the second insulator. The second insulator is formed by a sputtering method.
A method of forming a highly purified positive electrode active material is provided. A method of forming a positive electrode active material whose crystal structure is not easily broken even when charge and discharge are repeated is provided. The method of forming a positive electrode active material including lithium and a transition metal includes a first step of preparing a lithium source and a transition metal source and a second step of crushing and mixing the lithium source and the transition metal source to form a composite material. In the first step, a material with a purity of greater than or equal to 99.99% is prepared as the lithium source and a material with a purity of greater than or equal to 99.9% is prepared as the transition metal source. In the second step, crushing and mixing are performed using dehydrated acetone.
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
28.
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
The present invention provides a semiconductor device which has a high degree of integration. A semiconductor device according to the present invention comprises first and second transistors and an insulating layer. The first transistor comprises: a source electrode; a drain electrode which is arranged on an insulating layer on the source electrode; a first semiconductor layer which is in contact with the upper surface of the source electrode, the inner wall of an opening that is provided in the insulating layer, and the upper surface of the drain electrode; a first gate insulating layer which is in contact with the upper surface and the lateral surface of the first semiconductor layer; and a first gate electrode which is arranged on the first gate insulating layer and has a region that overlaps with the inner wall of the opening. The second transistor comprises: a second semiconductor layer which is arranged on an insulating layer; a source electrode which is in contact with one of the upper surface and the lateral surface of the second semiconductor layer; a drain electrode which is in contact with the other one of the upper surface and the lateral surface of the second semiconductor layer; a second gate insulating layer which is in contact with the upper surface of the second semiconductor layer, the upper surface and the lateral surface of the source electrode, and the upper surface and the lateral surface of the drain electrode; and a second gate electrode which is arranged on the second gate insulating layer. The first semiconductor layer and the second gate electrode are in contact with each other.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H05B 33/10 - Apparatus or processes specially adapted to the manufacture of electroluminescent light sources
H05B 45/60 - Circuit arrangements for operating LEDs comprising organic material, e.g. for operating organic light-emitting diodes [OLED] or polymer light-emitting diodes [PLED]
A novel semiconductor device is provided. The semiconductor device includes an oxide semiconductor as a first semiconductor, silicon as a second semiconductor, and a plurality of memory cells lined up in a first direction; and a memory cell includes a writing transistor and a reading transistor. The first semiconductor and the second semiconductor extend in the first direction, part of the first semiconductor functions as a channel formation region of the writing transistor, and part of the second semiconductor functions as a channel formation region of the reading transistor. The second semiconductor includes a region in contact with a first layer containing a first metal element.
H10B 43/27 - EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
H10B 41/27 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
H10B 41/35 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
H10B 43/35 - EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.
G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
31.
Positive Electrode Active Material, Method for Manufacturing Positive Electrode Active Material, and Secondary Battery
A positive electrode active material which can improve cycle characteristics of a secondary battery is provided. Two kinds of regions are provided in a superficial portion of a positive electrode active material such as lithium cobaltate which has a layered rock-salt crystal structure. The inner region is a non-stoichiometric compound containing a transition metal such as titanium, and the outer region is a compound of representative elements such as magnesium oxide. The two kinds of regions each have a rock-salt crystal structure. The inner layered rock-salt crystal structure and the two kinds of regions in the superficial portion are topotaxy; thus, a change of the crystal structure of the positive electrode active material generated by charging and discharging can be effectively suppressed. In addition, since the outer coating layer in contact with an electrolyte solution is the compound of representative elements which is chemically stable, the secondary battery having excellent cycle characteristics can be obtained.
H01M 4/131 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
H01M 4/1315 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx containing halogen atoms, e.g. LiCoOxFy
H01M 4/1391 - Processes of manufacture of electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
H01M 4/13915 - Processes of manufacture of electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx containing halogen atoms, e.g. LiCoOxFy
H01M 4/134 - Electrodes based on metals, Si or alloys
H01M 4/36 - Selection of substances as active materials, active masses, active liquids
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
H01M 4/86 - Inert electrodes with catalytic activity, e.g. for fuel cells
32.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.
H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
H01L 29/22 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds
H01L 29/221 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds including two or more compounds
H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , , or
H01L 29/26 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups , , , ,
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
A novel electrode is provided. A novel power storage device is provided. A conductor having a sheet-like shape is provided. The conductor has a thickness of greater than or equal to 800 nm and less than or equal to 20 μm. The area of the conductor is greater than or equal to 25 mm2 and less than or equal to 10 m2. The conductor includes carbon and oxygen. The conductor includes carbon at a concentration of higher than 80 atomic % and oxygen at a concentration of higher than or equal to 2 atomic % and lower than or equal to 20 atomic %.
The display defects of a display device are reduced. The display quality of the display device is improved. The display device includes a display panel and a first conductive layer. The display panel includes a display element including a pair of electrodes. An electrode of the pair of electrodes which is closer to one surface of the display panel is supplied with a constant potential. A constant potential is supplied to the first conductive layer. The second conductive layer provided on the other surface of the display panel is in contact with the first conductive layer, whereby the second conductive layer is also supplied with the constant potential. The second conductive layer includes a portion not fixed to the first conductive layer.
G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
H05B 33/26 - Light sources with substantially two-dimensional radiating surfaces characterised by the composition or arrangement of the conductive material used as an electrode
G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
H10K 59/131 - Interconnections, e.g. wiring lines or terminals
H10K 71/80 - Manufacture or treatment specially adapted for the organic devices covered by this subclass using temporary substrates
An imaging device connected to a neural network is provided. An imaging device having a neuron in a neural network includes a plurality of first pixels, a first circuit, a second circuit, and a third circuit. Each of the plurality of first pixels includes a photoelectric conversion element. The plurality of first pixels is electrically connected to the first circuit. The first circuit is electrically connected to the second circuit. The second circuit is electrically connected to the third circuit. Each of the plurality of first pixels generates an input signal of the neuron. The first circuit, the second circuit, and the third circuit function as the neuron. The third circuit includes an interface connected to the neural network.
A triarylamine derivative represented by a general formula (G1) given below is provided. Note that in the formula, Ar represents either a substituted or unsubstituted phenyl group or a substituted or unsubstituted biphenyl group; α represents a substituted or unsubstituted naphthyl group; β represents either hydrogen or a substituted or unsubstituted naphthyl group; n and m each independently represent 1 or 2; and R1 to R8 each independently represent any of hydrogen, an alkyl group having 1 to 6 carbon atoms, or a phenyl group.
A triarylamine derivative represented by a general formula (G1) given below is provided. Note that in the formula, Ar represents either a substituted or unsubstituted phenyl group or a substituted or unsubstituted biphenyl group; α represents a substituted or unsubstituted naphthyl group; β represents either hydrogen or a substituted or unsubstituted naphthyl group; n and m each independently represent 1 or 2; and R1 to R8 each independently represent any of hydrogen, an alkyl group having 1 to 6 carbon atoms, or a phenyl group.
H10K 85/60 - Organic compounds having low molecular weight
C07C 211/54 - Compounds containing amino groups bound to a carbon skeleton having amino groups bound to carbon atoms of six-membered aromatic rings of the carbon skeleton having amino groups bound to two or three six-membered aromatic rings
H05B 33/14 - Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of the electroluminescent material
Provided is a semiconductor device comprising a first conductor (233a1), a second conductor (231), a first transistor (201) on a first insulator, and a second insulator (282) on the first transistor. The first transistor comprises a third conductor (242a) and a fourth conductor (242b) that are each electrically connected to a first metal oxide (230), a third insulator (253, 254) on the first metal oxide, and a fifth conductor (260) on the third insulator. The fourth conductor has a first layer and a second layer thereon. The upper surface of the fifth conductor includes a region in contact with the second insulator. The first conductor includes a portion that is positioned inside an opening of the first insulator, a region in contact with a side of the third conductor, and a portion that is positioned inside an opening of the second insulator. The second conductor includes a region in contact with the second layer, and a portion that is positioned inside the opening of the second insulator. The height of the upper surface of the first conductor and the height of the upper surface of the second conductor are aligned with each other.
H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H10B 12/00 - Dynamic random access memory [DRAM] devices
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
The present invention provides a semiconductor device which comprises a transistor of a very small size. A semiconductor device according to the present invention comprises a transistor, a first insulating layer and a second insulating layer. The transistor comprises: a first semiconductor layer; a first conductive layer; a second conductive layer which has a region that overlaps with the first conductive layer, with the first insulating layer being interposed therebetween; a third conductive layer; and a third insulating layer. The second conductive layer and the first insulating layer have a first opening which reaches the first conductive layer; and the first semiconductor layer is in contact with the upper surface and the lateral surface of the second conductive layer, the lateral surface of the first insulating layer, and the upper surface of the first conductive layer. The third insulating layer is arranged on the first insulating layer, the first semiconductor layer and the second conductive layer. The third conductive layer is arranged on the third insulating layer. The second insulating layer is arranged on the third conductive layer and the third insulating layer.
G02F 1/1335 - Structural association of cells with optical devices, e.g. polarisers or reflectors
G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H05B 33/14 - Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of the electroluminescent material
Provided is a new display apparatus that is excellent in terms of convenience, usefulness, and reliability. This display apparatus includes a first tandem light-emitting device and a second tandem light-emitting device. The first tandem light-emitting device is provided with a first intermediate layer. The second tandem light-emitting device is adjacent to the first tandem light-emitting device and is provided with a second intermediate layer. The second intermediate layer has a space between the first and second intermediate layers and contains an organic compound that exhibits electron injection properties. The organic compound that exhibits electron injection properties is expressed by general formula (G0). In the formula, A is a substituted or unsubstituted C6 to C30 allele backbone or a substituted or unsubstituted C2 to C30 heteroaryl backbone, and n is an integer from 1 to 4.
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, and a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the first oxide semiconductor layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
A novel display device where a light-emitting element is turned on by a triangle wave is provided. One embodiment of the present invention is a method for driving a display device including a first pixel, a second pixel, a first wiring, a second wiring, and a third wiring. The first wiring is electrically connected to the first pixel and the second pixel. The second wiring and the third wiring are electrically connected to the first pixel and the second pixel, respectively. At a first time, the first pixel reaches the maximum luminance corresponding to first display data and the second pixel reaches the maximum luminance corresponding to second display data. The first pixel and the second pixel are initialized at a second time different from the first time by input of a reset signal to the first wiring to stop light emission.
G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
It is an object to provide a semiconductor device which can supply a signal with sufficient amplitude to a scan line while power consumption is kept small. Further, it is an object to provide a semiconductor device which can suppress distortion of a signal supplied to the scan line and shorten a rising time and a falling time while power consumption is kept small. A semiconductor device which includes a plurality of pixels each including a display element and at least one first transistor and a scan line driver circuit supplying a signal for selecting the plurality of pixels to a scan line. A light-transmitting conductive layer is used for a pixel electrode layer of the display element, a gate electrode layer of the first transistor, source and drain electrode layers of the first transistor, and the scan line. The scan line driver circuit includes a second transistor and a capacitor for holding a voltage between a gate electrode layer of the second transistor and a source electrode layer of the second transistor. The source electrode of the second transistor is connected to the scan line.
G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
G11C 19/18 - Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
43.
Positive Electrode Active Material, Method for Manufacturing Positive Electrode Active Material, and Secondary Battery
A positive electrode active material which can improve cycle characteristics of a secondary battery is provided. Two kinds of regions are provided in a superficial portion of a positive electrode active material such as lithium cobaltate which has a layered rock-salt crystal structure. The inner region is a non-stoichiometric compound containing a transition metal such as titanium, and the outer region is a compound of representative elements such as magnesium oxide. The two kinds of regions each have a rock-salt crystal structure. The inner layered rock-salt crystal structure and the two kinds of regions in the superficial portion are topotaxy; thus, a change of the crystal structure of the positive electrode active material generated by charging and discharging can be effectively suppressed. In addition, since the outer coating layer in contact with an electrolyte solution is the compound of representative elements which is chemically stable, the secondary battery having excellent cycle characteristics can be obtained.
H01M 4/131 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
H01M 4/1315 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx containing halogen atoms, e.g. LiCoOxFy
H01M 4/1391 - Processes of manufacture of electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
H01M 4/13915 - Processes of manufacture of electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx containing halogen atoms, e.g. LiCoOxFy
H01M 4/134 - Electrodes based on metals, Si or alloys
H01M 4/36 - Selection of substances as active materials, active masses, active liquids
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
H01M 4/86 - Inert electrodes with catalytic activity, e.g. for fuel cells
44.
Light-Emitting Device, Light-Emitting Apparatus, Electronic Device, and Lighting Device
Provided is an inexpensive light-emitting device with high emission efficiency. Provided is a light-emitting device including an anode, a cathode, an EL layer positioned between the anode and the cathode; the EL layer includes a hole-transport region, a light-emitting layer, and an electron-transport region; the hole-transport region is positioned between the anode and the light-emitting layer; the electron-transport region is positioned between the cathode and the light-emitting layer; the hole-transport region contains any one of a sulfonic acid compound, a fluorine compound, and a metal oxide; the electron-transport region contains an organic compound having an electron-transport property; and an ordinary refractive index of the organic compound having an electron-transport property with respect to light with a wavelength greater than or equal to 455 nm and less than or equal to 465 nm is higher than or equal to 1.50 and lower than or equal to 1.75.
At least part of a fabrication process of a secondary battery is automated. A highly reliable secondary battery is provided. The secondary battery is fabricated by placing a first electrode over a first exterior body; placing a separator over the first electrode; placing a second electrode over the separator; dripping an electrolyte on at least one of the first electrode, the separator, and the second electrode; impregnating the at least one of the first electrode, the separator, and the second electrode with the electrolyte; then placing a second exterior body over the first exterior body to cover the first electrode, the separator, and the second electrode; and sealing the first electrode, the separator, and the second electrode with the first exterior body and the second exterior body. The electrolyte is dripped from a position whose shortest distance from a surface where the electrolyte is dripped is greater than 0 mm and less than or equal to 1 mm.
H01M 10/04 - Construction or manufacture in general
H01M 10/0583 - Construction or manufacture of accumulators with folded construction elements except wound ones, i.e. folded positive or negative electrodes or separators, e.g. with ‘’Z’’-shaped electrodes or separators
46.
MANUFACTURING METHOD OF POSITIVE ELECTRODE ACTIVE MATERIAL
A manufacturing method of a highly purified positive electrode active material is provided. Alternatively, a manufacturing method of a positive electrode active material whose crystal structure is not easily broken even when charging and discharging are repeated is provided. Provided is a manufacturing method of a positive electrode active material containing lithium and a transition metal. The manufacturing method includes a first step of forming a hydroxide containing the transition metal using a basic aqueous solution and an aqueous solution containing the transition metal, a second step of preparing a lithium compound, a third step of mixing the lithium compound and the hydroxide to form a mixture, and a fourth step of heating the mixture to form a composite oxide containing lithium and the transition metal. A material with a purity higher than or equal to 99.99% is prepared as the lithium compound in the second step, and the heating is performed in an oxygen-containing atmosphere with a dew point lower than or equal to −50° C. in the fourth step.
A control system for a secondary battery that effectively performs temperature control of the secondary battery before getting to a charging station, thereby enabling high speed charging, is provided. It relates to a vehicle including a first secondary battery, a second secondary battery, a first temperature control unit, a secondary battery monitoring unit, and an arithmetic unit. The secondary battery monitoring unit acquires remaining amount data of the first secondary battery. The arithmetic unit compares the remaining amount data and a set value. In the case where the remaining amount data is smaller than the set value, the secondary battery monitoring unit acquires the temperature of the first secondary battery. The arithmetic unit calculates an adjustment term required to adjust the temperature of the first secondary battery to a set temperature. The arithmetic unit calculates an arrival term required to get to a set charging station. The first temperature control unit starts adjusting the temperature of the first secondary battery to the set temperature, with electric power fed from the second secondary battery, in the case where the adjustment term is shorter than or equal to the arrival term.
A novel organic compound that is highly convenient, useful, or reliable is provided. An organic compound represented by General Formula (G1) is provided. In General Formula (G1), D1 represents a thiophene-diyl group, a furan-diyl group, a thiophene-containing heteroarylene group, or a furan-containing heteroarylene group; Ar1 and Ar2 each independently represent a heteroarylene group or an arylene group; A1 and A2 each independently represent hydrogen, deuterium, a nitro group, an alkyl group, a halogen, an alkyl halide group, a cyano group, an alkoxy group, a vinyl group, or a formyl group; n1 represents an integer of 1 or more; and m1 and k1 each independently represent an integer of 0 to 3.
A novel organic compound that is highly convenient, useful, or reliable is provided. An organic compound represented by General Formula (G1) is provided. In General Formula (G1), D1 represents a thiophene-diyl group, a furan-diyl group, a thiophene-containing heteroarylene group, or a furan-containing heteroarylene group; Ar1 and Ar2 each independently represent a heteroarylene group or an arylene group; A1 and A2 each independently represent hydrogen, deuterium, a nitro group, an alkyl group, a halogen, an alkyl halide group, a cyano group, an alkoxy group, a vinyl group, or a formyl group; n1 represents an integer of 1 or more; and m1 and k1 each independently represent an integer of 0 to 3.
C07D 519/00 - Heterocyclic compounds containing more than one system of two or more relevant hetero rings condensed among themselves or condensed with a common carbocyclic ring system not provided for in groups or
H10K 85/60 - Organic compounds having low molecular weight
A display device with less light leakage and excellent contrast is provided. A display device having a high aperture ratio and including a large-capacitance capacitor is provided. A display device in which wiring delay due to parasitic capacitance is reduced is provided. A display device includes a transistor over a substrate, a pixel electrode connected to the transistor, a signal line electrically connected to the transistor, a scan line electrically connected to the transistor and intersecting with the signal line, and a common electrode overlapping with the pixel electrode and the signal line with an insulating film provided therebetween. The common electrode includes stripe regions extending in a direction intersecting with the signal line.
A light-emitting element which has low driving voltage and high emission efficiency is provided. The light-emitting element includes, between a pair of electrodes, a hole-transport layer and a light-emitting layer over the hole-transport layer. The light-emitting layer contains a first organic compound having an electron-transport property, a second organic compound having a hole-transport property, and a light-emitting third organic compound converting triplet excitation energy into light emission. A combination of the first organic compound and the second organic compound forms an exciplex. The hole-transport layer contains at least a fourth organic compound whose HOMO level is lower than or equal to that of the second organic compound and a fifth organic compound whose HOMO level is higher than that of the second organic compound.
A semiconductor device having a high storage density is applied in the present invention. The semiconductor device includes a first insulator, a first layer, a second insulator, a second layer, a third insulator, and a third layer layered in this order. Each of the first and third layers has first and second transistors and a first conductor. The second layer has a second conductor. Each of a source and a drain is positioned on a semiconductor layer in the first transistors of the first and third layers, and a gate is positioned above the semiconductor layer. Each of a source and a drain is positioned on a semiconductor layer in the second transistors of the first and third layers, and a gate is positioned above the semiconductor layer. The first conductor in each of the first and third layers electrically connects the top of the source or the top of the drain of the first transistor and the top of the gate of the second transistor. The first conductor of the first layer, the second conductor, and the semiconductor layer of the first transistor of the third layer overlap each other.
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
To provide a light-emitting device with high emission efficiency and high reliability. A light-emitting layer of the light-emitting device includes a first substance emitting light from a doublet excited state based on f-d transition and a second substance that is a fluorescent substance. The longest-wavelength absorption edge among absorption edges in the absorption spectrum of the first substance is positioned at a wavelength shorter than the wavelength of the longest-wavelength absorption edge among absorption edges in the absorption spectrum of the second substance. The first substance has a short exciton lifetime and high exciton generation efficiency, and efficient energy transfer occurs between the first substance and the second substance; thus, the light-emitting device can have high emission efficiency and high reliability.
A semiconductor device which shifts a low-level signal is provided. In an example, a first transistor including a first terminal electrically connected to a first wiring and a second terminal electrically connected to a second wiring, a second transistor including a first terminal electrically connected to a third wiring and a second terminal electrically connected to the second wiring, a third transistor including a first terminal electrically connected to a fourth wiring and a second terminal electrically connected to a gate of the second transistor, a fourth transistor including a first terminal electrically connected to a fifth wiring, a second terminal electrically connected to a gate of the third transistor, and a gate electrically connected to a sixth wiring, and a first switch including a first terminal electrically connected to the third wiring and a second terminal electrically connected to a gate of the first transistor are included.
G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
To improve color reproduction areas in a display device having light-emitting elements. A display region has a plurality of picture elements. Each picture element includes: first and second pixels each including a light-emitting element which has a chromaticity whose x-coordinate in a CIE-XY chromaticity diagram is 0.50 or more; third and fourth pixels each including a light-emitting element which has a chromaticity whose y-coordinate in the diagram is 0.55 or more; and fifth and sixth pixels each including a light-emitting element which has a chromaticity whose x-coordinate and y-coordinate in the diagram are 0.20 or less and 0.25 or less, respectively. The light-emitting elements in the first and second pixels have different emission spectrums from each other; the light-emitting elements in the third and fourth pixels have different emission spectrums from each other, and the light-emitting elements in the fifth and sixth pixels have different emission spectrums from each other.
H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
Provided is a semiconductor device that can be miniaturized or highly integrated. The semiconductor device is provided with a memory cell having a transistor and a capacitor. Either the source electrode or the drain electrode of the transistor is electrically connected to one of the electrodes of the capacitor. A metal oxide can be used for the semiconductor layer of the transistor. An insulator is provided upon the transistor, and an opening having a region that overlaps with the gate electrode of the transistor and either the source electrode or the drain electrode of the transistor is provided in the insulator. The capacitor is provided inside the opening. As a result of the above, the area occupied by the memory cell is reduced while ensuring the capacitance of the capacitor.
H10B 12/00 - Dynamic random access memory [DRAM] devices
H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
Provided is a storage device that enables miniaturization or high integration. This storage device comprises: a memory cell that includes a capacitive element and a transistor on the capacitive element; a first insulator on the capacitive element; and a second insulator on the first insulator. The transistor comprises a first conductor under the first insulator, an oxide semiconductor disposed in contact with the upper surface of the first conductor, a second conductor disposed between the first insulator and the second insulator and in contact with the oxide semiconductor, a third insulator on the oxide semiconductor, and a third conductor on the third insulator. A first opening reaching the first conductor is formed in the first insulator, the second conductor, and the second insulator. At least a part of the oxide semiconductor, at least a part of the third insulator, and at least a part of the third conductor are disposed in the first opening. The capacitive element includes a fourth conductor, a fourth insulator on the fourth conductor, and the first conductor on the fourth insulator.
H10B 12/00 - Dynamic random access memory [DRAM] devices
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
Provided is a semiconductor device capable of being miniaturized or highly integrated. This semiconductor device has first and second transistors, and a capacitor. The first transistor is provided in the same layer as the second transistor, and each of the first and second transistors has second to fourth conductors, a metal oxide, and a first insulator. The third conductor is provided on the second conductor, and has an opening overlapping the second conductor. The metal oxide has a region contacting a side surface of the opening and an upper surface of the second conductor. The first insulator is provided in a recess of the metal oxide, and the fourth conductor is provided in a recess of the first insulator and has a region overlapping the metal oxide with the first insulator therebetween. The capacitor has a fifth conductor, a second insulator on the fifth conductor, and a sixth conductor on the second insulator. The fifth conductor is electrically connected to the second conductor of the first transistor and the fourth conductor of the second transistor.
H10B 10/00 - Static random access memory [SRAM] devices
H10B 12/00 - Dynamic random access memory [DRAM] devices
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
H10B 99/00 - Subject matter not provided for in other groups of this subclass
Provided is a novel semiconductor device. In the semiconductor device, a lateral channel transistor and a vertical channel transistor are combined. A p-channel transistor is composed of the lateral channel transistor, and an n-channel transistor is composed of the vertical channel transistor to thereby achieve a CMOS semiconductor device. An opening is provided in an insulating layer in a region overlapping a gate electrode of the lateral channel transistor, and the vertical channel transistor is formed in the opening. An oxide semiconductor is used in a semiconductor layer of the vertical channel transistor.
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
Provided is a semiconductor device having a novel structure. A first transistor, a second transistor, a third transistor, and a capacitor are included. The first transistor has a function of retaining a first potential corresponding to first data supplied to a gate of the third transistor through the first transistor when being in an off state. The capacitor has a function of changing the first potential retained in the gate of the third transistor into a second potential in accordance with a change in potential corresponding to second data supplied to one electrode of the capacitor. The second transistor has a function of setting a potential of one of a source and a drain of the third transistor to a potential corresponding to a potential of a gate of the second transistor. The third transistor has a function of supplying output current corresponding to a potential of the gate of the third transistor to the other of the source and the drain of the third transistor. The output current is current flowing when the third transistor operates in a subthreshold region.
H10B 12/00 - Dynamic random access memory [DRAM] devices
G11C 11/405 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
G11C 11/54 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
A semiconductor device with high arithmetic performance is provided. The semiconductor device employs the translinear principle, and the semiconductor device includes first to tenth transistors each including a metal oxide in a channel formation region and a first capacitor. A first terminal of the first transistor is electrically connected to a first terminal of the second transistor, a first terminal of the third transistor is electrically connected to a second terminal of the second transistor and a gate of the second transistor through the first capacitor. The second terminal of the second transistor is electrically connected to first terminals of the fourth and the seventh transistors and gates of the fifth and the eighth transistors. A gate of the seventh transistor is electrically connected to first terminals of the fifth and the sixth transistors, and a gate of the tenth transistor is electrically connected to first terminals of the eighth and the ninth transistors.
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
G06F 7/544 - Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using unspecified devices for evaluating functions by calculation
To provide a novel material. In a field-effect transistor including a metal oxide, a channel formation region of the transistor includes a material having at least two different energy band widths. The material includes nano-size particles each with a size of greater than or equal to 0.5 nm and less than or equal to 10 nm. The nano-size particles are dispersed or distributed in a mosaic pattern.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
A display device including a display portion with an extremely high resolution is provided. The display device includes a pixel circuit and a light-emitting element. The pixel circuit includes a first element layer including a first transistor and a second element layer including a second transistor. A channel formation region of the first transistor includes silicon. The first transistor has a function of driving the light-emitting element. The second transistor functions as a switch. A channel formation region of the second transistor includes a metal oxide. The metal oxide functions as a semiconductor. The second element layer is provided over the first element layer.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
G09G 3/3266 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] - Details of drivers for scan electrodes
63.
LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME
Provided is a method to manufacture a liquid crystal display device in which a contact hole for the electrical connection of the pixel electrode and one of the source and drain electrode of a transistor and a contact hole for the processing of a semiconductor layer are formed simultaneously. The method contributes to the reduction of a photography step. The transistor includes an oxide semiconductor layer where a channel formation region is formed.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , , or
Provided is a novel semiconductor device. In this semiconductor device, a first circuit is electrically connected to a second circuit via a first wire; the first circuit is electrically connected to a fourth circuit via a third wire and a fourth wire respectively; the second circuit is electrically connected to a third circuit via a fifth wire; the first circuit has a function of establishing a conductive state or a non-conductive state between the first wire, the second wire, the third wire, and the fourth wire; the third circuit has a function of maintaining potential corresponding to first data; the second circuit has a function of applying the potential corresponding to the first data from the first wire to the fifth wire, a function of maintaining potential corresponding to second data, and a function of amplifying and outputting to the first wire a change in potential of the fifth wire; and the fourth circuit has a function of outputting potential corresponding to the first data or the second data according to a potential difference between the third wire and the fourth wire.
G11C 7/12 - Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
65.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE
A semiconductor device having favorable electrical characteristics is provided. A metal oxide is formed over a substrate by the steps of: introducing a first precursor into a chamber in which the substrate is provided; introducing a first oxidizer after the introduction of the first precursor; introducing a second precursor after the introduction of the first oxidizer; and introducing a second oxidizer after the introduction of the second precursor.
The resolution of a low-resolution image is made high and a stereoscopic image is displayed. Resolution is made high by super-resolution processing. In this case, the super-resolution processing is performed after edge enhancement processing is performed. Accordingly, a stereoscopic image with high resolution and high quality can be displayed. Alternatively, after image analysis processing is performed, edge enhancement processing and super-resolution processing are concurrently performed. Accordingly, processing time can be shortened.
G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
G09G 3/34 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source
67.
SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, MEMORY DEVICE, AND ELECTRONIC DEVICE
A semiconductor device with large memory capacity is provided. A semiconductor device includes first to fourth insulators, a first conductor, a second conductor, and a first semiconductor, and the first semiconductor includes a first surface and a second surface. A first side surface of the first conductor is included on the first surface of the first semiconductor, and a first side surface of the first insulator is included on a second side surface of the first conductor. The second insulator is included in a region including a second side surface and a top surface of the first insulator, a top surface of the first conductor, and the second surface of the first semiconductor. The third insulator is included on a formation surface of the second insulator, and the fourth insulator is included on a formation surface of the third insulator. The second conductor is included in a region overlapping the second surface of the first semiconductor in a region where the fourth insulator is formed. The third insulator has a function of accumulating charge. A tunnel current is induced between the second surface of the first semiconductor and the third insulator with the second insulator therebetween by supply of a potential to the second conductor.
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H10B 41/27 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
H10B 43/27 - EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
68.
INPUT/OUTPUT PANEL, INPUT/OUTPUT DEVICE, AND SEMICONDUCTOR DEVICE
An input/output device includes a first sensor electrode and a second sensor electrode. In addition, the input/output device includes a first electrode and a second electrode which are electrodes for a display element, and a substrate sandwiched between the first sensor electrode and the second sensor electrode. The second sensor electrode is formed concurrently with the first electrode using the same material. The input/output device sensors a change in capacitance of a capacitor formed between the first sensor electrode and the second sensor electrode. Furthermore, a third sensor electrode to which a floating potential is applied may be provided to overlap with the first electrode. In the input/output device, either a liquid crystal element or a light-emitting element may be used, or both the liquid crystal element and the light-emitting element may be used.
A semiconductor device that restores degraded data is provided. The semiconductor device includes a first circuit, a storage portion, and an arithmetic portion. The first circuit includes a current source and a first switch. The storage portion includes a first transistor and a first capacitor. The arithmetic portion includes a second transistor. A first terminal of the first transistor is electrically connected to a control terminal of the first switch, a first terminal of the first switch is electrically connected to an output terminal of the current source, and a second terminal of the first switch is electrically connected to a first terminal of the second transistor. When data retained in the arithmetic portion is restored, the first transistor is turned on, and the data retained in the storage portion is supplied to the control terminal of the first switch through the first transistor. The first switch is brought into an on state or an off state in accordance with the data and supplies current from the current source to the arithmetic portion through the second transistor to supply electric charge to a retention portion of the arithmetic portion.
G11C 11/56 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
Provided is a storage device that includes a novel semiconductor device. The storage device comprises: a memory cell that includes a transistor and a capacitive element; and a conductor. The transistor includes one of a source electrode and a drain electrode, the other of the source electrode and the drain electrode, a first gate insulator, and a first gate electrode. The capacitive element includes one electrode, a dielectric disposed on the one electrode, and another electrode disposed on the dielectric. The upper surface and side surface of one of the source electrode and the drain electrode of the transistor are in contact with the conductor. The upper surface of the other of the source electrode and the drain electrode of the transistor is in contact with the one electrode of the capacitive element. The dielectric comprises a ferroelectric material.
H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
G11C 11/22 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
H10B 12/00 - Dynamic random access memory [DRAM] devices
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
H10B 53/20 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the three-dimensional arrangements, e.g. with cells on different height levels
A light-emitting device with high emission efficiency is provided. A light-emitting device with a low driving voltage is provided. The light-emitting device includes a first electrode, a first layer over the first electrode, a second layer over the first layer, a light-emitting layer over the second layer, and a second electrode over the light-emitting layer. The first layer includes a first organic compound, and the second layer includes a second organic compound. The proportion of carbon atoms forming bonds by the sp3 hybrid orbitals to the total number of carbon atoms in the first organic compound is higher than or equal to 23 percent and lower than or equal to 55 percent. The second organic compound contains fluorine.
An inexpensive light-emitting device with high emission efficiency is provided. A light-emitting device including an anode, a cathode, and an EL layer positioned between the anode and the cathode is provided. The EL layer includes a hole-transport region, a light-emitting layer, and an electron-transport region. The hole-transport region is positioned between the anode and the light-emitting layer. The electron-transport region is positioned between the cathode and the light-emitting layer. The hole-transport region contains a heteropoly acid and an organic compound having a π-electron rich aromatic ring or contains a heteropoly acid and an organic compound having a π-electron rich heteroaromatic ring. The electron-transport region contains an organic compound with an electron-transport property. The ordinary refractive index of the organic compound with an electron-transport property is higher than or equal to 1.50 and lower than or equal to 1.75 for light with a wavelength of greater than or equal to 455 nm and less than or equal to 465 nm.
H10K 85/60 - Organic compounds having low molecular weight
H10K 50/858 - Arrangements for extracting light from the devices comprising refractive means, e.g. lenses
H10K 71/13 - Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
C07D 251/24 - Heterocyclic compounds containing 1,3,5-triazine rings not condensed with other rings having three double bonds between ring members or between ring members and non-ring members with hydrogen or carbon atoms directly attached to at least one ring carbon atom to three ring carbon atoms
A control circuit of a secondary battery with a novel structure is provided. The control circuit of a secondary battery includes a first transistor, a first voltage generation circuit generating a first voltage, and a second voltage generation circuit generating a second voltage. The first voltage generation circuit includes a second transistor and a first capacitor. The second voltage generation circuit includes a third transistor and a second capacitor. The difference between the first voltage and the second voltage is set in accordance with the threshold voltage of the first transistor. When the first transistor includes a back gate, a voltage retention circuit having a function of retaining the voltage of the back gate is included. The voltage retention circuit includes a fourth transistor and a third capacitor. The third capacitor includes a ferroelectric layer between a pair of electrodes. The third capacitor retains a voltage applied to the back gate by being applied with a voltage for polarization inversion in the ferroelectric layer.
G05F 3/24 - Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode-transistor combinations wherein the transistors are of the field-effect type only
H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
74.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Provided are a transistor which has electrical characteristics requisite for its purpose and uses an oxide semiconductor layer and a semiconductor device including the transistor. In the bottom-gate transistor in which at least a gate electrode layer, a gate insulating film, and the semiconductor layer are stacked in this order, an oxide semiconductor stacked layer including at least two oxide semiconductor layers whose energy gaps are different from each other is used as the semiconductor layer. Oxygen and/or a dopant may be added to the oxide semiconductor stacked layer.
H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , , or
75.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device in which fluctuation in electric characteristics due to miniaturization is less likely to be caused is provided. The semiconductor device includes an oxide semiconductor film including a first region, a pair of second regions in contact with side surfaces of the first region, and a pair of third regions in contact with side surfaces of the pair of second regions; a gate insulating film provided over the oxide semiconductor film; and a first electrode that is over the gate insulating film and overlaps with the first region. The first region is a CAAC oxide semiconductor region. The pair of second regions and the pair of third regions are each an amorphous oxide semiconductor region containing a dopant. The dopant concentration of the pair of third regions is higher than the dopant concentration of the pair of second regions.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/477 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , , or
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
One embodiment of the present invention provides a highly reliable display device. In particular, a display device to which a signal or a power supply potential can be supplied stably is provided. Further, a bendable display device to which a signal or a power supply potential can be supplied stably is provided. The display device includes, over a flexible substrate, a display portion, a plurality of connection terminals to which a signal from an outside can be input, and a plurality of wirings. One of the plurality of wirings electrically connects one of the plurality of connection terminals to the display portion. The one of the plurality of wirings includes a first portion including a plurality of separate lines and a second portion in which the plurality of lines converge.
Provided is a semiconductor device which can operate stably even in the case where a transistor thereof is a depletion transistor. The semiconductor device includes a first transistor for supplying a first potential to a first wiring, a second transistor for supplying a second potential to the first wiring, a third transistor for supplying a third potential at which the first transistor is turned on to a gate of the first transistor and stopping supplying the third potential, a fourth transistor for supplying the second potential to the gate of the first transistor, and a first circuit for generating a second signal obtained by offsetting a first signal. The second signal is input to a gate of the fourth transistor. The potential of a low level of the second signal is lower than the second potential.
G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
G11C 19/18 - Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
H03K 19/0185 - Coupling arrangements; Interface arrangements using field-effect transistors only
H03K 17/06 - Modifications for ensuring a fully conducting state
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H03K 17/081 - Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
78.
SEMICONDUCTOR DEVICE, STORAGE DEVICE, AND ELECTRONIC DEVICE
A semiconductor device having a high storage density is applied in the present invention. This semiconductor device has a first storage layer and a second storage layer that are layered in order. The first storage layer and the second storage layer each have a second insulator to sixth insulator, an oxide, and a first conductor to a fourth conductor. A first insulator on each of the first storage layer and the second storage layer has the second insulator and the oxide that are layered in order. The first conductor and the second conductor are positioned, in regions that differ from each other, on the first insulator, the second insulator, and the oxide. The third insulator is positioned on the first conductor, the second conductor, and the first insulator, and the fourth insulator is positioned on the third insulator. The fifth insulator is positioned on the oxide and the side surface of the fourth insulator, and the third conductor is positioned on the fifth insulator. The sixth insulator is positioned on the second conductor and the side surface of the fourth insulator, and the fourth conductor is positioned on the sixth insulator. Additionally, the fourth conductor of the first storage layer overlaps the oxide and the second insulator of the second storage layer.
Provided is a semiconductor device that enables miniaturization and high integration. The semiconductor device has: a first transistor that includes a first conductor, a first insulator, a first metal oxide, a second insulator, and a second conductor layered in this order from the bottom, and a third conductor and a fourth conductor covering part of the upper surface and the sides surfaces of the first metal oxide; a second transistor that includes a fifth conductor, a first insulator, a second metal oxide, a third insulator, and a sixth conductor layered in this order from the bottom, and a seventh conductor and an eighth conductor covering part of the upper surface and the side surfaces of the second metal oxide; and a third transistor that includes a ninth conductor, a first insulator, a second metal oxide, a fourth insulator, a tenth conductor, and an eighth conductor layered in this order from the bottom, and an eleventh conductor covering part of the upper surface and the side surfaces of the second metal oxide. One of the electrodes of a capacitor containing a material capable of exhibiting ferroelectric properties is electrically connected with the third conductor and the sixth conductor.
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
G11C 11/22 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
Provided is a semiconductor device having a novel structure. This semiconductor device comprises: a first flip-flop having a function to hold input data in accordance with a clock signal and to output first output data that is in accordance with the input data; a second flip-flop having a function to hold the input data in accordance with the clock signal and to output second output data that is in accordance with the input data; a third flip-flop having a function to hold the input data in accordance with the clock signal and to output third output data that is in accordance with the input data; a majority vote circuit to which the first output data to the third output data are inputted and that has a function to determine the logic value that is the most abundant in the first output data to the third output data by majority vote and to output the data of the determined logic value as fourth output data; and a switch circuit to which the first output data and the fourth output data are inputted and that has a function to output output data that is in accordance with the first output data or the fourth output data in accordance with a switch signal.
The present invention provides an optical device that is thin and has high light utilization efficiency and little chromatic aberration, and a compact electronic apparatus having the optical device. This thin optical device comprises a first reflective polarizing plate, a lens, a rotator, a retardation plate, and a second reflective polarizing plate. This thin optical device can be formed by utilizing rotation of the polarization plane of linearly polarized light by the rotator and the selective reflection characteristic of circularly polarized light of the second reflective polarizing plate. This optical device has the characteristic of high light utilization efficiency since it does not use a half mirror. The chromatic aberration of an optical system can be reduced by causing the second reflective polarizing plate to have a layered structure.
G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
G02F 1/1335 - Structural association of cells with optical devices, e.g. polarisers or reflectors
G02F 1/13363 - Birefringent elements, e.g. for optical compensation
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
A material having favorable ferroelectricity is provided. An embodiment of the present invention is a metal oxide film including a first layer and a second layer. The first layer contains first oxygen and hafnium, and the second layer contains second oxygen and zirconium. The hafnium and the zirconium are bonded to each other with the first oxygen positioned therebetween, and the second oxygen is bonded to the zirconium.
To provide a light-emitting element with high emission efficiency and low driving voltage. The light-emitting element includes a guest material and a host material. A HOMO level of the guest material is higher than a HOMO level of the host material. An energy difference between the LUMO level and a HOMO level of the guest material is larger than an energy difference between the LUMO level and a HOMO level of the host material. The guest material has a function of converting triplet excitation energy into light emission. An energy difference between the LUMO level of the host material and the HOMO level of the guest material is larger than or equal to energy of light emission of the guest material.
To provide a circuit used for a shift register or the like. The basic configuration includes first to fourth transistors and four wirings. The power supply potential VDD is supplied to the first wiring and the power supply potential VSS is supplied to the second wiring. A binary digital signal is supplied to each of the third wiring and the fourth wiring. An H level of the digital signal is equal to the power supply potential VDD, and an L level of the digital signal is equal to the power supply potential VSS. There are four combinations of the potentials of the third wiring and the fourth wiring. Each of the first transistor to the fourth transistor can be turned off by any combination of the potentials. That is, since there is no transistor that is constantly on, deterioration of the characteristics of the transistors can be suppressed.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
H01L 21/84 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
H10K 59/131 - Interconnections, e.g. wiring lines or terminals
H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
Display unevenness in a display panel is suppressed. A display panel with a high aperture ratio of a pixel is provided. The display panel includes a first pixel electrode, a second pixel electrode, a third pixel electrode, a first light-emitting layer, a second light-emitting layer, a third light-emitting layer, a first common layer, a second common layer, a common electrode, and an auxiliary wiring. The first common layer is positioned over the first pixel electrode and the second pixel electrode. The first common layer has a portion overlapping with the first light-emitting layer and a portion overlapping with the second light-emitting layer. The second common layer is positioned over the third pixel electrode. The second common layer has a portion overlapping with the third light-emitting layer. The common electrode has a portion overlapping with the first pixel electrode with the first common layer and the first light-emitting layer provided therebetween, a portion overlapping with the second pixel electrode with the first common layer and the second light-emitting layer provided therebetween, a portion overlapping with the third pixel electrode with the second common layer and the third light-emitting layer provided therebetween, and a portion in contact with a top surface of the auxiliary wiring.
Provided is a storage device that enables miniaturization and high integration. The storage device has a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. The first capacitor has a first electrode and a second electrode. The second capacitor has a first electrode and a third electrode. The source or the drain of the first transistor is electrically connected with the second electrode. The source or the drain of the second transistor is electrically connected with the third electrode. The gate of the third transistor is electrically connected with the second electrode. The first electrode has parts overlapping with each of the second electrode, the third electrode, the first transistor, and the second transistor, and a fixed potential or a ground potential is applied to the first electrode.
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
H10B 99/00 - Subject matter not provided for in other groups of this subclass
Provided is a secondary battery capable of suppressing deterioration of electrodes. Provided is a secondary battery having flexibility. This secondary battery includes a positive electrode, a negative electrode, a separator, a first spacer, a second spacer, a positive electrode lead, a negative electrode lead, and an exterior body. The positive electrode has a first portion coated with a positive electrode active material, and a second portion where a positive electrode current collector is exposed. The negative electrode has a third portion coated with a negative electrode active material, and a fourth portion where a negative electrode current collector is exposed. The first portion, the third portion, and the separator overlap each other at a laminated section. The positive electrode lead is connected to the second portion at a position overlapping the laminated section, and the negative electrode lead is connected to the fourth portion at a position overlapping the laminated section. The first spacer is in contact with the exterior body in a region surrounded by one end of the laminated section, the positive electrode lead, and the negative electrode lead. The second spacer has a region sandwiched by the laminated section and the second portion, a region sandwiched by the laminated section and the fourth portion, and a region connected to the first spacer.
H01M 10/04 - Construction or manufacture in general
H01G 11/82 - Fixing or assembling a capacitive element in a housing, e.g. mounting electrodes, current collectors or terminals in containers or encapsulations
H01M 50/131 - Primary casings, jackets or wrappings of a single cell or a single battery characterised by physical properties, e.g. gas-permeability or size
H01M 50/474 - Spacing elements inside cells other than separators, membranes or diaphragms; Manufacturing processes thereof characterised by their position inside the cells
H01M 50/477 - Spacing elements inside cells other than separators, membranes or diaphragms; Manufacturing processes thereof characterised by their shape
H01M 50/489 - Separators, membranes, diaphragms or spacing elements inside the cells, characterised by their physical properties, e.g. swelling degree, hydrophilicity or shut down properties
H01M 50/533 - Electrode connections inside a battery casing characterised by the shape of the leads or tabs
H01M 50/54 - Connection of several leads or tabs of plate-like electrode stacks, e.g. electrode pole straps or bridges
88.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
The present invention provides a semiconductor device having a transistor of very small size. The semiconductor device comprises: a semiconductor layer; a first electrically conductive layer; a second electrically conductive layer; a third electrically conductive layer; a first insulation layer; and a second insulation layer. The first insulation layer is provided on the first electrically conductive layer. The first insulation layer has a first opening that reaches the first electrically conductive layer. The semiconductor layer is in contact with the top surface and the side surfaces of the first insulation layer, and the top surface of the first electrically conductive layer. The second electrically conductive layer is provided on the semiconductor layer. The second electrically conductive layer has a second opening in a region overlapping the first opening. The second insulation layer is provided on the semiconductor layer and the second electrically conductive layer. The third electrically conductive layer is provided on the second insulation layer. The first insulation layer has a structure obtained by laminating a third insulation layer, and a fourth insulation layer on the third insulation layer. The fourth insulation layer has a region which has a greater film density than the third insulation layer.
Provided is a semiconductor device that enables miniaturization or high integration. The semiconductor device comprises a first memory cell, a second memory cell on the first memory cell, a first conductor, and a second conductor on the first conductor. Each of the first memory cell and the second memory cell includes a transistor and a capacitive element. One of the source and the drain of the transistor is electrically connected to a lower electrode of the capacitive element. The first conductor has a portion in contact with the other one of the source and the drain of the transistor of the first memory cell, the upper surface of the first conductor has a portion in contact with the lower surface of the second conductor, and the second conductor has a portion in contact with the other one of the source and the drain of the transistor of the second memory cell.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
90.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Provided is a semiconductor device that enables miniaturization and high integration. This semiconductor device has a memory cell including first to third transistors and a capacitor. The second and third transistors share a metal oxide. The capacitor is provided between the first and second transistors. An insulator is provided over an electrode functioning as a source or drain of the first transistor, the insulator having an opening reaching the electrode. The capacitor is provided inside the opening. One electrode of the capacitor has a region inside the opening that is in contact with the other of a source electrode and a drain electrode of the first transistor. The other electrode of the capacitor has a region in contact with a gate electrode of the second transistor.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
Provided is a new organic metal complex that improves the light emission efficiency of a light-emitting device. The present invention provides an organic metal complex represented by general formula (G1). In the formula, X represents carbon or nitrogen, and the carbon is bonded to hydrogen (including deuterium), a substituted or unsubstituted alkyl group, a substituted or unsubstituted cycloalkyl group, or a substituted or unsubstituted aryl group. In addition, R1-R3 each independently represent hydrogen (including deuterium), a substituted or unsubstituted alkyl group, a substituted or unsubstituted cycloalkyl group, or a substituted or unsubstituted aryl group. Further, n represents an integer of 1-4. The respective borate ligands may be the same or different from each other. Each n may be the same or different from the others. When n is equal to or more than 2, X, R1, and R2 may each be the same or different from the others. When n is equal to or less than 2, each R3 may be the same or different from the others.
C07D 231/12 - Heterocyclic compounds containing 1,2-diazole or hydrogenated 1,2-diazole rings not condensed with other rings having two or three double bonds between ring members or between ring members and non-ring members with only hydrogen atoms, hydrocarbon or substituted hydrocarbon radicals, directly attached to ring carbon atoms
C07F 5/00 - Compounds containing elements of Groups 3 or 13 of the Periodic System
C07F 19/00 - Metal compounds according to more than one of main groups
A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO3(ZnO)m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , , or
The transistor includes a first gate electrode, a first insulating film over the first gate electrode, an oxide semiconductor film over the first insulating film, a source electrode over the oxide semiconductor film, a drain electrode over the oxide semiconductor film, a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, and a second gate electrode over the second insulating film. The first insulating film includes a first opening. A connection electrode electrically connected to the first gate electrode through the first opening is formed over the first insulating film. The second insulating film includes a second opening that reaches the connection electrode. The second gate electrode includes an oxide conductive film and a metal film over the oxide conductive film. The connection electrode and the second gate electrode are electrically connected to each other through the metal film.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
A light-emitting element having high emission efficiency is provided.
A light-emitting element having high emission efficiency is provided.
The light-emitting element includes a first organic compound, a second organic compound, and a third organic compound. The first organic compound has a function of converting triplet excitation energy into light emission. The second organic compound is preferably a TADF material. The third organic compound is a fluorescent compound. Light emitted from the light-emitting element is obtained from the third organic compound. Triplet excitation energy in a light-emitting layer is transferred to the third organic compound by reverse intersystem crossing caused by the second organic compound or through the first organic compound.
A region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are formed separately in one oxide semiconductor film. The region containing a high proportion of crystal components is formed so as to serve as a channel formation region and the other region is formed so as to contain a high proportion of amorphous components. It is preferable that an oxide semiconductor film in which a region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are mixed in a self-aligned manner be formed. To separately form the regions which differ in crystallinity in the oxide semiconductor film, first, an oxide semiconductor film containing a high proportion of crystal components is formed and then process for performing amorphization on part of the oxide semiconductor film is conducted.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , , or
The present invention provides a semiconductor device which enables miniaturization or high integration. A semiconductor device according to the present invention comprises a first conductor, a second conductor, a first insulating body, a first transistor which is arranged on the first insulating body, and a second insulating body which is arranged on the first transistor. The first transistor comprises: a first metal oxide; a third conductor and a fourth conductor, which are electrically connected to the first metal oxide; a third insulating body which is arranged on the first metal oxide; and a fifth conductor which is arranged on the third insulating body. The upper surface of the fifth conductor has a region that is in contact with the second insulating body. The first conductor has: a portion which is positioned within an opening of the first insulating body; a region which is in contact with the lateral surface of the third conductor; and a portion which is positioned within an opening of the second insulating body. The second conductor has: a region which is in contact with the upper surface of the fourth conductor; and a portion which is positioned within the opening of the second insulating body. The height of the upper surface f the first conductor and the height of the upper surface of the second conductor are equal to or generally equal to each other.
H01L 21/336 - Field-effect transistors with an insulated gate
H10B 12/00 - Dynamic random access memory [DRAM] devices
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
H10B 99/00 - Subject matter not provided for in other groups of this subclass
Provided is a semiconductor device that enables miniaturization and high integration. This storage device has a first transistor, a second transistor, a first capacitor, and a second capacitor. The first capacitor has a first electrode and a second electrode. The second capacitor has a first electrode and a third electrode. The source or the drain of the first transistor is electrically connected to the second electrode. The source or the drain of the second transistor is electrically connected to the third electrode. The first electrode has a portion that overlaps with each of the second electrode, the third electrode, the first transistor, and the second transistor, and is imparted with a fixed potential or a ground potential.
Provided is a highly reliable storage device. Among an information bit and a check bit constituting a humming code, the information bit having a longer bit length than the check bit is stored in a first storage unit, and the check bit is stored in a second storage unit. By storing the humming code separately in a plurality of storage units, the occurrence of soft errors is reduced. The first storage unit that requires a large storage capacity is configured by a Si transistor, and the second storage unit is configured by an OS transistor. By combining memory scrubbing and bit interleaving, a more reliable storage device is obtained.
G11C 5/04 - Supports for storage elements; Mounting or fixing of storage elements on such supports
G06F 11/10 - Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens
H10B 12/00 - Dynamic random access memory [DRAM] devices
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
