Semiconductor Energy Laboratory Co., Ltd.

Japan

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New (last 4 weeks) 101
2024 May (MTD) 70
2024 April 65
2024 March 80
2024 February 75
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IPC Class
H01L 29/786 - Thin-film transistors 4,000
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body 2,387
H01L 51/50 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED) 1,550
H01L 27/32 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes 1,318
H01L 29/66 - Types of semiconductor device 1,102
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09 - Scientific and electric apparatus and instruments 31
42 - Scientific, technological and industrial services, research and design 21
40 - Treatment of materials; recycling, air and water treatment, 8
45 - Legal and security services; personal services for individuals. 3
01 - Chemical and biological materials for industrial, scientific and agricultural use 2
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Status
Pending 1,250
Registered / In Force 9,639
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1.

SEMICONDUCTOR DEVICE AND FABRICATION METHOD OF SEMICONDUCTOR DEVICE

      
Application Number 18399990
Status Pending
Filing Date 2023-12-29
First Publication Date 2024-05-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Sato, Yuichi
  • Nakayama, Hitoshi

Abstract

A semiconductor device including: a first insulator in which an opening is formed; a first conductor positioned in the opening; a first oxide over the first insulator; a second oxide over the first oxide; a third oxide and a fourth oxide over the second oxide; a second conductor over the third oxide and the first conductor; a third conductor over the fourth oxide; a fifth oxide over the second oxide; a second insulator over the fifth oxide; and a fourth conductor positioned over the second insulator and overlapping with the fifth oxide. The fifth oxide is in contact with each of a side surface of the third oxide and a side surface of the fourth oxide. The conductivity of the third oxide is higher than the conductivity of the second oxide. The second conductor is in contact with the top surface of the first conductor.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

2.

SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

      
Application Number 18512287
Status Pending
Filing Date 2023-11-17
First Publication Date 2024-05-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Umezaki, Atsushi

Abstract

A semiconductor device or the like with a novel structure that can change the orientation of the display is provided. A semiconductor device or the like with a novel structure, in which a degradation in transistor characteristics can be suppressed, is provided. A semiconductor device or the like with a novel structure, in which operation speed can be increased, is provided. A semiconductor device or the like with a novel structure, in which a dielectric breakdown of a transistor can be suppressed, is provided. The semiconductor device or the like has a circuit configuration capable of switching between a first operation and a second operation by changing the potentials of wirings. By switching between these two operations, the scan direction is easily changed. The semiconductor device is configured to change the scan direction.

IPC Classes  ?

  • G11C 19/18 - Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
  • G09G 3/3266 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] - Details of drivers for scan electrodes
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors

3.

Light-Emitting Element, Display Module, Lighting Module, Light-Emitting Device, Display Device, Electronic Appliance, and Lighting Device

      
Application Number 18509704
Status Pending
Filing Date 2023-11-15
First Publication Date 2024-05-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Ishisone, Takahiro
  • Seo, Satoshi
  • Nonaka, Yusuke
  • Ohsawa, Nobuharu

Abstract

A multicolor light-emitting element that utilizes fluorescence and phosphorescence and is advantageous for practical application is provided. The light-emitting element has a stacked-layer structure of a first light-emitting layer containing a host material and a fluorescent substance and a second light-emitting layer containing two kinds of organic compounds and a substance that can convert triplet excitation energy into luminescence. Note that light emitted from the first light-emitting layer has an emission peak on the shorter wavelength side than light emitted from the second light-emitting layer.

IPC Classes  ?

  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/12 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising dopants
  • H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
  • H10K 50/15 - Hole transporting layers
  • H10K 50/16 - Electron transporting layers
  • H10K 50/17 - Carrier injection layers
  • H10K 50/18 - Carrier blocking layers
  • H10K 50/81 - Anodes
  • H10K 50/828 - Transparent cathodes, e.g. comprising thin metal layers
  • H10K 50/85 - Arrangements for extracting light from the devices
  • H10K 50/86 - Arrangements for improving contrast, e.g. preventing reflection of ambient light
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays

4.

Display Apparatus And Electronic Device

      
Application Number 18280861
Status Pending
Filing Date 2022-02-28
First Publication Date 2024-05-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Ohsawa, Nobuharu
  • Sasaki, Toshiki

Abstract

A novel display apparatus that is highly convenient, useful, or reliable is provided. The display apparatus includes a first light-emitting device and a second light-emitting device, and the second light-emitting device is adjacent to the first light-emitting device. The first light-emitting device includes a first unit emitting light, a second unit emitting light, a first intermediate layer, and a first layer. The first intermediate layer is interposed between the second unit and the first unit. The first layer is interposed between the first intermediate layer and the first unit. In the first layer, unpaired electrons are able to be observed at a spin density greater than or equal to 1×1016 spins/cm3 and less than or equal to 1×1018 spins/cm3. The second light-emitting device includes a third unit emitting light, a fourth unit emitting light, a second intermediate layer, and a second layer. The second intermediate layer is interposed between the fourth unit and the third unit. The second layer is interposed between the second intermediate layer and the third unit. A space is provided between the second intermediate layer and the first intermediate layer. A space is provided between the second layer and the first layer.

IPC Classes  ?

5.

DISPLAY APPARATUS AND METHOD FOR MANUFACTURING DISPLAY APPARATUS

      
Application Number 18284612
Status Pending
Filing Date 2022-04-08
First Publication Date 2024-05-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Okazaki, Kenichi
  • Kubota, Daisuke

Abstract

A display apparatus having an image capturing function is provided. A display apparatus or an imaging device with a high aperture ratio is provided. The display apparatus includes a first light-emitting element and a light-receiving element. The first light-emitting element is formed by stacking a first pixel electrode, a first organic layer, and a common electrode in this order. The light-receiving element is formed by stacking a second pixel electrode, a second organic layer, and the common electrode in this order. The first organic layer includes a first light-emitting layer, and the second organic layer includes a photoelectric conversion layer. A first layer and a second layer are included in a region between the first light-emitting element and the light-receiving element. The first layer overlaps with the second organic layer and contains the same material as the first organic layer. The second layer overlaps with the first organic layer and contains the same material as the second organic layer. In the region between the first light-emitting element and the light-receiving element, an end portion of the first organic layer and an end portion of the first layer face each other and an end portion of the second organic layer and an end portion of the second layer face each other.

IPC Classes  ?

  • H10K 59/65 - OLEDs integrated with inorganic image sensors
  • H10K 50/19 - Tandem OLEDs
  • H10K 71/16 - Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
  • H10K 71/20 - Changing the shape of the active layer in the devices, e.g. patterning
  • H10K 71/60 - Forming conductive regions or layers, e.g. electrodes

6.

ELECTRONIC DEVICE

      
Application Number 18281593
Status Pending
Filing Date 2022-03-15
First Publication Date 2024-05-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kubota, Daisuke
  • Hatsumi, Ryo
  • Momo, Junpei

Abstract

Provided is an electronic device that can be operated without contact. The electronic device includes a display portion, a processing portion, and a memory portion. The display portion includes a display apparatus including a light-emitting device and a light-receiving device. The display portion has a function of displaying an image using the light-emitting device and a function of capturing an image using the light-receiving device. The memory portion has a machine learning model using a neural network. The processing portion has a function of inferring position data of an object not in contact with the electronic device using the machine learning model from image capturing data captured by the display portion.

IPC Classes  ?

  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
  • H10K 39/34 - Organic image sensors integrated with organic light-emitting diodes [OLED]

7.

DISPLAY APPARATUS, DISPLAY MODULE, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING DISPLAY APPARATUS

      
Application Number 18281329
Status Pending
Filing Date 2022-03-15
First Publication Date 2024-05-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Okazaki, Kenichi
  • Nakamura, Daiki
  • Sato, Rai

Abstract

A higher-definition or higher-resolution display apparatus is provided. The display apparatus includes a first light-emitting device, a second light-emitting device, a first insulating layer, a first coloring layer, and a second coloring layer. The first light-emitting device includes a first pixel electrode, a first light-emitting layer over the first pixel electrode, and a common electrode over the first light-emitting layer. The second light-emitting device includes a second pixel electrode, a second light-emitting layer over the second pixel electrode, and the common electrode over the second light-emitting layer. The first insulating layer covers side surfaces of the first pixel electrode, the second pixel electrode, the first light-emitting layer, and the second light-emitting layer. The first coloring layer is placed to overlap with the first light-emitting device. The second coloring layer is placed to overlap with the second light-emitting device. The first light-emitting device and the second light-emitting device have a function of emitting white light. The first coloring layer and the second coloring layer have a function of transmitting visible light of different colors.

IPC Classes  ?

  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H04R 1/22 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired frequency characteristic only
  • H10K 50/15 - Hole transporting layers
  • H10K 50/16 - Electron transporting layers
  • H10K 50/17 - Carrier injection layers
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 59/65 - OLEDs integrated with inorganic image sensors
  • H10K 71/20 - Changing the shape of the active layer in the devices, e.g. patterning
  • H10K 71/60 - Forming conductive regions or layers, e.g. electrodes

8.

DISPLAY APPARATUS, DISPLAY MODULE, AND ELECTRONIC DEVICE

      
Application Number 18279925
Status Pending
Filing Date 2022-02-28
First Publication Date 2024-05-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kubota, Daisuke
  • Kamada, Taisuke
  • Yamashita, Akio
  • Okazaki, Kenichi
  • Kusunoki, Koji
  • Atsumi, Tomoaki

Abstract

A semiconductor device having a light detection function and including a high-resolution display portion is provided. The semiconductor device is a display apparatus including a light-emitting device, a light-receiving device, and a substrate. The light-emitting device includes a first electrode, a light-emitting layer, a first electron-transport layer, an electron-injection layer, and a second electrode stacked in this order over the substrate. The light-receiving device includes a third electrode, an active layer, a first hole-transport layer, the electron-injection layer, and the second electrode stacked in this order over the substrate. The first electrode is supplied with a first potential. The second electrode is preferably supplied with a second potential lower than the first potential. The third electrode is preferably supplied with a third potential higher than the second potential.

IPC Classes  ?

  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
  • G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
  • H10K 39/34 - Organic image sensors integrated with organic light-emitting diodes [OLED]

9.

DISPLAY APPARATUS, DISPLAY MODULE, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING DISPLAY APPARATUS

      
Application Number 18279939
Status Pending
Filing Date 2022-02-25
First Publication Date 2024-05-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Okazaki, Kenichi
  • Nakamura, Daiki
  • Sato, Rai
  • Yamazaki, Shunpei

Abstract

A higher-definition or higher-resolution display apparatus is provided. The display apparatus includes a first light-emitting device, a second light-emitting device, a first insulating layer, a first coloring layer, and a second coloring layer. The first light-emitting device includes a first pixel electrode, a first light-emitting layer over the first pixel electrode, and a common electrode over the first light-emitting layer. The second light-emitting device includes a second pixel electrode, a second light-emitting layer over the second pixel electrode, and the common electrode over the second light-emitting layer. The first insulating layer covers side surfaces of the first pixel electrode, the second pixel electrode, the first light-emitting layer, and the second light-emitting layer. The first coloring layer is placed to overlap with the first light-emitting device. The second coloring layer is placed to overlap with the second light-emitting device. The first light-emitting device and the second light-emitting device have a function of emitting white light. The first coloring layer and the second coloring layer have a function of transmitting visible light of different colors.

IPC Classes  ?

  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H10K 50/15 - Hole transporting layers
  • H10K 50/16 - Electron transporting layers
  • H10K 50/17 - Carrier injection layers
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 71/16 - Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
  • H10K 71/60 - Forming conductive regions or layers, e.g. electrodes

10.

SEMICONDUCTOR DEVICE

      
Application Number IB2023059255
Publication Number 2024/100467
Status In Force
Filing Date 2023-09-19
Publication Date 2024-05-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Murakawa, Tsutomu
  • Kurata, Motomu

Abstract

Provided is a semiconductor device that enables miniaturization or high integration. This semiconductor device comprises a first insulator, an oxide semiconductor above the first insulator, a first conductor, a second conductor, and a third insulator above the oxide semiconductor, a second insulator above the first insulator, above the first conductor, and above the second conductor, and a third conductor above the third insulator. The oxide semiconductor includes a first region overlapping with the first conductor, a second region overlapping with the second conductor, and a third region located between the first region and the second region. The second insulator has an opening portion in a region overlapping with the third region and the third insulator and the third conductor are provided inside the opening portion. The first region and the second region are in contact with the first insulator and the second insulator and the third region is in contact with the first insulator and the third insulator. The first insulator and the second insulator include silicon and nitrogen.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/8234 - MIS technology
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region

11.

Light-Emitting Device, Metal Complex, Light-Emitting Apparatus, Electronic Apparatus, And Lighting Device

      
Application Number 18423895
Status Pending
Filing Date 2024-01-26
First Publication Date 2024-05-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kawano, Yuta
  • Ueda, Airi
  • Watabe, Takeyoshi
  • Ohsawa, Nobuharu
  • Tosu, Keito
  • Osaka, Harue
  • Seo, Satoshi
  • Narukawa, Ryo
  • Nomura, Shiho

Abstract

A light-emitting device with high emission efficiency is provided. The light-emitting device includes an anode, a cathode, and an EL layer positioned between the anode and the cathode. The EL layer includes a light-emitting layer and an electron-transport layer; the light-emitting layer includes a light-emitting material; the electron-transport layer includes an organic compound having an electron-transport property and a metal complex of an alkali metal; the ordinary refractive index of the organic compound having an electron-transport property in a peak wavelength of light emitted from the light-emitting material is greater than or equal to 1.50 and less than or equal to 1.75; and the ordinary refractive index of the metal complex of an alkali metal in the peak wavelength of the light emitted from the light-emitting material is greater than or equal to 1.45 and less than or equal to 1.70.

IPC Classes  ?

  • H10K 50/16 - Electron transporting layers
  • H10K 59/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays

12.

POWER STORAGE DEVICE AND ELECTRONIC DEVICE

      
Application Number 18404961
Status Pending
Filing Date 2024-01-05
First Publication Date 2024-05-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kimura, Masayuki
  • Goto, Junya

Abstract

To improve the flexibility of a power storage device, or provide a high-capacity power storage device. The power storage device includes a positive electrode, a negative electrode, an exterior body, and an electrolyte. The outer periphery of each of the positive electrode active material layer and the negative electrode active material layer is a closed curve. The exterior body includes a film and a thermocompression-bonded region. The inner periphery of the thermocompression-bonded region is a closed curve. The electrolyte, the positive electrode active material layer, and the negative electrode active material layer are in a region surrounded by the thermocompression-bonded region.

IPC Classes  ?

  • H01M 10/04 - Construction or manufacture in general
  • H01M 50/107 - Primary casings, jackets or wrappings of a single cell or a single battery characterised by their shape or physical structure having curved cross-section, e.g. round or elliptic
  • H01M 50/119 - Metals
  • H01M 50/121 - Organic material
  • H01M 50/124 - Primary casings, jackets or wrappings of a single cell or a single battery characterised by the material having a layered structure
  • H01M 50/136 - Flexibility or foldability

13.

Light-Emitting Element, Light-Emitting Device, Electronic Device, and Lighting Device

      
Application Number 18420214
Status Pending
Filing Date 2024-01-23
First Publication Date 2024-05-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Seo, Satoshi
  • Suzuki, Tsunenori
  • Hashimoto, Naoaki

Abstract

Provided is a novel light-emitting element, a light-emitting element with a long lifetime, or a light-emitting element with high emission efficiency. The light-emitting element includes an EL layer between a pair of electrodes. The EL layer includes at least a light-emitting layer containing a fluorescent substance and a host material, a first electron-transport layer containing a first electron-transport material, and a second electron-transport layer containing a second electron-transport material, which are in contact with each other and in this order. The LUMO level of each of the host material and the second electron-transport material is higher than the LUMO level of the first electron-transport material.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/155 - Hole transporting layers comprising dopants
  • H10K 50/16 - Electron transporting layers
  • H10K 50/84 - Passivation; Containers; Encapsulations

14.

Light-Emitting Element

      
Application Number 18372263
Status Pending
Filing Date 2023-09-25
First Publication Date 2024-05-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Shitagaki, Satoko
  • Seo, Satoshi
  • Ohsawa, Nobuharu
  • Inoue, Hideko
  • Takahashi, Masahiro
  • Suzuki, Kunihiko

Abstract

Provided is a light-emitting element with high external quantum efficiency, or a light-emitting element with a long lifetime. The light-emitting element includes, between a pair of electrodes, a light-emitting layer including a guest material and a host material, in which an emission spectrum of the host material overlaps with an absorption spectrum of the guest material, and phosphorescence is emitted by conversion of an excitation energy of the host material into an excitation energy of the guest material. By using the overlap between the emission spectrum of the host material and the absorption spectrum of the guest material, the energy smoothly transfers from the host material to the guest material, so that the energy transfer efficiency of the light-emitting element is high. Accordingly, a light-emitting element with high external quantum efficiency can be achieved.

IPC Classes  ?

  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • C09K 11/02 - Use of particular materials as binders, particle coatings or suspension media therefor
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H05B 33/14 - Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of the electroluminescent material
  • H10K 50/15 - Hole transporting layers
  • H10K 50/16 - Electron transporting layers
  • H10K 50/17 - Carrier injection layers
  • H10K 50/818 - Reflective anodes, e.g. ITO combined with thick metallic layers
  • H10K 50/828 - Transparent cathodes, e.g. comprising thin metal layers
  • H10K 85/60 - Organic compounds having low molecular weight

15.

DISPLAY DEVICE AND ELECTRONIC DEVICE

      
Application Number 18411105
Status Pending
Filing Date 2024-01-12
First Publication Date 2024-05-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kawashima, Susumu
  • Kusumoto, Naoto

Abstract

A display device capable of improving image quality is provided. A storage node is provided in each pixel and first data can be held in the storage node. Second data is added to the first data by capacitive coupling, which can be supplied to a display element. Thus, the display device can display a corrected image. A reference potential for the capacitive coupling operation is supplied from a power supply line or the like, and thus the first data and the second data can be supplied from a common signal line.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G02F 1/1362 - Active matrix addressed cells
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/786 - Thin-film transistors
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 59/40 - OLEDs integrated with touch screens

16.

Light-Emitting Element, Light-Emitting Device, Display Device, Electronic Device, and Lighting Device

      
Application Number 18372234
Status Pending
Filing Date 2023-09-25
First Publication Date 2024-05-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Seo, Satoshi
  • Yamazaki, Shunpei
  • Ishisone, Takahiro

Abstract

An object is to provide a light-emitting element which uses a plurality of kinds of light-emitting dopants and has high emission efficiency. In one embodiment of the present invention, a light-emitting device, a light-emitting module, a light-emitting display device, an electronic device, and a lighting device each having reduced power consumption by using the above light-emitting element are provided. Attention is paid to Förster mechanism, which is one of mechanisms of intermolecular energy transfer. Efficient energy transfer by Förster mechanism is achieved by making an emission wavelength of a molecule which donates energy overlap with the longest-wavelength-side local maximum peak of a graph obtained by multiplying an absorption spectrum of a molecule which receives energy by a wavelength raised to the fourth power.

IPC Classes  ?

  • H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/85 - Arrangements for extracting light from the devices
  • H10K 85/30 - Coordination compounds

17.

Display Device and System

      
Application Number 18417153
Status Pending
Filing Date 2024-01-19
First Publication Date 2024-05-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kubota, Daisuke
  • Hatsumi, Ryo
  • Kamada, Taisuke
  • Iwaki, Yuji
  • Momo, Junpei
  • Yamazaki, Shunpei

Abstract

A display device having a photosensing function is provided. A display device having a biometric authentication function typified by fingerprint authentication is provided. A display device having a touch panel function and a biometric authentication function is provided. The display device includes a first substrate, a light guide plate, a first light-emitting element, a second light-emitting element, and a light-receiving element. The first substrate and the light guide plate are provided to face each other. The first light-emitting element and the light-receiving element are provided between the first substrate and the light guide plate. The first light-emitting element has a function of emitting first light through the light guide plate. The second light-emitting element has a function of emitting second light to a side surface of the light guide plate. The light-receiving element has functions of receiving the first light and converting the first light into an electric signal and functions of receiving the second light and converting the second light into an electric signal. The first light includes visible light, and the second light includes infrared light.

IPC Classes  ?

  • H10K 65/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element and at least one organic radiation-sensitive element, e.g. organic opto-couplers
  • A61B 5/00 - Measuring for diagnostic purposes ; Identification of persons
  • A61B 5/1172 - Identification of persons based on the shapes or appearances of their bodies or parts thereof using fingerprinting
  • A61B 5/145 - Measuring characteristics of blood in vivo, e.g. gas concentration, pH-value
  • A61B 5/1455 - Measuring characteristics of blood in vivo, e.g. gas concentration, pH-value using optical sensors, e.g. spectral photometrical oximeters
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
  • G06V 40/12 - Fingerprints or palmprints
  • G06V 40/13 - Sensors therefor
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
  • H10K 30/80 - Constructional details
  • H10K 59/40 - OLEDs integrated with touch screens

18.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

      
Application Number 18509825
Status Pending
Filing Date 2023-11-15
First Publication Date 2024-05-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Akimoto, Kengo

Abstract

An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/66 - Types of semiconductor device

19.

DISPLAY DEVICE

      
Application Number 18515563
Status Pending
Filing Date 2023-11-21
First Publication Date 2024-05-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kusunoki, Koji
  • Tsukamoto, Yosuke
  • Yoshizumi, Kensuke

Abstract

A display device with a high luminance, a high contrast, and low power consumption is provided. The display device includes a transistor, a light-emitting element, a coloring layer, a phosphor layer, a first electrode, and a second electrode. The light-emitting element is electrically connected to the first electrode and the second electrode, the first electrode is electrically connected to the transistor, and the second electrode is positioned on the same plane as the first electrode. The coloring layer is positioned over the light-emitting element, the phosphor layer is positioned between the light-emitting element and the coloring layer, and the phosphor layer, the light-emitting element, and the coloring layer include a region in which they overlap with one another. The light-emitting element includes a light-emitting diode chip, and the phosphor layer has a function of emitting light of a complementary color of an emission color of the light-emitting element.

IPC Classes  ?

  • H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors
  • H01L 33/50 - Wavelength conversion elements
  • H01L 33/58 - Optical field-shaping elements
  • H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls

20.

THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE

      
Application Number 18509468
Status Pending
Filing Date 2023-11-15
First Publication Date 2024-05-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kondo, Toshikazu
  • Kishida, Hideyuki

Abstract

In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/477 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/45 - Ohmic electrodes
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/786 - Thin-film transistors
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 59/123 - Connection of the pixel electrodes to the thin film transistors [TFT]

21.

LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, ELECTRONIC DEVICE, AND LIGHTING DEVICE

      
Application Number 18513763
Status Pending
Filing Date 2023-11-20
First Publication Date 2024-05-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Seo, Satoshi
  • Ishisone, Takahiro
  • Ohsawa, Nobuharu
  • Nonaka, Yusuke
  • Sasaki, Toshiki

Abstract

Emission efficiency of a light-emitting element is improved. The light-emitting element has a pair of electrodes and an EL layer between the pair of electrodes. The EL layer includes a first light-emitting layer and a second light-emitting layer. The first light-emitting layer includes a fluorescent material and a host material. The second light-emitting layer includes a phosphorescent material, a first organic compound, and a second organic compound. An emission spectrum of the second light-emitting layer has a peak in a yellow wavelength region. The first organic compound and the second organic compound form an exciplex.

IPC Classes  ?

  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
  • H10K 50/12 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising dopants
  • H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
  • H10K 50/15 - Hole transporting layers
  • H10K 50/16 - Electron transporting layers
  • H10K 50/81 - Anodes
  • H10K 50/82 - Cathodes
  • H10K 50/84 - Passivation; Containers; Encapsulations
  • H10K 59/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals

22.

DISPLAY APPARATUS AND ELECTRONIC DEVICE

      
Application Number 18282164
Status Pending
Filing Date 2022-03-17
First Publication Date 2024-05-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Ito, Minato
  • Matsuzaki, Takanori
  • Kozuma, Munehiro
  • Okamoto, Yuki
  • Koumura, Yusuke

Abstract

A display apparatus with a novel structure is provided. The display apparatus includes a first layer and a second layer positioned above the first layer. The first layer includes a driver circuit region, and the second layer includes a pixel array. The pixel array includes a plurality of pixel regions. The driver circuit region includes a control circuit unit and a plurality of local driver circuits. One of the plurality of local driver circuits corresponds to any one of the plurality of pixel regions. The local driver circuit has a function of outputting a driving signal for driving a plurality of pixels included in the corresponding pixel region. The control circuit unit has a function of comparing definition data of an input image signal and aspect ratio data of the pixel array to determine a first region where display is performed and a second region where display is not performed, and outputting, to the local driver circuit corresponding to the second region, a control signal for stopping output of the driving signal.

IPC Classes  ?

  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals

23.

SEMICONDUCTOR DEVICE, METHOD FOR PRODUCING SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS

      
Application Number IB2023060887
Publication Number 2024/100489
Status In Force
Filing Date 2023-10-30
Publication Date 2024-05-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Matsuzaki, Takanori
  • Isaka, Fumito

Abstract

Provided is a semiconductor device which exhibits favorable electrical properties. This semiconductor device has a transistor, a first interlayer insulating layer, and a second interlayer insulating layer on the first interlayer insulating layer. The transistor has a first conductive layer which functions as one electrode among a source electrode and a drain electrode, and a second conductive layer which functions as the other electrode thereof. The first and second interlayer insulating layers are provided between the first conductive layer and the second conductive layer. An opening which reaches the first conductive layer is provided in the first and second interlayer insulating layers and in the second conductive layer. A semiconductor layer, a first gate insulating layer and a first gate electrode are provided, in this order, so as to have a region located inside said opening. A second gate electrode and a second gate insulating layer for covering part of the lateral surface of the semiconductor layer are provided between the first interlayer insulating layer and the second interlayer insulating layer.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
  • H01L 21/8234 - MIS technology
  • H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
  • H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

24.

SEMICONDUCTOR DEVICE

      
Application Number IB2023061146
Publication Number 2024/100511
Status In Force
Filing Date 2023-11-06
Publication Date 2024-05-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Matsuzaki, Takanori
  • Ohshima, Kazuaki

Abstract

The present invention provides a semiconductor device with a novel configuration. The present invention includes: a memory cell having a transistor and a capacitor; and a sense amplifier. The capacitor has a material having antiferroelectric properties between a first electrode and a second electrode. The sense amplifier has a function for applying a first potential, a function for applying a second potential lower than the first potential, and a function for setting the potential of first wiring to a third potential higher than the first potential or to the second potential in accordance with a sense amplifier control signal. Second wiring has a function for applying the second potential to the second electrode. Holding data in the memory cell is performed by holding the first electrode at the first potential. The data in the memory cell is read by setting the first wiring to the second potential and setting the transistor to a conductive state, thereby setting the fluctuating potential of the first wiring to the third potential or to the second potential in accordance with the sense amplifier control signal.

IPC Classes  ?

  • G11C 11/22 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
  • H10B 53/40 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the peripheral circuit region
  • H01L 29/786 - Thin-film transistors

25.

SEMICONDUCTOR DEVICE

      
Application Number IB2023061021
Publication Number 2024/100499
Status In Force
Filing Date 2023-11-02
Publication Date 2024-05-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Shima, Yukinori
  • Koezuka, Junichi
  • Jintyou, Masami
  • Kumakura, Kayo
  • Nakada, Masataka
  • Kusunoki, Koji
  • Atsumi, Tomoaki

Abstract

Provided is a semiconductor device having a small footprint. This semiconductor device has a transistor and a first insulating layer. The transistor has: a first conductive layer; a second conductive layer having a region that overlaps the first conductive layer with the first insulating layer interposed therebetween; and a semiconductor layer. The second conductive layer has a first opening in the region that overlaps the first conductive layer. The first insulating layer has a second opening that reaches the first conductive layer in a region that overlaps the first opening. The semiconductor layer is in contact with the upper surface of the first conductive layer, a side surface of the first insulating layer, and a side surface of the second conductive layer in the first opening and the second opening. The oxygen diffusion coefficient at 350°C in the first insulating layer is at least 5×10-12cm2/sec.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/8234 - MIS technology
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/41 - Electrodes characterised by their shape, relative sizes or dispositions
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
  • H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
  • H05B 33/14 - Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of the electroluminescent material
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
  • H10K 50/00 - Organic light-emitting devices
  • H10K 50/10 - OLEDs or polymer light-emitting diodes [PLED]
  • H10K 59/10 - OLED displays
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/124 - Insulating layers formed between TFT elements and OLED elements

26.

SEMICONDUCTOR DEVICE AND OPERATING METHOD OF SEMICONDUCTOR DEVICE

      
Application Number IB2023060832
Publication Number 2024/095109
Status In Force
Filing Date 2023-10-27
Publication Date 2024-05-10
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Fujita, Masashi
  • Kurokawa, Yoshiyuki
  • Godo, Hiromichi
  • Ohshima, Kazuaki

Abstract

Provided is a semiconductor device having reduced power consumption. Or, provided is a semiconductor device having high reliability. Or, provided is a semiconductor device in which increases in circuit layout area are suppressed. Or, provided is a semiconductor device that is power saving. Or, provided is a semiconductor device that has excellent computation performance. In the semiconductor device, output from a level shifter is provided to a first buffer circuit, the output from the level shifter is provided to a second buffer circuit via the first buffer, and output of the first buffer circuit is provided to a first resistor group. As a result, scan flip-flop data is saved in a memory circuit in each of a plurality of resistors of the first resistor group, output from the second buffer circuit is provided to a second resistor group, and scan flip-flop data is saved in the memory circuit in each of a plurality of resistors of the second resistor group.

IPC Classes  ?

  • H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
  • H01L 21/82 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
  • H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
  • H01L 21/8234 - MIS technology
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/786 - Thin-film transistors
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

27.

POSITIVE ELECTRODE, SECONDARY BATTERY, ELECTRONIC DEVICE, POWER STORAGE SYSTEM, AND VEHICLE

      
Application Number IB2023060837
Publication Number 2024/095112
Status In Force
Filing Date 2023-10-27
Publication Date 2024-05-10
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kakehata, Tetsuya
  • Yoshitomi, Shuhei
  • Kawatsuki, Atsushi

Abstract

Provided are: a positive electrode that is stable in high potential or high temperature conditions; and a highly safe secondary battery. The positive electrode has a configuration in which at least a portion, preferably approximately the entirety of the particle surface of a particulate second positive electrode active material, is covered with a first positive electrode active material. By covering at least a portion of the first positive electrode active material, the potential applied to the second positive electrode active material is lowered or the electric field is mitigated. The first positive electrode active material has a first composite oxide represented by LiM1PO4 (M1 is at least one selected from among Fe, Ni, Co, and Mn); the second positive electrode active material has a second composite oxide represented by LiM2O2, the second positive electrode active material has a second composite oxide represented by LiM2O2 (M2 is at least one selected from among Fe, Ni, Co, Mn, and Al); and the second composite oxide has an additive element in a particle surface layer thereof.

IPC Classes  ?

  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • H01M 4/505 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of manganese of mixed oxides or hydroxides containing manganese for inserting or intercalating light metals, e.g. LiMn2O4 or LiMn2OxFy
  • H01M 4/58 - Selection of substances as active materials, active masses, active liquids of polyanionic structures, e.g. phosphates, silicates or borates

28.

SEMICONDUCTOR DEVICE AND STORAGE DEVICE

      
Application Number IB2023060831
Publication Number 2024/095108
Status In Force
Filing Date 2023-10-27
Publication Date 2024-05-10
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kunitake, Hitoshi
  • Oota, Masashi
  • Saito, Satoru

Abstract

Provided is a semiconductor device that can be miniaturized or highly integrated. The semiconductor device comprises: a first insulator on a substrate; a second insulator on the first insulator; a third insulator on the second insulator; an oxide semiconductor disposed on the second insulator and covering the third insulator; a first conductor and second conductor on the oxide semiconductor; a fourth insulator disposed on the first conductor and the second conductor; a fifth insulator disposed on the oxide semiconductor; and a third conductor disposed on the fifth insulator. In a region between the first conductor and the second conductor, the second insulator and the fourth insulator have an opening that reaches the oxide semiconductor and that reaches the first insulator in a region not overlapping the oxide semiconductor. The fifth insulator and the third conductor are disposed in the opening. In a cross-sectional view in a channel width direction, the height of the third insulator is greater than the width of the third insulator. In a region not overlapping the oxide semiconductor in the opening, a bottom surface of the third conductor is positioned lower than a bottom surface of the oxide semiconductor.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
  • H01L 21/8234 - MIS technology
  • H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 99/00 - Subject matter not provided for in other groups of this subclass

29.

SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE

      
Application Number IB2023060833
Publication Number 2024/095110
Status In Force
Filing Date 2023-10-27
Publication Date 2024-05-10
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kimura, Hajime
  • Yamazaki, Shunpei

Abstract

Provided is a semiconductor device that can be miniaturized or highly integrated. The present invention includes first to third transistors and first to fourth insulating layers. The first transistor has first to third conductive layers, a fifth insulating layer, and a first semiconductor layer; the first insulating layer, the third conductive layer, and the second insulating layer above the first conductive layer have a first opening; the fifth insulating layer is in contact with a sidewall of the first opening; the first semiconductor layer is in contact with the bottom part of the first opening and a side surface of the fifth insulating layer; the second conductive layer is above and in contact with the first semiconductor layer; the second (third) transistor has the second, fourth, and fifth (sixth to eighth) conductive layers, the sixth (seventh) insulating layer, and the second (third) semiconductor layers; the third (fourth) insulating layer and the fourth (seventh) conductive layer above the second (sixth) conductive layer have a second (third) opening; the second (third) semiconductor layer is in contact with the bottom part and sidewall of the second (third) opening; the sixth (seventh) insulating layer is above and in contact with the second (third) semiconductor layer; and the fifth (eighth) conductive layer is above and in contact with the sixth (seventh) insulating layer.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
  • H01L 21/8234 - MIS technology
  • H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components

30.

BATTERY CONTROL SYSTEM AND VEHICLE

      
Application Number IB2023060835
Publication Number 2024/095111
Status In Force
Filing Date 2023-10-27
Publication Date 2024-05-10
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Osada, Takeshi
  • Tsukamoto, Yosuke
  • Onoya, Shigeru
  • Katagiri, Haruki

Abstract

This battery control system suppresses degradation of batteries. The battery control system comprises: a first battery having a first positive electrode active material; a second battery having a second positive electrode active material; a first sensor circuit that is electrically connected to the first battery; a second sensor circuit that is electrically connected to the second battery; a first DC/DC converter that is electrically connected to the first battery; a second DC/DC converter that is electrically connected to the second battery; and a microcomputer that is electrically connected to the first sensor circuit, the second sensor circuit, the first DC/DC converter, and the second DC/DC converter. The microcomputer has a function for determining, on the basis of a signal acquired from the first sensor circuit or the second sensor circuit, output from the first DC/DC converter to a motor control circuit and output from the second DC/DC converter to the motor control circuit.

IPC Classes  ?

  • H01M 10/44 - Methods for charging or discharging
  • B60L 9/18 - Electric propulsion with power supply external to the vehicle using ac induction motors fed from dc supply lines
  • B60L 50/64 - Constructional details of batteries specially adapted for electric vehicles
  • B60L 58/10 - Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles for monitoring or controlling batteries
  • H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
  • H01M 10/48 - Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

31.

SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME

      
Application Number IB2023060839
Publication Number 2024/095113
Status In Force
Filing Date 2023-10-27
Publication Date 2024-05-10
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Koezuka, Junichi
  • Jintyou, Masami
  • Shima, Yukinori
  • Yoshizumi, Kensuke

Abstract

Provided is a semiconductor device that is easily miniaturized. Provided is a semiconductor device with reduced parasitic capacitance. This semiconductor device includes a transistor, first and second insulating layers, and wiring. The transistor has first to third conductive layers, a semiconductor layer, and a third insulating layer. The first insulating layer has a first opening reaching the first conductive layer. The semiconductor layer is in contact with the second conductive layer above the first insulating layer, as well as with the top surface of the first conductive layer and the side surface of the first insulating layer inside the first opening. The second insulating layer has a second opening reaching the semiconductor layer at a position overlapping the first opening. The third insulating layer is in contact with the side surface of the second insulating layer inside the second opening and with the semiconductor layer inside the first opening. The third conductive layer is embedded in the second opening and the first opening. The wiring is positioned above the second insulating layer and is in contact with the third conductive layer, and has a portion which overlaps the semiconductor layer or the second conductive layer through the second insulating layer.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
  • H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 41/23 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
  • H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components

32.

DISPLAY DEVICE

      
Application Number 18378206
Status Pending
Filing Date 2023-10-10
First Publication Date 2024-05-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Umezaki, Atsushi
  • Miyake, Hiroyuki

Abstract

To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor, a clock signal is input to a gate electrode of the first switching transistor, and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier

33.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18403791
Status Pending
Filing Date 2024-01-04
First Publication Date 2024-05-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Tochibayashi, Katsuaki
  • Hodo, Ryota
  • Sugaya, Kentaro
  • Yamade, Naoto

Abstract

A semiconductor device includes a transistor including, a first to fifth insulator, a first to third oxide, a first to third conductor. An opening reaching the second oxide is provided in the fourth insulator and the fifth insulator. The third oxide, the third insulator, and the third conductor are arranged sequentially from the inner wall side of the opening so as to fill the opening. In the channel length direction of the transistor, at least part of the fourth insulator in a region where the fourth insulator and the second oxide do not overlap with each other is in contact with the first insulator. In the channel width direction of the transistor, at least part of the third oxide in a region where the third oxide and the second oxide do not overlap with each other is in contact with the first insulator.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/66 - Types of semiconductor device
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

34.

LIQUID CRYSTAL DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 18404956
Status Pending
Filing Date 2024-01-05
First Publication Date 2024-05-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Ishitani, Tetsuji

Abstract

Disclosed is a liquid crystal display device which can be used in a variety of situations and applications. The liquid crystal display device comprises: a first substrate comprising a first display region, a second display region, and a third display region wherein the first display region, the second display region, and the third display region are continuously formed; a second substrate having a form which fits the first substrate; and a liquid crystal interposed between the first substrate and the second substrate. The second display region is interposed between the first display region and the second display region. The second display region is curved, and the first display region and the second display region are substantially flat.

IPC Classes  ?

  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1333 - Constructional arrangements
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

35.

Semiconductor Device, Semiconductor Wafer, and Electronic Device

      
Application Number 18411830
Status Pending
Filing Date 2024-01-12
First Publication Date 2024-05-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Sato, Eri
  • Onuki, Tatsuya
  • Yakubo, Yuto
  • Kunitake, Hitoshi

Abstract

A semiconductor device capable of measuring a minute current is provided. The semiconductor device includes an operational amplifier and a diode element. An inverting input terminal of the operational amplifier and an input terminal of the diode element are electrically connected to a first terminal to which current is input, and an output terminal of the operational amplifier and an output terminal of the diode element are electrically connected to a second terminal from which voltage is output. A diode-connected transistor that includes a metal oxide in a channel formation region is used as the diode element. Since the off-state current of the transistor is extremely low, a minute current can flow between the first terminal and the second terminal. Thus, when voltage is output from the second terminal, a minute current that flows through the first terminal can be estimated from the voltage.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or

36.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 18413153
Status Pending
Filing Date 2024-01-16
First Publication Date 2024-05-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Hosoba, Miyuki
  • Hiraishi, Suzunosuke

Abstract

Disclosed is a semiconductor device comprising a thin film transistor and wirings connected to the thin film transistor, in which the thin film transistor has a channel formation region in an oxide semiconductor layer, and a copper metal is used for at least one of a gate electrode, a source electrode, a drain electrode, a gate wiring, a source wiring, and a drain wiring. The extremely low off current of the transistor with the oxide semiconductor layer contributes to reduction in power consumption of the semiconductor device. Additionally, the use of the copper metal allows the combination of the semiconductor device with a display element to provide a display device with high display quality and negligible defects, which results from the low electrical resistance of the wirings and electrodes formed with the copper metal.

IPC Classes  ?

  • H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors

37.

LIGHT-EMITTING DISPLAY DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME

      
Application Number 18417474
Status Pending
Filing Date 2024-01-19
First Publication Date 2024-05-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Arasawa, Ryo
  • Shishido, Hideaki

Abstract

An object is to provide a light-emitting display device in which a pixel including a thin film transistor using an oxide semiconductor has a high aperture ratio. The light-emitting display device includes a plurality of pixels each including a thin film transistor and a light-emitting element. The pixel is electrically connected to a first wiring functioning as a scan line. The thin film transistor includes an oxide semiconductor layer over the first wiring with a gate insulating film therebetween. The oxide semiconductor layer is extended beyond the edge of a region where the first wiring is provided. The light-emitting element and the oxide semiconductor layer overlap with each other.

IPC Classes  ?

  • H01L 33/16 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

38.

DISPLAY APPARATUS, DISPLAY MODULE, ELECTRONIC DEVICE, AND METHOD OF MANUFACTURING DISPLAY APPARATUS

      
Application Number 18548350
Status Pending
Filing Date 2022-02-24
First Publication Date 2024-05-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Okazaki, Kenichi
  • Eguchi, Shingo
  • Hodo, Ryota

Abstract

A high-definition and high-resolution display apparatus is provided. The display apparatus includes a first light-emitting device, a second light-emitting device, an insulating layer, and a first sidewall. The first light-emitting device includes a first pixel electrode, a first light-emitting layer over the first pixel electrode, and a common electrode over the first light-emitting layer. The second light-emitting device includes a second pixel electrode, a second light-emitting layer over the second pixel electrode, and the common electrode over the second light-emitting layer. Each of an end portion of the first pixel electrode and an end portion of the second pixel electrode is covered with the insulating layer. The first sidewall is positioned over the insulating layer and covers a side surface of the first light-emitting layer.

IPC Classes  ?

  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

39.

Light-Emitting Device, Light-Emitting Apparatus, Electronic Appliance, and Lighting Device

      
Application Number 18276750
Status Pending
Filing Date 2022-02-02
First Publication Date 2024-05-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yoshiyasu, Yui
  • Hashimoto, Naoaki
  • Takahashi, Tatsuyoshi
  • Kawakami, Sachiko
  • Seo, Satoshi

Abstract

A light-emitting device having high heat resistance in a manufacturing process is provided. Provided is a light-emitting device which includes a second electrode over a first electrode with a first EL layer therebetween and in which the first EL layer includes at least a first light-emitting layer; a second EL layer is over the first EL layer; the second EL layer includes at least a second light-emitting layer, a first electron-transport layer, a second electron-transport layer, and an electron-injection layer; the first electron-transport layer is over the second light-emitting layer; the second electron-transport layer is over the first electron-transport layer; an insulating layer is in contact with the side surface of the first light-emitting layer, the side surface of the second light-emitting layer, the side surface of the first electron-transport layer, and the side surface of the second electron-transport layer; the electron-injection layer is over the second electron-transport layer; the insulating layer is positioned between the electron-injection layer and the side surface of the first light-emitting layer, the side surface of the second light-emitting layer, the side surface of the first electron-transport layer, and the side surface of the second electron-transport layer; and the second electron-transport layer includes a heteroaromatic compound including at least one heteroaromatic ring and an organic compound different from the heteroaromatic compound.

IPC Classes  ?

  • H10K 50/16 - Electron transporting layers
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit

40.

DISPLAY APPARATUS

      
Application Number 18280516
Status Pending
Filing Date 2022-03-09
First Publication Date 2024-05-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Eguchi, Shingo
  • Okazaki, Kenichi

Abstract

A display apparatus capable of see-through display is provided. The display apparatus includes a first region including a first light-emitting element, a second region including a second light-emitting element, and an insulating layer provided continuously across a third region that transmits external light. The first light-emitting element includes a first pixel electrode, a first organic layer, and a common electrode. The second light-emitting element includes a second pixel electrode, a second organic layer, and the common electrode. In each of the first organic layer and the second organic layer, an angle between a bottom surface and a side surface is greater than or equal to 60° and less than or equal to 120° in a cross sectional view. The insulating layer includes a portion overlapping with the first organic layer with the common electrode therebetween, a portion overlapping with the second organic layer with the common electrode therebetween, a portion in the third region, and has a light-transmitting property.

IPC Classes  ?

  • H10K 59/124 - Insulating layers formed between TFT elements and OLED elements
  • H10K 59/80 - Constructional details

41.

SEMICONDUCTOR DEVICE AND DISPLAY DEVICE INCLUDING THE SAME

      
Application Number 18542870
Status Pending
Filing Date 2023-12-18
First Publication Date 2024-05-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Koezuka, Junichi
  • Okazaki, Kenichi
  • Jintyou, Masami

Abstract

A change in electrical characteristics in a semiconductor device including an oxide semiconductor film is inhibited, and the reliability is improved. The semiconductor device includes a gate electrode, a first insulating film over the gate electrode, an oxide semiconductor film over the first insulating film, a source electrode electrically connected to the oxide semiconductor film, a drain electrode electrically connected to the oxide semiconductor film, a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, a first metal oxide film over the second insulating film, and a second metal oxide film over the first metal oxide film. The first metal oxide film contains at least one metal element that is the same as a metal element contained in the oxide semiconductor film. The second metal oxide film includes a region where the second metal oxide film and the first metal oxide film are mixed.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/425 - Bombardment with radiation with high-energy radiation producing ion implantation
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/66 - Types of semiconductor device

42.

DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 18388899
Status Pending
Filing Date 2023-11-13
First Publication Date 2024-05-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Nakamura, Daiki
  • Fujita, Kazuhiko

Abstract

When a base film used in a flexible display panel is bonded to a resin member for fixing the base film that is curved, the base film has creases by an environmental change such as temperature due to difference in linear expansion coefficient before and after a thermal shock. A buffer plate that is thin enough to be bent is provided between the base film used in a flexible display panel and the resin member. With the use of heat dissipation effect and heat equalization effect of the buffer plate, a structure around the panel capable of resisting the environmental change can be provided.

IPC Classes  ?

43.

DRIVING METHOD OF SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

      
Application Number 18408797
Status Pending
Filing Date 2024-01-10
First Publication Date 2024-05-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Kurokawa, Yoshiyuki

Abstract

A driving method of a semiconductor device that takes three-dimensional images with short duration is provided. In a first step, a light source starts to emit light, and first potential corresponding to the total amount of light received by a first photoelectric conversion element and a second photoelectric conversion element is written to a first charge accumulation region. In a second step, the light source stops emitting light and second potential corresponding to the total amount of light received by the first photoelectric conversion element and the second photoelectric conversion element is written to a second charge accumulation region. In a third step, first data corresponding to the potential written to the first charge accumulation region is read. In a fourth step, second data corresponding to the potential written to the second charge accumulation region is read.

IPC Classes  ?

  • H04N 25/77 - Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
  • G01S 7/481 - Constructional features, e.g. arrangements of optical elements
  • G01S 7/4863 - Detector arrays, e.g. charge-transfer gates
  • G01S 17/02 - Systems using the reflection of electromagnetic waves other than radio waves
  • G01S 17/89 - Lidar systems, specially adapted for specific applications for mapping or imaging
  • G01S 17/894 - 3D imaging with simultaneous measurement of time-of-flight at a 2D array of receiver pixels, e.g. time-of-flight cameras or flash lidar
  • H01L 27/146 - Imager structures
  • H04N 25/42 - Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled by switching between different modes of operation using different resolutions or aspect ratios, e.g. switching between interlaced and non-interlaced mode
  • H04N 25/46 - Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled by combining or binning pixels
  • H04N 25/778 - Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself

44.

Display Device and Electronic Device Including the Display Device

      
Application Number 18415901
Status Pending
Filing Date 2024-01-18
First Publication Date 2024-05-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Hosaka, Yasuharu
  • Shima, Yukinori
  • Okazaki, Kenichi
  • Yamazaki, Shunpei

Abstract

The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.

IPC Classes  ?

  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • G02F 1/1333 - Constructional arrangements
  • G02F 1/1335 - Structural association of cells with optical devices, e.g. polarisers or reflectors
  • G02F 1/1337 - Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
  • G02F 1/1345 - Conductors connecting electrodes to cell terminals
  • G02F 1/1362 - Active matrix addressed cells
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

45.

POWER STORAGE DEVICE MANAGEMENT SYSTEM AND ELECTRONIC DEVICE

      
Application Number 18550314
Status Pending
Filing Date 2022-03-08
First Publication Date 2024-05-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Osada, Takeshi
  • Tsukamoto, Yosuke
  • Tajima, Ryota

Abstract

A power storage device management system, a management method, and a computer program that use AI are provided. The power storage device management system includes an electronic device including a power storage device and a server device. The power storage device includes a control portion and a storage battery; the control portion has a first function of creating second data utilizing first data at a first point in time and a second function of transmitting the second data to the server device; the server device has a third function of creating first data at a second point in time utilizing the second data and a fourth function of transmitting the first data at the second point in time to the control portion; and the first function, the second function, the third function, and the fourth function are repeatedly performed.

IPC Classes  ?

  • G01R 31/367 - Software therefor, e.g. for battery testing using modelling or look-up tables
  • G01R 31/3835 - Arrangements for monitoring battery or accumulator variables, e.g. SoC involving only voltage measurements
  • H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

46.

MANUFACTURING EQUIPMENT FOR LIGHT-EMITTING DEVICE

      
Application Number 18280517
Status Pending
Filing Date 2022-03-11
First Publication Date 2024-05-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Hodo, Ryota
  • Jinbo, Yasuhiro
  • Okazaki, Kenichi

Abstract

Manufacturing equipment in which processes from processing to sealing of an organic compound film can be successively performed is provided. A patterning process of a light-emitting device and a sealing process that is performed to prevent the surface and side surface of an organic layer from being exposed to the air can be performed successively, whereby a minute light-emitting device with high luminance and high reliability can be formed. Moreover, the manufacturing equipment can be incorporated in in-line manufacturing equipment where apparatuses are arranged in the order of processes for a light-emitting device, resulting in high throughput manufacturing.

IPC Classes  ?

  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 71/10 - Deposition of organic active material
  • H10K 71/20 - Changing the shape of the active layer in the devices, e.g. patterning
  • H10K 71/40 - Thermal treatment, e.g. annealing in the presence of a solvent vapour

47.

Display Device

      
Application Number 18280556
Status Pending
Filing Date 2022-03-03
First Publication Date 2024-05-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yanagisawa, Yuichi
  • Yamane, Yasumasa

Abstract

A display device with high display quality is provided. A highly reliable display device is provided. A display device with low power consumption is provided. A display device that can easily achieve a higher resolution is provided. A display device with both high display quality and a high resolution is provided. A display device with high contrast is provided. The display device includes a first pixel, a second pixel arranged to be adjacent to the first pixel, and a first insulating layer; the first pixel includes a first pixel electrode, a first EL layer over the first pixel electrode, and a common electrode over the first EL layer; the second pixel includes a second pixel electrode, a second EL layer over the second pixel electrode, and the common electrode over the second EL layer; a side surface of the first EL layer and a side surface of the second EL layer each include a region in contact with the first insulating layer; a side surface of the first pixel electrode is covered with the first EL layer; and a side surface of the second pixel electrode is covered with the second EL layer.

IPC Classes  ?

  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

48.

METHOD FOR FABRICATING DISPLAY DEVICE

      
Application Number 18279942
Status Pending
Filing Date 2022-03-01
First Publication Date 2024-05-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Eguchi, Shingo
  • Uochi, Hideki

Abstract

A method for fabricating a novel display device is provided. The method for fabricating the display device includes a step of forming an anode, a first EL layer, a first cathode, and a first layer in this order; a step of forming a first resist mask over the first layer; a step of selectively removing parts of the anode, the first EL layer, the first cathode, and the first layer; a step of removing part of the first resist mask; a step of selectively removing other parts of the first EL layer, the first cathode, and the first layer; and a step of removing the first resist mask. The first resist mask is formed using a multi-tone mask.

IPC Classes  ?

  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 71/16 - Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
  • H10K 71/60 - Forming conductive regions or layers, e.g. electrodes

49.

Electronic device

      
Application Number 18133631
Grant Number 11977415
Status In Force
Filing Date 2023-04-12
First Publication Date 2024-05-07
Grant Date 2024-05-07
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Hiroki, Masaaki

Abstract

A sturdy electronic device is provided. A reliable electronic device is provided. A novel electronic device is provided. An electronic device includes a first board, a second board, a display portion having flexibility, and a power storage device having flexibility. The first board and the second board face each other. The display portion and the power storage device are provided between the first board and the second board. The display portion includes a first surface facing the power storage device. The first surface includes a first region not fixed to the power storage device. The first region overlaps with a display region of the display portion.

IPC Classes  ?

50.

ORGANOMETALLIC COMPLEX AND LIGHT-EMITTING DEVICE

      
Application Number 18370219
Status Pending
Filing Date 2023-09-19
First Publication Date 2024-05-02
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamaguchi, Tomoya
  • Yoshizumi, Hideko
  • Yoshiyasu, Yui
  • Takabatake, Masatoshi
  • Murakami, Hiroki
  • Ohsawa, Nobuharu
  • Kido, Hiromitsu

Abstract

To provide a novel organometallic complex and a novel light-emitting device that are useful or reliable. The organometallic complex includes platinum (Pt), a cyano group, and a phenyl group that has two alkyl groups at the ortho-positions. The light-emitting device includes an organic compound layer held between a pair of electrodes; the organic compound layer includes a light-emitting layer; the light-emitting layer contains an organic compound and the organometallic complex; the organometallic complex includes platinum (Pt), a cyano group, and a phenyl group that has two alkyl groups at the ortho-positions; and the difference between the LUMO level of the organic compound and the HOMO level of the organometallic complex is greater than or equal to 2.5 eV and less than or equal to 3.0 eV.

IPC Classes  ?

  • H10K 85/30 - Coordination compounds
  • C07F 15/00 - Compounds containing elements of Groups 8, 9, 10 or 18 of the Periodic System
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials

51.

DISPLAY PANEL AND DISPLAY DEVICE

      
Application Number 18381228
Status Pending
Filing Date 2023-10-18
First Publication Date 2024-05-02
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Nakamura, Daiki
  • Sugisawa, Nozomu

Abstract

A display device including display regions with inconspicuous seam is provided. The display device includes a first display panel and a second display panel. The first display panel includes a first display region and a visible-light-transmitting region. The second display panel includes a second display region. The first display region is adjacent to the visible-light-transmitting region. The first display region includes a first light-emitting element and a second light-emitting element. A first common electrode included in the first light-emitting element includes a portion in contact with a second common electrode included in the second light-emitting element. The first common electrode has a function of reflecting visible light. The second common electrode has a function of transmitting visible light. The second light-emitting element is positioned closer to the visible-light-transmitting region than the first light-emitting element. The second display region includes a portion overlapping with the second light-emitting element and a portion overlapping with the visible-light-transmitting region.

IPC Classes  ?

  • H10K 50/856 - Arrangements for extracting light from the devices comprising reflective means
  • H10K 50/828 - Transparent cathodes, e.g. comprising thin metal layers
  • H10K 50/844 - Encapsulations
  • H10K 59/90 - Assemblies of multiple devices comprising at least one organic light-emitting element

52.

OCCUPANT PROTECTION DEVICE

      
Application Number 18381330
Status Pending
Filing Date 2023-10-18
First Publication Date 2024-05-02
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Ikeda, Takayuki
  • Kurokawa, Yoshiyuki

Abstract

An occupant protection device which can protect an occupant without delay is provided. An image taken by an imaging device is analyzed to judge whether there is an object approaching the subject car. In the case where a collision between the object and the subject car is judged to be inevitable, an airbag device is activated before the collision, whereby the occupant can be protected without delay. By using selenium for a light-receiving element of the imaging device, an accurate image can be obtained even under low illuminance. Imaging in a global shutter system leads to an accurate image with little distortion. This enables more accurate image analysis.

IPC Classes  ?

  • B60R 21/0134 - Electrical circuits for triggering safety arrangements in case of vehicle accidents or impending vehicle accidents including means for detecting collisions, impending collisions or roll-over responsive to imminent contact with an obstacle
  • B60R 21/00 - Arrangements or fittings on vehicles for protecting or preventing injuries to occupants or pedestrians in case of accidents or other traffic risks
  • G06V 20/56 - Context or environment of the image exterior to a vehicle by using sensors mounted on the vehicle

53.

OPERATION METHOD OF SEMICONDUCTOR DEVICE

      
Application Number 18382077
Status Pending
Filing Date 2023-10-20
First Publication Date 2024-05-02
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Rikimaru, Hidefumi
  • Inoue, Seiko
  • Godo, Hiromichi
  • Kurokawa, Yoshiyuki

Abstract

To provide an operation method of a semiconductor device in which a variation in arithmetic operation results is reduced. The semiconductor device includes first and second cell arrays and first to fifth circuits. First, third standard data is written from the fourth circuit to the second cell array, and first standard data is written from the first circuit to the first cell array. Then, second standard data is transmitted from the second circuit to the first cell array, a result of a product-sum operation of the first standard data and the second standard data is input from the first cell array to the third circuit, and fourth standard data corresponding to the result of the product-sum operation is transmitted from the third circuit to the second cell array. A result of a product-sum operation of the third standard data and the fourth standard data is input from the second cell array to the fifth circuit, and an output value corresponding to the result of the product-sum operation is output from the fifth circuit. Correction data corresponding to the difference between the output value and an expected value is retained in an empty cell of the first cell array and correction coefficients of the first and second cell arrays are calculated.

IPC Classes  ?

  • G06F 11/10 - Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens
  • G06F 7/544 - Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using unspecified devices for evaluating functions by calculation
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance

54.

SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

      
Application Number 18391970
Status Pending
Filing Date 2023-12-21
First Publication Date 2024-05-02
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kimura, Hajime
  • Kurokawa, Yoshiyuki

Abstract

A semiconductor device that can perform product-sum operation with low power consumption is provided. The semiconductor device includes first and second circuits; the first circuit includes a first holding node and the second circuit includes a second holding node. The first circuit is electrically connected to first and second input wirings and first and second wirings, the second circuit is electrically connected to the first and second input wirings and the first and second wirings, and the first and second circuits each have a function of holding first and second potentials corresponding to first data at the first and second holding nodes. When a potential corresponding to second data is input to each of the first and second input wirings, the first circuit outputs a current to one of the first wiring and the second wiring and the second circuit outputs a current to the other of the first wiring and the second wiring. The currents output from the first and second circuits to the first wiring or the second wiring are determined in accordance with the first and second potentials held at the first and second holding nodes.

IPC Classes  ?

  • H10B 61/00 - Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
  • H03K 19/20 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
  • H10B 63/00 - Resistance change memory devices, e.g. resistive RAM [ReRAM] devices

55.

Display Device

      
Application Number 18410743
Status Pending
Filing Date 2024-01-11
First Publication Date 2024-05-02
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Nakamura, Daiki
  • Fujita, Kazuhiko

Abstract

Damage to a flexible display can be prevented. A display device having improved mechanical strength can be provided. A display device (10) includes a display panel (11) and a protection cover (12). The display panel (11) includes a first portion having flexibility. The protection cover (12) has a light-transmitting property and flexibility and is provided to overlap with a display surface side of the display panel (11). The display device (10) has a function of being reversibly changed in shape to a first mode in which the display panel (11) and the protection cover (12) are each substantially flat and a second mode in which the first portion of the display panel (11) is curved such that the display surface side becomes a concave surface and part of the protection cover (12) is curved in the same direction as the first portion. In the second mode, there is a gap between the first portion and the protection cover.

IPC Classes  ?

  • G06F 1/16 - Constructional details or arrangements
  • G02B 1/14 - Protective coatings, e.g. hard coatings
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements

56.

Display Device and Control Program

      
Application Number 18411465
Status Pending
Filing Date 2024-01-12
First Publication Date 2024-05-02
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Ikeda, Takayuki
  • Okamoto, Yuki
  • Takahashi, Kei
  • Yamazaki, Shunpei

Abstract

A display device with excellent visibility can be provided. The display device includes a display region displayed by a light-emitting element. In the display region, a point touched by a user is a first point, a point which has been touched by the user prior to the first point is a second point, a vector that starts at the first point and ends at the second point is a first vector, a vector obtained by multiplying the first vector by k (k is a real number) is a second vector, and a point that is the second vector away from the first point is a third point, the display region includes a first region and a second region obtained by excluding the first region from the display region, The first region includes a first circle and a second circle, the center of the first circle is the first point, and the center of the second circle is the third point. The luminance in the first region is higher than the luminance in the second region.

IPC Classes  ?

  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 1/3203 - Power management, i.e. event-based initiation of a power-saving mode
  • G06F 1/3234 - Power saving characterised by the action undertaken
  • G06F 3/04883 - Interaction techniques based on graphical user interfaces [GUI] using specific features provided by the input device, e.g. functions controlled by the rotation of a mouse with dual sensing arrangements, or of the nature of the input device, e.g. tap gestures based on pressure sensed by a digitiser using a touch-screen or digitiser, e.g. input of commands through traced gestures for inputting data by handwriting, e.g. gesture or text

57.

METHOD FOR MANUFACTURING DISPLAY APPARATUS

      
Application Number 18263362
Status Pending
Filing Date 2022-01-20
First Publication Date 2024-05-02
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yanagisawa, Yuichi
  • Sasagawa, Shinya
  • Nishizaki, Shiro
  • Hodo, Ryota

Abstract

A method for manufacturing a display apparatus with high display quality is provided. The method is for manufacturing a display apparatus including first to third insulators, first and second conductors, and a first EL layer. The first conductor is formed over the first insulator, and the second insulator is formed over the first insulator and over the first conductor. Next, a first opening portion reaching the first conductor is formed in a region of the second insulator overlapping with the first conductor. A positive photoresist is applied to regions over the first and second insulators and over the first conductor, and a second opening portion with an inversely tapered structure reaching the first conductor and the second insulator is formed in a region of the photoresist overlapping with the first opening portion and the first conductor. The first EL layer, the second conductor, and the third insulator are sequentially formed on a bottom portion of the second opening portion of the photoresist and over the photoresist, and then, the photoresist and the first EL layer, the second conductor, and the third insulator formed over the photoresist are removed.

IPC Classes  ?

  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/124 - Insulating layers formed between TFT elements and OLED elements
  • H10K 59/32 - Stacked devices having two or more layers, each emitting at different wavelengths
  • H10K 71/10 - Deposition of organic active material
  • H10K 71/20 - Changing the shape of the active layer in the devices, e.g. patterning
  • H10K 71/60 - Forming conductive regions or layers, e.g. electrodes
  • H10K 85/10 - Organic polymers or oligomers

58.

Light-Emitting Apparatus and Electronic Device

      
Application Number 18275759
Status Pending
Filing Date 2022-02-02
First Publication Date 2024-05-02
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yoshiyasu, Yui
  • Hashimoto, Naoaki
  • Takahashi, Tatsuyoshi
  • Kawakami, Sachiko
  • Seo, Satoshi

Abstract

A light-emitting device with a high resolution and favorable characteristics manufactured by a photolithography method is provided. In the light-emitting device, a first light-emitting device and a second light-emitting device are adjacent each other. The first light-emitting device includes a first EL layer, and the second light-emitting device includes a second EL layer. The first EL layer includes at least a first light-emitting layer and a first electron-transport layer, and the second EL layer includes at least a second light-emitting layer and a second electron-transport layer. The first electron-transport layer contains a first heteroaromatic compound and a first organic compound, and the second electron-transport layer contains a second heteroaromatic compound and a second organic compound. Edge portions of the first light-emitting layer and the first electron-transport layer are aligned, and edge portions of the second light-emitting layer and the second electron-transport layer are substantially aligned. The distance between the first light-emitting device and the second light-emitting device facing each other is 2 μm to 5 μm.

IPC Classes  ?

  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/16 - Electron transporting layers
  • H10K 50/17 - Carrier injection layers
  • H10K 59/95 - Assemblies of multiple devices comprising at least one organic light-emitting element comprising only organic light-emitting elements
  • H10K 71/20 - Changing the shape of the active layer in the devices, e.g. patterning
  • H10K 85/10 - Organic polymers or oligomers

59.

DISPLAY APPARATUS

      
Application Number 17768726
Status Pending
Filing Date 2020-10-19
First Publication Date 2024-05-02
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Okamoto, Yuki
  • Onuki, Tatsuya

Abstract

A display apparatus that can display a high-resolution image can be provided. In the display apparatus, a first layer and a second layer are stacked. In the first layer, an arithmetic circuit and a data driver circuit and are provided, and in the second layer, a display portion is provided. In the arithmetic circuit, a neural network is configured. The display portion has a region overlapping with the data driver circuit. The arithmetic circuit has a function of performing arithmetic processing using the neural network on image data and supplying the arithmetically-processed image data to the data driver circuit.

IPC Classes  ?

  • G06T 3/4046 - using neural networks
  • G02F 1/1362 - Active matrix addressed cells
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • G06T 1/20 - Processor architectures; Processor configuration, e.g. pipelining
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals

60.

Light-Emitting Element, Light-Emitting Device, Electronic Device, Lighting Device, and Organic Compound

      
Application Number 18381846
Status Pending
Filing Date 2023-10-19
First Publication Date 2024-05-02
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Seo, Satoshi
  • Hamada, Takao
  • Takahashi, Tatsuyoshi
  • Kitano, Yasushi
  • Suzuki, Hiroki
  • Inoue, Hideko

Abstract

To provide a light-emitting element with an improved reliability, a light-emitting element with a high current efficiency (or a high quantum efficiency), and a novel dibenzo[f,h]quinoxaline derivative that is favorably used in a light-emitting element which is one embodiment of the present invention. A light-emitting element includes an EL layer between an anode and a cathode. The EL layer includes a light-emitting layer; the light-emitting layer contains a first organic compound having an electron-transport property and a hole-transport property, a second organic compound having a hole-transport property, and a light-emitting substance; the combination of the first organic compound and the second organic compound forms an exciplex; the HOMO level of the first organic compound is lower than the HOMO level of the second organic compound; and a difference between the HOMO level of the first organic compound and the HOMO level of the second organic compound is less than or equal to 0.4 eV.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • C07D 403/14 - Heterocyclic compounds containing two or more hetero rings, having nitrogen atoms as the only ring hetero atoms, not provided for by group containing three or more hetero rings

61.

MEMORY DEVICE

      
Application Number 18382075
Status Pending
Filing Date 2023-10-20
First Publication Date 2024-05-02
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Matsuzaki, Takanori
  • Inoue, Hiroki
  • Okamoto, Yuki

Abstract

A memory device that can be highly integrated is provided. The memory device includes a first transistor and a second transistor in a memory cell, and small-area vertical transistors each including a channel formation region on a side surface of an opening portion provided in an insulating layer are used as the two transistors. The memory cell includes a conductor having a function of a gate electrode of the first transistor and a function of one of a source electrode and a drain electrode of the second transistor. The memory cells are placed in a staggered arrangement, so that the memory device can be highly integrated.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices

62.

SEMICONDUCTOR DEVICE AND DISPLAY DEVICE

      
Application Number 18383078
Status Pending
Filing Date 2023-10-24
First Publication Date 2024-05-02
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kimura, Hajime
  • Umezaki, Atsushi

Abstract

A semiconductor device including a circuit which does not easily deteriorate is provided. The semiconductor device includes a first transistor, a second transistor, a first switch, a second switch, and a third switch. A first terminal of the first transistor is connected to a first wiring. A second terminal of the first transistor is connected to a second wiring. A gate and a first terminal of the second transistor are connected to the first wiring. A second terminal of the second transistor is connected to a gate of the first transistor. The first switch is connected between the second wiring and a third wiring. The second switch is connected between the second wiring and the third wiring. The third switch is connected between the gate of the first transistor and the third wiring.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G02F 1/133 - Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
  • G02F 1/1339 - Gaskets; Spacers; Sealing of cells
  • G02F 1/1362 - Active matrix addressed cells
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/786 - Thin-film transistors

63.

DISPLAY DEVICE AND DISPLAY MODULE

      
Application Number 18396100
Status Pending
Filing Date 2023-12-26
First Publication Date 2024-05-02
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kimura, Hajime
  • Ishitani, Tetsuji

Abstract

To provide a display device or the like that enables stable curing of a resin. The display device includes a first circuit and a second circuit over the same substrate. The first circuit has a function of performing display; the second circuit has a function of driving the first circuit; the second circuit includes a transistor and a capacitor; the transistor includes an oxide semiconductor layer over a first insulating layer; the capacitor includes a first conductive layer, a second insulating layer, and a second conductive layer; the first conductive layer is positioned over the first insulating layer; one of a source and a drain of the transistor is electrically connected to the second conductive layer; and the first conductive layer and the oxide semiconductor layer include the same metal element.

IPC Classes  ?

  • G02F 1/1345 - Conductors connecting electrodes to cell terminals
  • G02F 1/1362 - Active matrix addressed cells
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors

64.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 18407630
Status Pending
Filing Date 2024-01-09
First Publication Date 2024-05-02
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Miyairi, Hidekazu
  • Miyanaga, Akiharu
  • Akimoto, Kengo
  • Shiraishi, Kojiro

Abstract

To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device

65.

ELECTRONIC DEVICE, IMAGE DISPLAY METHOD, PROGRAM, AND DISPLAY SYSTEM

      
Application Number 18408766
Status Pending
Filing Date 2024-01-10
First Publication Date 2024-05-02
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Yoshizumi, Kensuke

Abstract

A convenient electronic device or the like is provided. The power consumption of an electronic device or the like is reduced. An electronic device or the like having high visibility regardless of the brightness of external light is provided. An electronic device or the like that can display both a smooth moving image and an eye-friendly still image is provided. Such an electronic device is an electronic device including a first display portion, a second display portion, and a control portion. The control portion is configured to make the first display portion and the second display portion individually display two or more of a first image, a second image, and a third image at a time. The first image is displayed with reflected light, the second image is displayed with emitted light, and the third image is displayed with light including both reflected light and emitted light.

IPC Classes  ?

  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G02F 1/1333 - Constructional arrangements
  • G06F 1/16 - Constructional details or arrangements
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G09G 3/00 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix

66.

METHOD FOR FORMING COMPOSITE OXIDE, POSITIVE ELECTRODE, LITHIUM-ION SECONDARY BATTERY, ELECTRONIC DEVICE, POWER STORAGE SYSTEM, AND MOVING VEHICLE

      
Application Number 18549274
Status Pending
Filing Date 2022-03-01
First Publication Date 2024-05-02
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Saito, Jo
  • Momma, Yohei
  • Takahashi, Tatsuyoshi
  • Kurosawa, Nao
  • Suzuki, Kunihiko

Abstract

A novel positive electrode active material, a novel positive electrode, and a novel lithium-ion secondary battery are to be provided. The lithium-ion secondary battery includes a positive electrode, a negative electrode, and an electrolyte. The positive electrode includes a positive electrode active material that includes a composite oxide containing lithium and cobalt. The positive electrode active material includes barium, magnesium, and aluminum in a surface portion. When being analyzed, the surface portion preferably includes a region where a first point of the highest barium concentration and a second point of the highest magnesium concentration exist closer to the surface than a third point of the highest aluminum concentration does.

IPC Classes  ?

  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
  • H01M 4/583 - Carbonaceous material, e.g. graphite-intercalation compounds or CFx
  • H01M 4/88 - Processes of manufacture
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
  • H01M 10/0562 - Solid materials

67.

SEMICONDUCTOR DEVICE, DISPLAY APPARATUS, AND ELECTRONIC DEVICE

      
Application Number 18279110
Status Pending
Filing Date 2022-02-22
First Publication Date 2024-05-02
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yoshimoto, Satoshi
  • Kawashima, Susumu
  • Watanabe, Kazunori
  • Atsumi, Tomoaki
  • Kusunoki, Koji

Abstract

Provided is a highly reliable semiconductor device. The present invention relates to a shift register circuit including a plurality of stages of sequential circuits. An output signal of a sequential circuit is input to a sequential circuit in the subsequent stage. Before a sequential circuit outputs a signal and after the sequential circuit outputs the signal, the potential of a gate of a transistor included in the sequential circuit is changed in accordance with a clock signal so as to avoid voltage stress application between the gate and a source of the transistor for a long time. The shift register circuit can be applied to a scan line driver circuit of a display apparatus, for example.

IPC Classes  ?

  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

68.

SEMICONDUCTOR DEVICE

      
Application Number 18288413
Status Pending
Filing Date 2022-04-26
First Publication Date 2024-05-02
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Matsuzaki, Takanori
  • Okamoto, Yuki
  • Onuki, Tatsuya
  • Kunitake, Hitoshi

Abstract

A semiconductor device having a novel structure is provided. The semiconductor device includes a first substrate provided with a first peripheral circuit having a function of driving a first memory cell and a first memory cell layer including a second substrate and a first element layer including the first memory cell. The first memory cell includes a first transistor and a first capacitor. The first transistor includes a semiconductor layer including a metal oxide in its channel formation region. The first memory cell layer is provided to be stacked over the first substrate in a direction perpendicular or substantially perpendicular to a surface of the first substrate. The second substrate includes a circuit for performing writing of data to or reading of data from the first memory cell. The first peripheral circuit and the first memory cell are electrically connected to each other through a first through electrode provided in the second substrate and the first element layer.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H10B 10/00 - Static random access memory [SRAM] devices
  • H10B 41/27 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
  • H10B 41/40 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
  • H10B 43/27 - EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
  • H10B 43/40 - EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
  • H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass

69.

SEMICONDUCTOR DEVICE

      
Application Number IB2023060658
Publication Number 2024/089570
Status In Force
Filing Date 2023-10-23
Publication Date 2024-05-02
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kurokawa, Yoshiyuki
  • Matsuzaki, Takanori
  • Kobayashi, Hidetomo

Abstract

Provided is a new semiconductor device. This semiconductor device has: a memory cell circuit having a first transistor and a capacitive element; and a read-out circuit having a second transistor and a third transistor. An element layer including the third transistor is provided on a substrate. A first insulator is provided on the element layer. A second insulator is provided on the first insulator. The first insulator has a first opening that is provided so as to extend in a direction generally perpendicular to the surface of the substrate. The second insulator has a second opening that is provided so as to extend in a direction generally perpendicular to the surface of the substrate, and a third opening. The second opening has a region overlapping the first opening. At least a portion of a dielectric included in the capacitive element is provided in the first opening. At least a portion of a semiconductor included in the first transistor is provided in the second opening. At least a portion of a semiconductor included in the second transistor is provided in the third opening.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • G11C 11/4091 - Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/8234 - MIS technology
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/786 - Thin-film transistors
  • H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
  • H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
  • H10B 10/00 - Static random access memory [SRAM] devices
  • H10B 41/20 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
  • H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
  • H10B 53/40 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the peripheral circuit region

70.

SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS

      
Application Number IB2023060659
Publication Number 2024/089571
Status In Force
Filing Date 2023-10-23
Publication Date 2024-05-02
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Matsuzaki, Takanori
  • Isaka, Fumito

Abstract

Provided is a semiconductor device having favorable electrical properties. This semiconductor device has a transistor, a first interlayer insulating layer, and a second interlayer insulating layer on the first interlayer insulating layer. The transistor has a first conductive layer that functions as one among a source electrode and a drain electrode, and a second conductive layer that functions as the other among the source electrode and the drain electrode, the first and second interlayer insulating layers being provided between the first conductive layer and the second conductive layer. An opening section that reaches the first conductive layer is provided in the first and second interlayer insulating layers and the second conductive layer, and a semiconductor layer, a first gate insulating layer, and a first gate electrode are provided in said order so as to have regions positioned inside the opening section. A second gate electrode is provided between the first interlayer insulating layer and the second interlayer insulating layer so as to cover a side surface of the semiconductor layer. The second gate electrode has an oxide region that has a region contacting the semiconductor layer. The oxide region functions as a second gate insulating layer.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/8234 - MIS technology
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

71.

MANUFACTURING METHOD OF DISPLAY APPARATUS AND DISPLAY APPARATUS

      
Application Number 18373324
Status Pending
Filing Date 2023-09-27
First Publication Date 2024-04-25
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Nakazawa, Yasutaka
  • Ohide, Takayuki
  • Goto, Naoto
  • Adachi, Hiroki
  • Idojiri, Satoru
  • Yamawaki, Hayato
  • Okazaki, Kenichi
  • Kawakami, Sachiko

Abstract

A method for manufacturing a novel display apparatus is provided. The method includes a first step of forming a first electrode, a second electrode, and a first gap over an insulating film, a second step of forming a first film over the second electrode; a third step of forming a first layer overlapping with the first electrode, a fourth step of removing the first film by an etching method to form a first unit overlapping with the first electrode, a fifth step of removing a surface of the second electrode, a sixth step of forming a second film over the first layer and the second electrode, a seventh step of forming a second layer overlapping with the second electrode, and an eighth step of removing the second film by an etching method using the second layer to form a second unit overlapping with the second electrode and a second gap.

IPC Classes  ?

  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks

72.

Organic Compound, Light-Emitting Device, and Electronic Device

      
Application Number 18374838
Status Pending
Filing Date 2023-09-29
First Publication Date 2024-04-25
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kawakami, Sachiko
  • Kajiyama, Kazuki

Abstract

A highly heat-resistant organic compound with favorable hole-transport properties is provided. The organic compound is represented by General Formula (G1). In General Formula (G1), X represents a sulfur atom or an oxygen atom, and R21 to R25 and R27 to R30 each independently represent any one of hydrogen, halogen, a nitrile group, an alkenyl group, a vinyl group, an alkynyl group, an ethynyl group, a straight-chain alkyl group having 1 to 6 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkylsilyl group having 3 to 10 carbon atoms, an aryl group having 6 to 30 carbon atoms, and a heteroaryl group having 2 to 30 carbon atoms. Ar1 represents an aryl group having 6 to 30 carbon atoms or a heteroaryl group having 2 to 30 carbon atoms. Ar2 is represented by General Formula (G1-1). A highly heat-resistant organic compound with favorable hole-transport properties is provided. The organic compound is represented by General Formula (G1). In General Formula (G1), X represents a sulfur atom or an oxygen atom, and R21 to R25 and R27 to R30 each independently represent any one of hydrogen, halogen, a nitrile group, an alkenyl group, a vinyl group, an alkynyl group, an ethynyl group, a straight-chain alkyl group having 1 to 6 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkylsilyl group having 3 to 10 carbon atoms, an aryl group having 6 to 30 carbon atoms, and a heteroaryl group having 2 to 30 carbon atoms. Ar1 represents an aryl group having 6 to 30 carbon atoms or a heteroaryl group having 2 to 30 carbon atoms. Ar2 is represented by General Formula (G1-1).

IPC Classes  ?

  • C07C 211/55 - Diphenylamines
  • C07D 307/91 - Dibenzofurans; Hydrogenated dibenzofurans
  • C07D 307/92 - Naphthofurans; Hydrogenated naphthofurans
  • C07D 333/74 - Naphthothiophenes
  • C07D 333/76 - Dibenzothiophenes
  • C07D 411/12 - Heterocyclic compounds containing two or more hetero rings, at least one ring having oxygen and sulfur atoms as the only ring hetero atoms containing two hetero rings linked by a chain containing hetero atoms as chain links
  • H10K 85/60 - Organic compounds having low molecular weight

73.

SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

      
Application Number 18278451
Status Pending
Filing Date 2022-02-24
First Publication Date 2024-04-25
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kurokawa, Yoshiyuki
  • Godo, Hiromichi
  • Tsuda, Kazuki
  • Ohshita, Satoru
  • Rikimaru, Hidefumi

Abstract

A semiconductor device with a novel structure is provided. The semiconductor device includes a cell array performing a product-sum operation of a first layer and a product-sum operation of a second layer in an artificial neural network, a first circuit from which first data is input to the cell array, and a second circuit to which second data is output from the cell array. The cell array includes a plurality of cells. The cell array includes a first region and a second region. In a first period, the first region is supplied with the t-th (t is a natural number greater than or equal to 2) first data from the first circuit and outputs the t-th second data according to the product-sum operation of the first layer to the second circuit. In the first period, the second region is supplied with the (t+1)-th first data from the first circuit and outputs the (t+1)-th second data according to the product-sum operation of the second layer to the first circuit.

IPC Classes  ?

  • G06F 7/523 - Multiplying only
  • G06F 7/50 - Adding; Subtracting
  • G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
  • G11C 11/405 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements

74.

SEMICONDUCTOR DEVICE

      
Application Number 18538009
Status Pending
Filing Date 2023-12-13
First Publication Date 2024-04-25
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Yamazaki, Shunpei

Abstract

Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.

IPC Classes  ?

  • H01L 27/105 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
  • G11C 11/405 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
  • G11C 16/04 - Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/46 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 21/8258 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using a combination of technologies covered by , , or
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/786 - Thin-film transistors
  • H10B 41/10 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
  • H10B 41/20 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
  • H10B 41/30 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
  • H10B 41/35 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
  • H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components

75.

DISPLAY APPARATUS, DISPLAY MODULE, ELECTRONIC DEVICE, AND METHOD OF MANUFACTURING DISPLAY APPARATUS

      
Application Number 18548186
Status Pending
Filing Date 2022-02-24
First Publication Date 2024-04-25
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Hodo, Ryota
  • Sasagawa, Shinya
  • Hiura, Yoshikazu
  • Fujie, Takahiro

Abstract

A high-definition and high-resolution display apparatus is provided. A conductive film, a first layer, and a first sacrificial layer are formed. The first layer and the first sacrificial layer are processed to expose part of the conductive film. A second layer and a second sacrificial layer are formed over the first sacrificial layer and the conductive film. The second layer and the second sacrificial layer are processed to expose part of the conductive film. The conductive film is processed to form a first pixel electrode overlapping with the first sacrificial layer and a second pixel electrode overlapping with the second sacrificial layer. Two insulating films covering at least a side surface of the first pixel electrode, a side surface of the second pixel electrode, a side surface of the first layer, a side surface of the second layer, a side surface and a top surface of the first sacrificial layer, and a side surface and atop surface of the second sacrificial layer are formed. The two insulating films are processed to form a sidewall covering at least the side surface of the first pixel electrode and the side surface of the first layer. The first sacrificial layer and the second sacrificial layer are removed. A common electrode is formed over the first layer and the second layer.

IPC Classes  ?

  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

76.

SEMICONDUCTOR DEVICE AND STORAGE DEVICE

      
Application Number IB2023060395
Publication Number 2024/084366
Status In Force
Filing Date 2023-10-16
Publication Date 2024-04-25
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Isaka, Fumito
  • Egi, Yuji
  • Ohno, Toshikazu
  • Okuno, Naoki
  • Takahashi, Hironobu
  • Kunitake, Hitoshi
  • Kakehata, Tetsuya

Abstract

Provided is a semiconductor device that enables miniaturization or higher integration. Provided is an oxide semiconductor suitable for the semiconductor device. Formed is an oxide semiconductor that has a small difference in thickness between a section provided along a first surface and a section provided along a second surface which is inclined relative to the first surface. A precursor having an aluminum content of 0.01 ppm to 500 ppm is used to deposit a layer, by automatic layer deposition (ALD), on an oxide semiconductor having an aluminum concentration of 0.01 atom percent to 10 atom percent. Furthermore, the crystallinity of the oxide semiconductor is improved by performing impurity removal processing such as microwave processing.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
  • H01L 21/268 - Bombardment with wave or particle radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
  • H01L 21/8234 - MIS technology
  • H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
  • H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region

77.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18378688
Status Pending
Filing Date 2023-10-10
First Publication Date 2024-04-25
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Okazaki, Kenichi
  • Jintyou, Masami
  • Yoshizumi, Kensuke

Abstract

A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The first insulating layer is provided over the semiconductor layer. The first conductive layer is provided over the first insulating layer. The semiconductor layer includes a first region that overlaps with the first conductive layer and the first insulating layer, a second region that does not overlap with the first conductive layer and overlaps with the first insulating layer, and a third region that overlaps with neither the first conductive layer nor the first insulating layer. The semiconductor layer contains a metal oxide. The second region and the third region contain a first element. The first element is one or more elements selected from boron, phosphorus, aluminum, and magnesium. The first element exists in a state of being bonded to oxygen.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
  • H01L 21/266 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation using masks

78.

SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

      
Application Number 18546685
Status Pending
Filing Date 2022-02-14
First Publication Date 2024-04-25
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kusunoki, Koji
  • Watanabe, Kazunori
  • Atsumi, Tomoaki
  • Yoshimoto, Satoshi

Abstract

A semiconductor device having a light sensing function and including a high-resolution display portion is provided. The semiconductor device includes a plurality of pixels, and the pixels each include first and second light-receiving devices, first to fifth transistors, a capacitor, and a first wiring. One electrode of the first light-receiving device is electrically connected to the first wiring, and the other electrode is electrically connected to one of a source and a drain of the first transistor. One electrode of the second light-receiving device is electrically connected to the first wiring, and the other electrode is electrically connected to one of a source and a drain of the second transistor. The other of the source and the drain of the second transistor is electrically connected to the other of the source and the drain of the first transistor. The other of the source and the drain of the first transistor is electrically connected to one electrode of the capacitor, one of a source and a drain of the third transistor, and a gate of the fourth transistor.

IPC Classes  ?

  • H10K 39/34 - Organic image sensors integrated with organic light-emitting diodes [OLED]
  • G06F 3/042 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
  • G06V 40/13 - Sensors therefor
  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals

79.

ORGANIC COMPOUND, LIGHT-EMITTING DEVICE, LIGHT-EMITTING APPARATUS, ELECTRONIC DEVICE, AND LIGHTING DEVICE

      
Application Number 18262154
Status Pending
Filing Date 2022-01-12
First Publication Date 2024-04-25
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yoshiyasu, Yui
  • Yoshizumi, Hideko
  • Ohsawa, Nobuharu
  • Seo, Satoshi

Abstract

A novel organic compound is to be provided. In other words, a novel organic compound effective in improving element characteristics is to be provided. The organic compound is represented by General Formula (G1) shown below. A novel organic compound is to be provided. In other words, a novel organic compound effective in improving element characteristics is to be provided. The organic compound is represented by General Formula (G1) shown below. A novel organic compound is to be provided. In other words, a novel organic compound effective in improving element characteristics is to be provided. The organic compound is represented by General Formula (G1) shown below. In General Formula (G1) above, at least one or two of A1 to A4 represent nitrogen, and the others represent carbon. At least one or two of A5 to A8 represent nitrogen, and the others represent carbon. In addition, B1 and B2 each independently represent hydrogen, an alkyl group having 1 to 6 carbon atoms, or a cyano group. In addition, Htuni1 and Htuni2 each independently represent a hole-transport skeleton.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • C07D 491/22 - Heterocyclic compounds containing in the condensed ring system both one or more rings having oxygen atoms as the only ring hetero atoms and one or more rings having nitrogen atoms as the only ring hetero atoms, not provided for by groups , , or in which the condensed system contains four or more hetero rings
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials

80.

DISPLAY APPARATUS, DISPLAY MODULE, ELECTRONIC DEVICE, AND METHOD OF MANUFACTURING DISPLAY APPARATUS

      
Application Number 18277791
Status Pending
Filing Date 2022-02-09
First Publication Date 2024-04-25
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Okazaki, Kenichi
  • Nakamura, Daiki
  • Sato, Rai

Abstract

A high-definition or high-resolution display apparatus is provided. The display apparatus includes a first light-emitting device, a second light-emitting device, a first insulating layer, and a second insulating layer. The first light-emitting device includes a first pixel electrode, a first light-emitting layer over the first pixel electrode, and a common electrode over the first light-emitting layer. The second light-emitting device includes a second pixel electrode, a second light-emitting layer over the second pixel electrode, and the common electrode over the second light-emitting layer. Each of an end portion of the first pixel electrode and an end portion of the second pixel electrode is covered with the first insulating layer. The second insulating layer is positioned over the first insulating layer. The second insulating layer covers each of a side surface of the first light-emitting layer and a side surface of the second light-emitting layer.

IPC Classes  ?

  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 71/60 - Forming conductive regions or layers, e.g. electrodes

81.

ELECTRONIC DEVICE

      
Application Number 18278199
Status Pending
Filing Date 2022-02-24
First Publication Date 2024-04-25
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Godo, Hiromichi
  • Kurokawa, Yoshiyuki
  • Toyotaka, Kouhei
  • Tsuda, Kazuki
  • Ohshita, Satoru
  • Rikimaru, Hidefumi

Abstract

An electronic device having an eye tracking function is provided. The electronic device includes a display device and an optical system. The display device includes a first light-emitting element, a second light-emitting element, a sensor portion, and a driver circuit portion. The sensor portion includes a light-receiving element. The first light-emitting element has a function of emitting infrared light or visible light. The second light-emitting element has a function of emitting light of a color different from that of light emitted from the first light-emitting element. When the first light-emitting element emits infrared light, the light-receiving element has a function of detecting the infrared light that is emitted from the first light-emitting element and reflected by an eyeball of a user. When the first light-emitting element emits visible light, the light-receiving element has a function of detecting the visible light that is emitted from the first light-emitting element and reflected by the eyeball of the user. The first light-emitting element and the second light-emitting element are placed in one layer. The layer where the first light-emitting element and the second light-emitting element are positioned overlaps with the sensor portion.

IPC Classes  ?

  • H10K 39/34 - Organic image sensors integrated with organic light-emitting diodes [OLED]
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
  • H10K 59/65 - OLEDs integrated with inorganic image sensors

82.

DOCUMENT SEARCH METHOD AND DOCUMENT SEARCH SYSTEM

      
Application Number IB2023060394
Publication Number 2024/084365
Status In Force
Filing Date 2023-10-16
Publication Date 2024-04-25
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Momo, Junpei
  • Takase, Natsuko

Abstract

The present invention efficiently performs a document search. The invention: receives a plurality of document data pieces; receives a search query; evaluates each of the plurality of document data pieces on the basis of the search query; outputs the evaluation results with respect to at least some of the plurality of document data pieces; receives a classification for at least some of the plurality of document data pieces; from classifications, infers the importance level of each of a plurality of tags; outputs the importance level for at least some of the plurality of tags; receives at least one tag for which the importance level was output; and retrieves a document using the received tag.

IPC Classes  ?

  • G06F 16/335 - Filtering based on additional data, e.g. user or group profiles
  • G06F 16/38 - Retrieval characterised by using metadata, e.g. metadata not derived from the content or metadata generated manually
  • G06F 16/383 - Retrieval characterised by using metadata, e.g. metadata not derived from the content or metadata generated manually using metadata automatically derived from the content

83.

BATTERY AND METHOD FOR PRODUCING BATTERY

      
Application Number IB2023060396
Publication Number 2024/084367
Status In Force
Filing Date 2023-10-16
Publication Date 2024-04-25
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Akimoto, Kengo
  • Kuriki, Kazutaka
  • Ochiai, Teruaki

Abstract

The present invention provides a lightweight battery. This battery has a separator integrated electrode in which a separator and an electrode are integrated, and the separator integrated electrode has a separator, a carbon particle layer, and a silicon layer positioned between the separator and the carbon particle layer. The silicon layer can be produced using a sputtering method, and the carbon particle layer can be produced using an application method. It is preferable that the separator contain polypropylene, that the thickness of the silicon layer be 100-200 nm inclusive, and that the carbon particle layer contain graphite particles.

IPC Classes  ?

  • H01M 4/134 - Electrodes based on metals, Si or alloys
  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • H01M 4/38 - Selection of substances as active materials, active masses, active liquids of elements or alloys
  • H01M 4/133 - Electrodes based on carbonaceous material, e.g. graphite-intercalation compounds or CFx
  • H01M 4/587 - Carbonaceous material, e.g. graphite-intercalation compounds or CFx for inserting or intercalating light metals
  • H01M 10/058 - Construction or manufacture
  • H01M 50/46 - Separators, membranes or diaphragms characterised by their combination with electrodes
  • H01M 50/417 - Polyolefins

84.

SECONDARY BATTERY, ELECTRONIC DEVICE, AND VEHICLE

      
Application Number IB2023060401
Publication Number 2024/084368
Status In Force
Filing Date 2023-10-16
Publication Date 2024-04-25
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Ikeda, Takayuki
  • Yoshitomi, Shuhei
  • Saito, Jo

Abstract

The present invention provides a novel positive electrode active material. The present invention also provides a secondary battery having excellent charge and discharge characteristics. This secondary battery has a positive electrode, wherein: the positive electrode has a positive electrode active material; the positive electrode active material includes lithium, a transition metal M, oxygen, a first additive element, and a second additive element; the second additive element has a function for mitigating distortion of the crystal structure that occurs due to a first element; the first additive element is titanium; and the second additive element is one or more selected from nickel and aluminum.

IPC Classes  ?

  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • H01M 4/505 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of manganese of mixed oxides or hydroxides containing manganese for inserting or intercalating light metals, e.g. LiMn2O4 or LiMn2OxFy

85.

FUNCTIONAL PANEL, DISPLAY DEVICE, INPUT/OUTPUT DEVICE, AND DATA PROCESSING DEVICE

      
Application Number 18236029
Status Pending
Filing Date 2023-08-21
First Publication Date 2024-04-18
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Ikeda, Takayuki

Abstract

A novel functional panel that is highly convenient or highly reliable is provided. The functional panel includes a first pixel. The first pixel includes a first element, a color conversion layer, and a first functional layer. The first functional layer is positioned between the first element and the color conversion layer. The first element has a function of emitting light and contains gallium nitride. The color conversion layer has a function of converting the color of light emitted from the first element into a different color. The first functional layer includes a first insulating film and a pixel circuit. The first insulating film includes a region positioned between the pixel circuit and the first element, and has an opening. The pixel circuit includes a first transistor. The first transistor includes a first oxide semiconductor film and is electrically connected to the first element through the opening.

IPC Classes  ?

  • H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,

86.

LIGHT-EMITTING DEVICE, LIGHT-EMITTING APPARATUS, ELECTRONIC DEVICE, DISPLAY DEVICE, AND LIGHTING DEVICE

      
Application Number 18262595
Status Pending
Filing Date 2022-01-21
First Publication Date 2024-04-18
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Ohsawa, Nobuharu
  • Seo, Satoshi
  • Yoshiyasu, Yui
  • Yoshizumi, Hideko

Abstract

A novel light-emitting device that is highly convenient, useful, or reliable is provided. The light-emitting device includes a first electrode, a second electrode, and a first layer. The first layer is positioned between the first electrode and the second electrode. The first layer includes a light-emitting material, a first organic compound, and a first material. The light-emitting material has a function of emitting fluorescent light. The absorption spectrum of the light-emitting material has the longest-wavelength edge at a first wavelength. The first organic compound has a function of converting triplet excitation energy into light emission. The spectrum of the emitted light has the shortest-wavelength edge at a second wavelength. The second wavelength is positioned at a wavelength shorter than the first wavelength. The first organic compound includes a first substituent R1. The first substituent R1 is any of an alkyl group, a substituted or unsubstituted cycloalkyl group, and a trialkylsilyl group. The first material has a function of emitting delayed fluorescent light at room temperature. The difference between the HOMO level and the LUMO level of the first material is smaller than the difference between the HOMO level and the LUMO level of the first organic compound.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H10K 85/30 - Coordination compounds

87.

DISPLAY DEVICE

      
Application Number 18273070
Status Pending
Filing Date 2022-01-14
First Publication Date 2024-04-18
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Nakamura, Daiki
  • Kato, Sho
  • Okazaki, Kenichi
  • Yamazaki, Shunpei

Abstract

A display device with both high display quality and high resolution is provided. The display device includes a light-emitting element and a connection portion. The connection portion is provided along an outer periphery of a display region where the light-emitting element is provided. The light-emitting element includes a pixel electrode, a first EL layer over the pixel electrode, a second EL layer over the first EL layer, and a common electrode over the second EL layer. The connection portion includes a connection electrode, a second EL layer over the connection electrode, and the common electrode over the second EL layer. The second EL layer includes a first region in contact with the connection electrode and a second region in contact with the common electrode. The area of a region where the first region and the second region overlap with each other in a top view is greater than or equal to 40000 square micrometers. The second EL layer includes a region where the film thickness is greater than or equal to 0.5 nm and less than or equal to 1.5 nm. The second EL layer contains a substance with a high electron-injection property.

IPC Classes  ?

  • H10K 59/80 - Constructional details
  • H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
  • H10K 50/17 - Carrier injection layers
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

88.

DISPLAY APPARATUS, MANUFACTURING METHOD OF THE DISPLAY APPARATUS, DISPLAY MODULE, AND ELECTRONIC DEVICE

      
Application Number 18276075
Status Pending
Filing Date 2022-02-07
First Publication Date 2024-04-18
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Okazaki, Kenichi
  • Yamane, Yasumasa
  • Hodo, Ryota

Abstract

A high-resolution or high-definition display apparatus is provided. The display apparatus includes a plurality of light-emitting elements, a light-receiving element, a coloring layer, and a first sidewall. The light-emitting elements include a first pixel electrode, a first light-emitting layer over the first pixel electrode, an intermediate layer over the first light-emitting layer, and a common electrode over a second light-emitting layer over a first intermediate layer. The first pixel electrode, the first light-emitting layer, the intermediate layer, and the second light-emitting layer are divided for each light-emitting element. The coloring layer is provided to include a region overlapping with the light-emitting element. The light-receiving element includes a second pixel electrode, a light-receiving layer over the second pixel electrode, and a common electrode over the light-receiving layer. The first sidewall is provided to cover at least part of a side surface of the first pixel electrode, a side surface of the first light-emitting layer, a side surface of the first intermediate layer, and a side surface of the second light-emitting layer. A second sidewall is provided to cover at least part of a side surface of the second pixel electrode and a side surface of the light-receiving layer.

IPC Classes  ?

  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • H10K 39/34 - Organic image sensors integrated with organic light-emitting diodes [OLED]
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays

89.

DISPLAY DEVICE, METHOD FOR MANUFACTURING DISPLAY DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE

      
Application Number 18280518
Status Pending
Filing Date 2022-03-15
First Publication Date 2024-04-18
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Hodo, Ryota
  • Jinbo, Yasuhiro

Abstract

A highly reliable display device with high display quality is provided. The display device includes a first light-emitting element, a second light-emitting element provided to be adjacent to the first light-emitting element, a first protective layer, a second protective layer, and an insulating layer. The first light-emitting element includes a first pixel electrode, a first EL layer, and a common electrode, and the second light-emitting element includes a second pixel electrode, a second EL layer, and the common electrode. The first EL layer is provided over the first pixel electrode, and the second EL layer is provided over the second pixel electrode. The first protective layer includes a region in contact with the side surface of the first EL layer, and the second protective layer includes a region in contact with the side surface of the second EL layer. The insulating layer is provided between the first protective layer and the second protective layer. The common electrode is provided over the first EL layer, over the second EL layer, over the first protective layer, over the second protective layer, and over the insulating layer.

IPC Classes  ?

  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 50/15 - Hole transporting layers
  • H10K 50/16 - Electron transporting layers
  • H10K 50/17 - Carrier injection layers
  • H10K 50/18 - Carrier blocking layers
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/80 - Constructional details
  • H10K 71/12 - Deposition of organic active material using liquid deposition, e.g. spin coating
  • H10K 71/16 - Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering

90.

SEMICONDUCTOR DEVICE

      
Application Number 18485385
Status Pending
Filing Date 2023-10-12
First Publication Date 2024-04-18
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Matsuzaki, Takanori
  • Saito, Toshihiko
  • Yamazaki, Shunpei

Abstract

A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor, a capacitor, and a first insulating layer. The first insulating layer is provided over a first conductive layer and a second conductive layer and includes a first opening reaching the first conductive layer and a second opening reaching the second conductive layer. The transistor is a vertical transistor in which a channel formation region is provided along the side wall of the first opening. The capacitor is a vertical capacitor in which a pair of electrodes and a dielectric are provided along the side surface of the second opening.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices

91.

SEMICONDUCTOR DEVICE

      
Application Number IB2023059989
Publication Number 2024/079575
Status In Force
Filing Date 2023-10-05
Publication Date 2024-04-18
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Furutani, Kazuma
  • Yakubo, Yuto
  • Toyotaka, Kouhei

Abstract

Provided is a semiconductor device having a novel configuration. This semiconductor device has: a first element layer having a bit line drive circuit; a second element layer having a first switch circuit, a first memory cell, and first wiring provided between the first switch circuit and the first memory cell; and a third element layer having a second switch circuit, a second memory cell, and second wiring provided between the second switch circuit and the second memory cell. The first switch circuit has a function for bringing the first wiring and third wiring into a non-conducting state during a data write operation or read operation of the second memory cell. The second switch circuit has a function for bringing the second wiring and the third wiring into a non-conducting state in a data write operation state or a data read operation state of the first memory cell.

IPC Classes  ?

  • G11C 7/12 - Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
  • G11C 5/02 - Disposition of storage elements, e.g. in the form of a matrix array
  • G11C 5/04 - Supports for storage elements; Mounting or fixing of storage elements on such supports
  • G11C 11/4096 - Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/8234 - MIS technology
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/786 - Thin-film transistors
  • H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
  • H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
  • H10B 99/00 - Subject matter not provided for in other groups of this subclass

92.

TRANSISTOR AND STORAGE DEVICE

      
Application Number IB2023060029
Publication Number 2024/079585
Status In Force
Filing Date 2023-10-06
Publication Date 2024-04-18
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Miyairi, Hidekazu
  • Egi, Yuji

Abstract

Provided is a storage device which allows for miniaturization and high integration. This transistor comprises: a first electric conductor having a columnar region; a first insulator having a cylindrical first region; a second electric conductor having an opening through which the first electric conductor passes; a first semiconductor which is located on the second electric conductor and which has a cylindrical second region; and a third electric conductor on the first semiconductor. The first region of the first insulator surrounds the columnar region of the first electric conductor, the first electric conductor has a third region positioned above the opening of the second electric conductor, and the first electric conductor is surrounded, in the third region, by the second region of the first semiconductor with the first region of the first insulator therebetween.

IPC Classes  ?

93.

SEMICONDUCTOR DEVICE AND STORAGE DEVICE

      
Application Number IB2023060031
Publication Number 2024/079586
Status In Force
Filing Date 2023-10-06
Publication Date 2024-04-18
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kunitake, Hitoshi
  • Oota, Masashi
  • Saito, Satoru
  • Yamazaki, Shunpei

Abstract

The present invention provides a semiconductor device which achieves miniaturization or high integration. This semiconductor device comprises a first insulator on a substrate, an oxide semiconductor that covers the first insulator, a first conductor and a second conductor on the oxide semiconductor, a second insulator disposed on the first conductor and the second conductor and having an opening overlapping a region between the first conductor and the second conductor, a third insulator disposed inside the opening and disposed on the oxide semiconductor, and a third conductor disposed inside the opening and disposed on the third insulator. The height of the first insulator is longer than the width of the first insulator.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/8234 - MIS technology
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate

94.

High Molecular Compound, Light-Emitting Device, Light-Emitting Apparatus, Electronic Device, and Lighting Device

      
Application Number 18369543
Status Pending
Filing Date 2023-09-18
First Publication Date 2024-04-18
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Narukawa, Ryo
  • Nagasaka, Akira
  • Suzuki, Kunihiko
  • Yoshizumi, Hideko

Abstract

A novel high molecular compound is provided. The high molecular compound includes a repeating unit. The repeating unit has a fluorenediyl group, a hole-transport skeleton, and an electron-transport skeleton. The hole-transport skeleton is bonded to the fluorenediyl group through a substituted or unsubstituted first arylene group. The electron-transport skeleton is bonded to the fluorenediyl group through a substituted or unsubstituted second arylene group. In an excited state, intramolecular charge transfer occurs between the hole-transport skeleton and the electron-transport skeleton.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • C07D 491/048 - Ortho-condensed systems with only one oxygen atom as ring hetero atom in the oxygen-containing ring the oxygen-containing ring being five-membered

95.

ELECTRONIC DEVICE

      
Application Number 18370907
Status Pending
Filing Date 2023-09-21
First Publication Date 2024-04-18
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kusunoki, Koji
  • Kubota, Daisuke
  • Hatsumi, Ryo

Abstract

An electronic device capable of detecting a difference in the way of touch is provided. An electronic device capable of detecting a difference in the way of touch with a small number of components is provided. An electronic device capable of executing various types of processes with simple operation is provided. The electronic device includes a control portion and a display portion. The display portion has a function of displaying an image on a screen and includes a detection portion. The detection portion has a function of detecting a touch operation and a function of imaging, at least twice, a detection object touching the screen. The control portion has a function of calculating a difference between the area of the detection object in first imaging and the area of the detection object in second imaging to execute a different process depending on whether the difference is larger or smaller than a reference.

IPC Classes  ?

  • G06V 40/13 - Sensors therefor
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/042 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
  • G06V 40/12 - Fingerprints or palmprints
  • G06V 40/50 - Maintenance of biometric data or enrolment thereof
  • H10K 65/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element and at least one organic radiation-sensitive element, e.g. organic opto-couplers

96.

Organic Compound, Light-Emitting Element, Light-Emitting Device, Electronic Device, Display Device and Lighting Device

      
Application Number 18382640
Status Pending
Filing Date 2023-10-23
First Publication Date 2024-04-18
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Takeda, Kyoko
  • Osaka, Harue
  • Seo, Satoshi
  • Suzuki, Tsunenori
  • Hashimoto, Naoaki
  • Takita, Yusuke

Abstract

A novel organic compound is provided. Alternatively, an organic compound that exhibits light emission with favorable chromaticity is provided. Alternatively, an organic compound that exhibits blue light emission with favorable chromaticity is provided. Alternatively, an organic compound with favorable emission efficiency is provided. Alternatively, an organic compound having a high carrier-transport property is provided. Alternatively, an organic compound with favorable reliability is provided. An organic compound including at least one amino group in which any one of a substituted or unsubstituted dibenzofuranyl group, a substituted or unsubstituted dibenzothiophenyl group, and a substituted or unsubstituted carbazolyl group is boneded to any one of a substituted or unsubstituted naphthobisbenzofuran skeleton, a substituted or unsubstituted naphthobisbenzothiophene skeleton, and a substituted or unsubstituted naphthobenzofuranobenzothiophene skeleton is provided.

IPC Classes  ?

  • C07D 491/048 - Ortho-condensed systems with only one oxygen atom as ring hetero atom in the oxygen-containing ring the oxygen-containing ring being five-membered
  • C07D 495/00 - Heterocyclic compounds containing in the condensed system at least one hetero ring having sulfur atoms as the only ring hetero atoms
  • H10K 85/60 - Organic compounds having low molecular weight

97.

LIGHT-EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 18393838
Status Pending
Filing Date 2023-12-22
First Publication Date 2024-04-18
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Chida, Akihiro

Abstract

A highly reliable light-emitting device and a manufacturing method thereof are provided. A light-emitting element and a terminal electrode are formed over an element formation substrate; a first substrate having an opening is formed over the light-emitting element and the terminal electrode with a bonding layer provided therebetween; an embedded layer is formed in the opening; a transfer substrate is formed over the first substrate and the embedded layer; the element formation substrate is separated; a second substrate is formed under the light-emitting element and the terminal electrode; and the transfer substrate and the embedded layer are removed. In addition, an anisotropic conductive connection layer is formed in the opening, and an electrode is formed over the anisotropic conductive connection layer. The terminal electrode and the electrode are electrically connected to each other through the anisotropic conductive connection layer.

IPC Classes  ?

  • H10K 50/805 - Electrodes
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
  • H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
  • H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages
  • H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 71/00 - Manufacture or treatment specially adapted for the organic devices covered by this subclass
  • H10K 71/50 - Forming devices by joining two substrates together, e.g. lamination techniques
  • H10K 71/80 - Manufacture or treatment specially adapted for the organic devices covered by this subclass using temporary substrates
  • H10K 77/10 - Substrates, e.g. flexible substrates

98.

ELECTRONIC DEVICE AND PROGRAM

      
Application Number 18398403
Status Pending
Filing Date 2023-12-28
First Publication Date 2024-04-18
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kubota, Daisuke
  • Kusunoki, Koji

Abstract

A novel electronic device is provided. An electronic device capable of executing various types of processing by simple operation is provided. An electronic device with a high security level is provided. The electronic device includes a control portion, a detection portion, and a memory portion. The detection portion has a function of detecting touch operation and a function of obtaining fingerprint data on a touching finger. The memory portion has a function of retaining fingerprint data on a plurality of finger registered in advance. The control portion has functions of comparing the fingerprint data on the touching finger obtained by the detection portion with the fingerprint data on the plurality of fingers when the detection portion detects touch operation, and executing processing corresponding to the fingerprint data on the touching finger or a combination of the touch operation and the fingerprint data on the touching finger when the fingerprint data on the touching finger matches any one piece of the fingerprint data on the plurality of fingers.

IPC Classes  ?

  • G06V 40/12 - Fingerprints or palmprints
  • G06F 21/32 - User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
  • G06V 40/13 - Sensors therefor

99.

SEMICONDUCTOR DEVICE

      
Application Number 18526315
Status Pending
Filing Date 2023-12-01
First Publication Date 2024-04-18
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Okazaki, Yutaka
  • Shimomura, Akihisa
  • Yamade, Naoto
  • Takeshita, Tomoya
  • Tanaka, Tetsuhiro

Abstract

A transistor with favorable electrical characteristics is provided. One embodiment of the present invention is a semiconductor device including a semiconductor, a first insulator in contact with the semiconductor, a first conductor in contact with the first insulator and overlapping with the semiconductor with the first insulator positioned between the semiconductor and the first conductor, and a second conductor and a third conductor, which are in contact with the semiconductor. One or more of the first to third conductors include a region containing tungsten and one or more elements selected from silicon, carbon, germanium, tin, aluminum, and nickel.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/45 - Ohmic electrodes
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/66 - Types of semiconductor device

100.

LIGHT-EMITTING DEVICE AND ELECTRONIC DEVICE USING THE SAME

      
Application Number 18131905
Status Pending
Filing Date 2023-04-07
First Publication Date 2024-04-18
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Seo, Satoshi
  • Hatano, Kaoru

Abstract

A lightweight flexible light-emitting device which is able to possess a curved display portion and display a full color image with high resolution and the manufacturing process thereof are disclosed. The light-emitting device comprises: a plastic substrate; an insulating layer with an adhesive interposed therebetween; a thin film transistor over the insulating layer; a protective insulating film over the thin film transistor; a color filter over the protective insulating film; an interlayer insulating film over the color filter; and a white-emissive light-emitting element formed over the interlayer insulating film and being electrically connected to the thin film transistor.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 33/50 - Wavelength conversion elements
  • H01L 33/58 - Optical field-shaping elements
  • H10K 59/124 - Insulating layers formed between TFT elements and OLED elements
  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
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