Fuji Electric Systems Co., Ltd.

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IPC Class
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate 13
G03G 5/05 - Organic bonding materials; Methods for coating a substrate with a photoconductive layer; Inert supplements for use in photoconductive layers 8
H01L 31/042 - PV modules or arrays of single PV cells 7
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect 6
G01T 1/169 - Exploration, location of contaminated surface areas 5
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Found results for  patents

1.

RADIATION MONITOR COMPRISING HAND MONITOR PART, AND HAND FOOT CLOTHING MONITOR

      
Application Number JP2010068597
Publication Number 2012/053088
Status In Force
Filing Date 2010-10-21
Publication Date 2012-04-26
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Hashimoto, Tadao
  • Norimatsu, Hideyuki
  • Inui, Daisuke

Abstract

Provided are a radiation monitor comprising a hand monitor part capable of accurately measuring surface contamination regardless of the size of a hand of a person to be measured, and a hand foot clothing monitor. A hand monitor part (7A) is characterized by being provided with a stationary detection section (73a), and a movable detection section (72a) provided to face the stationary detection section (73a) and provided to be able to reciprocate in opposite directions, and being provided with a biasing means (79a) which biases the movable detection section (72a) in a direction away from the stationary detection section (73a), a push member (74a) which is disposed between the stationary detection section (73a) and the movable detection section (72a) and capable of being pushed by a hand of a person to be measured, and an interlocking mechanism (77a) which moves the movable detection section (72a) in a direction approaching the stationary detection section (73a) against the biasing force of the biasing means (79a) according to the push amount of the push member (74a).

IPC Classes  ?

  • G01T 1/169 - Exploration, location of contaminated surface areas

2.

SEMICONDUCTOR MODULE AND COOLER

      
Application Number JP2011059831
Publication Number 2011/132736
Status In Force
Filing Date 2011-04-21
Publication Date 2011-10-27
Owner FUJI ELECTRIC SYSTEMS CO.,LTD. (Japan)
Inventor
  • Gohara, Hiromichi
  • Ichimura, Takeshi
  • Morozumi, Akira

Abstract

Disclosed is a semiconductor module and cooler that can effectively cool a semiconductor element. The semiconductor module supplies coolant from outside to a water jacket (2A) that forms the cooler and cools a circuit element section positioned on an external surface of a fin base. The semiconductor module comprises: fins (2C) thermally connected to the circuit element section; a coolant introduction flow path (21) which is positioned in the water jacket (2A), extends from an introduction port (24), and is provided with a guide section which has one surface sloped towards one side surface of the fins (2C) to guide the coolant, and another surface; a coolant discharge flow path (22) which is positioned parallel to the coolant introduction flow path (21) in the water jacket (2A), extends to a discharge port (25), and has a side wall parallel to the other side surface of the fins (2C); and a cooling flow path (23) on which the fins (2C) are positioned, and which is formed at a position to communicate with the coolant introduction flow path (21) and the coolant discharge flow path (22) inside the water jacket (2A).

IPC Classes  ?

  • H01L 23/473 - Arrangements for cooling, heating, ventilating or temperature compensation involving the transfer of heat by flowing fluids by flowing liquids
  • H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,

3.

PSEUDO-RESONANT SWITCHING POWER SOURCE DEVICE

      
Application Number JP2011055878
Publication Number 2011/122314
Status In Force
Filing Date 2011-03-14
Publication Date 2011-10-06
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Chen, Jian
  • Sonobe, Koji
  • Maruyama, Hiroshi

Abstract

Disclosed is a pseudo-resonant switching power source device in which appropriate bottoming-out skip control can be realised by detecting the load state on the primary side with high accuracy. A pseudo-resonant switching power source device utilises the resonance phenomenon of a resonance capacitor (Cr) and the inductance of a primary winding (P1) of a transformer (T1) in order to turn on a switching element (Q10) at the timing at which a resonance voltage bottoms out. The pseudo-resonant switching power source device is provided with: on width detection circuits or on/off width detection circuits (51, 51') which detect the on width or the on/off width (ts) of the switching element (Q10); and a bottoming-out frequency determination circuit (5) which determines, in accordance with the detected on width or on/off width (ts), the number of times the resonance voltage bottoms out. The switching element (Q10) is turned on at the timing at which bottoming-out occurs, the number of times bottoming-out occurs having been determined.

IPC Classes  ?

  • H02M 3/28 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac

4.

THIN-FILM SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME

      
Application Number JP2011050321
Publication Number 2011/114761
Status In Force
Filing Date 2011-01-12
Publication Date 2011-09-22
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Fujikake, Shinji

Abstract

Provided is a thin-film solar cell which is obtained by irradiating a laser from a transparent electrode side so that the lower layer of a photoelectric conversion layer selectively absorbs light and by performing blow-off processing, and also provided is a method for manufacturing the thin-film solar cell. The thin-film solar cell manufactured by said method is a substrate-type solar cell that has a photoelectric conversion layer (6) in which two or more n, i, and p junctions having non-monocrystalline silicon as the main material thereof are combined in the thickness direction, and the thin-film solar cell is formed by sequentially laminating a metal electrode (3), the photoelectric conversion layer (6), and a transparent electrode (7) on a substrate (1), wherein the thin-film solar cell has a top cell (6b) which is the photoelectric conversion layer (6) on the transparent electrode (7) side and also has a cell (6a) which has at least one layer more on the metal electrode (3) side than the top cell (6b), and the method for manufacturing the thin-film solar cell includes a step for simultaneously removing at least two photoelectric conversion layers (6) (6a, 6b) and the transparent electrode (7) by using a laser that has a wavelength having selective sensitivity to the cell (6a) other than the top cell (6b) from the transparent electrode (7) side.

IPC Classes  ?

  • H01L 31/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices

5.

THIN FILM SOLAR CELL AND PROCESS FOR PRODUCTION THEREOF

      
Application Number JP2011050257
Publication Number 2011/114760
Status In Force
Filing Date 2011-01-11
Publication Date 2011-09-22
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Sato, Hiroki

Abstract

Disclosed are: a thin film solar cell of which an output voltage and a current can be varied as required without decreasing mass productivity; and a process for producing the thin film solar cell. Specifically disclosed is a thin film solar cell (10) comprising at least: a unit cell (U) which comprises a first electrode layer (1b), a photoelectric conversion layer (1d) and a second electrode layer (1e) all laminated on a surface of a substrate (1a) having electrically insulating properties; and a connection electrode layer (E) which is laminated on a surface of the unit cell (U) which is opposed to the above-mentioned surface of the substrate (1a). In the thin film solar cell (10), all of the thin films constituting the thin film solar cell (10) are formed on the substrate (1a), and subsequently a cutting part (S2) on the connection electrode layer (E) which is located at a position corresponding to the required output voltage or current is cut, thereby obtaining the output voltage or current in a selective manner.

IPC Classes  ?

  • H01L 31/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices

6.

SEMICONDUCTOR DEVICE

      
Application Number JP2011055978
Publication Number 2011/115081
Status In Force
Filing Date 2011-03-14
Publication Date 2011-09-22
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor Soyano, Shin

Abstract

An insulating substrate (2) attached to a metal base plate (1) is provided with an insulating plate (3), and metal foils (3a , 4a, 4b, and 4c). Metal foils (4a and 4b) are each disposed with a semiconductor element. External connection terminals (18, 19, and 20) are attached to one end of terminal blocks (8a, 8b, and 8c). The other end of terminal blocks (8a, 8b, and 8c) is respectively connected to metal foils (4a, 4b, and 4c). Each external connection terminal (18, 19, and 20), which functions as a main terminal to which the main current flows, is disposed on a lid (21). A plurality of lids (21, 22, 23, 24, and 25), which are configured in a manner such that external connection terminals (18, 19, and 20) are respectively connected to terminal blocks (8a, 8b, and 8c) in a resin case (11) and which has a different layout with respect to the external connection terminals (18, 19, and 20), is prepared, Therefore, it is possible to simply change the position of the external connection terminals (18, 19, and 20) by changing the lid.

IPC Classes  ?

  • H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,

7.

SOLAR CELL MODULE AND METHOD FOR REINFORCING SOLAR CELL MODULE

      
Application Number JP2011000011
Publication Number 2011/111286
Status In Force
Filing Date 2011-01-05
Publication Date 2011-09-15
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor Tsukahara, Yuji

Abstract

Disclosed is a solar cell module which is provided with a solar cell (10), a protecting member (100), a through hole (120), and reinforcing members (202, 204). The protecting member (100) seals the whole solar cell (10), and has flexibility. The through hole (120) is provided in the protecting member (100), and is positioned between the end of the protecting member (100) and the solar cell (10). The reinforcing members (202, 204) are attached to the protecting member (100), and at least a part of each of the reinforcing members is positioned between the through hole (120) and the end of the protecting member (100).

IPC Classes  ?

  • H01L 31/042 - PV modules or arrays of single PV cells

8.

SEMICONDUCTOR DEVICE

      
Application Number JP2011053549
Publication Number 2011/111500
Status In Force
Filing Date 2011-02-18
Publication Date 2011-09-15
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor Onozawa, Yuichi

Abstract

Stripe-patterned gate trenches (7) each internally containing a gate polysilicon (11a) are formed in one main surface of an n-type drift layer (1), and the gate trenches (7) are connected to a gate electrode. P-type base layers (4) each comprising an n-type emitter layer (5) inside are selectively formed in respective mesa regions (18) between two adjacent gate trenches (7), and the p-type base layers (4) are connected to an emitter electrode (12). One or more dummy trenches (8) are formed between p-type base layers (4) that are adjacent to each other in the longitudinal direction of the gate trenches (7). A conductive dummy polysilicon (11b) is formed on the inner lateral surface of each dummy trench (8) at a distance from the gate polysilicon (11a) with a gate oxide film (10) interposed therebetween. The dummy polysilicon (11b) may be connected to the emitter electrode (12). Consequently, there can be provided an insulated gate semiconductor device which has small mirror capacity even in cases where the voltage applied between the collector and the emitter is low.

IPC Classes  ?

  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

9.

ELECTROPHOTOGRAPHIC PHOTOSENSITIVE BODY AND METHOD FOR PRODUCING SAME

      
Application Number JP2010053263
Publication Number 2011/108064
Status In Force
Filing Date 2010-03-01
Publication Date 2011-09-09
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Zhu Fengqiang
  • Nakamura Yoichi
  • Suzuki Shinjiro

Abstract

Disclosed are: an electrophotographic photosensitive body which has sufficient wear resistance and satisfactory characteristics for photosensitive bodies, while being affected little by harmful gases or temperature/humidity conditions; and a method for producing the electrophotographic photosensitive body. Specifically disclosed is an electrophotographic photosensitive body which has at least a photosensitive layer on a conductive body. The photosensitive layer contains a diadamantyl diester compound represented by general formula (I). (In general formula (I), R1, R2 and R3 each independently represents a hydrogen atom, a halogen atom, a substituted or unsubstituted alkyl group having 1-6 carbon atoms, a substituted or unsubstituted alkoxyl group having 1-6 carbon atoms, an aryl group having 6-20 carbon atoms or a heterocyclic group; X and Z each represents a single bond or a substituted or unsubstituted alkylene group having 1-6 carbon atoms; and Y represents an OCO group or a COO group.)

IPC Classes  ?

  • G03G 5/147 - Cover layers
  • G03G 5/05 - Organic bonding materials; Methods for coating a substrate with a photoconductive layer; Inert supplements for use in photoconductive layers
  • G03G 5/14 - Inert intermediate or cover layers for charge- receiving layers

10.

ELECTRIC CURRENT ESTIMATION CIRCUIT

      
Application Number JP2010072985
Publication Number 2011/104985
Status In Force
Filing Date 2010-12-21
Publication Date 2011-09-01
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Nishikawa, Yukihiro

Abstract

Disclosed is an electric current estimation circuit which is capable of estimating the inductance current with a high degree of precision, regardless of changes in the inductance of the inductor, and which allows for cost reductions, miniaturization and the suppression of switching loss. The current flowing through a switching element (5) is detected by a current detection means (8), and a capacitor (201) is charged by the signal voltage corresponding to the detected current. The reduction rate for the terminal voltage of the capacitor when the switching element (5) is off is calculated on the basis of the rate of increase in the terminal voltage of the capacitor, the absolute value of the instantaneous value of the input source voltage and the instantaneous value of the DC output voltage, and the capacitor is discharged in a manner such that the terminal voltage of the capacitor is reduced at the reduction rate while the switching element (5) is off. The current traveling through the inductor (4) is estimated from the terminal voltage of the capacitor.

IPC Classes  ?

  • H02M 3/155 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

11.

POWER CONVERSION APPARATUS

      
Application Number JP2011000391
Publication Number 2011/102082
Status In Force
Filing Date 2011-01-25
Publication Date 2011-08-25
Owner FUJI ELECTRIC SYSTEMS CO.,LTD. (Japan)
Inventor Iwahori, Michio

Abstract

Provided is a power conversion apparatus, wherein the current required to be applied thereto can be secured without making the circuit construction of a DC voltage conversion circuit such as a DC chopper larger in scale. Power can be supplied to a voltage-type inverter (8) from both a DC chopper (6), and a voltage-type rectifier circuit (4) that converts AC power to DC power. The voltage-type rectifier circuit (4) comprises an upper arm section (4H) and a lower arm section (4L), and converts AC power coming from an AC generator (3) into DC power. The voltage-type rectifier circuit (4) also carries out a DC chopper function using the upper and lower arms of the voltage-type rectifier circuit (4) and the windings of the AC generator (3), and supplies the power of a DC power supply (5) to the voltage-type inverter (8).

IPC Classes  ?

  • H02M 7/12 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M 3/155 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • B60L 3/00 - Electric devices on electrically-propelled vehicles for safety purposes; Monitoring operating variables, e.g. speed, deceleration or energy consumption
  • B60L 11/14 - with provision for direct mechanical propulsion

12.

SOLAR CELL MODULE AND PRODUCTION METHOD THEREFOR

      
Application Number JP2010072988
Publication Number 2011/099228
Status In Force
Filing Date 2010-12-21
Publication Date 2011-08-18
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Yanase, Hironori
  • Yokoyama, Yasuhiro

Abstract

Disclosed is a solar cell module with enhanced reliability and insulation properties, in which insulation failure does not occur between the solar cell module and a rear side support even in cases in which warping has occurred in a solar cell during laminate molding. Also disclosed is a production method therefor. The solar cell module (1) is configured in a manner such that at least a first sealing material (5) and the rear side support (6) are layered in said order on one side (2b) of the solar cell (2), a through hole (8) is provided in the rear side support (6), and the electrical output of the solar cell (2) is output to the outside by passing the electrical output wire (7) of the solar cell (2) through the through hole (8), wherein in the solar cell module, an insulating material (10) is disposed between the solar cell (2) and the first sealing material (5) in a position corresponding to the through hole (8).

IPC Classes  ?

  • H01L 31/042 - PV modules or arrays of single PV cells

13.

PROCESS FOR PRODUCTION OF SEMICONDUCTOR ELEMENT, AND DEVICE FOR PRODUCTION OF SEMICONDUCTOR ELEMENT

      
Application Number JP2011051625
Publication Number 2011/096326
Status In Force
Filing Date 2011-01-27
Publication Date 2011-08-11
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor Nakazawa, Haruo

Abstract

The phosphorus ion implantation and the boron ion implantation are carried out separately onto the back surface (1a) of a FZ-N substrate (1). Subsequently, the back surface (1a) of the FZ-N substrate (1) is irradiated with a laser beam (14) while retaining the FZ-N substrate (1) at a specific temperature falling within the range from 100 to 500°C inclusive by means of a substrate-heating device (31), thereby achieving the laser annealing of the back surface (1a) of the FZ-N substrate (1). In this manner, an FS layer (9) and a p+ collector layer (10) are formed. The activation rate of phosphorus and boron of which ions have been implanted can be increased and a desired diffusion profile can be obtained by conducting the laser annealing while heating the FZ-N substrate (1). As a result, the activation rate of an impurity of which an ion has been implanted into the back surface (1a) of the FZ-N substrate (1) can be increased without adversely affecting the front surface structure of an FS-type IGBT. It also becomes possible to satisfactorily recover the crystal defects caused by the ion implantation, wherein a desired diffusion profile can be obtained.

IPC Classes  ?

  • H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
  • H01L 21/268 - Bombardment with wave or particle radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

14.

PHOTOSENSITIVE BODY FOR XEROGRAPHY, MANUFACTURING METHOD FOR SAME, AND XEROGRAPHIC DEVICE

      
Application Number JP2011051665
Publication Number 2011/093410
Status In Force
Filing Date 2011-01-27
Publication Date 2011-08-04
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Zhang Quanqiu
  • Suzuki Shinjiro
  • Nakamura Yoichi

Abstract

Disclosed is a photosensitive body for xerography which can maintain low frictional resistance on the surface of a photosensitive drum from initiation until after printing, reduce the amount of wear, and obtain quality images. Also disclosed are a manufacturing method for the photosensitive body for xerography, and a xerographic device. A photosensitive layer of a photosensitive body for xerography, which has said photosensitive layer on a conductive substrate, contains a polycarbonate resin having structural units represented by general formulae (1) and (2) as a resin binder. The manufacturing method for the photosensitive body for xerography comprises a step in which the photosensitive layer is formed by coating a coating fluid containing at least the resin binder on the surface of the conductive substrate, and the polycarbonate resin having structural units represented by general formulae (1) and (2) is contained in the coating fluid as the resin binder.

IPC Classes  ?

  • G03G 5/05 - Organic bonding materials; Methods for coating a substrate with a photoconductive layer; Inert supplements for use in photoconductive layers
  • G03G 5/147 - Cover layers

15.

SEMICONDUCTOR DEVICE

      
Application Number JP2011051830
Publication Number 2011/093472
Status In Force
Filing Date 2011-01-28
Publication Date 2011-08-04
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Harada, Yuichi
  • Naito, Tatsuya
  • Toyoda, Yoshiaki

Abstract

A protective diode (71) comprises a p-anode layer (21) and an n-cathode layer (22) which are alternately formed on a polysilicon layer, and comprises a pn-junction (74) which adopts a reverse blocking state when forward biased and every other one of which is short-circuited by a metal film (53). By connecting the protective diode (71) to a power semiconductor element (IGBT (72)), high breakdown resistance and reduced chip area can both be achieved at the same time, elevation of withstand voltage is suppressed even if a clamping voltage is repeatedly applied, and furthermore breakdown due to a negative surge voltage input to a gate terminal (G) can be prevented.

IPC Classes  ?

  • H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
  • H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/786 - Thin-film transistors
  • H01L 29/866 - Zener diodes

16.

PHOTOSENSITIVE BODY FOR XEROGRAPHY, MANUFACTURING METHOD FOR SAME, AND XEROGRAPHIC DEVICE

      
Application Number JP2010051264
Publication Number 2011/092850
Status In Force
Filing Date 2010-01-29
Publication Date 2011-08-04
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Zhang Quanqiu
  • Suzuki Shinjiro
  • Nakamura Yoichi

Abstract

Disclosed is a photosensitive body for xerography which can maintain low frictional resistance on the surface of a photosensitive drum from initiation until after printing, reduce the amount of wear, and obtain quality images. Also disclosed are a manufacturing method for the photosensitive body for xerography, and a xerographic device. In the photosensitive body for xerography, which has a photosensitive layer on a conductive substrate, the photosensitive layer contains a polycarbonate resin having structural units represented by general formulae (1) and (2) as a resin binder. The manufacturing method for the photosensitive body for xerography comprises a step in which the photosensitive layer is formed by coating a coating fluid containing at least the resin binder on the surface of a conductive substrate, and the polycarbonate resin having structural units represented by general formulae (1) and (2) is contained in the coating fluid as a resin binder.

IPC Classes  ?

  • G03G 5/05 - Organic bonding materials; Methods for coating a substrate with a photoconductive layer; Inert supplements for use in photoconductive layers
  • G03G 5/14 - Inert intermediate or cover layers for charge- receiving layers
  • G03G 5/147 - Cover layers

17.

SEMICONDUCTOR DEVICE

      
Application Number JP2011051831
Publication Number 2011/093473
Status In Force
Filing Date 2011-01-28
Publication Date 2011-08-04
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Onishi, Yasuhiko
  • Kitamura, Mutsumi
  • Sugi, Akio
  • Takei, Manabu

Abstract

Disclosed is a semiconductor device in which parallel pn layers (20) are provided as a drift layer between an element active section and an n+ drain region (11). The parallel pn layers (20) are formed by alternately joining an n-type region (1) and a p-type region (2) in a repeated manner. An n-type high concentration region (21) is provided at a first main surface side of the n-type region (1). The n-type high concentration region (21) has higher impurity concentration than an n-type low concentration region (22) provided at a second main surface side of the n-type region (1). The n-type high concentration region (21) has an impurity concentration of 1.2 to 3 times, preferably 1.5 to 2.5 times, that of the n-type low concentration region (22). Furthermore, the n-type high concentration region (21) has a thickness of no more than 1/3, preferably 1/8 to 1/4, of the thickness of the region adjacent to the p-type region (2), said region being of the n-type region (1).

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions

18.

UNIT FOR SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE

      
Application Number JP2010073795
Publication Number 2011/083737
Status In Force
Filing Date 2010-12-28
Publication Date 2011-07-14
Owner FUJI ELECTRIC SYSTEMS CO.,LTD. (Japan)
Inventor
  • Yamada, Takafumi
  • Inaba, Tetsuya
  • Ikeda, Yoshinari
  • Yanagawa, Katsuhiko
  • Takahashi, Yoshikazu

Abstract

Disclosed are a semiconductor device, i.e., a monolithic unit having improved adhesion and heat dissipation to a cooling body, and a semiconductor device, which is composed of an assembled body of the monolithic units, and is capable of configuring a discretionary circuit at low cost. The monolithic unit (101) is configured of: copper blocks (1, 8); a conductive pattern-attached insulating substrate (6); an IGBT chip (10) and a diode chip (13); a collector terminal pin (15); implant pins (17) firmly adhered to the chips (10, 13) with solder (11, 14); a printed board (16) having the implant pins (17) firmly adhered thereto; an emitter terminal pin (19), and a control terminal pin (20); a collector terminal pin (15); and a resin case (21) which encapsulates the above-mentioned parts. With the copper blocks (1, 8), adhesion and heat dissipation to the cooling body are improved. Furthermore, the discretionary circuit can be configured by combining a plurality of the intrinsic units (101) with inter-unit wiring board.

IPC Classes  ?

  • H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,

19.

Online diagnostic method and online diagnostic system for geothermal generation facility

      
Application Number 13054972
Grant Number 08407027
Status In Force
Filing Date 2009-10-19
First Publication Date 2011-06-16
Grant Date 2013-03-26
Owner
  • Fuji Electric Systems Co., Ltd. (Japan)
  • Geothermal Engineering Co., Ltd. (Japan)
Inventor
  • Myougan, Ichiro
  • Kato, Toshikazu
  • Osawa, Isamu
  • Hishi, Yasuyuki
  • Fukuda, Daisuke
  • Futagoishi, Yasuto
  • Aoki, Toshiaki

Abstract

An online diagnostic system for a geothermal generation facility is discloses that includes an automatic steam measurement device for measuring a characteristic of steam to be supplied to a steam turbine from a steam-water separator at the geothermal generation facility that outputs analysis data. A monitor-control device controls an operation of the geothermal generation facility while monitoring the geothermal generation facility. A diagnostic device performs at least one of an evaluation of a steam characteristic at the geothermal generation facility, an evaluation of the steam-water separator, and an evaluation of pulsation and confluence of a production well based on the analysis data from the automatic steam measurement device and performance data of the geothermal generation facility from the monitor-control device. An operating status of the geothermal generation facility is diagnosed.

IPC Classes  ?

  • G06F 15/00 - Digital computers in general; Data processing equipment in general

20.

Integrated control circuit for controlling a switching power supply, switching power supply incorporating the same, and a method of controlling a switching power supply

      
Application Number 12033720
Grant Number 07952893
Status In Force
Filing Date 2008-02-19
First Publication Date 2011-05-05
Grant Date 2011-05-31
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Hiasa, Nobuyuki

Abstract

An integrated control circuit for controlling a switching power supply, a switching power supply incorporating the same, and a method of controlling the switching power supply, where the control IC includes a current comparator that detects current flowing through a switching device, a flip-flop circuit that controls the ON-period of the switching device, an averaging circuit that converts the peak load current value to a time-average, a comparator that detects an overloaded state from the load current, a delay circuit that sets a time from detecting the overcurrent state to stopping the switching operation, a latch circuit that stops the switching operation for a period of time, a first reference voltage supply used in the current comparator, which has a higher voltage value than a second reference voltage supply used in the comparator.

IPC Classes  ?

  • H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02H 7/122 - Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from norm for rectifiers for static converters or rectifiers for inverters, i.e. dc/ac converters

21.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number JP2010069528
Publication Number 2011/052787
Status In Force
Filing Date 2010-11-02
Publication Date 2011-05-05
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Nemoto, Michio
  • Yoshimura, Takashi

Abstract

Disclosed is a semiconductor device wherein a p anode layer (2) is formed on the side of one main surface of an n- drift layer (1). On the side of the other main surface of the n- drift layer (1), an n+ cathode layer (3) having an impurity concentration higher than that of the n- drift layer (1) is formed. On the surface of the p anode layer (2), an anode electrode (4) is formed. On the surface of the n+ cathode layer (3), a cathode electrode (5) is formed. An n type broad buffer region (6) is formed inside of the n- drift layer (1), said broad buffer region having a net doping concentration higher than that of the bulk of a wafer and lower than that of the n+ cathode layer (3) and that of the p anode layer (2). The specific resistance (ρ0) of the n- drift layer (1) satisfies the inequalities of 0.12V0≤ρ0≤0.25V0, wherein V0 is the rated voltage. The total net doping concentration quantity in the broad buffer region (6) is 4.8×1011-1.0×1012 atoms/cm2.

IPC Classes  ?

  • H01L 29/861 - Diodes
  • H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

22.

SWITCHING POWER SUPPLY CIRCUIT AND POWER FACTOR CONTROLLER

      
Application Number JP2010006347
Publication Number 2011/052197
Status In Force
Filing Date 2010-10-27
Publication Date 2011-05-05
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor Sugawara, Takato

Abstract

The switching power supply circuit includes a full-wave rectifier (1) which full-wave rectifies alternating power-supply voltage to output a pulsating current, and an inductor (3) connected to the full-wave rectifier (1). A level conversion circuit (20) includes a plurality of resistors connected in series, and converts inductor current detection voltage to a first current level signal and a second current level signal (S1 and S2) which are different in voltage level and which are proportional to inductor current. A continuous control setting circuit (30) generates a reference potential signal a phase of which is approximately the same as a phase of alternating input voltage from the first current level signal (S1) and compares a voltage level of the reference potential signal with a voltage level of the second current level signal (S2) to output a second set pulse (S8) that specifies timing at which a switching element (4) turns on.

IPC Classes  ?

  • H02M 3/155 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 7/12 - Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

23.

POWER SUPPLY SYSTEM, CONTROLLER THEREFOR, AND METHOD OF MANUFACTURE OF CONTROLLER

      
Application Number JP2010005843
Publication Number 2011/040005
Status In Force
Filing Date 2010-09-29
Publication Date 2011-04-07
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Yamadaya, Masayuki

Abstract

A power supply system of the present invention aims to achieve optimization of the efficiency and therefore includes: z (z is a natural number equal to or larger than 2) power supplies (PS-1 to PS-z) connected in parallel; and a controller (8) for the number of power supplies in operation which controls the number of power supplies in operation among the power supplies (PS-1 to PS-z). The controller (8) for the number of power supplies in operation determines the number of the power supplies in operation based on values of intersection currents i1 to i(z-1) which are determined through processes of: identifying output loss characteristics with respect to load currents of the z power supplies (PS-1 to PS-z) by use of convex functions f1 to fz, respectively; obtaining a function hn expressing a conversion efficiency of a total load current at the time of operating the n (n is a natural number equal to or smaller than z) power supplies (PS-1 to PS-z) based on the functions f1 to fz; and obtaining an intersection current iq (q is a natural number equal to or smaller than (z-1)) which is a current of an intersection point between a function hq and a function h(q+1). (Greek letter eta is replaced with h.)

IPC Classes  ?

  • H02M 3/155 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02J 1/00 - Circuit arrangements for dc mains or dc distribution networks

24.

HIGH VOLTAGE SEMICONDUCTOR DEVICE AND DRIVING CIRCUIT

      
Application Number JP2010005867
Publication Number 2011/040016
Status In Force
Filing Date 2010-09-29
Publication Date 2011-04-07
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor Yamaji, Masaharu

Abstract

A high voltage semiconductor device includes an n--type region 101 encompassed by a p- well region 102 and is provided on a p--type silicon substrate 100; a drain n+-region 103 connected to a drain electrode 120; a p base region 105 formed so as to be separate from and encompass the drain n+-region 103; and a source n+-region 114 formed in the p base region 105. Further, a p--region 131 is provided that passes through the n--type region 101 to the silicon substrate 100. The n--type region 101 is divided, by the p--region 131, into an n--type region 101a having the drain n+-region 103 and an n--type region 101b as a region having a floating electric potential.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/8234 - MIS technology
  • H01L 27/08 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/786 - Thin-film transistors

25.

SEMICONDUCTOR MODULE, PROCESS FOR PRODUCTION THEREOF

      
Application Number JP2010066454
Publication Number 2011/040313
Status In Force
Filing Date 2010-09-22
Publication Date 2011-04-07
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Morozumi, Akira
  • Ikeda, Yoshinari

Abstract

A semiconductor chip (40) is bound to one main surface of an insulating substrate (60). A metal base plate (50) is bound to the other main surface of the insulating substrate (60). Subsequently, a resin case is fixed to the peripheral part of the metal base plate (50) in a member containing the semiconductor chip (40). Subsequently, a surface electrode formed on the semiconductor chip (40) is connected to an external connection terminal of the resin case through a bonding wire (81), thereby sealing the semiconductor chip (40). In this manner, a semiconductor device (10) is assembled. In the assembled semiconductor device (10), a solder (31) (32) and a reactive metal foil (30) that acts as a heat source are inserted between the metal base plate (50) and a heat sink (20), the resulting product is pressurized, an electric current is applied to the reactive metal foil (30) to cause ignition to occur, thereby melting the solder (31) (32), and the molten solder (31) (32) is solidified. In this manner, the metal base plate (50) and the heat sink (20) are bound to each other instantly at room temperature.

IPC Classes  ?

  • H01L 23/373 - Cooling facilitated by selection of materials for the device
  • B23K 1/00 - Soldering, e.g. brazing, or unsoldering
  • B23K 3/04 - Heating appliances
  • H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

26.

SOLAR CELL MODULE LAMINATE

      
Application Number JP2010059235
Publication Number 2011/033828
Status In Force
Filing Date 2010-06-01
Publication Date 2011-03-24
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Namiki, Yoichi
  • Hitomi, Miyako
  • Tanda, Masayuki

Abstract

The disclosed solar cell module laminate is provided with both a solar cell module and a supporting body supporting the solar cell module, such as a metal plate, resin sheet, or tile, and the aforementioned solar cell module is bonded to the aforementioned supporting body with a bonding material layer therebetween. The minimum necessary bonding area is calculated from the ratio of the minimum bond strength needed in said solar cell module laminate and the bond strength between the aforementioned solar cell module and the aforementioned bonding material layer, and the solar cell module laminate is given a structure that suppresses the amount of bonding material used to a minimum. By means of this structure, costs are reduced in response to the amount of bonding material used. Accordingly, both cost reduction and sufficient bonding strength are possible in the solar cell module laminate.

IPC Classes  ?

  • H01L 31/042 - PV modules or arrays of single PV cells

27.

SEMICONDUCTOR MODULE AND HEAT RADIATION MEMBER

      
Application Number JP2010004610
Publication Number 2011/024377
Status In Force
Filing Date 2010-07-15
Publication Date 2011-03-03
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Soyano, Shin
  • Ono, Masaki
  • Suzuki, Kenji
  • Morozumi, Akira

Abstract

The characteristics of a heat radiation member used in a semiconductor module are improved. A heat radiation member (10A) including an aluminum type member (20) which contains aluminum and a copper type member (30) which contains copper, which is embedded in the aluminum type member (20), and sides of which are enclosed by the aluminum type member (20) is formed. A semiconductor element is thermally bonded to the heat radiation member (10A) to fabricate a semiconductor module. The heat radiation member (10A) includes the aluminum type member (20) and the copper type member (30). As a result, it is possible to realize light weight while ensuring certain heat radiation. In addition, the copper type member (30) is enclosed by the aluminum type member (20). Accordingly, the strength of the heat radiation member (10A) can be increased.

IPC Classes  ?

  • H01L 23/373 - Cooling facilitated by selection of materials for the device

28.

Method for evaluating semiconductor device

      
Application Number 12805273
Grant Number 08471585
Status In Force
Filing Date 2010-07-21
First Publication Date 2011-03-03
Grant Date 2013-06-25
Owner
  • Tokyo Electron Limited (Japan)
  • Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Miyazono, Mitsuyoshi
  • Komatsu, Shigekazu
  • Shinozaki, Dai
  • Kato, Masahiro
  • Yoshida, Atsushi

Abstract

A yield and productivity of a semiconductor module are improved. A sheet having electrical conductivity is fixed to a main surface of a semiconductor substrate on which a plurality of semiconductor devices having a surface structure and a rear surface electrode are arranged. The semiconductor substrate is divided into semiconductor chips on a first support stage in the state where the sheet is fixed to its main surface. The plurality of divided semiconductor chips are mounted on a second support stage via the sheet and further, the plurality of mounted semiconductor chips are continuously subjected to a dynamic characteristic test on the second support stage. The proposed semiconductor device evaluation method permits a fissure growing and propagating from a crack occurring in the dynamic characteristic test of the vertical semiconductor devices to be suppressed, and the yield and productivity of the semiconductor module to be improved.

IPC Classes  ?

  • G01R 31/26 - Testing of individual semiconductor devices

29.

SEMICONDUCTOR MODULE AND COOLING UNIT

      
Application Number JP2010004791
Publication Number 2011/018882
Status In Force
Filing Date 2010-07-28
Publication Date 2011-02-17
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Gohara, Hiromichi
  • Morozumi, Akira
  • Higuchi, Keiichi

Abstract

A semiconductor module including a cooling unit by which a fine cooling effect is obtained is provided. A plurality of cooling flow paths (21c) which communicate with both of a refrigerant introduction flow path which extends from a refrigerant introduction inlet and a refrigerant discharge flow path which extends to a refrigerant discharge outlet are arranged in parallel with one another in a cooling unit (20). Fins (22) are arranged in each cooling flow path (21c). Semiconductor elements (32) and (33) are arranged over the cooling unit (20) so that the semiconductor elements (32) and (33) are thermally connected to the fins (22). By doing so, a semiconductor module (10) is formed. Heat generated by the semiconductor elements (32) and (33) is conducted to the fins (22) arranged in each cooling flow path (21c) and is removed by a refrigerant which flows along each cooling flow path (21c).

IPC Classes  ?

  • H01L 23/473 - Arrangements for cooling, heating, ventilating or temperature compensation involving the transfer of heat by flowing fluids by flowing liquids

30.

MANUFACTURING METHOD OF SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR APPARATUS

      
Application Number JP2010004826
Publication Number 2011/013380
Status In Force
Filing Date 2010-07-29
Publication Date 2011-02-03
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Niimura, Yasushi
  • Watanabe, Sota
  • Takahashi, Hidenori
  • Fujimoto, Takumi
  • Nishimura, Takeyoshi
  • Wakabayashi, Takamasa

Abstract

A screen oxide film is formed on an n- drift layer (2) that is disposed on an anterior side of an n-type low-resistance layer (1), and a nitride film is formed on the screen oxide film. The nitride film is photo-etched using a first mask and thereby, a nitride shielding film (61) is formed. N-type impurity ions at a concentration higher than that of the n- drift layer are implanted through the nitride shielding film (61) from an anterior side of a semiconductor substrate and are thermally diffused and thereby, an n counter layer (7) is formed. The screen oxide film is removed. A gate oxide film (3a) is formed. A gate electrode (9) is formed on the gate oxide film (3a). P-type impurity ions are implanted from the anterior side of the semiconductor substrate using the gate electrode (9) and the nitride shielding film (61) as a mask and thereby, p- well regions (10) are formed. N-type impurity ions are implanted from the anterior side of the semiconductor substrate using the gate electrode (9) and the nitride shielding film (61) as a mask and thereby, n source regions (11) are formed.

IPC Classes  ?

  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

31.

SEMICONDUCTOR APPARATUS

      
Application Number JP2010004825
Publication Number 2011/013379
Status In Force
Filing Date 2010-07-29
Publication Date 2011-02-03
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Onishi, Yasuhiko
  • Sugi, Akio

Abstract

A first parallel pn-layer (12) is formed between an active region (1) and an n+-drain region (2). A peripheral region (3) is provided with a second parallel pn-layer (15), which has a repetition pitch narrower than the repetition pitch of the first parallel pn-layer (12). An n--surface region (18) is formed between the second parallel pn-layer (15) and a first main surface. On the first main surface side of the n--surface region (18), a plurality of p-guard ring regions (19), (20), and (21) are formed to be separated from each other. A field plate electrode (23) is connected electrically to the outermost p-guard ring region (19) among the p-guard ring regions (19), (20), and (21). A channel stopper electrode (24) is connected electrically to an outermost peripheral p-region (26) of the peripheral region (3).

IPC Classes  ?

  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

32.

SUPER-JUNCTION SEMICONDUCTOR DEVICE

      
Application Number JP2010004549
Publication Number 2011/007560
Status In Force
Filing Date 2010-07-13
Publication Date 2011-01-20
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor Takei, Manabu

Abstract

Provision of a super-junction semiconductor device capable of reducing rises in transient on-resistance at the time of repeated switching operation. A super-junction structure is provided that has a striped parallel surface pattern, where a super-junction stripe and a MOS cell 6 stripe are parallel, and a p column Y2 over which no MOS cell 6 stripe is arranged and a p column Y1 over which the MOS cell 6 stripe is arranged are connected at an end.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions

33.

SURFACE CONTAMINATION MONITOR

      
Application Number JP2010061664
Publication Number 2011/004883
Status In Force
Filing Date 2010-07-09
Publication Date 2011-01-13
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Hora, Akihito
  • Ishikura, Takeshi
  • Takano, Satoshi
  • Inui, Daisuke

Abstract

Disclosed is a surface contamination monitor which includes a hand-foot-cloth monitor capable of easily conducting the relocation to a place where an inspection should be conducted. Specifically disclosed is a surface contamination monitor having a folding mechanism capable of folding the monitor body, which is provided with a base (1), on the upper surface of which radiation detection elements (10) for measuring a foot section are provided, a support column (2) which is provided in the center rear of the upper surface of the base (1), and a top unit (3) which is affixed to the upper end of the support column (2), and to which radiation detection elements (10) for measuring a hand section are provided, wherein the folding mechanism is capable of folding the support column (2) onto the upper surface of the base (1) via a first hinge provided at the lower end of the support column (2), and capable of folding the support column (2) to the opposite side via a second hinge provided in the middle of the support column (2), and wherein the top unit (3) projects more outward than the end of the base (1) in the state in which the support column (2) is folded via the first and second hinges.

IPC Classes  ?

  • G01T 1/169 - Exploration, location of contaminated surface areas
  • G01T 1/24 - Measuring radiation intensity with semiconductor detectors

34.

RADIATION DETECTION ELEMENT AND SURFACE CONTAMINATION MONITOR

      
Application Number JP2010061665
Publication Number 2011/004884
Status In Force
Filing Date 2010-07-09
Publication Date 2011-01-13
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Hora, Akihito
  • Ishikura, Takeshi
  • Takano, Satoshi
  • Inui, Daisuke

Abstract

Disclosed are a semiconductor radiation detection element and a surface contamination monitor, which are capable of easily conducting the relocation to a place where an inspection should be conducted, and maintaining radiation detection capability over a long period. A hand-foot-cloth monitor detects the radiation irradiated from radioactive substances adhered to the surfaces of the hands and feet and the surfaces of clothes with a radiation detection element (10). The radiation detection element (10) is provided with a P-layer (112) (P-type semiconductor layer) joined to an N-type silicon substrate (111) (N-type semiconductor substrate), a detection-surface-side electrode (13) (first electrode) formed on the upper surface of the P-layer (112), a circuit-board-side electrode (12) (second electrode) formed on the lower surface of the N-type silicon substrate (111), and a silicon nitride film (14) formed on the element surface including the detection-surface-side electrode (13).

IPC Classes  ?

  • G01T 1/169 - Exploration, location of contaminated surface areas
  • G01T 1/24 - Measuring radiation intensity with semiconductor detectors

35.

EXIT MONITOR

      
Application Number JP2010004198
Publication Number 2011/001638
Status In Force
Filing Date 2010-06-24
Publication Date 2011-01-06
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Yanagishima, Ryohei
  • Ito, Katsuhito
  • Saito, Ryoichi
  • Takano, Satoshi

Abstract

Disclosed is an exit monitor which has an inexpensive and straightforward construction, and which improves both detection performance and cost performance by making it possible to detect contamination due to radioactive substances, particularly in underarm locations between the side of the body and the arms where detection is otherwise difficult, without being affected by differences in height among a large number of workers. A front/back surface monitoring section (2) detects the surface contamination state of the front surface and back surface of the body of a worker. A section (31) for monitoring the underarms on both sides detects the surface contamination state on the side of the body from the waist to the underarm of the worker, and the surface contamination state on the insides of the arms, from the palm to the underarm on the insides of the arms of the worker. Thus an exit monitor (100) detects whether or not there is contamination on the front surface and the rear surface and the underarm surfaces on both sides of the body, in accordance with the detection signals.

IPC Classes  ?

  • G01T 1/00 - Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
  • G01T 1/169 - Exploration, location of contaminated surface areas

36.

SEMICONDUCTOR DEVICE

      
Application Number JP2010003834
Publication Number 2010/150471
Status In Force
Filing Date 2010-06-09
Publication Date 2010-12-29
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor Soyano, Shin

Abstract

A semiconductor device in which the assembly of a shield plate, a metal ring, and a control circuit board is improved is provided. A metal step support 20 implanted in a sheath case includes a base portion 20a, a connection portion 20b, and a step portion 20c. A shield plate 21 is mounted over the step portion 20c. A metal ring 22 is mounted over the shield plate 21 so that it is placed around the connection portion 20b. A control circuit board 23 is mounted over the metal ring 22. The control circuit board 23 is fixed to the connection portion 20b of the step support 20 by the use of a screw 24. The metal ring 22 is positioned by the connection portion 20b, so the assembly can be performed easily. An end of the metal ring 22 over which the control circuit board 23 is mounted protrudes from an end of the connection portion 20b and the control circuit board 23 is fixed onto metal. Therefore, looseness of the screw 24 caused by, for example, vibration can be minimized.

IPC Classes  ?

  • H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,

37.

SOLAR CELL MODULE LAMINATED BODY AND METHOD FOR MANUFACTURING SAME

      
Application Number JP2010059234
Publication Number 2010/146986
Status In Force
Filing Date 2010-06-01
Publication Date 2010-12-23
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Namiki, Yoichi
  • Egota, Kazumi
  • Tanda, Masayuki

Abstract

Provided is a solar cell module laminated body wherein a pressure-sensitive adhesive which bonds together a supporting body and a solar cell module does not deteriorate due to light, and furthermore, a possibility of having the supporting body and the solar cell module removed from each other is eliminated. In the solar cell module laminated body wherein the solar cell module having a solar cell element therein and the supporting body are laminated, the supporting body and the solar cell module are bonded to each other. At the solar cell module outer periphery irradiated with solar light, the supporting body and the solar cell module are bonded to each other by means of a reactive curable adhesive, and in the solar cell module portion inside of the outer periphery, said portion being shielded from solar light, the supporting body and the solar cell module are bonded by means of the pressure-sensitive adhesive.

IPC Classes  ?

  • H01L 31/042 - PV modules or arrays of single PV cells

38.

ARTICLE CARRYING MONITOR

      
Application Number JP2009065180
Publication Number 2010/125700
Status In Force
Filing Date 2009-08-31
Publication Date 2010-11-04
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Yanagishima, Ryohei
  • Ito, Katsuhito
  • Minagawa, Tomoya

Abstract

Disclosed is an article carrying monitor (100) for precisely detecting the six faces of an article to be inspected, thereby to detect the presence or absence of contamination satisfactorily.  A monitor unit detects, for the front face of the article, the presence or absence of the contamination by means of a front-face detector, if the distance from the front face of the article to the front-face detector is within a predetermined range.  If the distance from the front face of the article to the front-face detector exceeds the predetermined range and if a contaminated portion is on the front-face lefthand, the presence or absence of the contamination is detected by an upper-face front-side leftward detector and a lower-face front-side leftward detector.  If the distance from the front face of the article to the front-face detector exceeds the predetermined range and if a contaminated portion is on the front-face righthand, the presence or absence of the contamination is detected by an upper-face front-side rightward detector and a lower-face front-side rightward detector.  The contamination of the back face, the left face and the right face is likewise measured by the article carrying monitor (100).

IPC Classes  ?

  • G01T 1/167 - Measuring radioactive content of objects, e.g. contamination
  • G01T 1/169 - Exploration, location of contaminated surface areas

39.

Wide band gap semiconductor device

      
Application Number 12718514
Grant Number 09450084
Status In Force
Filing Date 2010-03-05
First Publication Date 2010-10-28
Grant Date 2016-09-20
Owner FUJI ELECTRIC SYSTEMS CO. LTD. (Japan)
Inventor Ueno, Katsunori

Abstract

A semiconductor device having high reliability and high load short circuit withstand capability while maintaining a low ON resistance is provided, by using a WBG semiconductor as a switching element of an inverter circuit. In the semiconductor device for application to a switching element of an inverter circuit, a band gap of a semiconductor material is wider than that of silicon, a circuit that limits a current when a main transistor is short circuited is provided, and the main transistor that mainly serves to pass a current, a sensing transistor that is connected in parallel to the main transistor and detects a microcurrent proportional to a current flowing in the main transistor, and a lateral MOSFET that controls a gate of the main transistor on the basis of an output of the sensing transistor are formed on the same semiconductor.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H02M 7/00 - Conversion of ac power input into dc power output; Conversion of dc power input into ac power output

40.

SOLAR CELL MODULE

      
Application Number JP2010001911
Publication Number 2010/106799
Status In Force
Filing Date 2010-03-17
Publication Date 2010-09-23
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Yokoyama, Yasuhiro
  • Hayashi, Kazuhiko

Abstract

Disclosed is a solar cell module (100) which comprises a solar cell power generating unit (102) and a connection member (104). The connection member (104) supplies the output of a solar cell (110) to an external electronic component (220). The connection member (104) is provided with a cover member (130) and an output connection part (140). The cover member (130) covers at least the outer periphery of a terminal part (126) among the outer periphery of a protective member (120) and the outer periphery of the terminal part (126). One end (142) of the output connection part (140) is positioned inside the cover member (130), and the other end (144) is positioned outside the cover member (130). The end (142) of the output connection part (140) is connected to the terminal part (126) of the solar cell power generating unit (102). The other end (144) of the output connection part (140) has a terminal for the connection with an electronic component (200).

IPC Classes  ?

  • H01L 31/042 - PV modules or arrays of single PV cells
  • H01L 31/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices

41.

SWITCHING POWER SUPPLY DEVICE, INTEGRATED CIRCUIT, AND METHOD FOR SETTING OPERATION STATE OF SWITCHING POWER SUPPLY DEVICE

      
Application Number JP2010054218
Publication Number 2010/104172
Status In Force
Filing Date 2010-03-12
Publication Date 2010-09-16
Owner FUJI ELECTRIC SYSTEMS CO.,LTD. (Japan)
Inventor Chen, Jian

Abstract

Provided is a switching power supply device capable of setting an operation state during an initialization period by adjusting the value of a resistor for grounding an OUT-terminal or an IS-terminal, and also provided is a method for setting the operation state. The switching power supply device comprises: an oscillation circuit (3) for specifying the switching frequency of a switching element (Q1); a drive circuit (4) for, based on an oscillation signal from the oscillation circuit (3), turning on and off the switching element (Q1); a state setting circuit (6) disposed within a power supply control IC (100) including the oscillation circuit (3) and the drive circuit (4) and outputting a state instruction signal for instructing an operation state of the switching power supply device; and a control circuit (1) for, within the initialization period immediately after the power supply to the power supply control IC (100) is started, instructing the state setting circuit (6) to determine the state instruction signal. A first resistor (R1) having an adjusted resistance value is connected to an external terminal of the power supply control IC (100) to which the drive signal to the switching element (Q1) is output.

IPC Classes  ?

  • H02M 3/155 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

42.

PHOTORECEPTOR FOR ELECTROPHOTOGRAPHY, PROCESS FOR PRODUCING THE SAME, AND ELECTROPHOTOGRAPHIC APPARATUS

      
Application Number JP2009052576
Publication Number 2010/092695
Status In Force
Filing Date 2009-02-16
Publication Date 2010-08-19
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Suzuki, Shinjiro
  • Nakamura, Yoichi
  • Kitagawa, Seizo
  • Zhu, Fengqiang
  • Nebashi, Kazuki

Abstract

Provided is a photoreceptor for electrophotography in which the photoreceptor drum surface can have reduced frictional resistance throughout the period from the beginning to after printing. The photoreceptor is reduced in wear and can give satisfactory images. Also provided are a process for producing the photoreceptor and an electrophotographic apparatus. The photoreceptor for electrophotography has a photosensitive layer containing, as a resin binder, a copolyarylate resin comprising structural units represented by the following chemical structural formula (1). (In the chemical structural formula (1), partial structural formulae (A), (B), (C), (D), (E), and (F) represent structural units constituting the resin binder. Symbols a, b, c, d, e, and f indicate the amounts in mol% of structural units (A), (B), (C), (D), (E), and (F), respectively, provided that a+b+c+d+e+f is 100 mol%. R1 to R19 each represents hydrogen or the like, and s and t each is an integer of 1 or larger.)

IPC Classes  ?

  • G03G 5/05 - Organic bonding materials; Methods for coating a substrate with a photoconductive layer; Inert supplements for use in photoconductive layers

43.

Method of manufacturing a semiconductor device

      
Application Number 12700044
Grant Number 07947586
Status In Force
Filing Date 2010-02-04
First Publication Date 2010-08-05
Grant Date 2011-05-24
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Urano, Yuichi

Abstract

A method of manufacturing a semiconductor device is disclosed, wherein a plating layer is formed on a first surface side of a semiconductor substrate stably and at a low cost, while preventing the plating liquid from being contaminated and avoiding deposition of uneven plating layer on a second surface side. An electrode is formed on the first surface of the semiconductor substrate, and another electrode is formed on the second surface. A curing resin is applied on the electrode on the second surface and a film is stuck on the curing resin, and the curing resin is then cured. After that, a plating process is conducted on the first surface. The film and the curing resin are then peeled off.

IPC Classes  ?

  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth

44.

Sliding door opening/closing device for vehicle

      
Application Number 12656339
Grant Number 08136299
Status In Force
Filing Date 2010-01-26
First Publication Date 2010-07-29
Grant Date 2012-03-20
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Inage, Akio

Abstract

The present invention provides a sliding door opening/closing device for a vehicle that applies a sufficient opening/closing drive force to the left and right sliding doors and reduces a force necessary to lock and unlock the latch, despite a simple configuration of the device, and that facilitates the manufacturing process, improves operability and safety, and reduces noise. A lock device, against both sides of which locking portions abut, rotates a columnar permanent magnet so as to form magnetic locking circuits and fixes the locking portions by magnetic forces of the locking magnetic circuits. The rotational operation of the columnar permanent magnet is converted into the downward operation of a latch, and the lowered latch restrains the locking portions with respect to the lock device.

IPC Classes  ?

  • E05C 7/04 - Fastening devices specially adapted for two wings for wings which abut when closed

45.

Cooling apparatus for semiconductor chips

      
Application Number 12591671
Grant Number 08081465
Status In Force
Filing Date 2009-11-27
First Publication Date 2010-07-08
Grant Date 2011-12-20
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Nishiura, Akira

Abstract

A cooling apparatus for semiconductor chips includes radiation fins formed on the opposite surface of metal base opposite to the surface of metal base, to which an insulator base board mounting semiconductor chips thereon, is disposed. The radiation fins, such as sheet-shaped fins having different lengths are arranged such that the surface area density of the fins becomes higher in the coolant flow direction, whereby the surface area density is the total surface area of radiation fins on a unit surface area of the metal base. As a result, the temperatures of semiconductor chips arranged along the coolant flow direction are closer to each other.

IPC Classes  ?

  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

46.

SOLAR CELL MODULE

      
Application Number JP2009070832
Publication Number 2010/073932
Status In Force
Filing Date 2009-12-14
Publication Date 2010-07-01
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Wada, Takehito

Abstract

A solar cell module, wherein a decrease in the insulation resistance can be suppressed.  The solar cell module comprises: a photoelectric conversion device (103) comprising a substrate (107) and a photoelectric conversion layer (109) formed on the substrate (107); a protective member (101) for protecting the light incident surface of the solar cell module, the protective member (101) bonded to the photoelectric conversion device (103) on the light incident surface-side with a sealing member (105) being interposed therebetween; a reinforcing member (102) for protecting the solar cell module, the reinforcing member (102) bonded to a surface of the solar cell module opposite to the light incident surface with a sealing member (106) being interposed therebetween; and an insulating sheet (104) which is arranged between the photoelectric conversion device (103) and the reinforcing member (102) for insulation of the photoelectric conversion device (103).

IPC Classes  ?

  • H01L 31/042 - PV modules or arrays of single PV cells

47.

ELECTROPHOTOGRAPHIC PHOTOSENSITIVE BODY, METHOD FOR PRODUCING SAME, AND ELECTROPHOTOGRAPHIC APPARATUS

      
Application Number JP2009070856
Publication Number 2010/071118
Status In Force
Filing Date 2009-12-14
Publication Date 2010-06-24
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Suzuki Shinjiro
  • Nakamura Yoichi
  • Takaki Ikuo
  • Kitagawa Seizo
  • Nebashi Kazuki

Abstract

Disclosed is an electrophotographic photosensitive body, which is free from image defects such as background fogging or black spots on the white background by having good coating liquid stability and good metal oxide dispersion, and has good image characteristics in any environment.  Also disclosed are a method for producing the electrophotographic photosensitive body, and an electrophotographic apparatus provided with the electrophotographic photosensitive body. Specifically disclosed is an electrophotographic photosensitive body (7), wherein an underlying layer (2) and a photosensitive layer (3) are sequentially arranged on a conductive base (1).  The underlying layer (2) contains, as a main component, a resin which is obtained by polymerization using an aromatic dicarboxylic acid, one or more aliphatic dicarboxylic acids having 8 or more carbon atoms, and one or more diamines having a cycloalkane structure as starting materials, and additionally contains a metal oxide.  The aromatic dicarboxylic acid is contained in the resin in an amount of 0.1-10 mol%, and both the acid number and the base number of the resin are 10 KOHmg/g or less.  Also specifically disclosed are a method for producing the electrophotographic photosensitive body (7), and an electrophotographic apparatus provided with the electrophotographic photosensitive body (7).

IPC Classes  ?

  • G03G 5/14 - Inert intermediate or cover layers for charge- receiving layers
  • G03G 5/06 - Photoconductive layers; Charge-generation layers or charge-transporting layers; Additives therefor; Binders therefor characterised by the photoconductive material being organic

48.

ELECTROPHOTOGRAPHIC PHOTORECEPTOR, PROCESS FOR PRODUCING THE ELECTROPHOTOGRAPHIC PHOTORECEPTOR, AND ELECTROPHOTOGRAPHIC DEVICE

      
Application Number JP2009070046
Publication Number 2010/064585
Status In Force
Filing Date 2009-11-27
Publication Date 2010-06-10
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Nebashi Kazuki
  • Nakamura Yoichi
  • Takaki Ikuo
  • Kitagawa Seizo
  • Suzuki Shinjiro

Abstract

Disclosed is an electrophotographic photoreceptor which is equipped with an undercoating layer capable of attaining stable potential characteristics in all environments ranging from low temperature and low humidity environments to high temperature and high humidity environments, suppressing the occurrence of printing defects and simultaneously attaining the recovery from transfer and the recovery from high light fatigue even in a wide variety of usage and operating environments, and as a result, which can print good images having little or no image defect and density difference by virtue of the provision of.  Also disclosed are a process for producing the electrophotographic photoreceptor and an electrophotographic device with the electrophotographic photoreceptor mounted thereon. An electrophotographic photoreceptor (7) comprises an undercoating layer (2) and a photosensitive layer (3) stacked in serial order on an electroconductive base (1).  The undercoating layer (2) comprises metal oxide fine particles having a surface treated with an organic compound, and a copolymer resin synthesized using a dicarboxylic acid, a diol, a triol, and a diamine as indispensable constituent monomers.

IPC Classes  ?

  • G03G 5/14 - Inert intermediate or cover layers for charge- receiving layers
  • G03G 5/00 - Recording-members for original recording by exposure e.g. to light, to heat, to electrons; Manufacture thereof; Selection of materials therefor
  • G03G 5/05 - Organic bonding materials; Methods for coating a substrate with a photoconductive layer; Inert supplements for use in photoconductive layers

49.

CIRCUIT SIMULATION DEVICE

      
Application Number JP2008003422
Publication Number 2010/058446
Status In Force
Filing Date 2008-11-20
Publication Date 2010-05-27
Owner FUJI ELECTRIC SYSTEMS CO., LTD (Japan)
Inventor
  • Fujii, Kansuke
  • Ohguchi, Hideki

Abstract

A temperature model unit (10) has a first temperature model A and a second temperature model B. As for a semiconductor device, the first temperature model A is modeled only by thermal resistors (5)-(7) while the second temperature model B is arranged to be a model including not only thermal resistors (15)-(17) but also a thermal capacitor (14). The latter model, however, includes the thermal capacitor (14) only between a junction and a case, and a component between the case and a cooling member and that between the cooling member and a cooling medium are modeled only by the thermal resistors (16) and (17). The temperature model unit (10) carries out an operation by the first temperature model A for an initial fixed period. After a lapse of the fixed period, an average value of a voltage between both terminals of the thermal resistor (5) in the fixed period of time determined by a voltage average value calculator (21) is set as an initial value of a voltage between both terminals of the thermal capacitor (14), so that an operation of the second temperature model B starts. Thereafter, a junction temperature output by the second temperature model B is output to a loss model unit (3) and the like through a selector (13).

IPC Classes  ?

  • G06F 17/50 - Computer-aided design
  • H01L 29/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor bodies or of electrodes thereof

50.

ELECTROMAGNETIC DEVICE

      
Application Number JP2009069115
Publication Number 2010/055827
Status In Force
Filing Date 2009-11-10
Publication Date 2010-05-20
Owner
  • MEIDENSHA CORPORATION (Japan)
  • Fuji Electric Systems Co.,Ltd. ()
Inventor
  • Nakano, Ryuichi
  • Kodama, Toshihiro
  • Yamakawa, Hiroshi
  • Suzuki, Nobuo
  • Fukushima, Kazuhiro
  • Ikeno, Kichihiro

Abstract

Magnetic force deteriorates in a shorter time due to fastening pressure applied to a permanent magnet and positional shift of the permanent magnet due to vibration at the time of assembling an electromagnetic device having the permanent magnet attached thereto. A frame-shaped magnet holder composed of a nonmagnetic material is provided.  The magnet holder is formed with a thickness equivalent to or slightly more than that of the permanent magnet, and is provided with a fixing arm, which is connected to one edge of the frame-like body along the center line thereof and has a fixing hole.  Furthermore, supporting pieces are arranged to face the fixing arm with a hollow section therebetween, such that the supporting piece ends on one side are connected to the edge of the frame-like body and that the other ends are in the opened state.  On the surface where each supporting piece and the frame-like edge face each other, a space where the permanent magnet or a magnetic short-circuiting piece is fitted and inserted is provided.

IPC Classes  ?

  • H01F 7/126 - Supporting or mounting
  • H01F 7/16 - Rectilinearly-movable armatures
  • H01H 33/38 - Power arrangements internal to the switch for operating the driving mechanism using electromagnet

51.

Power factor correction power supply unit, and control circuit and control method used in the same

      
Application Number 12461979
Grant Number 08089255
Status In Force
Filing Date 2009-08-31
First Publication Date 2010-05-06
Grant Date 2012-01-03
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Chen, Jian

Abstract

A power factor correction power supply unit for correcting a power factor includes a switching device, an input voltage detection circuit, an output voltage detection circuit, an error amplifier for outputting an error signal obtained by amplifying a difference between an output voltage detection signal and a reference voltage, an ON width generation circuit for generating an ON time width, an OFF width generation circuit for generating an OFF time width of the switching device, and a switching device driving circuit. The drive circuit conducts an ON/OFF control over the switching device upon receiving a turn-on timing signal for turning on the switching device as soon as the OFF time width is terminated and upon receiving a turn-off timing signal for turning off the switching device as soon as the ON time width is terminated.

IPC Classes  ?

  • G05F 1/00 - Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or val

52.

Uninterruptible power supply and method for tripping thereof

      
Application Number 12588625
Grant Number 08493696
Status In Force
Filing Date 2009-10-22
First Publication Date 2010-04-29
Grant Date 2013-07-23
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Komatsuzaki, Yoshihiro

Abstract

Performance failure in an uninterruptible power supply (UPS) is determined independently by itself. A selective tripping can be done within a shorter time than one cycle of an AC output. A UPS converts a DC voltage to an AC voltage and supplies the AC voltage to a load device. A UPS has a control unit conducting a failure determination by using an instantaneous value of an internal voltage and current. It is preferred that a UPS includes an inverter unit and a trip switch. The inverter unit includes a semiconductor bridge circuit generating a sinusoidal AC voltage by modulating a DC voltage with voltage instruction values, and a filter circuit inserted between the semiconductor bridge circuit and the load device. The trip switch connects and trips a connection between the inverter unit and the load device according to the failure determination of the control unit.

IPC Classes  ?

  • H02H 7/00 - Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from norm

53.

Uninterruptible power supply and method for selective tripping thereof

      
Application Number 12588626
Grant Number 08330295
Status In Force
Filing Date 2009-10-22
First Publication Date 2010-04-29
Grant Date 2012-12-11
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Komatsuzaki, Yoshihiro

Abstract

UPS performance failure is determined independently by itself. Selective tripping can be done within a shorter time than one cycle of an AC output. A UPS converts a DC voltage to an AC voltage and supplies the AC voltage to a load device. A UPS has a control unit identifying a resistance value of an internal resistance as an internal impedance of the UPS by using an instantaneous value of an internal voltage and current and conducting a failure determination by detecting abnormal fluctuation of the value. It is preferred that an identification of the internal impedance is done through a system identification unit.

IPC Classes  ?

  • H02J 9/00 - Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting

54.

ONLINE DIAGNOSTIC METHOD AND ONLINE DIAGNOSTIC SYSTEM FOR GEOTHERMAL GENERATION FACILITY

      
Application Number JP2009068017
Publication Number 2010/047312
Status In Force
Filing Date 2009-10-19
Publication Date 2010-04-29
Owner
  • FUJI ELECTRIC SYSTEMS CO.,LTD. (Japan)
  • GEOTHERMAL ENGINEERING CO.,LTD. (Japan)
  • NIKKISO CO.,LTD. (Japan)
Inventor
  • Myougan Ichiro
  • Kato Toshikazu
  • Osawa Isamu
  • Hishi Yasuyuki
  • Fukuda Daisuke
  • Futagoishi Yasuto
  • Aoki Toshiaki

Abstract

Disclosed are an online diagnostic method and an online diagnostic system for a geothermal generation facility comprising: an automatic steam property measurement device (11) that measures the characteristics of steam supplied from a steam-water separator of a geothermal generation facility to a steam turbine and outputs analytical data; a monitor/control device (12) that controls operation while monitoring the geothermal generation facility; and a diagnostic device (21) that, on the basis of the analytical data from the automatic steam characteristics measurement device and the operating data for the geothermal generation facility from the monitor/control device, evaluates at least one of: the steam characteristics; the steam-water separator; or the pulsation and confluence of the production wells of the geothermal generation facility; and diagnoses the operating status of the geothermal generation facility.

IPC Classes  ?

  • F03G 4/00 - Devices for producing mechanical power from geothermal energy

55.

STEAM CHARACTERISTICS AUTOMATIC MEASURING DEVICE AND GEOTHERMAL POWER GENERATING DEVICE

      
Application Number JP2009005112
Publication Number 2010/038479
Status In Force
Filing Date 2009-10-02
Publication Date 2010-04-08
Owner
  • FUJI ELECTRIC SYSTEMS CO.,LTD. (Japan)
  • GEOTHERMAL ENGINEERING CO.,LTD. (Japan)
  • NIKKISO CO.,LTD. (Japan)
Inventor
  • Myougan, Ichiro
  • Hishi, Yasuyuki
  • Aoki, Toshiaki

Abstract

Provided are a steam characteristics automatic measuring device and a geothermal power generating device that can ascertain the conditions of a power generating turbine or a condenser over time and that assist the smooth operation of geothermal power generating facilities by automatically measuring the characteristics of steam produced from the ground for geothermal power generation without being affected by interfering components, such as hydrogen sulfide or carbon dioxide gas contained in large quantities in the steam, and ideally by automatically measuring the characteristics of steam over time. The steam characteristics automatic measuring device, and the geothermal power generating device equipped with same, are characterized by being provided with a silica concentration meter that automatically measures the concentration of silica contained in condensate obtained by cooling steam produced from the ground, an electrical conductivity meter that automatically measures the electrical conductivity of the condensate, a pH meter that automatically measures the pH value of the condensate, and a data processing transmitter that automatically transmits the data measured by the silica concentration meter, the electrical conductivity meter and the pH meter.

IPC Classes  ?

  • F03G 4/00 - Devices for producing mechanical power from geothermal energy
  • G01N 27/10 - Investigation or analysis specially adapted for controlling or monitoring operations or for signalling
  • G01N 27/416 - Systems
  • G01N 33/18 - Water

56.

SOLAR BATTERY PANEL, STRUCTURE FOR HOLDING SOLAR BATTERY PANEL, AND METHOD FOR FORMING SOLAR BATTERY PANEL

      
Application Number JP2009061279
Publication Number 2010/021197
Status In Force
Filing Date 2009-06-22
Publication Date 2010-02-25
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Yokoyama, Yasuhiro

Abstract

Provided is a solar battery panel or the like which is light in weight, can be installed on roofs or the like of existing construction with sufficient strength and durability, easily extracts power from a solar battery, and permits a resin sheet to be used also as a construction material. A solar battery panel (1) is formed by laminating: a soft resin sheet (2), which is positioned on a side opposite to a sunlight receiving surface (side opposite to a light incoming surface), and contains a glass fiber; a polyethylene resin layer (3) positioned on the resin sheet (2); a solar battery module (4), which is embedded in the polyethylene resin layer (3), is flexible and has a substrate (8) composed of polyimide resin; and an ETFE layer (5) positioned on the polyethylene resin layer (3).  The solar battery module (4) has a rear side electrode layer (9) on a side opposite to the light receiving surface of the polyimide resin substrate (8), and from the rear side electrode layer (9), a lead line (10) for extracting power from a solar battery cell (7) penetrates the polyethylene resin layer (3) and the resin sheet (2) and is led out to the side opposite to the light receiving surface of the resin sheet (2).

IPC Classes  ?

  • H01L 31/042 - PV modules or arrays of single PV cells
  • E04D 1/30 - Special roof-covering elements, e.g. ridge tiles, gutter tiles, gable tiles, ventilation tiles
  • E04D 3/40 - Slabs or sheets locally modified for auxiliary purposes, e.g. for resting on walls, for serving as guttering; Elements for particular purposes, e.g. ridge elements, specially designed for use in conjunction with slabs or sheets
  • E04D 13/18 - Roof covering aspects of energy collecting devices, e.g. including solar panels

57.

NOVEL ETHYLENE COMPOUND, CHARGE TRANSPORT MATERIAL CONTAINING THE ETHYLENE COMPOUND, PHOTORECEPTOR FOR ELECTROPHOTOGRAPHY CONTAINING THE ETHYLENE COMPOUND, AND PROCESS FOR PRODUCING THE PHOTORECEPTOR

      
Application Number JP2009062505
Publication Number 2010/007930
Status In Force
Filing Date 2009-07-09
Publication Date 2010-01-21
Owner Fuji Electric Systems Co.,Ltd. (Japan)
Inventor
  • Zhu Fengqiang
  • Nakamura Yoichi
  • Kitagawa Seizo
  • Suzuki Shinjiro
  • Takaki Ikuo

Abstract

Disclosed is an ethylene compound that can suppress a photo-deterioration, causes no significant light-induced fatigue, can prevent a rise in residual potential caused by the light-induced fatigue, can stably maintain properties as a photoreceptor for electrophotography even after use for a long period of time, and can stably provide a good image.  Also disclosed are a charge transport material containing the ethylene compound, the photoreceptor for electrophotography containing the ethylene compound, and a process for producing the photoreceptor. The ethylene compound is represented by general formula (I), wherein R1, R2, and R3 each independently represent a hydrogen atom, a halogen atom, an alkyl group having 1 to 6 carbon atoms, or an alkoxyl group having 1 to 6 carbon atoms; R4 represents an alkyl group having 1 to 3 carbon atoms, a phenyl group, or a tolyl group; and Ar represents an aryl or heterocyclic group having 7 to 20 carbon atoms.

IPC Classes  ?

  • C07C 211/54 - Compounds containing amino groups bound to a carbon skeleton having amino groups bound to carbon atoms of six-membered aromatic rings of the carbon skeleton having amino groups bound to two or three six-membered aromatic rings
  • G03G 5/06 - Photoconductive layers; Charge-generation layers or charge-transporting layers; Additives therefor; Binders therefor characterised by the photoconductive material being organic

58.

NEUTRON DOSIMETER

      
Application Number JP2009000906
Publication Number 2009/157115
Status In Force
Filing Date 2009-02-27
Publication Date 2009-12-30
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Nakamura, Takashi
  • Nunomiya, Tomoya

Abstract

A neutron dosimeter enabling compensation of the output of a mixed gas detector which outputs a detection pulse signal the pulse height of which corresponds to the energy of a neutron in response to the detection of the neutron. The mixed gas detector contains a mixed gas of nitrogen gas and an organic compound gas. The compensation is based on G(L) function data approximating the tendency of the characteristic shown on a graph the horizontal axis of which represents the neutron energy and the vertical axis of which represents the ambient dose equivalent (1-cm dose equivalent) to a neutron fluence vs ambience dose equivalent (1-cm dose equivalent) conversion factor curve (neutron energy vs ICRP 74 H*(10) response curve).

IPC Classes  ?

59.

ELECTROPHOTOGRAPHIC PHOTORECEPTOR AND PROCESS FOR PRODUCING THE PHOTORECEPTOR

      
Application Number JP2009059787
Publication Number 2009/145262
Status In Force
Filing Date 2009-05-28
Publication Date 2009-12-03
Owner Fuji Electric Systems Co.,Ltd. (Japan)
Inventor
  • Nakamura Yoichi
  • Kitagawa Seizo
  • Emori Hiroshi
  • Tanaka Yasushi
  • Ichiyanagi Hiroyuki

Abstract

Disclosed is a positive electrification laminate-type electrophotographic photoreceptor having excellent durability and cost effectiveness.  Also disclosed is a process for producing the photoreceptor. The electrophotographic photoreceptor comprises an electroconductive substrate (1) and a photosensitive layer (5) provided on the electroconductive substrate (1).  The photosensitive layer (5) is of a positive electrification laminate type comprising at least a charge transport layer (3) and a charge generating layer (4) stacked in this order.  The charge generating layer (4) contains at least a resin binder, a charge generating agent, a space filling agent, and an electron transport agent.  The charge transport layer (3) contains at least polystyrene as a resin binder and a hole transport agent.  The charge transport layer (3) has a mineral oil content that is not more than 1% by mass of polystyrene content.

IPC Classes  ?

  • G03G 5/047 - Photoconductive layers characterised by having two or more layers or characterised by their composite structure characterised by the charge-generation layers or charge-transporting layers
  • G03G 5/00 - Recording-members for original recording by exposure e.g. to light, to heat, to electrons; Manufacture thereof; Selection of materials therefor
  • G03G 5/05 - Organic bonding materials; Methods for coating a substrate with a photoconductive layer; Inert supplements for use in photoconductive layers
  • G03G 5/06 - Photoconductive layers; Charge-generation layers or charge-transporting layers; Additives therefor; Binders therefor characterised by the photoconductive material being organic

60.

METHOD AND APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number JP2009057566
Publication Number 2009/142078
Status In Force
Filing Date 2009-04-15
Publication Date 2009-11-26
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Urano, Yuichi
  • Kazama, Kenichi

Abstract

A substrate to be processed is bonded on a supporting substrate, which has an outer shape larger than that of the substrate to be processed, with a photothermal conversion layer and an adhesive layer therebetween, and even when the surface, which is of the substrate to be processed and is opposite to the bonded surface, is processed, appearance failure on the processed surface of the substrate to be processed is prevented from being generated. An adhesive layer (4) is formed on one surface of a substrate (3) to be processed, a photothermal conversion layer (2) is formed on one surface of a supporting substrate (1) having a surface which has an outer shape larger than that of the surface of the substrate to be processed, and a laminated body is obtained by bonding the substrate (3) on the surface of the photothermal conversion layer (2) with the adhesive layer (4) therebetween. The laminated body is placed on a spin chuck (9) in a chamber (8) of a spin coater apparatus, an alkaline aqueous solution (11) is dropped onto a portion (2a), which is of the photothermal conversion layer (2) and exposed from the substrate to be processed, then, the exposed portion is cleaned by means of a high-pressure cleaning nozzle (12). Then, polishing, wet-processing and the like are performed to the surface of the substrate (3), and a semiconductor device is manufactured.

IPC Classes  ?

  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
  • H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
  • H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching

61.

PROCESS FOR FABRICATING SEMICONDUCTOR DEVICE

      
Application Number JP2009057522
Publication Number 2009/142077
Status In Force
Filing Date 2009-04-14
Publication Date 2009-11-26
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor Urano, Yuichi

Abstract

Provided is a process for fabricating a semiconductor device wherein an electrode is not peeled off easily from a semiconductor substrate. A front-surface electrode or the surface structure of a device is formed on the front surface of the semiconductor substrate (1). The semiconductor substrate (1) is then made thin by performing back grinding and etching on the entire back surface thereof. Subsequently, a buffer layer and a collector layer are formed on the back surface of the semiconductor substrate (1), which has been made thin, by performing ion implantation and heat treatment. Thereafter, a titanium film (12) and a nickel film are formed, as a back-surface electrode, sequentially on the back surface of the semiconductor substrate (1) by deposition or sputtering. Thereafter, electroless nickel plating and substitution gold plating are performed continuously, and a nickel plated film (14) and a substitution gold plated film (15) are formed simultaneously on the opposite sides of the front-surface electrode and the back-surface electrode of the semiconductor substrate (1), thus forming a collector electrode (9). As a preprocessing of electroless nickel plating, double zincate processing is performed on the front-surface electrode of the semiconductor substrate (1).

IPC Classes  ?

  • H01L 21/288 - Deposition of conductive or insulating materials for electrodes from a liquid, e.g. electrolytic deposition
  • C23C 18/16 - Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, i.e. electroless plating
  • C23C 28/02 - Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of main groups , or by combinations of methods provided for in subclasses and only coatings of metallic material
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

62.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number JP2009058927
Publication Number 2009/139417
Status In Force
Filing Date 2009-05-13
Publication Date 2009-11-19
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Shimoyama, Kazuo
  • Tsukamoto, Yasuhiko

Abstract

On an n-semiconductor substrate (1), a trench to be a second side wall (7) is formed by cutting the substrate by means of a dicing blade having an inverted trapezoid shape. A p-diffusion layer (4) is prevented from being cut, by bringing the bottom section of the trench into contact with the p-diffusion layer (4) formed on a first main surface (2) (front surface) of the n-semiconductor substrate (1). Then, on the second side wall (7), a p-isolating layer (9) connected with a p-collector layer (8) and the p-diffusion layer (4) is formed. Since the p-diffusion layer (4) is not cut, a glass supporting substrate which supports a wafer and an expensive adhesive are eliminated, and the p-isolating layer (4) can be formed at low cost.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
  • H01L 21/301 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to subdivide a semiconductor body into separate parts, e.g. making partitions
  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/76 - Making of isolation regions between components
  • H01L 21/761 - PN junctions
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect

63.

ELECTROPHOTOGRAPHIC PHOTORECEPTOR AND METHOD FOR MANUFACTURING THE ELECTROPHOTOGRAPHIC PHOTORECEPTOR

      
Application Number JP2009056877
Publication Number 2009/133747
Status In Force
Filing Date 2009-04-02
Publication Date 2009-11-05
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Takaki, Ikuo
  • Nakamura, Yoichi
  • Kitagawa, Seizo
  • Nebashi, Kazuki
  • Zhu, Fengqiang

Abstract

Disclosed is an electrophotographic photoreceptor that is less likely to cause cracking even when the photoreceptor drum and the peripheral members thereof are recycled or when used in a liquid development process, whereby good images can be yielded. Also disclosed is a method for manufacturing the electrophotographic photoreceptor. The electrophotographic photoreceptor comprises an electroconductive substrate and a photosensitive layer containing at least an electric charge generating material and an electric charge transport material on the electroconductive substrate. The photosensitive layer comprises an interpolyallylate resin represented by general formula (I) as a resin binder.

IPC Classes  ?

  • G03G 5/05 - Organic bonding materials; Methods for coating a substrate with a photoconductive layer; Inert supplements for use in photoconductive layers
  • G03G 5/047 - Photoconductive layers characterised by having two or more layers or characterised by their composite structure characterised by the charge-generation layers or charge-transporting layers
  • G03G 15/02 - Apparatus for electrographic processes using a charge pattern for laying down a uniform charge, e.g. for sensitising; Corona discharge devices
  • G03G 21/00 - Arrangements not provided for by groups , e.g. cleaning, elimination of residual charge

64.

Semiconductor device for controlling switching power supply

      
Application Number 12385527
Grant Number 08084893
Status In Force
Filing Date 2009-04-10
First Publication Date 2009-10-29
Grant Date 2011-12-27
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Fujii, Masanari

Abstract

A semiconductor device controls a switching power supply. The semiconductor device includes a current inflow terminal; a starter circuit to cause a starting current to flow from the current inflow terminal to a power supply terminal to charge a capacitor externally connected to the power supply terminal; a control unit which controls the starter circuit to turn on to charge the capacitor with the starting current and controls the starter circuit to turn off to perform brown-out detection; a comparator which detects a brown-out state while the starter circuit is turned off; and a brown-out detection unit which receives output signals from the comparator and the control unit as inputs. The brown-out detection is performed while the starter circuit is off, so that the current inflow terminal for the starter circuit is used in common as a voltage detection terminal for detection of the brown-out state.

IPC Classes  ?

  • H01H 35/00 - Switches operated by change of a physical condition

65.

INDUCTION HEATING APPARATUS AND INDUCTION HEATING METHOD

      
Application Number JP2009054734
Publication Number 2009/125645
Status In Force
Filing Date 2009-03-12
Publication Date 2009-10-15
Owner
  • NIPPON STEEL CORPORATION (Japan)
  • FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Mochinaga, Hiroaki
  • Ishizaki, Kazunari
  • Koga, Shigenobu
  • Kataoka, Takaharu
  • Umetsu, Kenji
  • Matsunaga, Yasuo
  • Ikeda, Yasuyuki

Abstract

An induction heating apparatus which continuously heats a steel plate by a solenoid system. The induction heating apparatus (1) comprises at least three heating coils (10A to 10D) which are arranged along the longitudinal direction of the steel plate such that the steel plate (2) passes through the inside thereof, and inductance adjusters (12A to 12D) which are arranged on electrical pathways (11) electrically interconnecting the respective heating coils and a power source for applying voltage to the heating coils and can generate self induction and adjust self inductance in the self induction. The inductance adjusters are arranged such that mutual induction is generated at least between mutually adjacent inductance adjusters.

IPC Classes  ?

  • H05B 6/36 - Coil arrangements
  • C21D 1/42 - Induction heating
  • C21D 9/56 - Continuous furnaces for strip or wire
  • C21D 9/60 - Continuous furnaces for strip or wire with induction heating
  • H05B 6/10 - Induction heating apparatus, other than furnaces, for specific applications
  • H05B 6/44 - Coil arrangements having more than one coil or coil segment

66.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number JP2009057162
Publication Number 2009/125779
Status In Force
Filing Date 2009-04-08
Publication Date 2009-10-15
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Ikeda, Yoshinari
  • Soyano, Shin
  • Morozumi, Akira
  • Suzuki, Kenji
  • Takahashi, Yoshikazu

Abstract

Heat is efficiently dissipated from the upper and lower major surfaces of a semiconductor device on which a semiconductor element is mounted. A semiconductor device (1) comprises an insulating substrate (10A), an insulating substrate (10B) so arranged as to face the insulating substrate (10A), and a semiconductor element (20) arranged between the insulating substrate (10A) and the insulating substrate (10B) and having a collector electrode and an emitter electrode arranged opposite to the collector electrode. The collector electrode is electrically connected to a metal foil (10ac) formed on the insulating substrate (10A), and the emitter electrode is electrically connected to a metal foil (10bc) formed on the insulating substrate (10B). Consequently, heat generated by the semiconductor element (20) can be efficiently dissipated from the upper and lower major surfaces of the semiconductor device (1).

IPC Classes  ?

  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/12 - Mountings, e.g. non-detachable insulating substrates
  • H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks

67.

PRODUCTION EQUIPMENT AND METHOD OF THIN-FILM LAMINATE

      
Application Number JP2009053876
Publication Number 2009/122836
Status In Force
Filing Date 2009-03-02
Publication Date 2009-10-08
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Yokoyama, Shoji

Abstract

Disclosed is production equipment of a thin-film laminate wherein the position in the vertical direction of a flexible strip substrate is maintained with high precision even if the substrate is conveyed over a long distance in the horizontal direction while the width direction of the substrate is directed toward the vertical direction. When a thin film laminate is produced by laminating a plurality of thin films on the surface of a flexible strip substrate (1), at least a pair of grip rollers (52U) arranged between at least two film deposition chambers out of a plurality of film deposition chambers and gripping the end of the substrate on the upper side in the vertical direction is installed obliquely upward such that the rotational direction of the grip roller forms an angle ϑU with respect to the conveyance direction of the substrate (1), and the height of the substrate (1) can be controlled by changing the force of the grip rollers (52U) for gripping the substrate (1) thereby generating a rising force (Fx) in the substrate (1).

IPC Classes  ?

  • C23C 16/54 - Apparatus specially adapted for continuous coating
  • B65H 5/06 - Feeding articles separated from piles; Feeding articles to machines by rollers
  • H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
  • H01L 31/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices

68.

Semiconductor device for switching power supply control, startup circuit, and startup method for switching power supply device

      
Application Number 12407587
Grant Number 07948780
Status In Force
Filing Date 2009-03-19
First Publication Date 2009-09-24
Grant Date 2011-05-24
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Sonobe, Koji

Abstract

A semiconductor device for switching power supply control limits the startup current supplied from a high-voltage input terminal, and prevents heat generation and combustion in case of an anomaly. A high-voltage input terminal is connected to the main winding of a transformer, and is supplied with a startup voltage upon input of a power supply to the switching power supply device. A power supply terminal is connected to a capacitor, and outputs a startup current to charge the capacitor after input of the power supply input. A startup circuit is connected between the high-voltage input terminal and the power supply terminal, and charges the capacitor while increasing the startup current with magnitude proportional to the voltage value of the power supply terminal, and after startup, turns off the startup current and supplies the power supply voltage only from the auxiliary winding of the transformer.

IPC Classes  ?

  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only

69.

Semiconductor device and method of producing the same

      
Application Number 12367540
Grant Number 07919790
Status In Force
Filing Date 2009-02-08
First Publication Date 2009-09-10
Grant Date 2011-04-05
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Nemoto, Michio

Abstract

3, both inclusively. One principal surface of the substrate is irradiated with protons and then heat-treated to thereby form a broad buffer structure, namely a region in a first semiconductor layer where a net impurity doping concentration is locally maximized. Due to the broad buffer structure, lifetime values are substantially equalized in a region extending from an interface between the first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer to the region where the net impurity doping concentration is locally maximized. In addition, the local minimum of lifetime values of the first semiconductor layer becomes high. It is thus possible to provide a semiconductor device having soft recovery characteristics, in addition to high-speed and low-loss characteristics, while suppressing a kinked leakage current waveform.

IPC Classes  ?

70.

EXPOSED RADIOACTIVITY MANAGEMENT SYSTEM, DOSIMETER AND REPEATER

      
Application Number JP2009051451
Publication Number 2009/107444
Status In Force
Filing Date 2009-01-29
Publication Date 2009-09-03
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Matsumoto, Eiji
  • Shibata, Tetsuo
  • Imai, Minoru

Abstract

This object aims to make it possible to collect exposed dose data from many dosimeters on a real time basis. A monitor instruction transmitting unit of a repeater transmits an electrical message for a monitor instruction through an allocated communication channel. A monitor instruction receiving unit of a dosimeter receives the electrical message for the monitor instruction. A response timing determination unit generates a plurality of response timing data that define a receiving termination timing point of the electrical message for the monitor instruction as a starting point with the number expressed only by slot number information contained in the electrical message for the monitor instruction of the dosimeter and randomly selects timing data out of the generated plurality of the response timing data, so as to determine timing for transmitting a response to each communication channel. A response unit transmits the electrical message for the monitor instruction at respective determined timing to each communication channel.

IPC Classes  ?

  • G01T 1/00 - Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
  • G21C 17/00 - Monitoring; Testing
  • H04L 29/08 - Transmission control procedure, e.g. data link level control procedure
  • H04W 4/04 - in a dedicated environment, e.g. buildings or vehicles
  • H04W 74/08 - Non-scheduled access, e.g. random access, ALOHA or CSMA [Carrier Sense Multiple Access]

71.

ELECTROPHOTOGRAPHIC-PHOTOSENSITIVE ELEMENT AND METHOD FOR MANUFACTURING THE ELEMENT, AND ELECTROPHOTOGRAPHIC DEVICE USING THE SAME

      
Application Number JP2009052620
Publication Number 2009/104571
Status In Force
Filing Date 2009-02-17
Publication Date 2009-08-27
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Kitagawa, Seizo
  • Nakamura, Yoichi
  • Emori, Hiroshi
  • Tanaka, Yasushi
  • Ichiyanagi, Hiroyuki

Abstract

Provided are an electrophotographic-photosensitive element and an electrophotographic device, which are used in a high speed/resolution color machine of a positively charging type and which are excellent in dot-reproducibility and graduation. Also provided is an electrophotographic-photosensitive element, which can realize the optimum sensitivity characteristics for each device merely by adjusting the film thickness percentage. The electrophotographic-photosensitive element is positively charged into a laminated type by laminating a charge transport layer, which includes a positive hole transport material and a first adhesive resin, and a charge generating layer, which includes a charge generating material, a positive hole transport material and a second adhesive resin, sequentially on a conductive base member. The contents of the charge generating material in the charge generating layer are within a range over 0.7 wt. % and below 3.0 wt. % in the same layer.

IPC Classes  ?

  • G03G 5/047 - Photoconductive layers characterised by having two or more layers or characterised by their composite structure characterised by the charge-generation layers or charge-transporting layers
  • G03G 5/05 - Organic bonding materials; Methods for coating a substrate with a photoconductive layer; Inert supplements for use in photoconductive layers
  • G03G 5/147 - Cover layers
  • G03G 9/087 - Binders for toner particles

72.

SEMICONDUCTOR DEVICE

      
Application Number JP2009051328
Publication Number 2009/096412
Status In Force
Filing Date 2009-01-28
Publication Date 2009-08-06
Owner
  • FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
  • DENSO CORPORATION (Japan)
Inventor
  • Momota, Seiji
  • Abe, Hitoshi
  • Shiigi, Takashi
  • Fujii, Takeshi
  • Yoshikawa, Koh
  • Imagawa, Tetsutaro
  • Koyama, Masaki
  • Asai, Makoto

Abstract

A resistor for detecting a current is connected between a source electrode (25) of a main element (24) and a current sensing electrode (22) of a current detecting element (21). The withstand voltage of a gate insulating film (36) is larger than a product of the maximum current, which can be carried to the current detecting element (21) when reversely biased, and the resistance. The diffusion depth of a p-body region (32) of the main element (24) is less than that of a p-body region (31) of the current detecting element (21), and the curvature at an end section of the p-body region (32) of the main element (24) is smaller than that at an end section of the p-body region (31) of the current detecting element (21). Thus, when reverse bias is applied, an electric field at the end section of the p-body region (32) of the main element (24) becomes higher than that at the end section of the p-body region (31) of the current detecting element (21), and avalanche breakdown is permitted to easily occur in the main element (24) prior to that in the current detecting element (21).

IPC Classes  ?

  • H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

73.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number JP2008072314
Publication Number 2009/081723
Status In Force
Filing Date 2008-12-09
Publication Date 2009-07-02
Owner
  • AISIN AW CO., LTD. (Japan)
  • FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Tsuruoka, Junji
  • Aoki, Kazuo
  • Ono, Masaki
  • Yoshihara, Katsuhiko

Abstract

Provided is a semiconductor device wherein sputter generated by laser welding is prevented from adhering to a circuit pattern and a semiconductor chip and eliminates deterioration of electric characteristics are eliminated. A method for manufacturing such semiconductor device is also provided. A connecting conductor (14) is adhered with a solder (13) to a copper foil formed on a ceramic material (4), and a resin (17a) is applied to a level lower than an upper surface (P) of the connecting body (14) and laser welding is performed. Sputter (21) generated in laser welding due to application of the resin (17b) after laser welding is prevented from adhering to circuit patterns (5, 6) and a semiconductor chip (8). Thus, the electrical characteristics are prevented from being deteriorated.

IPC Classes  ?

  • H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,

74.

INTEGRATED CIRCUIT, AND SEMICONDUCTOR DEVICE

      
Application Number JP2008071893
Publication Number 2009/078274
Status In Force
Filing Date 2008-12-02
Publication Date 2009-06-25
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Karino, Taichi
  • Kitamura, Akio
  • Sugawara, Takato

Abstract

Disclosed is an integrated circuit (100) having voltage-dividing circuits integrated. The integrated circuit (100) comprises a first resistor (121), a second resistor (122), a control unit (130), a switch (140) and a changeover unit (150). The first resistor (121) and the second resistor (122) constitute a resistive voltage-dividing element for dividing either the voltage, which is rectified from an AC voltage to be fed to the control unit (130), or a DC voltage. The switch (140) is connected in series with the resistive voltage-dividing element, and passes or blocks an electric current to pass through the resistive voltage-dividing element. The change-over unit (150) turns on/off the switch (140) so that the electric current may be passed at the driving time of the control unit (130) but may be blocked at the stand-by time of the control unit (130).

IPC Classes  ?

  • H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
  • H01L 21/8234 - MIS technology
  • H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration

75.

Semiconductor device

      
Application Number 12292480
Grant Number 08030749
Status In Force
Filing Date 2008-11-20
First Publication Date 2009-06-04
Grant Date 2011-10-04
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Soyano, Shin
  • Ueyanagi, Katsumichi

Abstract

A semiconductor device includes a resin case, a plurality of external connection terminals fixedly provided on the resin case, and at least one semiconductor element provided in the resin case. At least one terminal block has at least one wiring terminal for electrically connecting the semiconductor element and the external connection terminals.

IPC Classes  ?

  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements

76.

ELECTROMAGNETIC DEVICE

      
Application Number JP2007071535
Publication Number 2009/060508
Status In Force
Filing Date 2007-11-06
Publication Date 2009-05-14
Owner
  • FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
  • MEIDENSHA CORPORATION (Japan)
Inventor
  • Suzuki, Nobuo
  • Fukushima, Kazuhiro
  • Nakano, Ryuichi
  • Kodama, Toshihiro
  • Yamakawa, Hiroshi

Abstract

A regulating plate (26) for regulating the amount of magnetic flux in a magnetic path through which magnetic flux generated from a permanent magnet (23) is allowed to pass is arranged such that the plate is abuttable on a back plate (15) in parallel to a movable shaft (1). A part (26a) of the regulating plate (26) adjacent to the back plate (15) is shaped such that the width, or surface area of the part (26a) is smaller than that of a part (26b) of the regulating plate adjacent to an isolation spring (8). Magnetic saturation is caused in the part (26b) of the regulating plate so that the amount of magnetic flux of the permanent magnet (23) is less than a releasing force from the isolation spring (8), thus regulating the amount of magnetic flux passing.

IPC Classes  ?

  • H01F 7/16 - Rectilinearly-movable armatures
  • H01H 3/28 - Power arrangements internal to the switch for operating the driving mechanism using electromagnet
  • H01H 33/38 - Power arrangements internal to the switch for operating the driving mechanism using electromagnet

77.

PRODUCTION SYSTEM OF THIN FILM SOLAR BATTERY

      
Application Number JP2008068373
Publication Number 2009/048104
Status In Force
Filing Date 2008-10-09
Publication Date 2009-04-16
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Sakai, Ryouhei

Abstract

A production system of thin film solar battery which can enhance workability by preventing occurrence of conveyance crease caused by a drive roll for conveying a film substrate. In the production system of thin film solar battery where a belt-shaped flexible film substrate wound around a feeding roll is fed to a film deposition chamber maintained in substantially vacuum state, discharge is performed between a ground electrode and an applying electrode having a target material arranged oppositely in the film deposition chamber to deposit a metal thin film becoming an electrode on the surface of the film substrate under fixed heating, and then film substrate on which the metal thin film is formed is taken up by a take-up roller provided in a take-up chamber, a pair of drive rolls (14, 15) for conveying the film substrate(1) on which the metal thin film (22) is formed under a fixed tension are provided in the take-up chamber (5), and layers (21) of elastic member are formed on the circumferential surface at the opposite ends of at least one drive roll (15) corresponding to the opposite ends of the film substrate in the width direction.

IPC Classes  ?

  • H01L 31/20 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor material
  • C23C 14/56 - Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks

78.

Semiconductor device

      
Application Number 12240564
Grant Number 07932559
Status In Force
Filing Date 2008-09-29
First Publication Date 2009-04-02
Grant Date 2011-04-26
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Iwamuro, Noriyuki

Abstract

A super-junction semiconductor substrate is configured in such a manner that an n-type semiconductor layer of a parallel pn structure is opposed to a boundary region between an active area and a peripheral breakdown-resistant structure area. A high-concentration region is formed at the center between p-type semiconductor layers that are located on both sides of the above n-type semiconductor layer. A region where a source electrode is in contact with a channel layer is formed over the n-type semiconductor layer. A portion where the high-concentration region is in contact with the channel layer functions as a diode. The breakdown voltage of the diode is set lower than that of the device.

IPC Classes  ?

79.

Switching power supply with slope compensation circuit and added slope circuit

      
Application Number 12232182
Grant Number 07965070
Status In Force
Filing Date 2008-09-11
First Publication Date 2009-03-26
Grant Date 2011-06-21
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Nakahashi, Yasunori

Abstract

A current-mode switching power supply is provided, in which there is no unstable operation arising from the fact that signals to generate PWM signals are minute, even when a load is light and a switching frequency is high. In a switching power supply of this invention, an added slope signal is superposed in an early stage of a rise of a current detection signal, so that a combined signal Vsig is caused to reach a certain magnitude even when the load is light and the switching frequency is high, and consequently an output FB of an error amplifier ERRAMP which is balanced with the combined signal is also increased. By this means, even in a current mode, it is possible to eliminate unstable operation arising from the fact that the feedback signal FB which is the output of the error amplifier ERRAMP and the combined signal Vsig are minute.

IPC Classes  ?

  • G05F 1/565 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
  • G05F 1/595 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load semiconductor devices connected in series

80.

Insulating transformer and power conversion device

      
Application Number 12219713
Grant Number 07994890
Status In Force
Filing Date 2008-07-28
First Publication Date 2009-02-26
Grant Date 2011-08-09
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Edo, Masaharu
  • Ueno, Katsunori
  • Yoshimura, Hiroyuki

Abstract

An insulating transformer includes a semiconductor substrate, an insulating substrate, a primary winding provided on one of the semiconductor substrate and the insulating substrate, a secondary winding provided on other of the semiconductor substrate and the insulating substrate, and an insulating spacer layer provided in between the semiconductor substrate and the insulating substrate for insulating and separating the primary winding and the secondary winding. The primary winding and the secondary winding are disposed to face each other. The insulating spacer layer maintains a constant interval between the semiconductor substrate and the insulating substrate.

IPC Classes  ?

81.

Semiconductor device and method for manufacturing semiconductor device

      
Application Number 12149115
Grant Number 08026566
Status In Force
Filing Date 2008-04-28
First Publication Date 2008-11-20
Grant Date 2011-09-27
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Horio, Masafumi
  • Ikeda, Yoshinari
  • Mochizuki, Eiji

Abstract

A semiconductor device includes a first metal foil, an insulating sheet mounted on an upper surface of the first metal foil main, at least one second metal foil mounted on the insulating sheet, at least one solder layer mounted on the at least one second metal foil, and at least one semiconductor element mounted on the at least one second metal foil through the at least one solder layer. The at least one semiconductor has a thickness of 50 μm or greater and less than 100 μm.

IPC Classes  ?

  • H01L 23/485 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
  • H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation

82.

MAGNETIC INTEGRATION STRUCTURE

      
Application Number CN2007000592
Publication Number 2008/101367
Status In Force
Filing Date 2007-02-17
Publication Date 2008-08-28
Owner
  • ZHEJIANG UNIVERSITY (China)
  • FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Zhang, Yanjun
  • Xu, Dehong
  • Mino, Kazuaki
  • Sasagawa, Kiyoaki

Abstract

The copper loss lost in winding is reduced by making the winding area of the trans side larger than the winding area of the inductor side.

IPC Classes  ?

  • H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H01F 27/28 - Coils; Windings; Conductive connections

83.

LASER GAS ANALYZER

      
Application Number JP2008000125
Publication Number 2008/096524
Status In Force
Filing Date 2008-02-01
Publication Date 2008-08-14
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Hirayama, Noritomo
  • Koizumi, Kazuhiro
  • Iida, Takashi
  • Nakamura, Yusuke
  • Kanai, Hideo

Abstract

A laser gas analyzer of frequency modulation type includes: a light source (204) having a laser drive signal generation unit (204s) which combines a wavelength scan drive signal for changing the laser emission wavelength so as to scan the absorption wavelength of the gas to be measured and a high-frequency modulation signal for modulating the emission wavelength so as to output the combined result as a laser drive signal, a current control unit (204c), a laser element (204e), a thermistor (204f), a Peltier device (204g), and a temperature control unit (204d); and a signal processing circuit (208) having synchronization detection circuit (208b) for detecting an amplitude equal to doubled frequency component in an output signal from a reception unit (207), and a calculation unit (208b).

IPC Classes  ?

  • G01N 21/39 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using tunable lasers

84.

ELECTROMAGNETIC DEVICE

      
Application Number JP2007074216
Publication Number 2008/075640
Status In Force
Filing Date 2007-12-17
Publication Date 2008-06-26
Owner
  • FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
  • MEIDENSHA CORPORATION (Japan)
Inventor
  • Suzuki, Nobuo
  • Ikeno, Kichihiro
  • Nakano, Ryuichi
  • Kodama, Toshihiro
  • Yamakawa, Hiroshi

Abstract

A magnetic short-circuiting plate (16) for reducing a quantity of a magnetic flux to be generated from a permanent magnet (9) is mounted between magnetic plates (11, 12) in the case of having an electromagnetic device operate for constant excitation, and the magnetic short-circuiting plate (16) is removed from the electromagnetic device in the case of having the electromagnetic device operate as an electromagnetic latch.

IPC Classes  ?

  • H01F 7/16 - Rectilinearly-movable armatures

85.

Movable body driving apparatus

      
Application Number 11607883
Grant Number 07971391
Status In Force
Filing Date 2006-12-04
First Publication Date 2007-11-01
Grant Date 2011-07-05
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Harie, Hiroshi

Abstract

A door driving apparatus includes a rotary actuator, a rotary transmission member integrally fixed to an output shaft extending from the rotary actuator, and a pair of linear transmission members opposed to each other via the rotary transmission member. The linear transmission members are configured to be in mesh with the rotary transmission member and to move approximately parallel to each other in opposite directions.

IPC Classes  ?

  • E05F 17/00 - Special devices for shifting a plurality of wings operated simultaneously

86.

Junction field effect transistor, integrated circuit for switching power supply, and switching power supply

      
Application Number 11690825
Grant Number 07982248
Status In Force
Filing Date 2007-03-24
First Publication Date 2007-09-27
Grant Date 2011-07-19
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor
  • Saito, Masaru
  • Sonobe, Koji

Abstract

A switching power supply has a start-up circuit that includes a field effect transistor (JFET), which has a gate region (a p-type well region) formed in a surface layer of a p-type substrate and a drift region (a first n-type well region). A plurality of source regions (second n-type well regions) are formed circumferentially around the drift region. A drain region (a third n-type well region) is formed centrally of the source region. The drain region and the source regions can be formed at the same time. A metal wiring of the source electrode wiring connected to source regions is divided into at least two groups to form at least two junction field effect transistors.

IPC Classes  ?

  • H01L 31/112 - Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect photo- transistor

87.

Semiconductor device

      
Application Number 11614515
Grant Number 07943991
Status In Force
Filing Date 2006-12-21
First Publication Date 2007-06-28
Grant Date 2011-05-17
Owner Fuji Electric Systems Co., Ltd. (Japan)
Inventor Yoshikawa, Koh

Abstract

A semiconductor device is discloses that includes an n-type semiconductor substrate; an alternating conductivity type layer on semiconductor substrate, the alternating conductivity type layer including n-type drift regions and p-type partition regions arranged alternately; p-type channel regions on the alternating conductivity type layer; and trenches formed from the surfaces of the p-type channel regions down to respective n-type drift regions. The bottom of each trench is over the pn-junction between the p-type partition region and the n-type drift region. The semiconductor device facilitates preventing the on-resistance from increasing, obtaining a higher breakdown voltage, and reducing the variations caused in the characteristics thereof.

IPC Classes  ?

  • H01L 29/94 - Metal-insulator-semiconductors, e.g. MOS

88.

PULSE DOPPLER ULTRASONIC FLOWMETER AND PROGRAM THEREOF

      
Application Number JP2006311414
Publication Number 2007/004384
Status In Force
Filing Date 2006-06-07
Publication Date 2007-01-11
Owner FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
Inventor
  • Ohmuro, Yoshinori
  • Yamamoto, Toshihiro
  • Yao, Hironobu
  • Yamada, Kazuyuki

Abstract

A Doppler frequency distribution measuring part (11) measures a Doppler shift frequency distribution. A frequency distribution correcting part (12) determines a part of the Doppler shift frequency distribution that is affected by 'aliasing', and corrects the measurement value of the Doppler shift frequency of that part, thereby obtaining a correct Doppler shift frequency distribution. When the actual value of the Doppler shift frequency exceeds a measurement limit defined by the repetition frequency, the measurement value is a value as affected by the 'aliasing'.

IPC Classes  ?

  • G01F 1/66 - Measuring the volume flow or mass flow of fluid or fluent solid material wherein the fluid passes through a meter in a continuous flow by measuring frequency, phase shift or propagation time of electromagnetic or other waves, e.g. using ultrasonic flowmeters

89.

ULTRASONIC FLOWMETER AND ULTRASONIC FLOWMETER EMPLOYING TWO METHODS

      
Application Number JP2006300110
Publication Number 2006/080182
Status In Force
Filing Date 2006-01-06
Publication Date 2006-08-03
Owner
  • FUJI ELECTRIC SYSTEMS CO., LTD. (Japan)
  • YAO, Hironobu (Japan)
Inventor
  • Suzuki, Sosuke
  • Yamamoto, Toshihiro
  • Ohmuro, Yoshinori

Abstract

A flow velocity distribution measurement unit (11) acquires a flow velocity distribution along a measurement line according to a measurement result obtained by a sensor (1). According to a Doppler shift frequency obtained by the processing of the flow velocity distribution measurement unit (11), its average value, a Doppler spectrum, and the like, a power/standard deviation calculation unit (12) calculates a power and standard deviation for each channel and judges the state of the flowing body to be measured, according to the calculation result.

IPC Classes  ?

  • G01F 1/66 - Measuring the volume flow or mass flow of fluid or fluent solid material wherein the fluid passes through a meter in a continuous flow by measuring frequency, phase shift or propagation time of electromagnetic or other waves, e.g. using ultrasonic flowmeters