According to one embodiment, a condition monitoring apparatus includes a processing circuitry. The processing circuitry is configured to collect a sensor signal output from a sensor that monitors a condition of a mechanical device that is at least partially mobile. The processing circuitry is configured to diagnose a presence or absence of an anomaly in the mechanical device based on the sensor signal. The processing circuitry is configured to cut out the sensor signal in a time width according to any one or more of a speed, an acceleration, and a jerk of the mechanical device. The processing circuitry is configured to determine the presence or absence of an anomaly based on the cut out sensor signal.
According to one embodiment, a voice activity detection apparatus includes a processing circuit. The processing circuit acquires an acoustic signal and a non-acoustic signal, calculates an acoustic feature based on the acoustic signal, calculates a non-acoustic feature based on the non-acoustic signal, calculates a voice emphasized feature based on the acoustic signal and the non-acoustic signal, calculates a voice existence/non-existence feature on the basis of the acoustic feature and the non-acoustic feature, calculates a voice existence score based on the voice emphasized feature and the voice existence/non-existence feature, detects a voice section and/or a non-voice section based on comparison of the voice existence score with a threshold.
G10L 25/78 - Detection of presence or absence of voice signals
G10L 25/30 - Speech or voice analysis techniques not restricted to a single one of groups characterised by the analysis technique using neural networks
G10L 15/02 - Feature extraction for speech recognition; Selection of recognition unit
3.
ULTRASONIC WELDING DIAGNOSTIC METHOD, JOINING METHOD OF WELDING MEMBER, AND INSPECTION DEVICE
An ultrasonic welding diagnostic method includes: applying a pressing force to an object to be joined so as to generate a surface pressure on a joint surface of the object to be joined; inputting ultrasonic waves to the joint surface; detecting an elastic wave propagating through the object to be joined by at least one sensor at a plurality of different positions; analyzing a signal detected by the sensor to generate an envelope of the signal and calculating information about the envelope; and determining a joint state on the joint surface based on the calculation result of the information.
B23K 31/12 - Processes relevant to this subclass, specially adapted for particular articles or purposes, but not covered by any single one of main groups relating to investigating the properties, e.g. the weldability, of materials
B23K 20/10 - Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating making use of vibrations, e.g. ultrasonic welding
According to one embodiment, a data protection apparatus includes a processor configured to execute an encryption process on log data including a data frame including a plurality of pieces of data generated along a time sequence. The processor is configured to encrypt each of the pieces of data with a corresponding encryption key among a first initial key and a first encryption keys generated in a forward direction to a time sequence of the pieces of data. The processor is configured to encrypt each of a plurality of pieces of data encrypted with the corresponding encryption key with a corresponding encryption key among a second initial key and a second encryption keys generated in a backward direction to a time sequence of the pieces of data.
H04L 9/32 - Arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system
An integrated circuit of an embodiment includes a plurality of AD conversion circuits including a first AD conversion circuit and a second AD conversion circuit, and a control circuit configured to delay a start time of sampling processing of the second AD conversion circuit as compared with a usual start time such that the first AD conversion circuit is not influenced by noise generated by the sampling processing of the second AD conversion circuit, and to shorten a sampling time period to control a termination time of the sampling processing of the second AD conversion circuit to be concurrent with a termination time in a case of performing usual sampling processing.
A semiconductor device according to the embodiment includes: a frame body having a wall surface; an insulating substrate surrounded by the frame body, the insulating substrate having a first metal layer and a second metal layer on a surface, the second metal layer being located between the first metal layer and the wall surface; a semiconductor chip including an electrode and provided on the first metal layer; and a bonding wire having a first bond portion connected to the electrode, a second bond portion connected to the second metal layer, and an intermediate portion between the first bond portion and the second bond portion; wherein a second angle formed between a second direction in which the second bond portion extends and the wall surface is smaller than a first angle formed between a first direction in which the intermediate portion extends and the wall surface.
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 23/047 - Containers; Seals characterised by the shape the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being parallel to the base
H01L 23/373 - Cooling facilitated by selection of materials for the device
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices
According to one embodiment, a learning apparatus includes a processor. The processor divides target data into pieces of partial data. The processor inputs the pieces of partial data into a first network model to output a first prediction result and calculates a first confidence indicating a degree of contribution to the first prediction result. The processor inputs the target data into a second network model to output a second prediction result and calculates a second confidence indicating a degree of contribution to the second prediction result. The processor updates a parameter of the first network model, based on the first prediction result, the second prediction result, the first confidence and the second confidence.
A light detector according to one embodiment, includes an element region, a light concentrator, a structure part and a light-shielding part. The element region includes a first semiconductor region of a first conductivity type, and a second semiconductor region of a second conductivity type. The light concentrator is separated from the element region in a first direction. The light concentrator is configured to concentrate light incident on the light concentrator. The structure part is arranged with the element region in a direction crossing the first direction. The structure part has a different refractive index from the element region. The light-shielding part is located between the element region and the light concentrator. The light-shielding part includes an opening. At least a portion of the light incident on the light concentrator is able to be incident on the element region by passing through the opening.
A semiconductor device includes a semiconductor part including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type. The second semiconductor layer is provided in the first semiconductor layer. The semiconductor part includes first and second interfaces of the first semiconductor layer and the second semiconductor layer. The first interface intersects the second interface. The second semiconductor layer includes a plurality of sub-layers stacked in a direction orthogonal to the first interface. The second interface includes interfaces of the sub-layers of the second semiconductor layer and the first semiconductor layer. The second interface extending in a second direction inclined with respect to a first direction orthogonal to the first interface.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
A gas detection device according to an embodiment includes a first light source irradiating infrared, a second light source irradiating visible light, a low-pass filter that transmits the infrared irradiated from the first light source, reflects the visible light irradiated from the second light source, and aligns an optical axis of the visible light with an optical axis of the infrared, a first retroreflector on which the infrared and the visible light having the aligned optical axes are incident, a first detecting part detecting the infrared reflected by the first retroreflector, and a scattering body located at a center of the first retroreflector.
G01N 21/3504 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using infrared light for analysing gases, e.g. multi-gas analysis
According to one embodiment, a semiconductor device includes a semiconductor circuit having an electrode on a first surface. A case part surrounds the semiconductor circuit. A matching part is provided including a signal terminal on an outside of the matching part and a lead on the inside of the matching part that is electrically connected to the signal terminal. The case part and matching part are configured to engage one another and be attached to one another when pressed together. The lead includes a contact portion that is in contact with the electrode when the matching part is attached to the case part, a first portion connecting between the signal terminal and the contact portion, and a spring portion between the first portion and the contact portion.
According to one embodiment, an analysis apparatus includes processing circuitry. The processing circuitry acquires sensor data from a measurement target, calculates a state value based on the sensor data, sets, based on time-series data of the state value and predetermined criteria, a plurality of noticed sections in the time-series data, performs clustering using the state value regarding each of the noticed sections and generates a clustering result, and generates, based on the clustering result, stress information including characteristic information of each of a plurality of clusters.
G06V 10/762 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using clustering, e.g. of similar faces in social networks
G06V 10/62 - Extraction of image or video features relating to a temporal dimension, e.g. time-based feature extraction; Pattern tracking
G06V 10/74 - Image or video pattern matching; Proximity measures in feature spaces
G06V 10/80 - Fusion, i.e. combining data from various sources at the sensor level, preprocessing level, feature extraction level or classification level
A semiconductor device includes a semiconductor part, first and second electrodes and first-third and second-third electrodes. The semiconductor part is provided between the first and second electrodes. The semiconductor part includes a first semiconductor layer of a first conductivity type, second and third semiconductor layers of a second conductivity type. The second and third semiconductor layers are arranged between the first layer and the second electrode. The first-third and second-third electrodes are provided in the semiconductor part. The second semiconductor layer is provided between the first-third electrode and the second-third electrode. The second electrode includes a contact portion extending into the second semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer between the contact portion and the second-third electrode. The second semiconductor layer includes a first portion facing the third semiconductor layer via the contact portion.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
14.
INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, COMPUTER PROGRAM PRODUCT, AND INFORMATION PROCESSING SYSTEM
TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
Aisu, Hideyuki
Sakakibara, Shizu
Kiribuchi, Daiki
Yoshida, Takufumi
Abstract
According to an embodiment, an information processing device includes a reception unit and a determination unit. The reception unit receives a plurality of pieces of rack data including first identification information of one or more kinds of products to be housed in a plurality of racks, and a plurality of pieces of order data including second identification information of one or more kinds of products to be picked from at least part of the plurality of racks. The determination unit, based on the rack data, determines a processing sequence of the plurality of pieces of order data such that a ratio of picking products assigned to pieces of the order data from a single rack is increased. The plurality of racks are able to be moved to a work station where housing containers corresponding to at least part of the plurality of pieces of order data are disposed.
A semiconductor device of embodiments includes: a silicon carbide layer having a first face parallel to a first direction and a second direction crossing the first direction and a second face facing the first face; a first trench on a side of the first face extending in the first direction; a second trench extending in the first direction; a third trench extending in the second direction and continuous with the first trench and the second trench; a fourth trench extending in the first direction, disposed between the first trench and the second trench, and spaced from the third trench in the first direction; a gate electrode in the first to fourth trench; a gate insulating layer; a first conductive layer crossing the third trench and connected to the gate electrode; a first electrode disposed on the first face; and a second electrode disposed on the second face.
A carbon dioxide electrolytic device includes: a carbon dioxide electrolysis cell having a cathode and an anode flow path, a cathode, an anode, and a first diaphragm; a first current regulator to supply a first current; a first gas/liquid separator to separate a first fluid from the anode flow path into a first liquid and gas; an electrodialysis cell having, first and second electrodes, first to fourth rooms, and second to fourth diaphragms; a second current regulator to supply a second current; at least one detector out of a first detector to detect a flow rate of the first gas or a concentration of carbon dioxide in the first gas, and a second detector to detect a pH or a concentration of at least one ion in the first fluid; and a first controller to regulate a second current, in accordance with at least one detection signal.
According to one embodiment, a semiconductor device includes an n-layer and a p-layer arranged in a vertical trench structure in a drift layer. A depletion layer is formed to a depth of a trench of the vertical trench structure after a depletion layer spreads in a lateral direction between the n-layer and the p-layer when a voltage is applied between a drain and a source. A method for controlling the semiconductor device comprises detecting a voltage value between the drain and the source of the semiconductor device at turn-off and reducing a current value of a gate discharge current discharged from a gate in a first period. The first period starting before the detected voltage value greatly changes.
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
18.
METHOD OF MANUFACTURING STRUCTURE AND METHOD OF MANUFACTURING CAPACITOR
In general, according to one embodiment, there is provided a method of manufacturing a structure. The method includes forming a recess in a semiconductor substrate; oxidizing at least a bottom inner surface of the recess; and providing at least the bottom inner surface of the recess with a liquid capable of dissolving an oxide of a semiconductor substrate material.
According to one embodiment, a semiconductor device includes first and second electrodes, first to fifth semiconductor regions, and a gate electrode. The first semiconductor region is located on the first electrode. The first semiconductor region includes a first region. The gate electrode is located on the first semiconductor region with a gate insulating layer interposed. The second semiconductor region faces the gate electrode via the gate insulating layer in a second direction perpendicular to a first direction. The third semiconductor region is located between the first and second semiconductor regions. A length in the second direction of a lower portion of the third semiconductor region is greater than a length in the second direction of an upper portion of the third semiconductor region. The fourth semiconductor region is located between the third semiconductor region and the gate electrode. The fifth semiconductor region is located on the second semiconductor region.
According to one embodiment, an information processing device includes an acquisition part, and a processor. The acquisition part is configured to acquire a reproduction signal obtained from a recording part. The recording part includes a recording medium. The reproduction signal includes a first signal corresponding to information recorded in the recording medium. The processor is configured to derive a first output and a second output. The first output is obtained by first information being processed by a first processing model. The first information includes the first signal. The second output is obtained by the first information being processed by a second processing model. The processor is configured to output a result of processing the first information based on a third output. The third output is obtained based on the first output, the second output, and the first information.
According to one embodiment, a photomask includes a plurality of unit regions arranged in a first direction and a second direction crossing the first direction. Each of the unit regions includes a first region having a first light-shielding rate, and a second region having a second light-shielding rate different from the first light-shielding rate. The second region is provided around the first region. The unit regions include a first unit region and a second unit region having same size each other. A distance between the first unit region and a center of a range in which the unit regions are arranged is different from a distance between the second unit region and the center. A light-shielding rate of the first unit region is different from a light-shielding rate of the second unit region.
According to one embodiment, provided is an air battery including a negative electrode, an air electrode to which oxygen is supplied, a solid electrolyte layer positioned between the negative electrode and the air electrode, an aqueous electrolyte layer positioned between the solid electrolyte layer and the air electrode, and a proton conduction layer positioned between the aqueous electrolyte layer and the air electrode. The aqueous electrolyte layer includes an aqueous electrolyte including a polyprotic acid having two or more carboxyl groups, an electrolyte salt, and water.
According to an embodiment, a quantum cryptographic communication system includes a first quantum key distribution (QKD) device, and a first key management device. The first QKD device that shares a quantum encryption key with a second QKD device through QKD. The first key management device includes a reception unit and a first hardware security module (HSM). The reception unit receives the quantum encryption key from the first QKD device. The first HSM includes a storage unit, a generation unit, and a first encryption unit. The storage unit stores a first encryption key therein. The generation unit generates an application key used in an encryption process by a cryptographic application. The first encryption unit that encrypts, with the first encryption key, the application key transmitted to a second key management device connected to the second QKD device.
H04L 9/06 - Arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for blockwise coding, e.g. D.E.S. systems
A semiconductor chip includes a semiconductor substrate, a plurality of first wirings extending in a first direction parallel to the upper surface of the semiconductor substrate and disposed entirely above the upper surface of the semiconductor substrate, a second wiring disposed between two of the first wirings that are adjacent to each other and entirely below the upper surface of the semiconductor substrate such that an upper surface of the second wiring is below a lower surface of the two first wirings, and a first insulating film provided on the second wiring and spaced apart from the two first wirings in a second direction that is perpendicular to the first direction, the first insulating film having an upper surface that is above the lower surface of the two first wirings.
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
25.
LIGHT DETECTION DEVICE, LIGHT DETECTION SYSTEM, LIDAR DEVICE, MOBILE BODY, INSPECTION METHOD, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
According to one embodiment, a light detection device includes a first region, a second region, a first electrode, and a second electrode. The first region includes a plurality of first semiconductor light detection elements, and a plurality of first lenses respectively located on the plurality of first semiconductor light detection elements. The second region includes a plurality of second semiconductor light detection elements. No lens is located directly above the plurality of second semiconductor light detection elements. The first electrode is electrically connected with the plurality of first semiconductor light detection elements. The second electrode is electrically connected with the plurality of second semiconductor light detection elements.
G01S 17/89 - Lidar systems, specially adapted for specific applications for mapping or imaging
H01L 31/107 - Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode
An adhesion/peeling method according to an embodiment includes adhering a first surface side of an electrically peelable adhesive sheet to a predetermined position of a fixation target object, wherein the electrically peelable adhesive sheet is formed of an electro-peeling adhesive having adhesiveness on the first surface side and a second surface side thereof, and the adhesiveness of the electro-peeling adhesive is lowered due to an input of a voltage; adhering a first electrode of an adherend including the first electrode formed of a conductor to the second surface side of the electrically peelable adhesive sheet; containing a liquid at the predetermined position of the fixation target object to temporarily form a second electrode with conductivity on a surface of the fixation target object; and inputting a predetermined voltage between the first electrode and the second electrode to peel of the electrically peelable adhesive sheet from the fixation target object.
A semiconductor device includes a first electrode, a plurality of unit element regions, and a partitioning region. Each of the unit element regions includes a first semiconductor part, a second electrode, and a first conductive part. The first semiconductor part includes first to third semiconductor regions. The first semiconductor region is located above the first electrode. The second semiconductor region is located on the first semiconductor region. The third semiconductor region is located on the second semiconductor region. The second electrode is located on the second and third semiconductor regions. The first conductive part faces the second semiconductor region via a first insulating film. At least a portion of the plurality of unit element regions includes a common pattern. The partitioning region includes a second semiconductor part and partitions the plurality of unit element regions. The second semiconductor part is continuous with the first semiconductor part.
H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
A LiDAR device according to an embodiment includes a rotating mirror having reflective surfaces, first/second light emitters each emitting light toward the rotating mirror, and first/second light receivers each receiving light reflected by the rotating mirror and converting the received light into an electrical signal. The first light emitter emits light in an orientation where an upper section of a distance measurement range is scanned. The second light emitter emits light in an orientation where a lower section of the distance measurement range is scanned. The first light receiver is provided at a position where light emitted by the first light emitter and reflected at the distance measurement range is received via the rotating mirror. The second light receiver is provided at a position where light emitted by the second light emitter and reflected at the distance measurement range is received via the rotating mirror.
In an embodiment, an information processing apparatus relating to soldering of a component onto a substrate is provided. The information processing apparatus includes a determination unit determining, using a machine learning model that outputs an inspection result of a post-reflow inspection from an input of image data based on one or more pre-reflow images, whether or not defectiveness will occur in the post-reflow inspection from the image data based on the pre-reflow images acquired in real time.
An analog switch circuit of an embodiment includes a CMOS analog switch, a first gate drive circuit, and a second gate drive circuit, a gate operating withstand voltage of the CMOS analog switch being VGT, an enable signal and a control signal being inputted to the first gate drive circuit and the second gate drive circuit. Assuming that VGT
A superconducting coil according to an embodiment includes: a winding frame; a superconducting wire wound around the winding frame and having a first region and a second region facing the first region in a coil radial direction; and a resin layer located between the first region and the second region and including particles, an epoxy resin surrounding the particles, and a region existing between the particle and the epoxy resin, the region including silane containing a phenylamino group. The average particle diameter of the particles is equal to or more than 1 μm and equal to or less than 5 μm, and the volume ratio of the particles in the resin layer is equal to or more than 50% and equal to or less than 66%.
H01F 6/06 - Coils, e.g. winding, insulating, terminating or casing arrangements therefor
H01L 39/12 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details characterised by the material
H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils
METHOD OF ANALYZING ANTIMONY ION, INSPECTION TOOL USED FOR ANALYZING PENTAVALENT ANTIMONY ION, AND INSPECTION TOOL USED FOR ANALYZING ANTIMONY ION ACCORDING TO ITS VALENCE
A method of analyzing an antimony ion of an embodiment, the method includes using a first analysis solution or a second analysis solution, the first analysis solution containing trivalent antimony ions and pentavalent antimony ions, the second analysis solution being a solution obtained by mixing a first acid and the first analysis solution, and mixing the first analysis solution or the second analysis solution with a second acid to obtain a third analysis solution in which the pentavalent antimony ions are chlorinated and which contains [SbCl6]− ions, mixing the third analysis solution and a first organic solvent and phase-separating the mixture into a fourth analysis solution as an organic phase and an aqueous phase to obtain the fourth analysis solution, mixing the fourth analysis solution and a coloring liquid containing rhodamine B to obtain a fifth analysis solution, and evaluating a concentration of the pentavalent antimony ions in the first analysis solution from color of the fifth analysis solution. A total concentration of nitric acid, cerium (IV) nitrate, and cerium (IV) sulfate contained in the first analysis solution is 0.00 mol/L or more and 0.1 mol/L or less. The total concentration of nitric acid, cerium (IV) nitrate, and cerium (IV) sulfate contained in the first acid is 0.00 mol/L or more and 0.1 mol/L or less. The total concentration of nitric acid, cerium (IV) nitrate, and cerium (IV) sulfate contained in the second acid is 0.00 mol/L or more and 0.1 mol/L or less.
G01N 21/78 - Systems in which material is subjected to a chemical reaction, the progress or the result of the reaction being investigated by observing the effect on a chemical indicator producing a change of colour
33.
SPARK DISCHARGE DETECTION DEVICE AND SPARK DISCHARGE DETECTION METHOD
A spark discharge detection device includes a discharge detector, a waveform extension circuit, and determination circuit. The discharge detector includes a metal electrode that detects discharge between an electrode and a sliding body that is in contact with and sliding surface of the electrode. The waveform extension circuit configured to extend a discharge waveform output from the discharge detector in a time direction. The determination circuit configured to determine that discharge has occurred in the sliding body when a signal value exceeds a first threshold and a time during which the signal value exceeds the first threshold is held for a time longer than a first time for the output of the waveform extension circuit.
A key management device according to an embodiment is for managing an application key used for encrypting communication of a user network including cryptographic applications. The key management device includes a plan acquisition unit, a plan execution unit, a communication unit, and a provision unit. The plan acquisition unit acquires a key distribution plan formulated based on state information indicating a state of the user network. The plan execution unit determines a distribution amount of the application key for each key sharing destination corresponding to a destination cryptographic application based on the key distribution plan. The communication unit encrypts the application key using a link key generated by QKD, and transmits the encrypted application key to the key sharing destination. The provision unit provides the application key in response to a request from the cryptographic application.
According to one embodiment, a disk device includes magnetic disks, a spindle motor, and a housing. The magnetic disks are arranged in an axial direction. The spindle motor rotates the magnetic disks about a first rotation axis extending in the axial direction. The housing includes a first wall, an inner surface of the first wall, an outer surface of the first wall, and a second wall. The spindle motor is attached to the first wall. The first wall is apart from the magnetic disks in the axial direction. The second wall protrudes from the first wall and surrounds the plurality of magnetic disks in a direction orthogonal to the axial direction. In the axial direction a maximum distance between the inner surface and the outer surface is 1.5% or more and 8% or less of a maximum dimension of the housing.
A semiconductor device of embodiments includes: a silicon carbide layer having a first face and a second face; a trench in the silicon carbide layer extending in a first direction; a gate electrode disposed in the trench; a first silicon carbide region of n-type; a second silicon carbide region of p-type between the first silicon carbide region and the first face being shallower than the trench; a third silicon carbide region of n-type disposed between the second silicon carbide region and the first face; a fourth silicon carbide region of n-type disposed between the third silicon carbide region and the first face, a width of the fourth silicon carbide region in a second direction perpendicular to the first direction being smaller than a width of the third silicon carbide region in the second direction; and a first electrode in contact with the fourth silicon carbide region.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
A semiconductor device includes a semiconductor substrate of a first conductivity type; a semiconductor layer located on the semiconductor substrate, the semiconductor layer being of the first conductivity type and including a first device part; a buried layer located between the semiconductor substrate and the first device part, the buried layer being of a second conductivity type; a guard region located at a first-direction side of the first device part, the guard region being of the second conductivity type, a lower end of the guard region contacting the buried layer, an upper end of the guard region reaching an upper surface of the semiconductor layer, the guard region not being located at a second-direction side of the first device part, the second direction being opposite to the first direction; and a first semiconductor region located inside the first device part and being of the second conductivity type.
A distance measuring device has a plurality of light receiving elements each of which receives a reflected optical signal reflected by an object, and an image processor that generates a distance image in accordance with distances to the object, based on signal intensities and light reception timings of the reflected optical signal received by the plurality of light receiving elements, wherein the image processor detects a direction of the object, based on at least either the signal intensities of the reflected optical signal received by the light receiving elements or the distances to the object measured based on the reflected optical signal, and divides at least one or some of pixels included in the distance image, based on the direction of the detected object.
In one embodiment, electronic circuitry includes a driving circuit that is configured to: supply a driving current to a control terminal of a first switching element; and increase the driving current in accordance with a first time at which a current flowing through a second switching element connected to a first terminal or a second terminal of the first switching element becomes 0.
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
H02M 7/5387 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
H02P 27/06 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
40.
APPEARANCE INSPECTION SYSTEM AND APPEARANCE INSPECTION METHOD
According to one embodiment, an inspection system includes an infrared imaging device and a controller. The infrared imaging device is for acquiring an image of a thermocompression-bonded tape package with infrared light. The tape package comprises a first tape covering a second tape. The second tape can have a pocket for an electronic component. The controller is configured to receive the image of the thermocompression-bonded tape package and detect a state of thermocompression bonding in a predetermined region of the tape package based on the received image. For example, the inspection system may detect when the bonding of the first tape to the second tape is unsatisfactory or abnormal.
According to an embodiment, a sound emitting apparatus includes a vibrator, a holding part, and a fixing part. The holding part is configured to hold the vibrator. The fixing part is configured to fix the holding part. A stiffness of the fixing part is lower than a stiffness of the holding part.
H04R 1/28 - Transducer mountings or enclosures designed for specific frequency response; Transducer enclosures modified by provision of mechanical or acoustic impedances, e.g. resonator, damping means
TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
Fukushima, Arika
Yoshida, Takufumi
Kondo, Koichi
Imahara, Shuuichiro
Abstract
An information processing device is disclosed. In the information processing device, a derivation unit derives, for each of sensors, a constraint expression obtained by substituting an observation value for a term of an observation value variable in an error model. The observation value indicates the number of present objects observed by the sensors. The error model represents correspondence between: the number of present objects in an observation range represented by the observation value variable and an error term related to an assumed detection error range of the sensor, and the number of present objects in an observation range represented by a variable indicating the number of present objects in an observation unit space. A range calculation unit calculates a possible range of the number of present objects. A reliability calculation unit calculates reliability of an estimation value of the number of present objects for each of the areas.
A semiconductor device includes a first electrode, a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a fourth semiconductor layer, a fifth semiconductor layer, and a second electrode. The fourth semiconductor layer is located in a second region on the first semiconductor layer. The fourth semiconductor layer is separated from the second semiconductor layer with a portion of the first semiconductor layer interposed. An impurity concentration of the fourth semiconductor layer is greater than an impurity concentration of the first semiconductor layer and less than an impurity concentration of the second semiconductor layer.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
44.
ELECTRODE, SECONDARY BATTERY, BATTERY PACK, AND VEHICLE
According to one embodiment, provided is an electrode including an active material-containing layer that includes an active material, inorganic solid particles having lithium ion conductivity, and a carbon material. The active material-containing layer has a first peak corresponding to a maximum log differential intrusion in a log differential intrusion distribution curve according to mercury porosimetry. A pore size diameter D1 at the first peak is 0.05 μm to 10 μm. A first pore volume corresponding to the first peak is 20% to 50% with respect to a total pore volume within the active material-containing layer. A ratio of a second pore volume in a range of 0.005 μm to 0.02 μm relative to the first pore volume is 0.1% to 5%.
H01M 4/583 - Carbonaceous material, e.g. graphite-intercalation compounds or CFx
H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
H01M 4/36 - Selection of substances as active materials, active masses, active liquids
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
H01M 4/505 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of manganese of mixed oxides or hydroxides containing manganese for inserting or intercalating light metals, e.g. LiMn2O4 or LiMn2OxFy
A gas detection device according to an embodiment includes a first irradiation part configured to irradiate a first light having a first wavelength on a gas released into a space, a second irradiation part configured to irradiate, on the gas, a second light having a second wavelength that is less than the first wavelength, an irradiation position adjustment part configured to control an irradiation position of the first light on the gas, a gas analysis part configured to analyze a component of the gas based on the first light having passed through the gas, and a gas visualization part configured to visualize a concentration distribution of the gas based on the second light having passed through the gas. The irradiation position adjustment part controls the irradiation position of the first light on the gas based on the visualized concentration distribution of the gas.
G01N 21/3504 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using infrared light for analysing gases, e.g. multi-gas analysis
A semiconductor device of an embodiment includes a lead frame; a first bonding material; a semiconductor chip including a lower surface, an upper surface, a first electrode connected to the first bonding material, a second electrode provided on the upper surface, and electrode pads connected to the second electrode; second bonding materials provided on each of the electrode pads; and a first connector connected to at least one of the second bonding materials, wherein the second bonding material which is not connected to the first connector is not connected to a connector or a wire.
An acoustic control apparatus includes a processor with hardware. The processor calculates a first relational expression between acoustic filter coefficients of acoustic filters to be applied to voice signals containing information of sounds played back by two or more sound sources, based on an amplification magnification in a sound amplification control point with respect to the sounds played back by the two or more sound sources, and on transfer functions between the sound amplification control point and the two or more sound sources. The processor calculates a second relational expression between the acoustic filter coefficients, based on information of a frequency of the voice signals, and on an interval between the two or more sound sources. The processor calculates the acoustic filter coefficients based on the first relational expression and the second relational expression.
A semiconductor device includes first to second electrodes, and first to fifth semiconductor regions. The second semiconductor region is located on the first semiconductor region and is of the first conductivity type. The third semiconductor region is located on a portion of the second semiconductor region and is of the first conductivity type. The third semiconductor region has a higher first-conductivity-type impurity concentration than the second semiconductor region. The fourth semiconductor region is located on the second and third semiconductor regions and is of a second conductivity type. The fifth semiconductor region is located on a portion of the fourth semiconductor region and is of the second conductivity type. The fifth semiconductor region has a higher second-conductivity-type impurity concentration than the fourth semiconductor region. At least a portion of the fifth semiconductor region is positioned above at least a portion of the third semiconductor region.
According to one embodiment, a communication system comprises a transmitter device and receiver devices. The transmitter device transmits data and identification information. The identification information comprises first information indicative of a communication mode and second information indicative of a receiver device of a transmission destination data. Each of the receiver devices determines whether the receiver device receives the data based on at least a part of the second information.
In one embodiment, electronic circuitry comprises a first circuit capable of transmitting and receiving signals, a second circuit capable of transmitting and receiving signals, and an insulation element. The first circuit has a first terminal to which a first clock signal is input, increases the frequency of the first clock signal to generate a second clock signal, and transmits the second clock signal. The insulation element transmits the second clock signal obtained from the first circuit to the second circuit as a third clock signal. The second circuit receives the third clock signal from the insulation element, and transmits a first data signal in response to the third clock signal. The insulation element transmits the first data signal obtained from the second circuit as a second data signal. The first circuit receives the second data signal from the insulation element.
G06F 1/12 - Synchronisation of different clock signals
H03K 17/691 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors with galvanic isolation between the control circuit and the output circuit using transformer coupling
According to one embodiment, a read and write (RW) parameter adjustment method includes changing conditions of RW parameters to determine a capacity and characteristics for each of various heads of a test device to measure the characteristics and creating, for each of the heads, a database in which the measured characteristics are registered, and changing the conditions of the RW parameters for each of heads of a device to be adjusted to measure characteristics, searching the database created for each of the heads for a database having similar characteristics, and setting the capacity and characteristics in an appropriate balance based on the similar characteristics of the database obtained by the searching.
According to one embodiment, electronic circuitry includes a transmission circuit to output a waveform including a plurality of pulse waveforms in response to an input signal. The pulse waveforms include a first transmit pulse waveform, and a second transmit pulse waveform following the first transmit pulse waveform, and the first transmit pulse waveform is larger in amplitude than the second transmit pulse waveform.
A method of synchronizing clocks of a secondary node and primary node, the method comprising: the primary node transmitting a first message and an indication of that message’s transmission time to the secondary node; the secondary node transmitting a second message to the primary node; the primary node transmitting a third message and an indication of that message’s transmission time to the secondary node; the secondary node calculating a rate of its clock relative to the clock of the primary node using a ratio of times between the transmission and reception times of the first and third messages; and the secondary node calculating a time offset of its clock relative to the clock of the primary node using the calculated rate, a propagation delay and one of the indications of the transmission times of the first or third message.
A magnetic material according to an embodiment includes at least one first element X selected from the group consisting of Fe, Co and Ni; a matrix phase; and a particle including C and at least one second element Y selected from Ta, W, Nb and Mo.
According to one embodiment, an active material is provided. The active material includes a primary particle including an Nb10Ti2O29 phase and at least one Nb-rich phase selected from an Nb14TiO37 phase and an Nb24TiO64 phase. In the primary particle, a ratio MNb/MTi of substance amount of niobium to titanium satisfies 5.0
H01M 4/485 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of mixed oxides or hydroxides for inserting or intercalating light metals, e.g. LiTi2O4 or LiTi2OxFy
H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
H01M 50/296 - Mountings; Secondary casings or frames; Racks, modules or packs; Suspension devices; Shock absorbers; Transport or carrying devices; Holders characterised by terminals of battery packs
H01M 50/284 - Mountings; Secondary casings or frames; Racks, modules or packs; Suspension devices; Shock absorbers; Transport or carrying devices; Holders with incorporated circuit boards, e.g. printed circuit boards [PCB]
According to one embodiment, a sensor includes an element part. The element part includes a base body, a first detection support part fixed to the base body, a first detection connection part including a first connection resistance layer and supported by the first detection support part, a first support part fixed to the base body, a first structure body, a first connection part, and a film part. The first structure body includes a first end part and a first other end part. The first end part is supported by the first support part. The first connection part is supported by the first other end part. The film part includes a first detection part and a first part. The first detection part is supported by the first detection connection part. The first part is supported by the first connection part. The film part includes a film part resistance layer.
G01L 1/14 - Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators
G01L 9/00 - Measuring steady or quasi-steady pressure of a fluid or a fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
B81B 3/00 - Devices comprising flexible or deformable elements, e.g. comprising elastic tongues or membranes
According to one embodiment, a sensor includes a first element including a first resistance member and a first conductive member, a second element including a second resistance member, and a third resistance member connected in series with the second resistance member. An absolute value of a third temperature coefficient of a third resistance of the third resistance member is smaller than an absolute value of a first temperature coefficient of a first resistance of the first resistance member. The absolute value of the third temperature coefficient is smaller than an absolute value of a second temperature coefficient of the second resistance member. The third resistance is lower than the second resistance.
According to one embodiment, a sensor includes a first detection element, and a controller. The first detection element includes a base body, a first support portion, a first movable member, a first detection electrode, and a first counter detection electrode. The first support portion is fixed to the base body. The first movable member is supported by the first support portion. The first detection electrode and the first counter detection electrodes are fixed to the base body. The first movable member includes a first movable portion. The first movable portion includes a first beam, a first conductive extending portion, and a first connecting portion. The first conductive extending portion includes a first extending portion, a first extending other portion, and a first extending intermediate. The first extending portion is between the first detection electrode and the first counter detection electrodes. The controller includes a first differential circuit.
G01C 19/5712 - Turn-sensitive devices using vibrating masses, e.g. vibratory angular rate sensors based on Coriolis forces using masses driven in reciprocating rotary motion about an axis the devices involving a micromechanical structure
A neural network apparatus according to an embodiment includes neuron circuits, synaptic circuits, and a control circuit. A firing circuit of each neuron circuit outputs a firing signal when absolute value of the internal potential is larger than a firing threshold. A firing threshold adjustment circuit of each neuron circuit changes the firing threshold in accordance with frequency of the firing signal. When the firing signal is output from a pre-synaptic neuron circuit, the synaptic circuit changes the synaptic weight in accordance with a contrast between a learning threshold and the absolute value of the internal potential held in a post-synaptic neuron circuit. The control circuit changes the learning threshold in accordance with frequency of the firing signal from a target neuron circuit. The learning threshold is used for changing the synaptic weight stored in one or more synaptic circuits each outputting the output signal to the target neuron.
According to one embodiment, a nitride semiconductor includes a nitride member. The nitride member includes a first nitride region including Alx1Ga1-×1N (0 < x1 ≤ 1), a second nitride region including Alx2Ga1-x2N (0 ≤ x2 < 1), and an intermediate region being between the first nitride region and the second nitride region. In a first direction from the first nitride region to the second nitride region, an oxygen concentration in the nitride member has a peak value at a first position included in the intermediate region. The peak value is 4.9 times or more a first oxygen concentration in the first nitride region. A second carbon concentration in the second nitride region is higher than a first carbon concentration in the first nitride region.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
According to one embodiment, a semiconductor device includes a first transistor, a first circuit, a second circuit, and a third circuit. The first transistor has one end connected to a power supply voltage terminal, the other end connected to a first node, and a gate connected to a first output terminal. The first circuit is configured to control a voltage of the first node based on a voltage of a ground voltage terminal. The second circuit is configured to control a voltage of the first output terminal based on the voltage of the ground voltage terminal and a voltage of an input terminal. The third circuit is configured to control switching between connection and disconnection between the ground voltage terminal and the first circuit.
H03K 17/06 - Modifications for ensuring a fully conducting state
H03K 17/081 - Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
A parallel receiver module includes a plurality of signal transmission lines arranged in a first direction; and a receiving semiconductor chip including a plurality of receiving channels arranged in the first direction. The plurality of receiving channels includes receiving circuits configured to receive signals from the signal transmission lines. At least one receiving channel among the plurality of receiving channels further includes a monitor circuit monitoring a receiving level of the signal from the signal transmission line. The at least one receiving channel is connectable with the signal transmission line by switching between the receiving circuit and the monitor circuit.
H04B 10/2507 - Arrangements specific to fibre transmission for the reduction or elimination of distortion or dispersion
H04B 10/079 - Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
H04Q 11/00 - Selecting arrangements for multiplex systems
TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
Uchida, Hidenori
Yamagishi, Daisuke
Abstract
According to one embodiment, a first region surrounded by a bridge inner circumferential edge, a bridge center line, a circumscribed circle of a rotor core, and an inner wall of a first magnet hole and a second region surrounded by the bridge inner circumferential edge, the bridge center line, the circumscribed circle of the rotor core, and an inner wall of a second magnet hole are asymmetrical with respect to a d-axis, and the rotor core has a structure satisfying the following equation.
According to one embodiment, a first region surrounded by a bridge inner circumferential edge, a bridge center line, a circumscribed circle of a rotor core, and an inner wall of a first magnet hole and a second region surrounded by the bridge inner circumferential edge, the bridge center line, the circumscribed circle of the rotor core, and an inner wall of a second magnet hole are asymmetrical with respect to a d-axis, and the rotor core has a structure satisfying the following equation.
∑
S
km
r
m
r
bm
sin
θ
bkm
−
θ
km
=
∑
S
jn
R
n
R
bn
sin
θ
bjn
−
θ
jn
According to one embodiment, a source device generates a multistream signal transmitted to a plurality of sink devices which are connected by daisy-chaining and generates the multistream signal by associating daisy chain stage numbers of the sink devices with contents streams for the sink devices.
According to an embodiment, an information processing device includes one or more processors. The processors calculate a first degree of influence of a plurality of variables on output data, and a frequency at which the plurality of variables are selected as a variable influencing the output data, based on K first models. The K first models are models estimated using a plurality of pieces of input data including the plurality of variables. The plurality of input data are obtained in K periods. K is an integer of 2 or more. The first model receives input of the input data including the plurality of variables and outputs the output data. The processors output the first degree of influence and the frequency in association with each other.
G05B 19/4155 - Numerical control (NC), i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form characterised by programme execution, i.e. part programme or machine function execution, e.g. selection of a programme
66.
LIGHT RECEIVING DEVICE AND DISTANCE MEASURING DEVICE
According to the present embodiment, a light receiving device includes a plurality of pixels. Each of the pixels includes a photoelectric conversion element configured to be able to detect incidence of a photon and a power supply portion configured to change an applied voltage applied across both ends of the photoelectric conversion element.
A semiconductor device includes: a drain electrode including a plurality of drain finger parts; a source electrode including a plurality of source finger parts and a Kelvin source part electrically connected with the source finger parts; a sense electrode positioned between a drain finger part and the Kelvin source part, which are next to each other in a particular direction; and a gate electrode positioned between a drain finger part and a source finger part, which are next to each other in the particular direction, and between a drain finger part and the sense electrode, which are next to each other in the particular direction. The sense electrode and the Kelvin source part are electrically connected via a sense resistance due to a spacing between the sense electrode and the Kelvin source part in the particular direction.
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/205 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds in different semiconductor regions
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
A semiconductor device includes a substrate; a holding member located on the substrate, the holding member including an optical fiber holding part and a module placement part arranged in a first direction; an optical module located in the module placement part and mounted on the substrate; an optical fiber passing through the optical fiber holding part, the optical fiber being connected with the optical module; and a first leaf spring and a second leaf spring located in the optical fiber holding part, the first leaf spring and the second leaf spring holding the optical fiber between the first leaf spring and the second leaf spring in a direction crossing the first direction.
G02B 6/42 - Coupling light guides with opto-electronic elements
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
A semiconductor device includes an insulating layer, a semiconductor layer on the insulating layer, and a control electrode on the semiconductor layer. The semiconductor layer includes first and second semiconductor parts and a separation trench between the first and second semiconductor parts. The first and second semiconductor parts extending along the insulating film. The first semiconductor part includes first and second regions of a first conductivity type, and a fifth region of a second conductivity type between the first and second regions. The second semiconductor part includes third and fourth regions of the second conductivity type, and a sixth region of the second conductivity type between the third and fourth regions. The control electrode extends over the fifth and sixth regions. The semiconductor layer further including a seventh region of the second conductivity type at a bottom of the separation trench and electrically connecting the fifth and sixth regions.
According to one embodiment, a semiconductor device includes first and second electrodes, first to fifth semiconductor regions, and a gate electrode. The first semiconductor region is provided on the first electrode, and electrically connected to the first electrode. The second semiconductor region is provided on a part of the first semiconductor region. The third semiconductor region is provided on another part of the first semiconductor region. The third semiconductor region includes first and second regions. The fourth semiconductor region is provided on the second semiconductor region. The fifth semiconductor region is provided on a part of the fourth semiconductor region. The gate electrode faces the fourth semiconductor region with a gate insulating layer interposed between the gate electrode and the fourth semiconductor region. The second electrode is provided on the fourth and fifth semiconductor regions. The second electrode is electrically connected to the fourth and fifth semiconductor regions.
According to one embodiment, a sensor includes a stage, a driver, and a detector. The stage includes a first portion and a second portion. The driver is configured to rotate the stage. A rotation axis of the stage passes through the first portion and is along a first direction. A second direction from the first portion to the second portion crosses the first direction. The second portion is configured to rotate along a circumferential direction with the rotation axis as a center when the stage rotating. The detector is provided at the second portion. The detector includes a first detection element configured to detect a first acceleration including a component along the second direction, and a second detection element configured to detect a second acceleration including a component along the first direction.
G01P 15/093 - Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces with conversion into electric or magnetic values by photoelectric pick-up
A semiconductor device includes a substrate, a first chip, a second chip, a first connector, and a second connector. The substrate has a second thickness. The first chip includes a first surface facing the substrate, a second surface positioned at a side opposite to the first surface, a first electrode located at the first surface and electrically connected to the substrate, and a second electrode located at the second surface. The second connector includes a first part positioned above the second chip. A difference between the second thickness and a first thickness of the first part is not more than 20% of the greater of the first thickness or the second thickness.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
According to one embodiment, an optical test apparatus includes a light convergence element, an optical filter, and an image sensor. The light convergence element converges light from a subject. The optical filter is arranged on an optical axis of the light convergence element. The image sensor is arranged in an effective region not crossing the optical axis of the light convergence element, and receives light passing through the light convergence element and the optical filter.
A carbon dioxide electrolytic device in an embodiment includes: an electrochemical reaction cell including: a first accommodation part that accommodates gas or a first electrolytic solution containing CO2; a second accommodation part that accommodates a second electrolytic solution containing H2O; a diaphragm provided between the first and second accommodation parts; a cathode that is in contact with the gas or the first electrolytic solution; and an anode that is in contact with the second electrolytic solution; a first supply part that supplies the gas or the first electrolytic solution to the first accommodation part; a second supply part that supplies the second electrolytic solution to the second accommodation part; and a carbon dioxide separation part that is connected to a discharge portion of a discharge containing O2 and CO2 from the second accommodation part and includes a cryogenic separation device to separate CO2 from a gas component in the discharge.
According to one embodiment, a semiconductor device includes first and second electrodes, first to sixth semiconductor regions, a gate electrode, and a conductive part. The first semiconductor region is located on the first electrode. The first semiconductor region includes first and second regions. The second semiconductor region is located on the first region. The gate electrode is located on the second semiconductor region with a gate insulating layer interposed. The third semiconductor region is located on the first region and is separated from the second semiconductor region. The conductive part is located on the third semiconductor region with an insulating layer interposed. The fourth semiconductor region is located on the second region. The fifth semiconductor region is located on a portion of the fourth semiconductor region. The sixth semiconductor region contacts the third semiconductor region. The second electrode is located on the fourth and fifth semiconductor regions.
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
A semiconductor device includes a holding member including a component placement part; a back plate; a substrate including a mounting surface facing the holding member, and a back surface facing the back plate; a plurality of mounting pads located at the mounting surface; a package component including a terminal placement surface facing the mounting surface; and a plurality of package terminals located at the terminal placement surface. The substrate is held between the holding member and the back plate. The package component is located in the component placement part, and held between the holding member and the substrate. The package terminals are in direct contact with the mounting pads.
A semiconductor device includes a substrate; a holding member located on the substrate, the holding member including a module placement part and an opening arranged in a first direction; an optical module located in the module placement part and mounted on the substrate; and an optical fiber passing through the opening, the optical fiber being connected with the optical module. The holding member includes a first corner part and a second corner part. The opening is between the first corner part and the second corner part in a direction crossing the first direction. The first corner part and the second corner part are beveled.
G02B 6/42 - Coupling light guides with opto-electronic elements
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
78.
MAGNETIC DISK DEVICE AND SERVO PATTERN WRITE METHOD
According to one embodiment, a magnetic disk device comprises a disk, a head that writes data to the disk and reads data from the disk, and a controller that controls a position of the head so as to write a first spiral servo pattern to the disk, and overwrite a second spiral servo pattern different from the first spiral servo pattern by shifting in a radial direction of the disk from the first spiral servo pattern.
G11B 5/596 - Disposition or mounting of heads relative to record carriers with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for track following on disks
A distance between outermost parts of alignment chips in a direction normal to a surface of a substrate is different between a first direction and a second direction along terminal placement surfaces. The plurality of alignment chips include a first alignment chip fixed to a first metal pad, and a second alignment chip fixed to a second metal pad. The first alignment chip and the second alignment chip are oriented in different directions on the surface of the substrate. A semiconductor module includes a first side surface part extending in the second direction and facing the first alignment chip, and a groove part formed in a portion of the first side surface part. A portion of the second alignment chip is positioned in the groove part.
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
According to one embodiment, a photodetector includes a first conductive layer, a second conductive layer, and an organic layer provided between the first conductive layer and the second conductive layer. The organic layer includes a first region and a second region. The second region is provided between the first region and the second conductive layer. The first region includes a first compound and a second compound. The first compound includes a first mother skeleton. The second region includes the first compound and a third compound. The third compound includes the first mother skeleton. The third compound is different from the first compound. The second region does not include the second compound, or a concentration of the second compound in the second region is lower than a concentration of the second compound in the first region.
According to an embodiment, an inference system includes a recurrent neural network circuit, an inference neural network, and a control circuit. The recurrent neural network circuit receives M input signals and outputs N intermediate signals, where M is an integer of 2 or more and N is an integer of 2 or more. The inference neural network circuit receives the N intermediate signals and outputs L output signals, where L is an integer of 2 or more. The control circuit adjusts a plurality of coefficients that are set to the recurrent neural network circuit and adjusts a plurality of coefficients that are set to the inference neural network circuit. The control circuit adjusts the coefficients set to the recurrent neural network circuit according to a total delay time period from timing for applying the M input signals until timing for firing the L output signals.
According to an embodiment, a reading system includes a reader and a calculator. The reader reads, from a character image, a character that is displayed by a segment display. The calculator performs one of first, second, third, or fourth processing. In the first processing, the calculator calculates a first score based on a state of pixels of the character. In the second processing, the calculator calculates a second score based on a match ratio between the pixels and the extracted pixels. In the third processing, the calculator calculates a third score based on a ratio of a length of the character image in first and second direction. In the fourth processing, the calculator calculates a fourth score based on a comparison result between the detected result and preset patterns. The calculator calculates a certainty of the reading by using one of the first, second, third, or fourth score.
A semiconductor device includes a semiconductor part, first to third electrodes, a control electrode and first to third insulating films. The semiconductor part is provided between the first and second electrodes. The third electrode extends in a first direction inside a trench of the semiconductor part. The control electrode is provided inside the trench at an opening side thereof. The control electrode includes first and second control portions arranged in a second direction crossing the first direction. The third electrode has an end portion between the first and second control portions. The first insulating film is provided between the semiconductor part and the third electrode. The second insulating film is provided between the semiconductor part and the control electrode. The third insulating film covers the end portion of the third electrode. The first insulating film includes an extending portion extending between the third insulating film and the control electrode.
A semiconductor device includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a gate wiring provided on the first insulating film, and a source electrode provided on the first insulating film. The device further includes a second insulating film provided on the gate wiring and the source electrode and including a portion sandwiched between the gate wiring and the source electrode, and a drain electrode provided below the semiconductor layer. Further, an upper surface of the first insulating film includes a first region having a first concentration of phosphorus and a second region having a second concentration of phosphorus that is higher than the first concentration. The first region is present between the semiconductor layer and the gate wiring or the source electrode, and the second region is present between the semiconductor layer and the portion of the second insulating film.
According to one embodiment, a detector includes an element portion. The element portion includes a first detection portion and a wiring portion. The first detection portion includes a first electrode, a first counter electrode, and a first organic semiconductor layer. At least a part of the first organic semiconductor layer is between the first electrode and the first counter electrode. The wiring part includes a first electrode layer electrically connected with the first electrode, a first counter electrode layer electrically connected with the first counter electrode, and a first conductive layer. The first counter electrode layer is between the first electrode layer and the first detection portion in a first direction from the first electrode layer to the first counter electrode layer. The first conductive layer is between the first electrode layer and the first counter electrode layer in the first direction.
G01T 1/24 - Measuring radiation intensity with semiconductor detectors
H01L 51/44 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation - Details of devices
G01T 1/20 - Measuring radiation intensity with scintillation detectors
A microcontroller with a slew-rate control circuit according to an embodiment includes a pre-drive circuit configured to charge and discharge a gate of an output power transistor with a constant current, a measuring circuit configured to measure a transition time period during which a drain-to-source voltage of the output power transistor makes a transition between a first voltage and a second voltage, and a microprocessor. The microprocessor controls a constant current set value of the pre-drive circuit such that the transition time period is a predetermined time period.
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 1/088 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
H02M 1/36 - Means for starting or stopping converters
The super junction structure part includes a plurality of n-type pillars having higher impurity concentrations than the second layer, a plurality of p-type pillars having higher impurity concentrations than the second layer, and a boundary region positioned between the n-type pillar and the p-type pillar in a second direction orthogonal to the first direction, the boundary region extending in the first direction continuously from the second layer, the boundary region having a lower impurity concentration than the n-type pillars and the p-type pillars.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
88.
CALCULATION DEVICE, CALCULATION PROGRAM, RECORDING MEDIUM, AND CALCULATION METHOD
According to one embodiment, a calculation device includes a processing device configured to perform a processing procedure. The processing procedure includes a first update of a first vector, a second update of a second vector, and a third update of a third vector. The first update includes updating the first vector using the second vector and the third vector. The second update includes updating the second vector using the first vector. The processing device is configured to output an output of at least one of the first vector obtained after repeating the processing procedure or a function of the first vector obtained after the repeating the processing procedure.
G06F 7/509 - Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators
G06F 7/483 - Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
According to one embodiment, a sensor includes a base body, a first fixed portion, a movable portion, and first and second fixed electrodes. The first fixed portion is fixed to the base body. The movable portion is supported by the first fixed portion. The movable portion includes annular portions and connecting portions. The annular portions are concentric with the first fixed portion as a center in a first plane. One of the connecting portions connects one of the annular portions and an other one of the annular portions. The annular portions include first to third annular portions. The second annular portion includes a first movable portion electrode. The first fixed electrode is fixed to the base body and faces a part of the first annular portion. The second fixed electrode is fixed to the base body and faces the first movable portion electrode.
A solid-state imaging device includes a substrate having a major surface, a photodiode for near infrared light disposed on the major surface and configured to detect near infrared light, and a stacked filter disposed on the photodiode for near infrared light and configured to remove visible light. The stacked filter includes a red filter configured to transmit red light and the near infrared light and remove light other than the red light and the near infrared light, a green filter configured to transmit green light and the near infrared light and remove light other than the green light and the near infrared light, and a blue filter configured to transmit blue light and the near infrared light and remove light other than the blue light and the near infrared light. The red filter, the green filter, and the blue filter are stacked above the photodiode for near infrared light.
An image processing apparatus has a light source that emits a light signal at a predetermined time interval, a scanner capable of changing at least one of a scanning range or a scanning timing of the light signal for each of frames, a light receiver that receives a reflected light signal reflected on an object by irradiating the object with the light signal, processing circuitry that generates a distance image for each of the frames based on the reflected light signal received by the light receiver, and synthesizes the distance images of a plurality of the frames to generate a high-resolution distance image.
According to one embodiment, a magnetic disk device comprising a magnetic disk, a magnetic head, and a controller that registers an address and a positioning error, determines whether or not a positioning error of a second sector that is two tracks ahead in a radial direction of a first sector to which a data is written is registered, and when the positioning error of the second sector is registered, sets a first threshold that allows a write operation for a positioning error of the first sector based on the positioning error of the second sector, and determines whether or not the positioning error of the first sector exceeds the first threshold, and stops the write operation when the positioning error of the first sector exceeds the first threshold.
According to one embodiment, a magnetic disk device includes a magnetic disk, a magnetic head, an actuator, a controller, and a ramp. The magnetic head is configured to record data on and reproduce data from the magnetic disk. The actuator is configured to move the magnetic head relative to the magnetic disk. The controller is configured to control the actuator. The ramp is configured to hold the magnetic head. The controller is configured to, in a retract operation for causing the actuator to retract the magnetic head to the ramp, alternate detection of a back electromotive force of the actuator and application of a voltage corresponding to the back electromotive force to the actuator, and skip the detection of the back electromotive force a predetermined number of times in response to an event that the magnetic head moves at a speed outside a predetermined range.
Systems and methods for scheduling the execution of disk access commands in a split-actuator hard disk drive are provided. In some embodiments, while a first actuator of the split actuator is in the process of performing a first disk access command (a victim operation), a second disk access command (an aggressor operation) is selected for and executed by a second actuator of the split actuator. The aggressor operation is selected from a queue of disk access commands for the second actuator, and is selected based on being the disk access command in the queue that can be initiated sooner than any other disk access command in the queue without disturbing the victim operation.
G06F 3/06 - Digital input from, or digital output to, record carriers
95.
TRANSMITTER FOR A QUANTUM COMMUNICATION SYSTEM, A RECEIVER FOR A QUANTUM COMMUNICATION SYSTEM AND A METHOD OF CONTROLLING A QUANTUM COMMUNICATION SYSTEM
A quantum communication system comprising:
an transmitter and a receiver, the transmitter comprising transmitter components the transmitter components comprising a source of pulsed radiation and a modulation unit, the modulation unit being configured to randomly encode pulses of radiation; and
a receiver comprising receiver components, the receiver components comprising a demodulator and detector configured to decode and detect said randomly encoded pulses,
the system further comprising a control unit and an optimisation unit, the control unit being configured to apply a plurality of control signals defined by a set of control parameters to at least one of said transmitter components and receiver components, the optimization unit being configured to tune the set of control parameters,
wherein the optimisation unit sets the control parameters by:
obtaining a score indicating the quality of the system corresponding to a first set of control parameters; and
estimating a further set of control parameters suitable via an iterative process to obtain a tuned set of control parameters.
H04B 10/079 - Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
COLD STORAGE MATERIAL PARTICLE, COLD STORAGE DEVICE, REFRIGERATOR, CRYOPUMP, SUPERCONDUCTING MAGNET, NUCLEAR MAGNETIC RESONANCE IMAGING APPARATUS, NUCLEAR MAGNETIC RESONANCE APPARATUS, MAGNETIC FIELD APPLICATION TYPE SINGLE CRYSTAL PULLING APPARATUS, AND METHOD FOR PRODUCING COLD STORAGE MATERIAL PARTICLE
A cold storage material particle of an embodiment includes at least one first element selected from the group consisting of a rare earth element, silver (Ag), and copper (Cu) and a second element that is different from the first element and forms a multivalent metal ion in an aqueous solution, in which an atomic concentration of the second element is 0.001 atomic % or more and 60 atomic % or less, and a maximum value of volume specific heat at a temperature of 20K or less is 0.3 J/cm3·K or more.
C09K 5/14 - Solid materials, e.g. powdery or granular
F28D 20/00 - Heat storage plants or apparatus in general; Regenerative heat-exchange apparatus not covered by groups or
G01R 33/38 - Systems for generation, homogenisation or stabilisation of the main or gradient magnetic field
C04B 35/50 - Shaped ceramic products characterised by their composition; Ceramic compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on rare earth compounds
C04B 35/45 - Shaped ceramic products characterised by their composition; Ceramic compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxides based on copper oxide or solid solutions thereof with other oxides
C04B 35/626 - Preparing or treating the powders individually or as batches
C04B 35/636 - Polysaccharides or derivatives thereof
TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
Sasaki, Naoya
Shinkawa, Naoto
Matsubara, Masakatsu
Abstract
According to one embodiment, a rotating electric machine rotor includes a shaft rotating about the center axis line, a rotor core coaxially fixed to the shaft, and a polyhedral permanent magnet housed in a slot portion passing through the rotor core in a direction along the center axis line. The permanent magnet has a face portion through which adjacent magnets can face and contact each other in the slot portion in which the permanent magnet is housed. The face portion is provided with a surface layer portion having an electric resistance value that is two or more times the electric resistance value of the face portion of the permanent magnet.
H02K 1/276 - Magnets embedded in the magnetic core, e.g. interior permanent magnets [IPM]
H02K 21/16 - Synchronous motors having permanent magnets; Synchronous generators having permanent magnets with stationary armatures and rotating magnets with magnets rotating within the armatures having annular armature cores with salient poles
TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
Hisada, Hideki
Kano, Masaru
Uchida, Hidenori
Abstract
According to one embodiment, a rotor includes a rotor iron core, a plurality of first magnet accommodation, a plurality of first permanent magnets, a pair of first inner circumferential side magnetic voids, a pair of first outer circumferential side magnetic voids, a pair of first bridge portions, a pair of second magnet accommodation areas, a plurality of second permanent magnets, a pair of second outer circumferential side magnetic voids, a pair of second inner circumferential side magnetic voids, a third magnetic void, and a pair of second bridge portions.
According to one embodiment, a semiconductor device, includes first to third electrodes, first to third layers, and an insulating member. A position of the third electrode is between a position of the first electrode and a position of the second electrode. The first layer includes first to fifth partial regions. The fourth partial region is located between the first and third partial regions. The fifth partial region is located between the third and second partial regions. The second layer includes a first compound region provided between the third partial region and the third electrode. The third layer includes first to third portions. The third portion is located between the third partial region and the first compound region. The insulating member includes a first insulating region. The first insulating region is located between the first compound region and the third electrode.
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
According to one embodiment, an electrochemical device includes an electrochemical element, and a controller. The electrochemical element includes a first electrode, a second electrode, and a first member provided between the first electrode and the second electrode. The controller is electrically connected to the first electrode and the second electrode. The controller is configured to supply a first signal between the first electrode and the second electrode. The first signal includes a waveform repeating in a first period. The waveform includes a first duration of a first voltage of a first polarity, and a second duration of a second voltage of the first polarity. An absolute value of the second voltage is smaller than an absolute value of the first voltage.
