Toshiba Corporation

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        Patent 11,946
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[Owner] Toshiba Corporation 12,027
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2024 March 192
2024 February 76
2024 January 52
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IPC Class
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate 492
H01L 29/66 - Types of semiconductor device 425
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions 366
G03G 15/00 - Apparatus for electrographic processes using a charge pattern 319
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched 304
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09 - Scientific and electric apparatus and instruments 70
42 - Scientific, technological and industrial services, research and design 28
07 - Machines and machine tools 23
11 - Environmental control apparatus 23
10 - Medical apparatus and instruments 17
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1.

TRANSISTOR DRIVER CIRCUIT AND TRANSISTOR DRIVING METHOD

      
Application Number 18488880
Status Pending
Filing Date 2023-10-17
First Publication Date 2024-04-18
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Majima, Hideaki

Abstract

According to an embodiment, a transistor driver circuit includes a driving force limitation circuit and a delay-time adjustment circuit. The driving force limitation circuit operates to maintain a gate potential of a transistor to be driven at a driving force limitation potential when the transistor to be driven is driven. The driving force limitation potential corresponds to a threshold voltage of the transistor to be driven. The delay-time adjustment circuit operates to cause the gate potential to transition to the driving force limitation potential when the driving force limitation circuit is in operation.

IPC Classes  ?

  • H03K 17/284 - Modifications for introducing a time delay before switching in field-effect transistor switches

2.

OPERATING SYSTEM, PROCESSING SYSTEM, COMPUTER, OPERATING METHOD, AND STORAGE MEDIUM

      
Application Number 18395856
Status Pending
Filing Date 2023-12-26
First Publication Date 2024-04-18
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor Fuchikami, Yasunori

Abstract

According to one embodiment, an operating system acquires an image signal from a first device that is an operation object. The operating system causes a display device to display a screen based on the image signal. The operating system generates an operation command corresponding to an input operation from a user in response to the input operation. The operating system generates an operation signal compatible with the first device based on the operation command, and transmits the operation signal to the first device.

IPC Classes  ?

  • G06F 3/0484 - Interaction techniques based on graphical user interfaces [GUI] for the control of specific functions or operations, e.g. selecting or manipulating an object, an image or a displayed text element, setting a parameter value or selecting a range
  • G09G 5/391 - Resolution modifying circuits, e.g. variable screen formats

3.

IMAGE PROCESSING SYSTEM AND MEDICAL INFORMATION PROCESSING SYSTEM

      
Application Number 18392105
Status Pending
Filing Date 2023-12-21
First Publication Date 2024-04-18
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • CANON MEDICAL SYSTEMS CORPORATION (Japan)
Inventor
  • Isogawa, Kenzo
  • Takeguchi, Tomoyuki

Abstract

In one embodiment, an image processing system includes a memory and processing circuitry. The memory is configured to store a predetermined program. The processing circuitry is configured, by executing the predetermined program, to perform processing on an input image by exploiting a neural network having an input layer, an output layer, and an intermediate layer provided between the input layer and the output layer, the input image being inputted to the input layer, and adjust an internal parameter based on data related to the input image, while performing the processing on the input image after training of the neural network, the internal parameter being at least one internal parameter of at least one node included in the intermediate layer, and the input parameter having been calculated by the training of the neural network.

IPC Classes  ?

  • G06N 3/048 - Activation functions
  • G06N 3/045 - Combinations of networks
  • G06N 3/084 - Backpropagation, e.g. using gradient descent
  • G06T 5/70 - Denoising; Smoothing
  • G16H 30/40 - ICT specially adapted for the handling or processing of medical images for processing medical images, e.g. editing

4.

DISK DEVICE

      
Application Number 18392972
Status Pending
Filing Date 2023-12-21
First Publication Date 2024-04-18
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Setoma, Shunya

Abstract

According to one embodiment, a disk device includes a magnetic disk, a magnetic head, a flexure, a piezoelectric element, a first bonding material, a second bonding material, and a protrusion. The flexure includes a first outer surface, a first pad, and a second pad. The first pad and the second pad are on the first outer surface. The piezoelectric element includes a second outer surface, a first electrode, and a second outer surface. The first electrode and the second electrode are on the second outer surface. The first bonding material, which is conductive, bonds the first pad and the first electrode. The second bonding material, which is conductive, bonds the second pad and the second electrode. The protrusion is provided on the flexure, is located at least partially between the first bonding material and the second bonding material, and protrudes from the first outer surface.

IPC Classes  ?

  • G11B 5/48 - Disposition or mounting of heads relative to record carriers
  • H10N 30/87 - Electrodes or interconnections, e.g. leads or terminals

5.

CLEANING LIQUID AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18113138
Status Pending
Filing Date 2023-02-23
First Publication Date 2024-04-18
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Yasui, Masato

Abstract

In general, according to one embodiment, a cleaning liquid includes a glycol ether-based cleaning agent and a compound represented by chemical formula (1) below, where R is an NH2 group or H, and n is 1 or more. In general, according to one embodiment, a cleaning liquid includes a glycol ether-based cleaning agent and a compound represented by chemical formula (1) below, where R is an NH2 group or H, and n is 1 or more.

IPC Classes  ?

  • C11D 1/72 - Ethers of polyoxyalkylene glycols
  • C11D 3/30 - Amines; Substituted amines
  • C11D 11/00 - Special methods for preparing compositions containing mixtures of detergents
  • C11D 17/00 - Detergent materials or soaps characterised by their shape or physical properties
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/495 - Lead-frames

6.

ENERGY STORAGE SYSTEM AND CONTROL METHOD

      
Application Number 17769319
Status Pending
Filing Date 2019-10-15
First Publication Date 2024-04-18
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Monden, Yukitaka
  • Yamazaki, Shuji
  • Kobayashi, Takenori

Abstract

An energy storage system according to an embodiment includes first and second power storage devices and performs charge/discharge control for the power storage devices based on a charge/discharge command value. The first power storage device performs discharging for one or more devices as destination via a power line or performs charging of power supplied from one or more devices as source via the power line, and the second power storage device performs charging and discharging for the first power storage device. The energy storage system also includes a control system that controls charge/discharge power of the second power storage device so that a power storage rate of the first power storage device falls within a predetermined power storage rate range and controls charge/discharge power of the first power storage device based on charge/discharge power corresponding to the charge/discharge command value and the charge/discharge power of the second power storage device.

IPC Classes  ?

  • H02J 3/32 - Arrangements for balancing the load in a network by storage of energy using batteries with converting means
  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • H02J 7/34 - Parallel operation in networks using both storage and other dc sources, e.g. providing buffering

7.

ELECTROCHEMICAL REACTION DEVICE AND VALUABLE MATERIAL MANUFACTURING SYSTEM

      
Application Number 18397131
Status Pending
Filing Date 2023-12-27
First Publication Date 2024-04-18
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Kitagawa, Ryota
  • Kofuji, Yusuke
  • Motoshige, Asahi
  • Yamagiwa, Masakazu
  • Tamura, Jun
  • Kudo, Yuki
  • Ono, Akihiko
  • Mikoshiba, Satoshi

Abstract

An electrochemical reaction device in an embodiment includes: an electrochemical reaction cell including a first accommodation part for accommodating carbon dioxide, a second accommodation part for accommodating an electrolytic solution containing water, or water vapor, a diaphragm provided between the first accommodation part and the second accommodation part, a reduction electrode arranged in the first accommodation part, and an oxidation electrode arranged in the second accommodation part, a detection unit detecting a reaction amount in the electrochemical reaction cell; a regulation unit regulating an amount of the carbon dioxide to be supplied to the first accommodation part, and a control unit controlling the regulation unit based on a detection signal of the detection unit.

IPC Classes  ?

  • C25B 15/02 - Process control or regulation
  • C25B 1/00 - Electrolytic production of inorganic compounds or non-metals
  • C25B 3/25 - Reduction
  • C25B 9/19 - Cells comprising dimensionally-stable non-movable electrodes; Assemblies of constructional parts thereof with diaphragms

8.

ARTICLE CONVEYANCE SORTING APPARATUS, ARTICLE SORTING SYSTEM, AND CONTROL SERVER

      
Application Number 17822736
Status Pending
Filing Date 2022-08-26
First Publication Date 2024-04-18
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • Toshiba Infrastructure Systems & Solutions Corporation (Japan)
Inventor
  • Sato, Masataka
  • Aoki, Takashi

Abstract

According to an embodiment, an article conveyance sorting apparatus includes a distributing section, a first conveyance section, a second conveyance section, and a conveyance sorting section. The distributing section distributes an article in a first direction or a second direction based on a first distribution control signal or a second distribution control signal corresponding to a distinguishing result of the article distinguished based on article information. The first conveyance section receives the article distributed in the first direction. The second conveyance section receives the article distributed in the second direction. The conveyance sorting section sorts each of articles conveyed by the plurality of trays to a designated sorting destination.

IPC Classes  ?

  • B65G 43/10 - Sequence control of conveyors operating in combination
  • B65G 47/46 - Devices for discharging articles or materials from conveyors with distribution, e.g. automatically, to desired points

9.

MICROGRID STARTUP METHOD AND STARTUP PROGRAM

      
Application Number 18263110
Status Pending
Filing Date 2021-02-19
First Publication Date 2024-04-18
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Sakauchi, Yoko
  • Akiyama, Yukina
  • Kudo, Yuki
  • Kawachi, Shunsuke
  • Toba, Koji

Abstract

A startup method and startup program for microgrid that enable to stably start up the microgrid without producing frequency fluctuation is provided. An embodiment of the present disclosure is a startup method for microgrid configured by a plurality of inverter power supplies independently sharing a load and divided into a master that starts up first and a slave that starts up secondly and later, the startup method comprising: a master initial startup step of initially starting up the master in a CVCF mode; a slave initial startup step of initially starting up the slave in a grid interconnection mode; and a control mode changing step of the master and the slave changing control modes thereof when output fluctuation of the master and the slave becomes a predetermined threshold or less or when the master and the slave or other inverter power supplies become a predetermined operation state while output voltage of said master and said slave becomes a predetermined threshold or less.

IPC Classes  ?

  • H02J 3/24 - Arrangements for preventing or reducing oscillations of power in networks
  • H02J 3/32 - Arrangements for balancing the load in a network by storage of energy using batteries with converting means
  • H02J 3/46 - Controlling the sharing of output between the generators, converters, or transformers
  • H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

10.

SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR DEVICE

      
Application Number 18354809
Status Pending
Filing Date 2023-07-19
First Publication Date 2024-04-18
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japan)
Inventor
  • Nago, Hajime
  • Yoshida, Hisashi
  • Tajima, Jumpei
  • Hikosaka, Toshiki

Abstract

According to one embodiment, a semiconductor structure includes a substrate including silicon crystal, a first layer including AlN crystal, and an intermediate region provided between the silicon crystal and the AlN crystal. The intermediate region includes Al and nitrogen. A direction from the silicon crystal to the AlN crystal is along a first direction. A third lattice plane spacing in the first direction of a lattice of Al atoms in the intermediate region is longer than a first lattice plane spacing in the first direction of the silicon crystal and longer than a second lattice plane spacing in the first direction of the AlN crystal.

IPC Classes  ?

  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices

11.

MOLECULAR SENSOR, MOLECULAR DETECTION DEVICE, AND MOLECULAR DETECTION METHOD

      
Application Number 18175017
Status Pending
Filing Date 2023-02-27
First Publication Date 2024-04-11
Owner Kabushiki Kaisha Toshiba (Japan)
Inventor
  • Shinjo, Yasushi
  • Miyamoto, Hirohisa
  • Yoshimura, Reiko

Abstract

A molecular sensor of an embodiment includes a sensitive film including a plurality of metal organic framework particles, and a detector configured to be capable of measuring a change in physical quantity due to adsorption of a target molecule to the sensitive film. Pores are present between the plurality of metal organic framework particles, and the pores are any of mesopores of 2 nm or more and 50 nm or less, micropores smaller than the mesopores, and macropores larger than the mesopores. A sum of areas of the micropores is defined as Smi, a sum of areas of the mesopores is defined as Sme, a sum of areas of the macropores is defined as Sma, and an area of an entire image analysis area is defined as Stotal, in an image analysis area by two-dimensional image analysis on a cross section of the sensitive film in a thickness direction. Pore distribution satisfies 0.35≤Sme/(Smi+Sme+Sma), 0.01≤Smi+Sme+Sma)/Stotal≤0.5.

IPC Classes  ?

  • G01N 29/036 - Analysing fluids by measuring frequency or resonance of acoustic waves
  • G01N 29/24 - Probes

12.

ELECTROLYTIC DEVICE

      
Application Number 18176837
Status Pending
Filing Date 2023-03-01
First Publication Date 2024-04-11
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Ono, Akihiko
  • Kofuji, Yusuke
  • Kudo, Yuki
  • Mikoshiba, Satoshi
  • Kitagawa, Ryota

Abstract

An electrolytic device includes: an electrolysis cell including: an anode; a cathode; a first flow path plate facing on the anode, the first flow path plate having a first recess defining an anode flow path through which a first liquid flows; a second flow path plate facing on the cathode, the second flow path plate having a second recess defining a cathode flow path through which a first gas flows; and a separator provided between the anode and the cathode. The second flow path plate has an uneven surface on an inner surface of the second recess. An arithmetic mean roughness of the uneven surface is 0.03 μm or more and 50 μm or less.

IPC Classes  ?

  • C25B 15/08 - Supplying or removing reactants or electrolytes; Regeneration of electrolytes
  • C25B 1/04 - Hydrogen or oxygen by electrolysis of water
  • C25B 1/23 - Carbon monoxide or syngas
  • C25B 3/26 - Reduction of carbon dioxide
  • C25B 9/23 - Cells comprising dimensionally-stable non-movable electrodes; Assemblies of constructional parts thereof with diaphragms comprising ion-exchange membranes in or on which electrode material is embedded

13.

ELECTRODE FOR ELECTROCHEMICAL REACTION DEVICE, MEMBRANE ELECTRODE ASSEMBLY, AND ELECTROCHEMICAL REACTION DEVICE

      
Application Number 18459490
Status Pending
Filing Date 2023-09-01
First Publication Date 2024-04-11
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Ono, Akihiko
  • Yoshinaga, Norihiro
  • Sugano, Yoshitsune

Abstract

An electrode for an electrochemical reaction device, includes: a substrate; and a stack provided on the substrate. The stack includes catalyst layers and gap layers, and each catalyst layer and each gap layer are alternately stacked. One of the gap layers has a first region and a second region, the first region having a first thickness, the second region having a first gap, and the first gap having a second thickness, and the second thickness is 3 times or more and 10 times or less the first thickness.

IPC Classes  ?

  • C25B 11/032 - Gas diffusion electrodes
  • C25B 1/04 - Hydrogen or oxygen by electrolysis of water
  • C25B 9/19 - Cells comprising dimensionally-stable non-movable electrodes; Assemblies of constructional parts thereof with diaphragms
  • C25B 11/054 - Electrodes comprising electrocatalysts supported on a carrier
  • C25B 11/065 - Carbon
  • C25B 11/081 - Electrodes formed of electrocatalysts on a substrate or carrier characterised by the electrocatalysts material consisting of a single catalytic element or catalytic compound the element being a noble metal

14.

MEMBRANE ELECTRODE ASSEMBLY, ELECTROCHEMICAL CELL, STACK AND ELECTROLYZER

      
Application Number 18459734
Status Pending
Filing Date 2023-09-01
First Publication Date 2024-04-11
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Fukazawa, Taishi
  • Nakano, Yoshihiko
  • Yoshinaga, Norihiro

Abstract

A membrane electrode assembly of an embodiment includes: a first electrode including a first diffusion layer, and a first catalyst layer; a second electrode for generating hydrogen, the second electrode including a second diffusion layer, a second catalyst layer including a porous catalyst layer including a porous precious metal or sheet-like precious metal, and a hydrophobic moisture management layer provided between the second catalyst layer and the second diffusion layer, the hydrophobic moisture management layer including carbon particles and carbon fibers, a weight of the carbon fibers being between 1 wt % and 20 wt % of a weight of the second diffusion layer; and an electrolyte membrane provided between the first electrode and the second electrode, the first catalyst layer being provided between the first diffusion layer and the electrolyte membrane, and the second catalyst layer being provided between the second diffusion layer and the electrolyte membrane.

IPC Classes  ?

  • C25B 11/032 - Gas diffusion electrodes
  • C25B 11/052 - Electrodes comprising one or more electrocatalytic coatings on a substrate

15.

ELECTRODE, MEMBRANE ELECTRODE ASSEMBLY, ELECTROCHEMICAL CELL, STACK, AND ELECTROLYZER

      
Application Number 18461693
Status Pending
Filing Date 2023-09-06
First Publication Date 2024-04-11
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Yoshinaga, Norihiro
  • Jung, Hyangmi
  • Fukazawa, Taishi
  • Nakano, Yoshihiko
  • Hirazawa, Hiroaki
  • Sugano, Yoshitsune
  • Kudo, Yuki
  • Ono, Akihiko

Abstract

An electrode according to an embodiment includes a support, and a catalyst layer including a sheet layer and a gap layer stacked, alternately on the support. The catalyst layer includes noble oxide and non-noble oxide. 4 [wt %] or more and 8 [wt %] or less of metal elements included in the catalyst layer is non-noble metal. An average thickness of the gap layer is 6 [nm] or more and 50 [nm] or less.

IPC Classes  ?

  • H01M 4/86 - Inert electrodes with catalytic activity, e.g. for fuel cells
  • H01M 8/1004 - Fuel cells with solid electrolytes characterised by membrane-electrode assemblies [MEA]

16.

POWER CONVERSION DEVICE AND CONTROL METHOD FOR POWER CONVERSION DEVICE

      
Application Number 18032777
Status Pending
Filing Date 2021-10-20
First Publication Date 2024-04-11
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Fujita, Tsunehito
  • Baba, Toshiyuki
  • Nozaki, Yuichiro
  • Suzuki, Hiroomi

Abstract

A power conversion device according to an embodiment includes: a voltage regulator circuit configured to regulate power from a power source to a desired voltage; an inverter configured to convert the power output from the voltage regulator circuit into an alternate current power; a resonant circuit having inductance and capacitance; a high frequency transformer configured to convert the alternate current power of the inverter; a rectifier configured to convert the alternate current power output from the high frequency transformer into a direct current power; a temperature detector configured to detect a temperature of the resonant circuit; and a controller configured to detect an anomalous resonant frequency when the temperature is equal to or higher than a predetermined temperature threshold to control an anomalous state.

IPC Classes  ?

  • H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection
  • H02M 1/36 - Means for starting or stopping converters
  • H02M 3/335 - Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

17.

POWER GENERATION FACILITY

      
Application Number 18354920
Status Pending
Filing Date 2023-07-19
First Publication Date 2024-04-11
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Miki, Hiromutsu
  • Shimizu, Keiko
  • Shiraishi, Hiroki
  • Iwata, Yoshihiro
  • Oota, Yukitoshi

Abstract

A power generation facility in an embodiment includes: a boiler; a high-pressure turbine to which steam generated in the boiler is introduced; a low-pressure turbine provided downstream of the high-pressure turbine; and a condenser that condenses steam discharged from the low-pressure turbine. The power generation facility further includes: a feed pipe that leads feedwater in the condenser to the boiler; a heat storage and steam generation device that has a heat storage function that uses surplus energy generated in an own system to store heat, and a steam generation function that has part of feedwater led by the feed pipe introduced thereinto and turns the feedwater into steam by the stored heat; and a steam supply pipe that supplies steam generated in the heat storage and steam generation device to an own system.

IPC Classes  ?

  • F01K 3/16 - Mutual arrangement of accumulator and heater
  • F01K 3/06 - Use of accumulators and specific engine types; Control thereof the engine being of extraction or non-condensing type
  • F01K 7/40 - Use of two or more feed-water heaters in series
  • F22D 1/32 - Feed-water heaters, e.g. preheaters arranged to be heated by steam, e.g. bled from turbines

18.

MEMBRANE ELECTRODE ASSEMBLY, ELECTROCHEMICAL CELL, STACK, ELECTROLYZER, AND MANUFACTURING METHOD OF MEMBRANE ELECTRODE ASSEMBLY

      
Application Number 18459630
Status Pending
Filing Date 2023-09-01
First Publication Date 2024-04-11
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Nakano, Yoshihiko
  • Yoshinaga, Norihiro

Abstract

A membrane electrode assembly according to an embodiment includes a first diffusion layer; a second diffusion layer; an electrolyte membrane provided between the first diffusion layer and the second diffusion layer; a first catalyst layer provided between the first diffusion layer and the electrolyte membrane; and a second catalyst layer provided between the second diffusion layer and the electrolyte membrane, wherein the first diffusion layer includes a first surface facing the first catalyst layer, and the first surface includes a chamfered portion, and a second surface provided on an opposing side of the first surface, and the second surface includes a protrusion protruding from the side of the first surface toward the side of the second surface.

IPC Classes  ?

  • C25B 9/19 - Cells comprising dimensionally-stable non-movable electrodes; Assemblies of constructional parts thereof with diaphragms
  • C25B 1/02 - Hydrogen or oxygen
  • C25B 11/032 - Gas diffusion electrodes
  • C25B 11/056 - Electrodes formed of electrocatalysts on a substrate or carrier characterised by the substrate or carrier material consisting of textile or non-woven fabric
  • C25B 11/063 - Valve metal, e.g. titanium
  • C25B 11/089 - Alloys

19.

ELECTROLYTIC DEVICE

      
Application Number 18178029
Status Pending
Filing Date 2023-03-03
First Publication Date 2024-04-04
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Ono, Akihiko
  • Kiyota, Yasuhiro
  • Mikoshiba, Satoshi
  • Kitagawa, Ryota

Abstract

An electrolytic device includes: a humidifier to humidify a cathode gas; a cathode discharge flow path through which a cathode fluid flows; an anode collector to separate an anode fluid into an anode discharge liquid and an anode exhaust gas; a first cooler to cool the anode exhaust gas to condense water vapor in the anode exhaust gas to produce a anode condensed water; a first flow path connecting the anode collector and an anode supply flow path, the first flow path through which the anode solution flows from the anode collector to the anode supply flow path; a second flow path through which the anode condensed water flows from the condensed water collector to the humidifier; and a first heat exchange structure to exchange heat between the anode solution through the first flow path and the anode condensed water through the second flow path.

IPC Classes  ?

  • C25B 15/08 - Supplying or removing reactants or electrolytes; Regeneration of electrolytes
  • C25B 1/04 - Hydrogen or oxygen by electrolysis of water
  • C25B 3/26 - Reduction of carbon dioxide
  • C25B 9/67 - Heating or cooling means

20.

SEMICONDUCTOR DEVICE

      
Application Number 18180657
Status Pending
Filing Date 2023-03-08
First Publication Date 2024-04-04
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Yasuzumi, Takenori
  • Hung, Hung

Abstract

According to one embodiment, a semiconductor device includes: a first nitride semiconductor layer provided on a substrate; a second nitride semiconductor layer provided on the first nitride semiconductor layer and having a band gap wider than that of the first nitride semiconductor layer; a source electrode and a drain electrode, being provided on the second nitride semiconductor layer separately from each other; a gate electrode provided on the second nitride semiconductor layer and arranged between the source electrode and the drain electrode; a first field plate electrode provided on the second nitride semiconductor layer, arranged between the gate electrode and the drain electrode, and electrically coupled to the source electrode; and a second field plate electrode provided on the first field plate electrode and formed to project toward the gate electrode.

IPC Classes  ?

  • H01L 29/40 - Electrodes
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT

21.

MAGNETIC DISK DRIVE AND METHOD OF SETTING A NOTCH FILTER OF THE DRIVE

      
Application Number 18184567
Status Pending
Filing Date 2023-03-15
First Publication Date 2024-04-04
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japan)
Inventor Matsuzawa, Takuji

Abstract

According to one embodiment, a magnetic disk drive includes a notch filter, a parameter storage unit and a computation unit, when the sampling period changes from a first sampling period to a second sampling period, the computation unit computes a damping ratio parameter related to the damping ratio in a second set of parameters at the second sampling period, based on a first absolute value at a first angular frequency of a first transfer function computed from a first set of parameters at the first sampling period and a second absolute value at the first angular frequency of a second transfer function computed from the first set of parameters at the second sampling period, and the notch filter is set with the second set of parameters at the second sampling period is computed.

IPC Classes  ?

  • G11B 19/20 - Driving; Starting; Stopping; Control thereof
  • G11B 5/596 - Disposition or mounting of heads relative to record carriers with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for track following on disks

22.

INSPECTION APPARATUS AND INSPECTION SYSTEM

      
Application Number 18357513
Status Pending
Filing Date 2023-07-24
First Publication Date 2024-04-04
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Yuminamochi, Mitsunori
  • Matsuzaki, Akihiro
  • Saito, Masaoki
  • Katayama, Hitoshi
  • Sato, Fumio
  • Nozaki, Dai

Abstract

An inspection apparatus of an embodiment includes a rotor image-pickup unit for picking up an image of a rotor using a rotor image-pickup device in the air gap between the rotor and a stator. The rotor image-pickup device includes: a carriage casing; a camera; an image-pickup position changing part; and an image-pickup direction changing part. The camera is installed in the carriage casing, and picks up an image of a ventilation hole of the rotor in the air gap. The image-pickup position changing part is installed in the carriage casing, and changes an image-pickup position of the camera by moving the carriage casing in a circumferential direction of the rotor in the air gap. The image-pickup direction changing part is installed in the carriage casing, and changes an image-pickup direction of the camera to an inclined angle to a radial direction of the rotor in the air gap.

IPC Classes  ?

  • H04N 23/50 - Constructional details
  • H04N 23/66 - Remote control of cameras or camera parts, e.g. by remote control devices
  • H04N 23/695 - Control of camera direction for changing a field of view, e.g. pan, tilt or based on tracking of objects

23.

SEMICONDUCTOR SWITCH

      
Application Number 18456031
Status Pending
Filing Date 2023-08-25
First Publication Date 2024-04-04
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Tsunetsugu, Yukio

Abstract

According to the present embodiment, a semiconductor switch includes a switching transistor, a transmission element, a receiving element, and a power supply circuit. The switching transistor is connected between a pair of output terminals. An input signal is input to the transmission element. The receiving element is configured to generate a first current based on input of an input signal to the transmission element, wherein the receiving element is isolated from the transmission element. The power supply circuit is configured to supply a power supply current to a control electrode of the switching transistor in response to generation of the first current.

IPC Classes  ?

  • H03K 17/082 - Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit

24.

ELECTRODE FOR ELECTROCHEMICAL REACTION DEVICE, MEMBRANE ELECTRODE ASSEMBLY, AND ELECTROCHEMICAL REACTION DEVICE

      
Application Number 18461112
Status Pending
Filing Date 2023-09-05
First Publication Date 2024-04-04
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Sugano, Yoshitsune
  • Ono, Akihiko
  • Yoshinaga, Norihiro

Abstract

An electrode for electrochemical reaction device of an embodiment includes: a substrate; and a catalyst lamination provided on the substrate, and having a plurality of catalyst layers, and void layers respectively arranged between the plurality of catalyst layers adjacent to each other. The plurality of catalyst layers include a first catalyst layer arranged at a position close to the substrate and having a first thickness, and a second catalyst layer arranged at a position separated from the substrate and having a second thickness that is smaller than the first thickness.

IPC Classes  ?

  • C25B 11/053 - Electrodes comprising one or more electrocatalytic coatings on a substrate characterised by multilayer electrocatalytic coatings

25.

ELECTROSPINNING APPARATUS AND ELECTROSPINNING METHOD

      
Application Number 18462649
Status Pending
Filing Date 2023-09-07
First Publication Date 2024-04-04
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Sugimoto, Kanta
  • Ooshiro, Kenichi
  • Tokuno, Yoko
  • Uchida, Kenya

Abstract

In an embodiment, an electrospinning apparatus includes a transfer unit, a spinning head and an air ejection unit. In the transfer unit, a transfer target is transferred along a transfer direction, and a spinning head is capable of ejecting a material liquid toward the transfer unit from a first direction, which intersects the transfer direction. The air ejection unit forms an air flow that flows across the transfer unit toward an area located on an opposite side across the transfer unit in a second direction, which intersects both the transfer direction and the first direction, by ejecting air against the transfer unit from one side of the second direction.

IPC Classes  ?

  • D01D 5/00 - Formation of filaments, threads, or the like

26.

ROTARY ELECTRIC MACHINE, MOTOR, ROTOR, AND PERMANENT MAGNET MOTOR

      
Application Number 18479658
Status Pending
Filing Date 2023-10-02
First Publication Date 2024-04-04
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Kinoshita, Eri
  • Hadame, Yasuaki
  • Hagiwara, Masaya
  • Matsuoka, Kei

Abstract

According to one embodiment, a rotary electric machine includes a rotor and a stator. The rotor includes a rotary shaft, a first core, a permanent magnet, and an intermediate member. The rotary shaft extends in a first direction. The first core is provided around the rotary shaft in a first plane perpendicular to the first direction. The permanent magnet is provided around the first core in the first plane. The intermediate member is provided between the rotary shaft and the first core. The intermediate member includes a first portion containing a carbon fiber, and a second portion aligned with the first portion in the first direction and containing a metal. The stator is provided around the rotor in the first plane.

IPC Classes  ?

  • H02K 1/276 - Magnets embedded in the magnetic core, e.g. interior permanent magnets [IPM]
  • H02K 1/02 - DYNAMO-ELECTRIC MACHINES - Details of the magnetic circuit characterised by the magnetic material

27.

SENSOR DEVICE

      
Application Number 18180943
Status Pending
Filing Date 2023-03-09
First Publication Date 2024-04-04
Owner Kabushiki Kaisha Toshiba (Japan)
Inventor
  • Saito, Tatsuro
  • Yamada, Ko
  • Sugizaki, Yoshiaki
  • Tabata, Miyuki
  • Miyahara, Yuji

Abstract

According to one embodiment, a sensor device is a sensor device that detects an acetyl compound in a sample and includes a storage unit that stores a sample, a sensor section that comes into contact with the sample in the storage unit and detects a change in ion density, and an amino compound fixed to the sensor section.

IPC Classes  ?

  • G01N 27/407 - Cells and probes with solid electrolytes for investigating or analysing gases
  • B01L 3/00 - Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers

28.

CHEMICAL SENSOR USING STRAND EXCHANGE REACTION

      
Application Number 18184086
Status Pending
Filing Date 2023-03-15
First Publication Date 2024-04-04
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Sugizaki, Yoshiaki
  • Miki, Hiroko

Abstract

According to one embodiment, a chemical sensor including a nucleic acid probe for capturing a target substance, a sensor element that has a surface on which the nucleic acid probe is immobilized, and a liquid film that covers the sensor element is provided.

IPC Classes  ?

  • C12Q 1/6825 - Nucleic acid detection involving sensors
  • C12Q 1/6876 - Nucleic acid products used in the analysis of nucleic acids, e.g. primers or probes

29.

MAGNETIC DISK DEVICE AND HEAD CONTROL METHOD

      
Application Number 18184237
Status Pending
Filing Date 2023-03-15
First Publication Date 2024-04-04
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Hara, Takeyori

Abstract

According to one embodiment, a magnetic disk device comprises a feedforward control unit, which includes a plant model processing unit including a plurality of submodel processing units. Each of the submodel processing units generates a submodel output value that is an output value for an input value to be input, and the feedforward control unit generates the output value based on a plurality of the submodel output values.

IPC Classes  ?

30.

AMMONIA MANUFACTURING APPARATUS AND AMMONIA MANUFACTURING METHOD

      
Application Number 18184881
Status Pending
Filing Date 2023-03-16
First Publication Date 2024-04-04
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • The University of Tokyo (Japan)
Inventor
  • Tamura, Jun
  • Kitagawa, Ryota
  • Mizuguchi, Koji
  • Sugano, Yoshitsune
  • Nishibayashi, Yoshiaki
  • Arashiba, Kazuya

Abstract

An ammonia manufacturing apparatus of an embodiment includes: an electrochemical reaction cell including: a first reaction tank in which a reduction electrode is arranged and gaseous nitrogen is supplied; a second reaction tank in which an oxidation electrode is arranged and an electrolytic solution containing water or water vapor is supplied; and a diaphragm provided between the first reaction tank and the second reaction tank. In the ammonia manufacturing apparatus of the embodiment, the reduction electrode includes a reduction catalyst that reduces nitrogen to produce ammonia, a porous carbon material that supports the reduction catalyst, and an organic polymer material that binds the porous carbon material. The porous carbon material has pores with a BET average pore size of 1 nm or more and 15 nm or less.

IPC Classes  ?

  • C25B 1/27 - Ammonia
  • B01J 23/28 - Molybdenum
  • B01J 31/18 - Catalysts comprising hydrides, coordination complexes or organic compounds containing coordination complexes containing nitrogen, phosphorus, arsenic or antimony
  • C01C 1/04 - Preparation of ammonia by synthesis
  • C25B 1/50 - Processes
  • C25B 9/19 - Cells comprising dimensionally-stable non-movable electrodes; Assemblies of constructional parts thereof with diaphragms
  • C25B 9/70 - Assemblies comprising two or more cells
  • C25B 11/031 - Porous electrodes

31.

WATER ELECTROLYSIS DEVICE AND METHOD OF CONTROLLING WATER ELECTROLYSIS DEVICE

      
Application Number 18460866
Status Pending
Filing Date 2023-09-05
First Publication Date 2024-04-04
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Ono, Akihiko
  • Yoshinaga, Norihiro
  • Sugano, Yoshitsune

Abstract

A water electrolysis device includes: an anode; a cathode; an electrolyte membrane between the anode and the cathode; a first circulation flow path connecting a anode supply flow path and a anode discharge flow path; a second circulation flow path connected in parallel with the first circulation flow path; an ion filter in a middle of the second circulation flow path and to remove metal ions in the anode solution; a metal supply source to supply metal ions into the anode solution; a first valve in a middle of the first circulation flow path; a second valve in a middle of the second circulation flow path; a third valve in a middle of the metal supply flow path; a sensor to measure concentration of metal ions in the anode solution; and a controller to control opening and closing of each valve, according to the measured concentration of the metal ions.

IPC Classes  ?

  • C25B 1/04 - Hydrogen or oxygen by electrolysis of water
  • C25B 9/21 - Cells comprising dimensionally-stable non-movable electrodes; Assemblies of constructional parts thereof with diaphragms two or more diaphragms
  • C25B 11/081 - Electrodes formed of electrocatalysts on a substrate or carrier characterised by the electrocatalysts material consisting of a single catalytic element or catalytic compound the element being a noble metal
  • C25B 15/029 - Concentration
  • C25B 15/08 - Supplying or removing reactants or electrolytes; Regeneration of electrolytes

32.

ELECTRODE, MEMBRANE ELECTRODE ASSEMBLY, ELECTROCHEMICAL CELL, STACK, AND ELECTROLYZER

      
Application Number 18461657
Status Pending
Filing Date 2023-09-06
First Publication Date 2024-04-04
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Yoshinaga, Norihiro
  • Nakano, Yoshihiko
  • Fukazawa, Taishi
  • Kanai, Yuta
  • Sugano, Yoshitsune
  • Ono, Akihiko

Abstract

An electrode according to an embodiment includes a support, an intermediate layer including carbon particles and resin on the support, and a catalyst layer on the intermediate layer. A thickness of the intermediate layer is 70 [μm] or more and 300 [μm] or less.

IPC Classes  ?

  • C25B 11/069 - Electrodes formed of electrocatalysts on a substrate or carrier characterised by the substrate or carrier material consisting of two or more compounds
  • C25B 1/02 - Hydrogen or oxygen
  • C25B 9/19 - Cells comprising dimensionally-stable non-movable electrodes; Assemblies of constructional parts thereof with diaphragms
  • C25B 11/032 - Gas diffusion electrodes
  • C25B 11/052 - Electrodes comprising one or more electrocatalytic coatings on a substrate

33.

ELECTRODE, MEMBRANE ELECTRODE ASSEMBLY, ELECTROCHEMICAL CELL, STACK, AND ELECTROLYZER

      
Application Number 18461987
Status Pending
Filing Date 2023-09-06
First Publication Date 2024-04-04
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Jung, Hyangmi
  • Fukazawa, Taishi
  • Yoshinaga, Norihiro
  • Ono, Akihiko
  • Sugano, Yoshitsune
  • Yamagiwa, Masakazu
  • Kudo, Yuki

Abstract

An electrode according to an embodiment includes a support and a catalyst layer including a sheet layer and a gap layer stacked alternately. Cracks or/and holes exist in the catalyst layer.

IPC Classes  ?

  • C25B 11/056 - Electrodes formed of electrocatalysts on a substrate or carrier characterised by the substrate or carrier material consisting of textile or non-woven fabric
  • C25B 9/19 - Cells comprising dimensionally-stable non-movable electrodes; Assemblies of constructional parts thereof with diaphragms
  • C25B 11/063 - Valve metal, e.g. titanium
  • C25B 11/081 - Electrodes formed of electrocatalysts on a substrate or carrier characterised by the electrocatalysts material consisting of a single catalytic element or catalytic compound the element being a noble metal

34.

SUPPORT, ELECTRODE, MEMBRANE ELECTRODE ASSEMBLY, ELECTROCHEMICAL CELL, STACK, AND ELECTROLYZER

      
Application Number 18462843
Status Pending
Filing Date 2023-09-07
First Publication Date 2024-04-04
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Yamagiwa, Masakazu
  • Yoshinaga, Norihiro
  • Sugano, Yoshitsune

Abstract

A support according to an embodiment includes fibers. A first arithmetic mean roughness of the fibers observed from in-plane direction of the support is 7 [μm] or more and 40 [μm] or less. A first sampling length of the first arithmetic mean roughness is one fifth of an average diameter of the fibers observed from the in-plane direction of the support.

IPC Classes  ?

35.

SURFACE EMITTING QUANTUM CASCADE LASER AND CONTROL METHOD THEREOF

      
Application Number 18479706
Status Pending
Filing Date 2023-10-02
First Publication Date 2024-04-04
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Hashimoto, Rei
  • Saito, Shinji
  • Kakuno, Tsutomu
  • Kaneko, Kei

Abstract

According to one embodiment, a surface emitting quantum cascade laser includes: a first surface that emits laser light; a second surface opposite to the first surface; an active layer provided between the first surface and the second surface; a photonic crystal provided between the active layer and the first surface or between the active layer and the second surface, the photonic crystal having a predetermined periodicity; a first electrode located on the first surface outside a region where the laser light is emitted; a second electrode provided on the second surface, the photonic crystal being located between the first surface and the second electrode; and a third electrode provided on the second surface and separated from the second electrode, the active layer extending between the first surface and the second electrode and between the first surface and the third electrode.

IPC Classes  ?

  • H01S 5/18 - Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
  • H01S 5/065 - Mode locking; Mode suppression; Mode selection
  • H01S 5/34 - Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers

36.

TEMPORARY SUBSTRATE ADHESIVE AND SUBSTRATE PROCESSING METHOD

      
Application Number 18522376
Status Pending
Filing Date 2023-11-29
First Publication Date 2024-04-04
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Hirakawa, Masaaki
  • Tateyama, Kazushi

Abstract

A temporary substrate adhesive according to an embodiment includes a silane coupling agent and a photobase generator, but does not include a resin.

IPC Classes  ?

  • C09J 4/00 - Adhesives based on organic non-macromolecular compounds having at least one polymerisable carbon-to-carbon unsaturated bond
  • B29C 65/02 - Joining of preformed parts; Apparatus therefor by heating, with or without pressure
  • B29C 65/48 - Joining of preformed parts; Apparatus therefor using adhesives

37.

INSPECTION APPARATUS AND INSPECTION SYSTEM

      
Document Number 03207351
Status Pending
Filing Date 2023-07-24
Open to Public Date 2024-03-30
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Yuminamochi, Mitsunori
  • Matsuzaki, Akihiro
  • Saito, Masaoki
  • Katayama, Hitoshi
  • Sato, Fumio
  • Nozaki, Dai

Abstract

An inspection apparatus of an embodiment includes a rotor image-pickup unit for picking up an image of a rotor using a rotor image-pickup device in the air gap between the rotor and a stator. The rotor image-pickup device includes: a carriage casing; a camera; an image-pickup position changing part; and an image-pickup direction changing part. The camera is installed in the carriage casing, and picks up an image of a ventilation hole of the rotor in the air gap. The image-pickup position changing part is installed in the carriage casing, and changes an image-pickup position of the camera by moving the carriage casing in a circumferential direction of the rotor in the air gap. The image-pickup direction changing part is installed in the carriage casing, and changes an image-pickup direction of the camera to an inclined angle to a radial direction of the rotor in the air gap.

38.

SEMICONDUCTOR DEVICE

      
Application Number 18116680
Status Pending
Filing Date 2023-03-02
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Imai, Katsuyuki
  • Ando, Daisuke
  • Shibata, Toyokazu
  • Kaji, Keiko

Abstract

According to one embodiment, a semiconductor device includes: a first frame, a second frame spaced apart from the first frame in a first direction, and a first joint terminal provided above a second chip provided on the second frame. The first frame includes a first terminal portion extending toward the second frame. The first joint terminal includes a second terminal portion extending toward the first frame. The second terminal portion includes a plane portion, a first projecting portion and a second projecting portion each branching out from the plane portion. An end portion of the first projecting portion and an end portion of the second projecting portion are respectively joined on the first terminal portion. The first projecting portion is different in a length in a first direction from the second projecting portion.

IPC Classes  ?

  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices

39.

INRUSH CURRENT SUPPRESSION CIRCUIT

      
Application Number 18119241
Status Pending
Filing Date 2023-03-08
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Sawahara, Yuichi
  • Majima, Hideaki

Abstract

According to one embodiment, an inrush current suppression circuit includes a normally-on transistor, a normally-off transistor connected in series with the normally-on transistor, a first drive circuit that drives the normally-on transistor, a second drive circuit that drives the normally-off transistor, a diode connected between an output of the first drive circuit and an output terminal of the normally-off transistor, a first power source smoothing circuit that performs smoothing of a source current to be supplied to the first drive circuit and the second drive circuit, and a switch circuit that switches connection/disconnection of a current path passing through the first power source smoothing circuit.

IPC Classes  ?

  • H03K 17/0812 - Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit
  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
  • H03K 17/74 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of diodes

40.

SENSE AMPLIFIER CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE

      
Application Number 18119690
Status Pending
Filing Date 2023-03-09
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Hirabayashi, Osamu

Abstract

According to one embodiment, a complementary and latching sense amplifier circuit includes a sense amplifier main unit that receives an input signal input from each of a pair of input terminals to a corresponding gate terminal. The sense amplifier circuit includes: separation gates configured to electrically disconnect the input terminals and the corresponding respective gate terminals from each other before the sense amplifier main unit is effectively put into an enabled state; and capacitive elements having a same capacitance, each of the capacitive elements being connected between the corresponding gate terminal and a power supply.

IPC Classes  ?

  • G11C 11/4091 - Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
  • G11C 11/4094 - Bit-line management or control circuits
  • G11C 11/4099 - Dummy cell treatment; Reference voltage generators

41.

MAGNETIC DISK DEVICE AND CONTROL METHOD

      
Application Number 18169629
Status Pending
Filing Date 2023-02-15
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Sudo, Daisuke

Abstract

According to one embodiment, a magnetic disk device includes a magnetic disk, a motor, a magnetic head, and a controller. A first area, and a second area located on an inner diameter side of the first area are provided in the magnetic disk. The motor rotates the magnetic disk. The controller receives a write command. In a case where a first position that is a position designated as a write destination of data by the write command is included in the first area, the controller writes the data to the first position by the magnetic head while rotating the magnetic disk at a rotational speed of a first value. In a case where the first position is included in the second area, the controller writes the data to the first position by the magnetic head while rotating the magnetic disk at a rotational speed of a second value larger than the first value.

IPC Classes  ?

  • G11B 5/012 - Recording on, or reproducing or erasing from, magnetic disks
  • G11B 19/28 - Speed controlling, regulating or indicating
  • G11B 20/10 - Digital recording or reproducing

42.

ACTIVE MATERIAL, ELECTRODE, SECONDARY BATTERY, BATTERY PACK, AND VEHICLE

      
Application Number 18174909
Status Pending
Filing Date 2023-02-27
First Publication Date 2024-03-28
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Harada, Yasuhiro
  • Fukaya, Taro
  • Yamashita, Yasunobu
  • Ueda, Kakuya
  • Murata, Yoshiaki
  • Takami, Norio

Abstract

According to one embodiment, provided is an active material including a niobium titanium-containing oxide phase and a carbon coating layer. The niobium titanium-containing oxide phase contains a niobium titanium-containing oxide having a monoclinic structure and Na, and a Na content therein is 0 ppm or more and 100 ppm or less. The carbon coating layer coats at least a part of the niobium titanium-containing oxide phase, and contains 0.001% or more of carboxyl group.

IPC Classes  ?

  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • C01G 33/00 - Compounds of niobium
  • H01M 4/131 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
  • H01M 4/133 - Electrodes based on carbonaceous material, e.g. graphite-intercalation compounds or CFx
  • H01M 4/485 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of mixed oxides or hydroxides for inserting or intercalating light metals, e.g. LiTi2O4 or LiTi2OxFy
  • H01M 4/587 - Carbonaceous material, e.g. graphite-intercalation compounds or CFx for inserting or intercalating light metals
  • H01M 50/574 - Devices or arrangements for the interruption of current

43.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18176987
Status Pending
Filing Date 2023-03-01
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Kobayashi, Hitoshi
  • Onomura, Masaaki
  • Sugiyama, Toru
  • Yoshioka, Akira
  • Hung, Hung
  • Sekiguchi, Hideki
  • Ohno, Tetsuya
  • Isobe, Yasuhiro

Abstract

A semiconductor device of an embodiment includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first electrode film provided on the first insulating film, a second electrode film provided on the first electrode film, and a first field plate electrode provided on the second electrode film. A lower end of the first field plate electrode is located on a second surface of the first electrode film, the second surface being in contact with the second electrode film, rather than a first surface of the first electrode film, the first surface being in contact with the first insulating film.

IPC Classes  ?

  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 29/40 - Electrodes
  • H01L 29/66 - Types of semiconductor device

44.

SEMICONDUCTOR DEVICE

      
Application Number 18178445
Status Pending
Filing Date 2023-03-03
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Nakamura, Mitsutoshi
  • Nagaoka, Masami
  • Nishihori, Kazuya
  • Masuda, Keita

Abstract

A semiconductor device includes an insulating layer, a semiconductor layer and a control electrode. The semiconductor layer is provided on the insulating layer and includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type and a third semiconductor region of a second conductivity type. The third semiconductor region is located between the first semiconductor region and the second semiconductor region. The first to third semiconductor regions are arranged in a first direction along an interface between the insulating layer and the semiconductor layer. The control electrode is provided on the semiconductor layer and includes first to third control parts arranged in the first direction. The first control part is located between the second control part and the third control part. The third semiconductor region is positioned between the insulating layer and the first control part.

IPC Classes  ?

  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

45.

ISOLATOR

      
Application Number 18178448
Status Pending
Filing Date 2023-03-03
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Yamada, Masaki

Abstract

An isolator includes a substrate; a first insulating film on the substrate; a second insulating film on the first insulating film, a third insulating film on the second insulating film, a first interconnect in the second insulating film, and first and second coils. The first interconnect has a thickness equal to a film thickness of the second insulating film. The first coil extends in the first and second insulating films. The first coil has a length in the extending direction greater than the thickness of the first interconnect. The third insulating film is provided on the second insulating film, and covers the first interconnect and the first coil. The second coil is provided on the third insulating film, and faces the first coil via the third insulating film.

IPC Classes  ?

  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01F 27/28 - Coils; Windings; Conductive connections
  • H01L 21/762 - Dielectric regions
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device

46.

DISK DEVICE

      
Application Number 18180013
Status Pending
Filing Date 2023-03-07
First Publication Date 2024-03-28
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japan)
Inventor
  • Ogawa, Takuya
  • Tsukahara, Wataru

Abstract

According to one embodiment, in a disk device, a controller adjusts a correction value of a radial position of servo track according to a ratio between amplitude of a correction value spectrum of a radial position of the servo track at a first circumferential position and at a second circumferential position when positioning control of the head to a target data track is performed on a basis of servo information read from the servo track. At the first circumferential position, a relative speed of a change in the radial position of the servo track with respect to a radial position of the target data track becomes a first speed. At the second circumferential position, a relative speed of a change in the radial position of the servo track with respect to the radial position of the target data track becomes a second speed.

IPC Classes  ?

  • G11B 5/596 - Disposition or mounting of heads relative to record carriers with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for track following on disks

47.

MAGNETIC DISK DEVICE

      
Application Number 18180422
Status Pending
Filing Date 2023-03-08
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Koizumi, Gaku

Abstract

According to one embodiment, a magnetic disk device comprises a magnetic head including a main pole, an auxiliary magnetic pole, side shields disposed on both sides of the main pole in a track width direction with a side gap therebetween, a high frequency oscillation element disposed in the write gap between the main pole and the auxiliary magnetic pole, and a magnetic flux control element disposed in the side gap between the main pole and the side shield to control oscillation frequency of the high frequency oscillation element, an oscillation element controller configured to control bias current supplied to the high frequency oscillation element, and a magnetic flux control element controller configured to control bias current supplied to the magnetic flux control element.

IPC Classes  ?

  • G11B 5/35 - Structure or manufacture of flux-sensitive heads having vibrating elements

48.

SEMICONDUCTOR DEVICE

      
Application Number 18180486
Status Pending
Filing Date 2023-03-08
First Publication Date 2024-03-28
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japan)
Inventor
  • Tsai, Yuning
  • Takahashi, Yoshiko
  • Inoue, Daisuke

Abstract

A semiconductor device includes: a semiconductor chip having a first surface, a second surface, a first electrode provided on the first surface, a second electrode provided on the second surface, and a third electrode provided on the second surface; a first conductor including a fourth conductor and a fifth conductor; a conductive first connector provided between the first conductor and the first electrode; a second conductor including a sixth conductor and a seventh conductor; a conductive second connector provided between the second electrode and the sixth conductor; a third conductor including an eighth conductor, an intermediate conductor, and a ninth conductor, the intermediate conductor being provided between the eighth conductor and the ninth conductor, the eighth conductor being provided between the semiconductor chip and the intermediate conductor, and the intermediate conductor having a through hole; and a conductive third connector.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched

49.

SUPERCONDUCTING LAYER JOINT STRUCTURE, SUPERCONDUCTING WIRE, SUPERCONDUCTING COIL, AND SUPERCONDUCTING DEVICE

      
Application Number 18180576
Status Pending
Filing Date 2023-03-08
First Publication Date 2024-03-28
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Eguchi, Tomoko
  • Hattori, Yasushi
  • Hagiwara, Masaya
  • Albessard, Keiko

Abstract

A superconducting layer joint structure of embodiments includes: a first superconducting layer; a second superconducting layer; and a joint layer provided between the first superconducting layer and the second superconducting layer and containing a plurality of crystal particles containing a rare earth element (RE), barium (Ba), copper (Cu), and oxygen (O). The plurality of crystal particles includes at least one first particle. The at least one first particle has a first inner region and a first outer region. The first inner region is disposed inside the first superconducting layer. The first outer region is disposed outside the first superconducting layer.

IPC Classes  ?

  • H10N 60/01 - Manufacture or treatment
  • H01F 6/06 - Coils, e.g. winding, insulating, terminating or casing arrangements therefor
  • H10N 60/85 - Superconducting active materials

50.

RADAR SYSTEM AND INSPECTION METHOD

      
Application Number 18184100
Status Pending
Filing Date 2023-03-15
First Publication Date 2024-03-28
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor Tsujimura, Kazuhiro

Abstract

According to one embodiment, a radar system for inspecting a target, includes transmit antennas, receive antennas, and a processing unit. The processing unit is configured to select at least one transmit antenna among the transmit antennas and at least one receive antennas among the receive antennas, based on a shape of the target, make the at least one transmit antenna transmit an electromagnetic wave, and make the at least one receive antenna receive the electromagnetic wave.

IPC Classes  ?

  • G01S 13/86 - Combinations of radar systems with non-radar systems, e.g. sonar, direction finder
  • G01S 7/35 - RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES - Details of systems according to groups , , of systems according to group - Details of non-pulse systems
  • G01S 7/40 - Means for monitoring or calibrating

51.

LIGHT WATER REACTOR FUEL ASSEMBLY, LIGHT WATER REACTOR CORE AND MOX FUEL ASSEMBLY PRODUCTION METHOD

      
Application Number 18219216
Status Pending
Filing Date 2023-07-07
First Publication Date 2024-03-28
Owner Kabushiki Kaisha Toshiba (Japan)
Inventor
  • Hiraiwa, Kouji
  • Kimura, Rei
  • Sakurai, Shungo
  • Aizawa, Rie
  • Yanase, Goro
  • Kawamura, Shinichiro

Abstract

A method of producing a light water reactor fuel assembly may include: setting conditions at least concerning an operation cycle period and burnup; setting an initial enrichment of enriched uranium; calculating excess reactivity of a light water reactor core where light water reactor fuel assemblies including the enriched uranium are burned until an end stage of a final operation cycle; determining whether a condition where excess reactivity at an end of a first operation cycle in the burnup calculation step is close to a predetermined positive value is true or not; and returning to the setting of the initial enrichment, when it is determined at the determining that the situation is not true, or deciding an enrichment of the enriched uranium when it is determined that the situation is true.

IPC Classes  ?

  • G21C 3/328 - Relative disposition of the elements in the bundle lattice
  • G21C 3/326 - Bundles of parallel pin-, rod-, or tube-shaped fuel elements comprising fuel elements of different composition; Comprising, in addition to the fuel elements, other pin-, rod-, or tube-shaped elements, e.g. control rods, grid support rods, fertile rods, poison rods or dummy rods
  • G21C 3/62 - Ceramic fuel
  • G21C 21/02 - Manufacture of fuel elements or breeder elements contained in non-active casings

52.

SEMICONDUCTOR DEVICE

      
Application Number 18243290
Status Pending
Filing Date 2023-09-07
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Kawashiro, Fumiyoshi

Abstract

According to one embodiment, there is provided a semiconductor device including a chip, a drain electrode arranged on a first surface of the chip, a source electrode arranged on a second surface provided on a back side of the first surface of the chip and having a front surface on a device bottom surface, a gate electrode having a front surface on the device bottom surface, and a wire connecting a first region of the gate electrode to a second region on the second surface of the chip.

IPC Classes  ?

  • H01L 23/495 - Lead-frames
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices

53.

ISOLATOR

      
Application Number 18525584
Status Pending
Filing Date 2023-11-30
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Ootsuka, Kenichi
  • Ootsuka, Mari

Abstract

According to one embodiment, an isolator includes a first electrode, a second electrode, a conductive body, and a first insulating layer. The second electrode is provided on the first electrode and separated from the first electrode. The conductive body is provided around the first and second electrodes along a first plane perpendicular to a first direction. The first direction is from the first electrode toward the second electrode. The first insulating layer is provided on the second electrode. The first insulating layer includes silicon, carbon, and nitrogen.

IPC Classes  ?

54.

COMMUNICATION RELAY SYSTEM AND RADIO DEVICE

      
Application Number 18534820
Status Pending
Filing Date 2023-12-11
First Publication Date 2024-03-28
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • Toshiba Infrastructure Systems & Solutions Corporation (Japan)
Inventor Doi, Toshinori

Abstract

A communication relay system of an embodiment includes a master unit capable of transmitting/receiving a signal to/from a base station of a mobile communication system, and a plurality of remote units transmitting/receiving a signal to/from the master unit and performing radio communication with a mobile station of the mobile communication system. The master unit includes a detector, a determiner, and an allocator. The detector detects that the mobile station is located at a position where wireless communication with the plurality of remote units is possible. The determiner determines to which of the plurality of remote units a communication resource for performing radio communication with the mobile station located at a position where radio communication is possible is to be allocated. The allocator allocates a communication resource to the remote unit according to the determination result of the determiner.

IPC Classes  ?

  • H04W 72/51 - Allocation or scheduling criteria for wireless resources based on terminal or device properties
  • H04W 16/28 - Cell structures using beam steering
  • H04W 72/044 - Wireless resource allocation based on the type of the allocated resource

55.

PROTECTION CIRCUIT AND SEMICONDUCTOR DEVICE

      
Application Number 18111472
Status Pending
Filing Date 2023-02-17
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Watanabe, Kentaro

Abstract

In general, according to one embodiment, protection circuit includes first to third power supply lines, a first resistor, a first capacitor, a first transistor, and first to third inverters. The first resistor is coupled between the first power supply line and a first node. The first capacitor is coupled between the first node and the third power supply line. The first inverter includes a first power supply end, a second power supply end, and an input end. The first power supply end of the first inverter is coupled to the second power supply line. The second power supply end of the first inverter is coupled to the third power supply line. The input end of the first inverter is coupled to the first node.

IPC Classes  ?

  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage

56.

SEMICONDUCTOR DEVICE

      
Application Number 18111492
Status Pending
Filing Date 2023-02-17
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Yonehara, Naoya
  • Toda, Shuji

Abstract

According to one embodiment, semiconductor device includes a first terminal, a second terminal, a first transistor, a second transistor, a third transistor, a fourth transistor, and a control circuit. The control circuit is configured to control the first transistor, the second transistor, the third transistor, and the fourth transistor. The control circuit is configured to, when supply of the first voltage to the third node is stopped, turn the second transistor from an off state to an on state, turn the third transistor and the fourth transistor from an on state to an off state, and after a first period passes, turn the first transistor from an off state to an on state.

IPC Classes  ?

  • H03K 17/0812 - Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit
  • H03K 17/16 - Modifications for eliminating interference voltages or currents

57.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 18113519
Status Pending
Filing Date 2023-02-23
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Motai, Takako
  • Iwakaji, Yoko
  • Fuse, Kaori
  • Itokazu, Hiroko
  • Kawamura, Keiko

Abstract

A semiconductor device according to an embodiment includes a semiconductor substrate, a cell region, and a termination region. The termination region surrounds the cell region and includes a plurality of first diffusion layers containing a first conductivity type impurity. In a cross-section of the termination region in a first direction perpendicular to the first face, at least one of the plurality of first diffusion layers includes a first region extending in the first direction from the first face toward a second face of the semiconductor substrate, and a second region extending in a second direction orthogonal to the first direction from the first region. The concentration of the first conductivity type impurity contained in the second region is lower than the concentration of the first conductivity type impurity contained in the first region.

IPC Classes  ?

  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/40 - Electrodes
  • H01L 29/66 - Types of semiconductor device

58.

SEMICONDUCTOR DEVICE

      
Application Number 18117541
Status Pending
Filing Date 2023-03-06
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Miyake, Eitaro
  • Kawashiro, Fumiyoshi

Abstract

According to one embodiment, there is provided a semiconductor device including a chip, and a gate electrode connected to a gate electrode pad provided on the chip. The gate electrode includes an external exposed portion having an external exposed surface that is flush with an external exposed surface of a sealing resin, and a gate electrode pad connection portion continuous with the external exposed portion and connected to the gate electrode pad, the gate electrode pad connection portion including a portion sandwiched between the gate electrode pad and a part of the sealing resin.

IPC Classes  ?

  • H01L 23/495 - Lead-frames
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

59.

POWER SUPPLY CIRCUIT

      
Application Number 18118729
Status Pending
Filing Date 2023-03-07
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Teh, Chen Kong

Abstract

A power supply circuit of an embodiment includes a first transistor including a source connected to an input terminal, and a gate connected to a first node; a second transistor including a drain connected to a drain of the first transistor, and a source connected to an output terminal; a third transistor including a source connected to the input terminal, a drain connected to the first node, and a gate connected to a second node; and a Zener diode including an anode connected to the input terminal, and a cathode connected to the second node.

IPC Classes  ?

  • H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters

60.

MAGNETIC DISK DEVICE AND METHOD

      
Application Number 18119254
Status Pending
Filing Date 2023-03-08
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Suzuki, Sho
  • Kawabe, Takayuki
  • Hara, Takeyori
  • Tagami, Naoki

Abstract

A controller of a magnetic disk device obtains, for each of a plurality of first position sets, a first distribution that is a radial distribution of differences between a target orbit of the magnetic head and an actual position of the magnetic head while correcting a disturbance synchronized with rotation of the magnetic disk by using correction amounts at a plurality of positions included in one of the plurality of first position sets. The controller performs weighting the first distribution according to a position in the radial direction and calculating an evaluation value based on the weighted first distribution for each of the plurality of first position sets. The controller selects a second position set from the plurality of first position sets based on the evaluation value. The controller records correction amounts at a plurality of positions included in the second position set by the magnetic head.

IPC Classes  ?

  • G11B 5/596 - Disposition or mounting of heads relative to record carriers with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for track following on disks

61.

METHOD OF CALCULATING THREE-DIMENSIONAL SHAPE INFORMATION OF OBJECT SURFACE, OPTICAL SYSTEM, NON-TRANSITORY STORAGE MEDIUM, AND PROCESSING APPARATUS FOR OPTICAL SYSTEM

      
Application Number 18175636
Status Pending
Filing Date 2023-02-28
First Publication Date 2024-03-28
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor Ohno, Hiroshi

Abstract

According to an embodiment, a method of calculating three-dimensional shape information of an object surface comprising: acquiring, color-mapping, and calculating. The acquiring includes acquiring an image captured through an anisotropic wavelength selection portion having at least two different regions configured to select a wavelength to be shielded and a wavelength to be passed from reflected light from the object surface illuminated with light. The color-mapping includes color-mapping light beam directions based on the image. The calculating includes calculating three-dimensional shape information of the object surface from a geometric optics relational expression between an inclination angle of the object surface and the light beam direction.

IPC Classes  ?

  • G01B 11/25 - Measuring arrangements characterised by the use of optical techniques for measuring contours or curvatures by projecting a pattern, e.g. moiré fringes, on the object

62.

SOLID-STATE IMAGING DEVICE

      
Application Number 18175881
Status Pending
Filing Date 2023-02-28
First Publication Date 2024-03-28
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Zheng, Yuexing

Abstract

A solid-state imaging device according to the present embodiment includes a semiconductor region and an antireflection film. In the semiconductor region, a blue photodiode that detects blue light, a green photodiode that detects green light, and a red photodiode that detects red light are arranged. The antireflection film includes a first insulating film disposed on the semiconductor region and a second insulating film disposed on the first insulating film and having a refractive index higher than a refractive index of the first insulating film. At least one of the first insulating film and the second insulating film has a film thickness in a region through which light received by the blue photodiode is transmitted thinner than a film thickness in a region through which light received by the green photodiode is transmitted.

IPC Classes  ?

  • H01L 27/146 - Imager structures
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

63.

SEMICONDUCTOR DEVICE

      
Application Number 18176369
Status Pending
Filing Date 2023-02-28
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Tabakoya, Taira
  • Tsujimura, Toshihiro

Abstract

A semiconductor device can include: a semiconductor chip including a first and second surface, a first electrode on the first surface, an active area on the second surface, a second electrode on the second surface, and a third electrode on the second surface; a first conductive member in the active area of the semiconductor chip and electrically connected to the semiconductor chip; a second conductive member in a second area and isolated from the first conductive member, the second area an area in which, when viewed from above, with respect to a first area of the active area in which the first conductive member is not provided, circles sharing centers of shortest distances between an outer periphery of the first conductive member and an outer periphery of the active area can be drawn largest in the first area; and a lead terminal connected to the first conductive member.

IPC Classes  ?

  • H01L 23/495 - Lead-frames
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices

64.

SEMICONDUCTOR DEVICE

      
Application Number 18177644
Status Pending
Filing Date 2023-03-02
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Ando, Daisuke
  • Shibata, Toyokazu

Abstract

According to one embodiment, a semiconductor device includes: a semiconductor chip including a first surface, a second surface, a first electrode, a second electrode, and a third electrode; a first conductor including a first portion and a first intermediate portion, a second conductor including a third portion, a second intermediate portion, and a fourth portion, and a length of the first intermediate portion in a second direction being longer than a length of the third portion in the second direction; a third conductor provided on a first surface side of the semiconductor chip; a conductive first connector provided between the first intermediate portion of the first conductor and the third portion of the second conductor; a conductive second connector provided between the second electrode and the first portion; and a conductive third connector provided between the third conductor and the first electrode.

IPC Classes  ?

  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 23/495 - Lead-frames

65.

SEMICONDUCTOR DEVICE

      
Application Number 18181072
Status Pending
Filing Date 2023-03-09
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Fujihara, Mami
  • Osanai, Toshihide
  • Takai, Naoya

Abstract

A semiconductor device includes an input-side lead, a light-emitting element on the input-side lead, an output-side lead, a switching element on the output-side lead, and a light-receiving element on the switching element. The switching element is provided between the light-emitting element and the output-side lead. The switching element includes a front-side electrode and a control pad arranged along a front surface side thereof. The light-receiving element is provided on the front-side electrode of the switching element via an insulative connection member. The light-receiving element is positioned between the first switching element and the light-emitting element. The light-receiving element includes first and second bonding pads; the first bonding pad is electrically connected to the control pad of the switching element via a first conductive member; and the second bonding pad is electrically connected to the front-side electrode of the switching element via a second conductive member.

IPC Classes  ?

  • H01L 33/56 - Materials, e.g. epoxy or silicone resin
  • H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
  • H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls

66.

SEMICONDUCTOR DEVICE

      
Application Number 18181084
Status Pending
Filing Date 2023-03-09
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Sugiyama, Toru
  • Yoshioka, Akira
  • Kobayashi, Hitoshi
  • Hung, Hung
  • Isobe, Yasuhiro
  • Sekiguchi, Hideki
  • Ohno, Tetsuya
  • Onomura, Masaaki

Abstract

A semiconductor device includes a nitride semiconductor element, a first diode, and a second diode; the nitride semiconductor element includes a conductive mounting bed, a semiconductor substrate formed on the mounting bed, a first nitride semiconductor layer, a second nitride semiconductor layer, a first major electrode, a second major electrode, a first gate electrode, and a second gate electrode; the first diode includes a first anode electrode electrically connected to the mounting bed, and a first cathode electrode electrically connected to the first major electrode; and the second diode includes a second anode electrode electrically connected to the mounting bed, and a second cathode electrode electrically connected to the second major electrode.

IPC Classes  ?

67.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING

      
Application Number 18182824
Status Pending
Filing Date 2023-03-13
First Publication Date 2024-03-28
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japan)
Inventor
  • Murayoshi, Aya
  • Nomura, Kazushiro

Abstract

A semiconductor device includes a first conductive layer, a semiconductor layer, first to second control electrodes, and first to second electrode pads. The first conductive layer includes first to second conductive regions. The second conductive region is thinner than the first conductive region. The semiconductor layer is located on the first conductive layer, and includes first to fifth semiconductor regions. The first control electrode faces the first, second, and third semiconductor regions via a first insulating film. The second control electrode faces the first, fourth, and fifth semiconductor regions via a second insulating film. The first electrode pad is located above the semiconductor layer and electrically connected with the third semiconductor region. The second electrode pad is located above the semiconductor layer and electrically connected with the fifth semiconductor region. At least a portion of the first conductive region is positioned below the first and second electrode pads.

IPC Classes  ?

  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 23/482 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

68.

MAGNETIC DISK DEVICE

      
Application Number 18184399
Status Pending
Filing Date 2023-03-15
First Publication Date 2024-03-28
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Sudo, Daisuke

Abstract

According to one embodiment, a magnetic disk device comprises a JIT seek control unit, which uses second time series data of a current indication value of a VCM that sets a slope having an absolute value smaller than an absolute value of a slope of a first time series data in at least one of a monotonically decreasing interval of an acceleration interval and a monotonically decreasing interval of a deceleration interval of a head or an operation acceleration of the head.

IPC Classes  ?

  • G11B 5/55 - Track change, selection, or acquisition by displacement of the head

69.

MOLECULAR SENSOR AND MOLECULAR DETECTION APPARATUS

      
Application Number 18184786
Status Pending
Filing Date 2023-03-16
First Publication Date 2024-03-28
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Shinjo, Yasushi
  • Miyamoto, Hirohisa
  • Yoshimura, Reiko

Abstract

A molecular sensor includes: a base; and a sensitive film provided above the base and containing a metal organic framework and a hydrophobic polymer, a contact angle respect to water of the hydrophobic polymer being larger than that of the metal organic framework. The metal organic framework is on the base side of the sensitive film, and the hydrophobic polymer is above the metal organic framework in the sensitive film.

IPC Classes  ?

70.

MANUFACTURING METHOD FOR ELECTROLYTE MEMBRANE INCLUDING NOBLE METAL PARTICLES, ELECTROLYTE MEMBRANE INCLUDING NOBLE METAL PARTICLES, MEMBRANE ELECTRODE ASSEMBLY, ELECTROCHEMICAL CELL, STACK, AND ELECTROLYZER

      
Application Number 18462942
Status Pending
Filing Date 2023-09-07
First Publication Date 2024-03-28
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION (Japan)
Inventor
  • Nakano, Yoshihiko
  • Yoshinaga, Norihiro

Abstract

A manufacturing method for a electrolyte membrane including noble metal particles according to an embodiment includes a step of impregnating cationic noble metal complex ions with a first region of a surface of a cation exchange membrane by spraying solution containing the cationic noble metal complex ions on the cation exchange membrane and drying the sprayed member, and a step of applying a reducing treatment to the cation exchange membrane impregnated with the cationic noble metal complex ions.

IPC Classes  ?

  • C25B 13/05 - Diaphragms; Spacing elements characterised by the material based on inorganic materials
  • C25B 9/19 - Cells comprising dimensionally-stable non-movable electrodes; Assemblies of constructional parts thereof with diaphragms

71.

IMAGE ENCODING METHOD AND IMAGE DECODING METHOD

      
Application Number 18536396
Status Pending
Filing Date 2023-12-12
First Publication Date 2024-03-28
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Shiodera, Taichiro
  • Asaka, Saori
  • Tanizawa, Akiyuki
  • Chujoh, Takeshi

Abstract

According to one embodiment, an image encoding method includes selecting a motion reference block from an encoded pixel block to which an inter prediction is applied. The method includes selecting one or more available blocks from the motion reference block. The method includes selecting a selection block from the available blocks. The method includes generating a predicted image of the encoding target block using motion information of the selection block. The method includes encoding a prediction error between the predicted image and an original image. The method includes encoding selection information specifying the selection block by referring to a code table decided according to a number of the available blocks.

IPC Classes  ?

  • H04N 19/513 - Processing of motion vectors
  • H04N 19/105 - Selection of the reference unit for prediction within a chosen coding or prediction mode, e.g. adaptive choice of position and number of pixels used for prediction
  • H04N 19/109 - Selection of coding mode or of prediction mode among a plurality of temporal predictive coding modes
  • H04N 19/119 - Adaptive subdivision aspects e.g. subdivision of a picture into rectangular or non-rectangular coding blocks
  • H04N 19/124 - Quantisation
  • H04N 19/137 - Motion inside a coding unit, e.g. average field, frame or block difference
  • H04N 19/139 - Analysis of motion vectors, e.g. their magnitude, direction, variance or reliability
  • H04N 19/15 - Data rate or code amount at the encoder output by monitoring actual compressed data size at the memory before deciding storage at the transmission buffer
  • H04N 19/159 - Prediction type, e.g. intra-frame, inter-frame or bidirectional frame prediction
  • H04N 19/176 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
  • H04N 19/182 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being a pixel
  • H04N 19/52 - Processing of motion vectors by encoding by predictive encoding
  • H04N 19/61 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
  • H04N 19/70 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by syntax aspects related to video coding, e.g. related to compression standards

72.

Determining absolute position on HDD spiral patterns using dual TDMR readers

      
Application Number 18155633
Grant Number 11942122
Status In Force
Filing Date 2023-01-17
First Publication Date 2024-03-26
Grant Date 2024-03-26
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Calfee, Gary W.
  • Szita, Gabor
  • Liang, Jiangang

Abstract

A method of determining radial position of a magnetic head that includes a first read sensor and a second read sensor includes: with the first read sensor, detecting a servo spiral formed on a disk; with the second read sensor, detecting the servo spiral; measuring a time interval between when the servo spiral is detected by the first read sensor and when the servo spiral is detected by the second read sensor; and based on the time interval, determining a radial position of the magnetic head relative to the disk.

IPC Classes  ?

  • G11B 5/596 - Disposition or mounting of heads relative to record carriers with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for track following on disks
  • G01D 5/248 - Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means generating pulses or pulse trains by varying pulse repetition frequency
  • G11B 5/56 - Disposition or mounting of heads relative to record carriers with provision for moving the head for the purpose of adjusting the position of the head relative to the record carrier, e.g. manual adjustment for azimuth correction or track centering

73.

Measuring VCM radial location using flex circuit shape during spiral write

      
Application Number 18177051
Grant Number 11942123
Status In Force
Filing Date 2023-03-01
First Publication Date 2024-03-26
Grant Date 2024-03-26
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Calfee, Gary W.
  • Ngai, Rodney
  • Szita, Gabor

Abstract

In a disk drive that includes a magnetic head and a flexible printed circuit board (FPCB) coupled to an actuator for the magnetic head, a method of writing servo information includes: receiving a signal based on an electrical property of a material included in the FPCB, wherein the electrical property of the material changes as the actuator moves; determining a radial position of the magnetic head relative to a disk of the disk drive based on the signal; and controlling a radial velocity of the magnetic head relative to the disk of the disk drive based on the radial position.

IPC Classes  ?

  • G11B 5/596 - Disposition or mounting of heads relative to record carriers with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for track following on disks

74.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 18112213
Status Pending
Filing Date 2023-02-21
First Publication Date 2024-03-21
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Fujino, Yuhki
  • Kachi, Tsuyoshi
  • Miyashita, Katsura
  • Sato, Shingo

Abstract

A semiconductor device includes: a semiconductor part including a first semiconductor layer and a second semiconductor layer in contact with the first semiconductor layer; a first electrode electrically connected to the first semiconductor layer on a front surface side or a back surface side of the semiconductor part; a second electrode electrically connected to the second semiconductor layer on the front surface side of the semiconductor part; a gate electrode; an interlayer insulating film electrically insulating the gate electrode and the second electrode on the front surface side of the semiconductor part; and a third semiconductor layer having: a first region in contact with the second semiconductor layer and the second electrode on the front surface side of the semiconductor part; and a second region provided between the interlayer insulating film and the second electrode in a second direction perpendicular to a first direction.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device

75.

SEMICONDUCTOR DEVICE

      
Application Number 18115617
Status Pending
Filing Date 2023-02-28
First Publication Date 2024-03-21
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Itokazu, Hiroko
  • Iwakaji, Yoko
  • Kawamura, Keiko
  • Matsudai, Tomoko
  • Fuse, Kaori
  • Motai, Takako

Abstract

A semiconductor device includes a semiconductor part, first to fourth electrodes and a control electrode. The first and second electrodes are provided respectively on back and front surfaces of the semiconductor part. The third electrode is provided between the first and second electrodes, and provided in the semiconductor part with a first insulating film interposed. The fourth and control electrodes are provided between the second and third electrodes. The fourth and control electrodes extends into the semiconductor part from the front side and faces the third electrode with a second insulating film interposed. The fourth electrode is positioned between the semiconductor part and the control electrode. The first insulating film extends between the semiconductor part and the control electrode and between the semiconductor part and the fourth electrode. The fourth electrode faces the control electrode with a third insulating film interposed, and is electrically connected to the third electrode.

IPC Classes  ?

  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched

76.

SUSPENSION ASSEMBLY AND DISK DEVICE

      
Application Number 18116642
Status Pending
Filing Date 2023-03-02
First Publication Date 2024-03-21
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Suzuki, Yasuo
  • Kido, Takuma

Abstract

According to one embodiment, a flexure for use in a suspension assembly includes: a supporting plate; a wiring member including a metal plate and a wiring substrate placed on the metal plate and has a tip-side portion placed on the supporting plate, a base end-side portion extending to an outside of the supporting plate, and a first end provided at an extension end of the base end-side portion; and a piezoelectric element mounted on the wiring member. The wiring substrate includes an insulating layer and a conductive layer stacked on the insulating layer, the conductive layer having a plurality of connecting pads including a ground pad to which a ground electrode of the piezoelectric element is connected, a plurality of connecting terminals provided at the first end and including a ground terminal, and a plurality of traces including a ground trace connecting the ground pad and the ground terminal.

IPC Classes  ?

  • G11B 33/14 - Reducing influence of physical parameters, e.g. temperature change, moisture, dust
  • G11B 5/48 - Disposition or mounting of heads relative to record carriers
  • H10N 30/20 - Piezoelectric or electrostrictive devices with electrical input and mechanical output, e.g. functioning as actuators or vibrators
  • H10N 30/50 - Piezoelectric or electrostrictive devices having a stacked or multilayer structure
  • H10N 30/87 - Electrodes or interconnections, e.g. leads or terminals

77.

SEMICONDUCTOR DEVICE

      
Application Number 18116711
Status Pending
Filing Date 2023-03-02
First Publication Date 2024-03-21
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Tanabiki, Kyo

Abstract

According to one embodiment, a semiconductor device includes: a chip; a first electrode provided on the chip; a first connector provided above the first electrode, extending in a first direction, and provided with a joint portion to be joined to the first electrode, on an end portion in the first direction of the first connector; and a joint member for use in joint between the first electrode and the joint portion. The joint portion is provided with a notch portion on at least one end portion in the first direction of an upper surface of the joint portion. The joint member is in contact with the first electrode, a lower surface of the joint portion facing the first electrode, and at least, part of the notch portion.

IPC Classes  ?

  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices

78.

DIGITAL ISOLATOR

      
Application Number 18118271
Status Pending
Filing Date 2023-03-07
First Publication Date 2024-03-21
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Nagata, Minoru

Abstract

A digital isolator includes: an edge detection circuit configured to output a first detection signal and a second detection signal; a driving buffer circuit configured to output a first edge signal and a second edge signal; an isolation element configured to output a first edge signal and a second edge signal; a receiving inverter circuit configured to output a first reception signal and a second reception signal; a latch circuit configured to latch data based on the pulse of the first received signal and the pulse of the second received signal, and to output an output signal to an output terminal according to the data; a switch circuit configured to switch a state of conduction between the reference potential and the first output and a state of conduction between the reference potential and the second output; and a control circuit configured to control a switching operation.

IPC Classes  ?

  • H01P 1/36 - Isolators
  • H03K 3/037 - Bistable circuits
  • H03K 19/20 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits

79.

ELECTRONIC DEVICE

      
Application Number 18118725
Status Pending
Filing Date 2023-03-07
First Publication Date 2024-03-21
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Yamamoto, Nobuhiro
  • Takazawa, Masahide

Abstract

According to one embodiment, an electronic device includes a wall and a substrate. The substrate is provided with an opening. The substrate includes an organic compound layer, a first surface of the organic compound layer, a second surface of the organic compound layer opposite the first surface, first wiring on the second surface, second wiring on the second surface, a first pad, and a second pad. The first surface is attached to the wall. The first pad is connected to the first wiring. The second pad is connected to the second wiring away from the first pad. The opening penetrates the organic compound layer to open to the first surface and the second surface between the first pad and the second pad.

IPC Classes  ?

  • G11B 33/12 - Disposition of constructional parts in the apparatus, e.g. of power supply, of modules
  • H05K 1/02 - Printed circuits - Details

80.

MAGNETIC DISK DEVICE

      
Application Number 18119515
Status Pending
Filing Date 2023-03-09
First Publication Date 2024-03-21
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Tanno, Yuugo

Abstract

According to one embodiment, a magnetic disk device includes a magnetic disk, a magnetic head including a write head, a read head, a heater which adjusts a flying height of the read head and a detection portion which detects a flying height of the read head, and a controller which controls a power value supplied to the heater in accordance with the flying height, and, when a read error occurs, detects, with the detection portion, the flying height of the read head in an error occurrence region, determines an assist amount to bring the flying height in the error occurrence region to a pre-set reference flying height, and executes re-try read of the error occurrence region while inputting a power value corresponding to the assist amount to the heater.

IPC Classes  ?

  • G11B 5/60 - Fluid-dynamic spacing of heads from record carriers
  • G11B 27/36 - Monitoring, i.e. supervising the progress of recording or reproducing

81.

DISK DEVICE

      
Application Number 18119638
Status Pending
Filing Date 2023-03-09
First Publication Date 2024-03-21
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Horiguchi, Yutaka
  • Yoshida, Osamu

Abstract

According to one embodiment, there is provided a disk device including a first connector, a second connector and a controller. The first connector is connectable to a host. The first connector includes a first pin that is electrically connectable to a light emitting device in the host. The second connector is connectable to the host. The second connector includes a second pin that is receivable with data from the host. The controller is communicable with predetermined information with the host via the first pin.

IPC Classes  ?

  • G11B 27/36 - Monitoring, i.e. supervising the progress of recording or reproducing
  • G11B 19/20 - Driving; Starting; Stopping; Control thereof

82.

SEMICONDUCTOR DEVICE

      
Application Number 18120704
Status Pending
Filing Date 2023-03-13
First Publication Date 2024-03-21
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Yasutake, Takuya
  • Katou, Hiroaki

Abstract

A semiconductor device according to the present embodiment includes a drain electrode, a source electrode, a semiconductor region disposed between the drain electrode and the source electrode, a gate electrode disposed in the semiconductor region via a first insulation film, and a second insulation film disposed between the gate electrode and the source electrode and having a specific dielectric constant higher than a specific dielectric constant of the first insulation film.

IPC Classes  ?

  • H01L 29/40 - Electrodes
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

83.

SEMICONDUCTOR DEVICE

      
Application Number 18160002
Status Pending
Filing Date 2023-01-26
First Publication Date 2024-03-21
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Tanaka, Katsuhisa
  • Kono, Hiroshi

Abstract

A semiconductor device includes a first electrode, a second electrode, a third electrode located between the first electrode and the second electrode, a first semiconductor layer connected to the first electrode, a second semiconductor layer connected to the second electrode, a third semiconductor layer of a second conductivity type, and a fourth semiconductor layer of the second conductivity type. The third electrode includes first and second portions. The first semiconductor layer faces the first portion via an insulating layer. The first and second semiconductor layers are of a first conductivity type and include silicon and carbon. A carrier concentration of the fourth semiconductor layer is greater than a carrier concentration of the third semiconductor layer.

IPC Classes  ?

  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

84.

LEVEL SHIFT CIRCUITRY

      
Application Number 18165859
Status Pending
Filing Date 2023-02-07
First Publication Date 2024-03-21
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor Nakamura, Tetsuya

Abstract

A level shift circuitry includes a first impedance, a second impedance, a first transistor, a second transistor, a current source, and a first capacitor. The first impedance and the second impedance have a first end connected to a positive-side power supply voltage. The first transistor has a control terminal and a first end connected to a second end of the first impedance. The second transistor has a control terminal, a first end connected to a second end of the second impedance, and a second end connected to a second end of the first transistor. The current source has a first end connected to the second end of the first transistor and a second end connected to a negative-side power supply voltage. The first capacitor has a first end connected to the second end of the second impedance and a second end.

IPC Classes  ?

  • H03K 19/0185 - Coupling arrangements; Interface arrangements using field-effect transistors only

85.

SEMICONDUCTOR DEVICE

      
Application Number 18167301
Status Pending
Filing Date 2023-02-10
First Publication Date 2024-03-21
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Sugiyama, Toru
  • Yoshikawa, Noriaki
  • Kuriyama, Yasuhiko
  • Yoshioka, Akira
  • Kobayashi, Hitoshi
  • Hung, Hung
  • Isobe, Yasuhiro
  • Ohno, Tetsuya
  • Sekiguchi, Hideki
  • Onomura, Masaaki

Abstract

A semiconductor device includes a first transistor, a first drive circuit including a second transistor, and a second drive circuit including a third transistor. The second transistor and the third transistor are connected in series; and a connection node of the second and third transistors is connected to a gate electrode of the first transistor. The first transistor, the second transistor, and the third transistor are normally-off MOS HEMTs formed in a first substrate that includes GaN. The first drive circuit charges a parasitic capacitance of the first transistor. The second drive circuit discharges the parasitic capacitance of the first transistor.

IPC Classes  ?

  • H03K 17/16 - Modifications for eliminating interference voltages or currents

86.

SEMICONDUCTOR DEVICE

      
Application Number 18168243
Status Pending
Filing Date 2023-02-13
First Publication Date 2024-03-21
Owner
  • Kabushiki Kaisha Toshiba (Japan)
  • Toshiba Electronic Devices & Storage Corporation (Japan)
Inventor
  • Tokuyama, Shuhei
  • Kachi, Tsuyoshi
  • Nishiguchi, Toshifumi
  • Katou, Hiroaki

Abstract

A semiconductor device according to the present embodiment includes: a first electrode; a first semiconductor region of a first conductivity type disposed above the first electrode; a second semiconductor region of a second conductivity type disposed on the first semiconductor region; a third semiconductor region of the first conductivity type disposed on the second semiconductor region; a second electrode disposed in the first semiconductor region; a third electrode facing the second semiconductor region via a second insulating film; a fourth electrode having a portion adjacent to a part of the second semiconductor region and the third semiconductor region in the second direction, the second semiconductor region, and the third semiconductor region; and a fifth electrode disposed in the first insulating film, having a bottom located closer to the first electrode than a bottom of the portion, having a top located on an upper surface of the first insulating film.

IPC Classes  ?

  • H01L 29/40 - Electrodes
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

87.

MAGNETIC DISK DEVICE

      
Application Number 18169407
Status Pending
Filing Date 2023-02-15
First Publication Date 2024-03-21
Owner
  • KABUSHIKI KAISHA TOSHIBA (Japan)
  • TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION (Japan)
Inventor
  • Kobatake, Shinichi
  • Watanabe, Toru
  • Yamane, Masami

Abstract

According to one embodiment, a disk device includes a rotatable magnetic disk, an actuator which supports and moves a head, a ramp which holds the head at an unloaded position, a motor which rotates the magnetic disk, and a controller which performs a load operation and a seek operation. When a radial travel speed of the head during the load operation is referred to as Vr1, a circumferential travel speed of the head is referred to as Vt1, a radial travel speed of the head during the seek operation is referred to as Vrs, and a circumferential travel speed is referred to as Vts, the controller controls at least one of the radial travel speed of the head and number of revolutions of the magnetic disk to satisfy a relationship (Vr1/Vt1)<(Vrs/Vts).

IPC Classes  ?

  • G11B 5/55 - Track change, selection, or acquisition by displacement of the head
  • G11B 5/012 - Recording on, or reproducing or erasing from, magnetic disks
  • G11B 19/28 - Speed controlling, regulating or indicating

88.

LIGHT DETECTOR, LIGHT DETECTION SYSTEM, AND LIDAR DEVICE

      
Application Number 18169514
Status Pending
Filing Date 2023-02-15
First Publication Date 2024-03-21
Owner Kabushiki Kaisha Toshiba (Japan)
Inventor
  • Sasaki, Keita
  • Shimizu, Mariko
  • Suzuki, Kazuhiro

Abstract

A light detector according to one embodiment, includes a substrate. The substrate includes a first semiconductor layer, an insulating layer, and a second semiconductor layer. The insulating layer is located on the first semiconductor layer. The second semiconductor layer is located on the insulating layer. The second semiconductor layer includes a photoelectric conversion part. The photoelectric conversion part includes a first semiconductor region and a second semiconductor region. The substrate includes a void and a trench. The void is positioned below the photoelectric conversion part and between the first semiconductor layer and the second semiconductor layer. The trench surrounds the photoelectric conversion part. A lower end of the trench is positioned in the second semiconductor layer. The photoelectric conversion part is electrically connected with an upper surface side of the substrate via a portion below the trench.

IPC Classes  ?

  • G01S 7/481 - Constructional features, e.g. arrangements of optical elements
  • G01S 17/08 - Systems determining position data of a target for measuring distance only

89.

RADAR DEVICE AND METHOD OF CONTROLLING RADAR DEVICE

      
Application Number 18170674
Status Pending
Filing Date 2023-02-17
First Publication Date 2024-03-21
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Seki, Takashi
  • Moriya, Akira
  • Tsujimura, Kazuhiro
  • Sekiya, Ryota
  • Mori, Hiroki

Abstract

According to one embodiment, a radar device comprises a panel including clusters and a controller. The controller is configured to cause a first cluster of the clusters to transmit an electromagnetic wave to a target, cause the first cluster and at least one second cluster adjacent to the first cluster to receive a reflected wave from the target, and cause the first cluster and the at least one second cluster to output a reception signal. At least one cluster other than the first cluster and other than the at least one second cluster does not output the reception signal.

IPC Classes  ?

  • G01S 13/34 - Systems for measuring distance only using transmission of continuous waves, whether amplitude-, frequency-, or phase-modulated, or unmodulated using transmission of continuous, frequency-modulated waves while heterodyning the received signal, or a signal derived therefrom, with a locally-generated signal related to the contemporaneously transmitted signal
  • G01S 7/35 - RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES - Details of systems according to groups , , of systems according to group - Details of non-pulse systems

90.

MANUFACTURING DATA ANALYSIS DEVICE, SYSTEM, AND METHOD

      
Application Number 18172437
Status Pending
Filing Date 2023-02-22
First Publication Date 2024-03-21
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Watanabe, Wataru
  • Kawauchi, Keisuke
  • Itoh, Takayuki
  • Ando, Jumpei
  • Ono, Toshiyuki

Abstract

According to one embodiment, a manufacturing data analysis device includes processing circuitry. The processing circuitry acquires manufacturing data including a manufacturing condition data group and a quality data group. The processing circuitry calculates one or more degrees of influence exerted by first manufacturing condition data included in the manufacturing condition data group on respective pieces of quality data included in the quality data group by analyzing the manufacturing data. The processing circuitry, in a case where one or more degrees of influence satisfy a determination condition, generates output data related to at least one of the first manufacturing condition data, one or more pieces of quality data on which the first manufacturing condition data has exerted the degrees of influence satisfying the determination condition, or the degrees of influence satisfying the determination condition.

IPC Classes  ?

  • G01M 99/00 - Subject matter not provided for in other groups of this subclass

91.

STRUCTURE EVALUATION SYSTEM, STRUCTURE EVALUATION APPARATUS, STRUCTURE EVALUATION METHOD, AND NON-TRANSITORY COMPUTER READABLE RECORDING MEDIUM

      
Application Number 18173235
Status Pending
Filing Date 2023-02-23
First Publication Date 2024-03-21
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Usui, Takashi
  • Takamine, Hidefumi
  • Watabe, Kazuo
  • Kugimiya, Tetsuya

Abstract

According to one embodiment, a structure evaluation system according to an embodiment includes a plurality of sensors, a position locator, a corrector, and an evaluator. The plurality of sensors detect elastic waves generated from a structure. The position locator is configured to locate positions of sources of a plurality of elastic waves detected by the plurality of sensors on the basis of the plurality of elastic waves. The corrector is configured to correct information based on the position location in the position locator using a correction value which is determined according to a temperature of the structure. The evaluator is configured to evaluate a deterioration state of the structure on the basis of the corrected information.

IPC Classes  ?

  • G01N 29/14 - Investigating or analysing materials by the use of ultrasonic, sonic or infrasonic waves; Visualisation of the interior of objects by transmitting ultrasonic or sonic waves through the object using acoustic emission techniques
  • G01N 29/04 - Analysing solids
  • G01N 29/44 - Processing the detected response signal

92.

RECYCLING SYSTEM, RECYCLING METHOD, METHOD FOR MANUFACTURING ELECTRODE, AND METHOD FOR MANUFACTURING BATTERY

      
Application Number 18173754
Status Pending
Filing Date 2023-02-23
First Publication Date 2024-03-21
Owner Kabushiki Kaisha Toshiba (Japan)
Inventor
  • Fukaya, Taro
  • Kondo, Asato
  • Harada, Yasuhiro

Abstract

In general, according to one embodiment, a recycling method is provided. The method includes dispersing an electrode containing a niobium titanium oxide in water; separating the niobium titanium oxide from the electrode dispersed in the water; and applying a first heat treatment to the separated niobium titanium oxide.

IPC Classes  ?

93.

STRUCTURE EVALUATION SYSTEM, SIGNAL PROCESSING APPARATUS, STRUCTURE EVALUATION METHOD, AND NON-TRANSITORY COMPUTER READABLE RECORDING MEDIUM

      
Application Number 18174228
Status Pending
Filing Date 2023-02-24
First Publication Date 2024-03-21
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Ueda, Yuki
  • Usui, Takashi

Abstract

According to one embodiment, a structure evaluation system of an embodiment includes one or more sensors, a signal processing apparatus, and an evaluator. The plurality of sensors detect elastic waves generated from a structure. The signal processing apparatus calculates information on a frequency distribution by amplitude scale based on the plurality of elastic waves detected by each of the one or more sensors, and transmits the calculated information on the frequency distribution by amplitude scale in a wireless manner. The evaluator evaluates a state of deterioration of the structure based on the information on the frequency distribution by amplitude scale which is transmitted from the signal processing apparatus.

IPC Classes  ?

  • G01N 29/07 - Analysing solids by measuring propagation velocity or propagation time of acoustic waves
  • G01N 29/12 - Analysing solids by measuring frequency or resonance of acoustic waves

94.

NON-TRANSITORY STORAGE MEDIUM, OPTICAL INSPECTION SYSTEM, PROCESSING APPARATUS FOR OPTICAL INSPECTION SYSTEM, AND OPTICAL INSPECTION METHOD

      
Application Number 18174367
Status Pending
Filing Date 2023-02-24
First Publication Date 2024-03-21
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Ohno, Hiroshi
  • Kano, Hiroya
  • Okano, Hideaki

Abstract

According to an embodiment, a non-transitory storage medium stores an optical inspection program. The optical inspection program causes a processor to execute generating a wavelength selection portion-removed image by removing, from a captured image of an object surface imaged through a wavelength selection portion configured to select at least two different wavelength spectra from incident light, an image of the wavelength selection portion included in the captured image.

IPC Classes  ?

  • G01N 21/31 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry
  • G06T 5/00 - Image enhancement or restoration
  • G06T 5/10 - Image enhancement or restoration by non-spatial domain filtering
  • G06T 5/20 - Image enhancement or restoration by the use of local operators
  • G06T 7/00 - Image analysis

95.

MOLECULAR STRUCTURE OPTIMIZATION SYSTEM, MOLECULAR STRUCTURE OPTIMIZATION METHOD, AND PARAMETERIZED QUANTUM CIRCUIT

      
Application Number 18174683
Status Pending
Filing Date 2023-02-27
First Publication Date 2024-03-21
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Nishida, Yasutaka
  • Aiga, Fumihiko

Abstract

A molecular structure optimization system includes a quantum computer and a classical computer. The quantum computer uses a parameterized quantum circuit to calculate a loss function from a coordinate parameter of a target molecule. The classical computer updates the coordinate parameter and the circuit parameter based on the loss function, and determines optimum values of the circuit parameter and the coordinate parameter. The classical computer updates a provisional value of the circuit parameter while fixing the coordinate parameter and changing the circuit parameter. The classical computer updates a provisional value of the coordinate parameter while fixing the circuit parameter and changing the coordinate parameter.

IPC Classes  ?

  • G16C 10/00 - Computational theoretical chemistry, i.e. ICT specially adapted for theoretical aspects of quantum chemistry, molecular mechanics, molecular dynamics or the like
  • G06N 10/20 - Models of quantum computing, e.g. quantum circuits or universal quantum computers

96.

OPTICAL INSPECTION APPARATUS, OPTICAL INSPECTION SYSTEM, OPTICAL INSPECTION METHOD, AND NON-TRANSITORY STORAGE MEDIUM

      
Application Number 18174708
Status Pending
Filing Date 2023-02-27
First Publication Date 2024-03-21
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Ohno, Hiroshi
  • Kano, Hiroya
  • Okano, Hideaki

Abstract

According to an embodiment, an optical inspection apparatus includes: an illumination portion, a wavelength selection portion and an imaging portion. The illumination portion irradiates a first object point of a surface of an object with first illumination light, and a second object point of the surface of the object with second illumination light. The imaging portion images light from the first object point through the wavelength selection portion when a normal direction at the first object point and a direction of the first illumination light have an opposing relationship, and images light from the second object point through the wavelength selection portion when a normal direction at the second object point and a direction of the second illumination light have an opposing relationship.

IPC Classes  ?

  • G01N 21/25 - Colour; Spectral properties, i.e. comparison of effect of material on the light at two or more different wavelengths or wavelength bands
  • G01N 21/29 - Colour; Spectral properties, i.e. comparison of effect of material on the light at two or more different wavelengths or wavelength bands using visual detection

97.

SEQUESTRATION SYSTEM

      
Application Number 18175005
Status Pending
Filing Date 2023-02-27
First Publication Date 2024-03-21
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Kitagawa, Ryota
  • Fujiwara, Naoya
  • Kofuji, Yusuke
  • Ono, Akihiko
  • Mikoshiba, Satoshi

Abstract

A sequestration system includes: an electrolysis part having an electrolysis cell having an anode, a cathode, an anode flow path facing on the anode, and a cathode flow path facing on the cathode; and a reaction part configured to switch a first operation and a second operation, the first operation including producing solid carbon using a catalyst from a first raw material containing a first fluid to be introduced from the cathode flow path, and the second operation including performing a reaction of a second raw material containing a second fluid to be introduced from the anode flow path and solid carbon to be deposited on the catalyst to remove at least a part of the deposited solid carbon from the catalyst.

IPC Classes  ?

  • B01J 19/24 - Stationary reactors without moving elements inside
  • C25B 1/04 - Hydrogen or oxygen by electrolysis of water
  • C25B 1/23 - Carbon monoxide or syngas
  • C25B 9/19 - Cells comprising dimensionally-stable non-movable electrodes; Assemblies of constructional parts thereof with diaphragms
  • C25B 15/021 - Process control or regulation of heating or cooling
  • C25B 15/08 - Supplying or removing reactants or electrolytes; Regeneration of electrolytes

98.

Charging Method of Battery Pack, Management Method of Storage System, Management Apparatus of Battery Pack, Storage System, and Non-Transitory Storage Medium

      
Application Number 18175616
Status Pending
Filing Date 2023-02-28
First Publication Date 2024-03-21
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Hoshina, Keigo
  • Seki, Hayato
  • Matsuno, Shinsuke
  • Takami, Norio

Abstract

In one embodiment, there is provided a charging method of a battery pack in which a plurality of aqueous battery cells are electrically connected in series. In this charging method, in a case where the battery pack reaches a reference voltage by a constant-current charging at a first charging rate, constant-current charging is performed on the battery pack at the second charging rate lower than the first charging rate and being from 0.01 C or more to 0.05 C or less. Then, this constant-current charging at the second charging rate is continued until a charged electric charge amount from a start timing of the constant-current charging at the second charging rate reaches a reference electric charge amount set from 1% or more to 5% or less of the nominal capacity of the battery pack.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
  • H01M 10/44 - Methods for charging or discharging

99.

INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM

      
Application Number 18175728
Status Pending
Filing Date 2023-02-28
First Publication Date 2024-03-21
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Uehara, Tatsuya
  • Kanai, Jun
  • Koike, Ryuiti

Abstract

An information processing apparatus according to one embodiment, includes: a vulnerability database storing vulnerability information including a vulnerability identifier for uniquely specifying vulnerability, a software identifier for uniquely specifying software including the vulnerability, and vulnerability description indicating content of the vulnerability; a matching processor to specify, in the vulnerability database, vulnerability information matching a software identifier of a target software provided in target equipment; a causal component specifier to specify, from the vulnerability description in the vulnerability information specified by the matching processor, a causal component that is a cause of the vulnerability; a type determiner to determine a type of the causal component from a name of the specified causal component; and an output processor to determine, based on the software identifier of the target software and the type of the causal component, an investigation procedure concerning vulnerability of the target software and output information indicating the investigation procedure.

IPC Classes  ?

  • G06F 21/57 - Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
  • G06F 21/54 - Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity, buffer overflow or preventing unwanted data erasure by adding security routines or objects to programs

100.

SECONDARY BATTERY, BATTERY PACK, VEHICLE, AND STATIONARY POWER SUPPLY

      
Application Number 18176079
Status Pending
Filing Date 2023-02-28
First Publication Date 2024-03-21
Owner KABUSHIKI KAISHA TOSHIBA (Japan)
Inventor
  • Yamashita, Yasunobu
  • Hoshina, Keigo
  • Matsuno, Shinsuke

Abstract

In general, according to one embodiment, a secondary battery includes a positive electrode, a negative electrode, an aqueous electrolyte, and a gas treatment structure. The gas treatment structure is configured to be capable of treating hydrogen gas using an electrical conduction between the gas treatment structure and the positive electrode.

IPC Classes  ?

  • H01M 10/52 - Removing gases inside the secondary cell, e.g. by absorption
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
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