Japan Display Inc.

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IPC Class
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements 319
G09F 9/00 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements 177
H01L 51/50 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED) 177
H01L 27/32 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes 149
G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells 126
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1.

COMMUNICATION SYSTEM, ILLUMINATION SYSTEM, AND COMMUNICATION METHOD

      
Application Number JP2023034404
Publication Number 2024/080100
Status In Force
Filing Date 2023-09-22
Publication Date 2024-04-18
Owner JAPAN DISPLAY INC. (Japan)
Inventor Saito, Hitoshi

Abstract

Provided are a communication system, illumination system, and communication method allowing realization of a device connection environment ensuring security without relying on a communication platform or user operation. A slave device (illumination device) generates a security code (A) to which a plurality of random data corresponding to address data are allocated, and a key code (A). In a first process after a communication connection has been established between the slave device and a master device (control device), the slave device transmits the key code (A) and the security code (A) to the master device, and the master device retains the key code (A) as a key code (B) and the security code (A) as a security code (B). In a second process after the first process, the master device transmits to the slave device an address code generated on the basis of the security code (B) and an XOR code (B) generated on the basis of the address code and a second key code, and the slave device cancels the communication connection with the master device if an XOR code (A) generated on the basis of the address code, the key code (A), and the security code (A) does not match the XOR code (B) received from the master device.

IPC Classes  ?

  • H04W 12/50 - Secure pairing of devices
  • H04L 9/32 - Arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system
  • H04W 76/30 - Connection release
  • H04W 84/10 - Small scale networks; Flat hierarchical networks

2.

LIQUID CRYSTAL OPTICAL SHUTTER AND IMAGING DEVICE

      
Application Number JP2023030332
Publication Number 2024/079997
Status In Force
Filing Date 2023-08-23
Publication Date 2024-04-18
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Tanaka, Hitoshi
  • Nakatogawa, Hirondo
  • Aoki, Yoshiro

Abstract

The present invention improves practicality in subject depth estimation through encoded image capturing. Provided is a liquid crystal optical shutter 1 comprising: a first transparent electrode layer; a second transparent electrode layer 58 which is disposed so as to face the first transparent electrode layer and which has a plurality of transparent segment electrodes; a liquid crystal layer which is disposed between the first transparent electrode layer and the second transparent electrode layer 58; and a light shielding layer 53 in which an opening K2 that includes a light entering region RL of an optical system used for encoded image capturing and that corresponds to a region wider than the light entering region RL is formed and which shields light in a region on the outside of the opening K2, wherein the plurality of segment electrodes include an outer circumferential segment electrode CR5 which corresponds to the outer circumferential region of the light entering region RL and which includes the contour of the opening K2, and a mask is formed by control of electric signals applied to the first transparent electrode layer and the plurality of segment electrodes.

IPC Classes  ?

  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1343 - Electrodes
  • G03B 9/08 - Shutters
  • H04N 23/55 - Optical parts specially adapted for electronic image sensors; Mounting thereof

3.

IMAGE-CAPTURING DEVICE, SUBJECT DEPTH ESTIMATION METHOD, AND PROGRAM

      
Application Number JP2023030341
Publication Number 2024/079998
Status In Force
Filing Date 2023-08-23
Publication Date 2024-04-18
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Nakatogawa, Hirondo
  • Aoki, Yoshiro
  • Tanaka, Hitoshi

Abstract

The present invention improves practicality in estimating subject depth through encoded imaging. A computation control unit 30: captures an encoded image of a subject 90 using a first imaging system 10 having a first field angle α; obtains a first captured image P1; detects a specific object 92 on the basis of the first captured image P1, the specific object 92 being included in the subject 90 and being at a distance equal to or greater than a threshold value from the first imaging system 10; captures an encoded image of the detected specific object 92 using a second imaging system 20 having a second field angle β that is narrower than the first field angle α; obtains a second captured image P2; decodes the first captured image P1 and the second captured image P2; and obtains depth information D1 pertaining to the subject 90 and depth information D2 pertaining to the specific object 92.

IPC Classes  ?

  • H04N 23/95 - Computational photography systems, e.g. light-field imaging systems
  • G06T 7/557 - Depth or shape recovery from multiple images from light fields, e.g. from plenoptic cameras
  • H04N 23/55 - Optical parts specially adapted for electronic image sensors; Mounting thereof
  • H04N 23/58 - Means for changing the camera field of view without moving the camera body, e.g. nutating or panning of optics or image sensors
  • H04N 23/60 - Control of cameras or camera modules

4.

FLUORESCENCE DETECTION DEVICE

      
Application Number JP2023036355
Publication Number 2024/075814
Status In Force
Filing Date 2023-10-05
Publication Date 2024-04-11
Owner
  • JAPAN DISPLAY INC. (Japan)
  • RIKEN (Japan)
Inventor
  • Takahashi, Yasuhiro
  • Tomioka, Yasushi
  • Watanabe, Rikiya
  • Ando, Jun
  • Shinoda, Hajime

Abstract

Provided is a fluorescence detection device having improved fluorescence detection sensitivity. The fluorescence detection device comprises a light source that irradiates a sample with circularly polarized excitation light, a sample holding part that holds the sample, a cholesteric liquid crystal layer that transmits fluorescence emitted by the sample due to the excitation light and reflects the excitation light, and a sensor that detects fluorescence transmitted through the cholesteric liquid crystal layer.

IPC Classes  ?

5.

LIGHT-EMITTING ELEMENT AND METHOD FOR MANUFACTURING LIGHT-EMITTING ELEMENT

      
Application Number JP2023028862
Publication Number 2024/075388
Status In Force
Filing Date 2023-08-08
Publication Date 2024-04-11
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Ikeda Masanobu
  • Nishimura Masumi

Abstract

This light-emitting element comprises: a substrate that includes amorphous glass; a first buffer layer; a second buffer layer; a gallium nitride layer; a laminated body; and a negative electrode and a positive electrode. The first buffer layer is positioned over the substrate and includes aluminum and oxygen. The second buffer layer is positioned over the first buffer layer and includes aluminum and nitrogen. The gallium nitride layer is positioned over the second buffer layer. The laminated body is positioned over the gallium nitride layer and includes an n-type cladding layer, a p-type cladding layer, and a light-emitting layer between the n-type cladding layer and the p-type cladding layer. The negative electrode and the positive electrode are respectively positioned over the n-type cladding layer and the p-type cladding layer. Each of the n-type cladding layer, the p-type cladding layer, and the light-emitting layer includes elements of Group 13 and elements of Group 15.

IPC Classes  ?

  • H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
  • H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

6.

RADIO WAVE REFLECTION DEVICE

      
Application Number JP2023028261
Publication Number 2024/070207
Status In Force
Filing Date 2023-08-02
Publication Date 2024-04-04
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Suzuki Daiichi
  • Oka Shinichiro
  • Okita Mitsutaka
  • Matsuno Hiromi
  • Ohto Takuya
  • Amano Yoshiaki

Abstract

This radio wave reflection device includes: a plurality of first patch electrodes; a plurality of second patch electrodes that are different in size from the plurality of first patch electrodes; a ground electrode that is provided opposite and at a distance from the plurality of first patch electrodes and the plurality of second patch electrodes; and a liquid crystal layer that is provided between the ground electrode and the plurality of first patch electrodes and the plurality of second patch electrodes. As seen in plan view, the plurality of first patch electrodes and the plurality of second patch electrodes are arranged in a first direction and in a second direction. With a distance between the centers of two adjacent first patch electrodes defined as a distance W1, the second patch electrodes are arranged at positions that are spaced apart from the first patch electrodes by a distance W1/2 parallel to the first direction and a distance W1/2 parallel to the second direction.

IPC Classes  ?

  • H01Q 15/14 - Reflecting surfaces; Equivalent structures

7.

RADIO WAVE REFLECTION DEVICE

      
Application Number JP2023034478
Publication Number 2024/070939
Status In Force
Filing Date 2023-09-22
Publication Date 2024-04-04
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Suzuki Daiichi
  • Oka Shinichiro
  • Okita Mitsutaka

Abstract

A radio wave reflection device equipped with a plurality of reflection elements, a first signal wire which supplies a control signal and extends in a first direction, and a second signal wire which supplies a scanning signal and extends in a second direction which differs from the first direction, wherein each of the plurality of reflection elements has: a plurality of patch electrodes which have different sizes and are electrically connected to one another; a conductive layer which faces the plurality of patch electrodes and is positioned at a distance from the plurality of patch electrodes; a liquid crystal layer positioned between the conductive layer and each of the plurality of patch electrodes; and a switching element which is connected to the first signal wire and the second signal wire, and electrically connects the first signal wire and the plurality of patch electrodes to one another on the basis of the control signal.

IPC Classes  ?

  • H01Q 3/46 - Active lenses or reflecting arrays
  • H01P 1/18 - Phase-shifters
  • H01Q 13/08 - Radiating ends of two-conductor microwave transmission lines, e.g. of coaxial lines, of microstrip lines
  • H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart

8.

DISPLAY-PANEL-INTEGRATED ELECTRICAL WAVE REFLECTION DEVICE

      
Application Number JP2023028266
Publication Number 2024/062780
Status In Force
Filing Date 2023-08-02
Publication Date 2024-03-28
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Suzuki Daiichi
  • Oka Shinichiro
  • Okita Mitsutaka

Abstract

This display-panel-integrated electrical wave reflection device includes: a plurality of first patch electrodes; a plurality of second patch electrodes facing the plurality of first patch electrodes, the plurality of second patch electrodes being provided set apart from the plurality of first patch electrodes; an electrode layer located on the side of the plurality of second patch electrodes that is opposite from the side where the plurality of first patch electrodes are provided, the electrode layer facing the plurality of second patch electrodes and being provided set apart from the plurality of second patch electrodes; a first liquid crystal layer provided between the plurality of first patch electrodes and the plurality of second patch electrodes; a first substrate provided between the plurality of second patch electrodes and the electrode layer; an array substrate provided to the side of the electrode layer that is opposite from the side where the first substrate is provided, the array substrate including a plurality of transistors; and a second liquid crystal layer provided between an array layer and the electrode layer.

IPC Classes  ?

  • H01Q 15/14 - Reflecting surfaces; Equivalent structures
  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1333 - Constructional arrangements

9.

RADIO WAVE REFLECTION DEVICE

      
Application Number JP2023027586
Publication Number 2024/057737
Status In Force
Filing Date 2023-07-27
Publication Date 2024-03-21
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Okita Mitsutaka
  • Oka Shinichiro
  • Suzuki Daiichi

Abstract

This radio wave reflection device has: a first substrate (120); a second substrate (122) facing the first substrate; a liquid crystal layer (116) between the first substrate and the second substrate; a first reflective electrode (102) disposed on a surface on the liquid crystal layer side of the first substrate; a ground electrode (104) that overlaps the first reflective electrode while sandwiching the first substrate; and a liquid crystal control element (106) adjacent to the reflective electrode and containing a common electrode (1064) and a first liquid crystal control electrode (1062) disposed to sandwich the liquid crystal layer.

IPC Classes  ?

  • H01Q 15/14 - Reflecting surfaces; Equivalent structures
  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1343 - Electrodes

10.

METHOD FOR INSPECTING LUMINESCENT ELEMENTS

      
Application Number JP2023022261
Publication Number 2024/053198
Status In Force
Filing Date 2023-06-15
Publication Date 2024-03-14
Owner JAPAN DISPLAY INC. (Japan)
Inventor Ikeda Masanobu

Abstract

Disclosed is an inspection method comprising: forming a buffer layer on an amorphous substrate; forming an n-type clad layer, a luminescent layer, and a p-type clad layer each including an inorganic semiconductor, on the buffer layer to thereby form a plurality of semiconductor layers disposed in a matrix arrangement having a plurality of lines and a plurality of rows; forming an anode and a cathode on each of the plurality of semiconductor layers, thereby forming a plurality of luminescent elements; and using a first detector and a second detector to acquire the photoluminescent properties and/or the electroluminescent properties of the plurality of luminescent elements. The buffer layer has the function of accelerating the crystallization of the semiconductor layers. The photoluminescent properties and the electroluminescent properties are each acquired before and after the formation of the anodes and cathodes.

IPC Classes  ?

  • H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

11.

LIGHTING DEVICE

      
Application Number JP2023025375
Publication Number 2024/053237
Status In Force
Filing Date 2023-07-10
Publication Date 2024-03-14
Owner JAPAN DISPLAY INC. (Japan)
Inventor Hamano, Daisuke

Abstract

This lighting device comprises: a first holding member that holds a light source; a second holding member including a rotary support that provides support so as enable rotation relative to the first holding member, a panel-holding cover that holds a liquid crystal panel, and a coupling unit that couples the rotary support and the panel-holding cover; a control board; and wiring that extends along a first direction and electrically connects the liquid crystal panel and the control board. The second holding member has a wiring support that supports a portion of the wiring.

IPC Classes  ?

  • F21V 14/00 - Controlling the distribution of the light emitted by adjustment of elements
  • F21S 2/00 - Systems of lighting devices, not provided for in main groups  or , e.g. of modular construction
  • F21V 23/00 - Arrangement of electric circuit elements in or on lighting devices
  • F21Y 115/10 - Light-emitting diodes [LED]

12.

ILLUMINATION SYSTEM

      
Application Number JP2023027922
Publication Number 2024/053283
Status In Force
Filing Date 2023-07-31
Publication Date 2024-03-14
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Koito Takeo
  • Ikeda Kojiro

Abstract

This illumination system comprises: a light source; a liquid crystal cell that changes the light distribution angle of light emitted from the light source; and a control device that controls the gradation of the light distribution angle. The liquid crystal cell comprises a first substrate on which first transparent electrodes and second transparent electrodes each extending in a first direction are alternately provided, a second substrate on which third transparent electrodes and fourth transparent electrodes each extending in a second direction crossing the first direction are alternately provided, and a liquid crystal layer between the first substrate and the second substrate. The control device comprises a communication unit that receives gradation information of the light distribution angle from an information communication terminal, a storage unit that stores weighting coefficients associating the amounts of change of the light distribution angle with changes in the gradation of the light distribution angle, and a control unit that, on the basis of the gradation information and the weighting coefficients, calculates first voltage to fourth voltage to be inputted to the first transparent electrode to the fourth transparent electrode.

IPC Classes  ?

  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • F21V 9/40 - Elements for modifying spectral properties, polarisation or intensity of the light emitted, e.g. filters with provision for controlling spectral properties, e.g. colour, or intensity
  • G02F 1/133 - Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
  • G02F 1/1343 - Electrodes
  • H05B 45/10 - Controlling the intensity of the light
  • H05B 47/105 - Controlling the light source in response to determined parameters
  • H05B 47/19 - Controlling the light source by remote control via wireless transmission

13.

LIGHTING DEVICE

      
Application Number JP2023026746
Publication Number 2024/053266
Status In Force
Filing Date 2023-07-21
Publication Date 2024-03-14
Owner JAPAN DISPLAY INC. (Japan)
Inventor Hamano, Daisuke

Abstract

This lighting device comprises: a heat sink; a light source that is disposed on one side in the axial direction relative to the heat sink and is cooled by the heat sink; an optical member that is disposed on the one side in the axial direction relative to the light source; and a first attaching member that attaches the light source and the optical member to the heat sink.

IPC Classes  ?

  • F21V 29/77 - Cooling arrangements characterised by passive heat-dissipating elements, e.g. heat-sinks with fins or blades with essentially identical diverging planar fins or blades, e.g. with fan-like or star-like cross-section
  • F21S 2/00 - Systems of lighting devices, not provided for in main groups  or , e.g. of modular construction
  • F21V 19/00 - Fastening of light sources or lamp holders
  • F21V 29/503 - Cooling arrangements characterised by the adaptation for cooling of specific components of light sources

14.

LAMINATED STRUCTURE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SAME

      
Application Number JP2023021903
Publication Number 2024/048004
Status In Force
Filing Date 2023-06-13
Publication Date 2024-03-07
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Aoki Hayata
  • Nishimura Masumi

Abstract

This laminated structure comprises: an amorphous substrate that has an insulating surface; an alignment layer that has a pattern on the amorphous substrate; and a semiconductor layer that includes gallium nitride, the semiconductor layer having a pattern on the upper surface of the alignment layer. The angle of a corner that is constituted by the bottom surface and the side surface of the alignment layer is 60-90 degrees. In addition, between the bottom surface and the upper surface of the alignment layer, the width of a cross-section of the alignment layer taken along a plane that is parallel to the bottom surface may be less than the width of the bottom surface of the alignment layer. Furthermore, between the bottom surface and the upper surface of the alignment layer, the width of the cross-section of the alignment layer taken along the plane that is parallel to the bottom surface may be less than the width of the bottom surface of the semiconductor layer.

IPC Classes  ?

  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth

15.

LAYERED STRUCTURE, MANUFACTURING METHOD THEREFOR, AND SEMICONDUCTOR DEVICE

      
Application Number JP2023021906
Publication Number 2024/048005
Status In Force
Filing Date 2023-06-13
Publication Date 2024-03-07
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Aoki Hayata
  • Nishimura Masumi

Abstract

This layered structure comprises: an amorphous substrate that has an insulating surface; an orientation layer that has a pattern on the amorphous substrate having the insulating surface; a semiconductor layer that contains a gallium nitride and has a pattern disposed on the upper surface of the orientation layer; and a side-surface protection part that contains a gallium nitride and is disposed on a side surface of the orientation layer, the semiconductor layer and the side-surface protection part being spaced apart from each other on the side surface of the orientation layer. A first angle formed by the bottom surface and the side surface of the orientation layer may be 60°-90°. Furthermore, the semiconductor layer contains a gallium nitride having the same composition as the side-surface protection part. The crystallinity of the gallium nitride of the semiconductor layer may be higher than the crystallinity of the gallium nitride of the side-surface protection part.

IPC Classes  ?

  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth

16.

OPTICAL ELEMENT AND ILLUMINATION APPARATUS INCLUDING OPTICAL ELEMENT

      
Application Number JP2023023319
Publication Number 2024/048034
Status In Force
Filing Date 2023-06-23
Publication Date 2024-03-07
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Koito Takeo
  • Ikeda Kojiro

Abstract

The present invention provides an optical element capable of arbitrarily processing light incident from a light source and an illumination apparatus including the optical element. An optical element (120) comprises a liquid crystal cell (130), a λ/4 film (150) on the liquid crystal cell, and a reflective plate (160) on the λ/4 film. The liquid crystal cell includes a plurality of first electrodes (136), a first alignment film (142) on the first electrodes, a liquid crystal layer (140) located on the first alignment film, a second alignment film (144) on the liquid crystal layer, and a plurality of second electrodes (138) located on the second alignment film. The plurality of first electrodes extend in a first extension direction and are arranged in a stripe form. The liquid crystal layer contains liquid crystal molecules. The plurality of second electrodes are arranged in a stripe form and extend in a second extension direction that intersects the first extension direction at an angle of 80°-90° inclusive.

IPC Classes  ?

  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/13363 - Birefringent elements, e.g. for optical compensation
  • G02F 1/1337 - Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
  • G02F 1/1343 - Electrodes
  • G02F 1/1347 - Arrangement of liquid crystal layers or cells in which the final condition of one light beam is achieved by the addition of the effects of two or more layers or cells

17.

MULTILAYER STRUCTURE, METHOD FOR PRODUCING MULTILAYER STRUCTURE AND SEMICONDUCTOR DEVICE

      
Application Number JP2023030331
Publication Number 2024/048393
Status In Force
Filing Date 2023-08-23
Publication Date 2024-03-07
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Aoki Hayata
  • Nishimura Masumi

Abstract

This multilayer structure comprises an amorphous substrate that has an insulating surface, an alignment layer that is arranged on the amorphous substrate, and a semiconductor pattern that contains gallium nitride and is arranged on the alignment layer; and the alignment layer has a first region that overlaps with the semiconductor pattern and a second region that does not overlap with the semiconductor pattern. The upper surface of the second region is positioned below the upper surface of the first region. The alignment layer has a groove part in the second region, the groove part extending from the vicinity of the lower end of the semiconductor pattern toward the first region; and when viewed in plan, the groove part overlaps with the semiconductor pattern. The alignment layer has a lateral surface in the first region, the lateral surface being connected to the upper surface of the second region.

IPC Classes  ?

  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
  • C30B 25/06 - Epitaxial-layer growth by reactive sputtering
  • C30B 29/38 - Nitrides
  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H01L 21/338 - Field-effect transistors with a Schottky gate
  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
  • H01L 29/812 - Field-effect transistors with field effect produced by a PN or other rectifying junction gate with a Schottky gate
  • H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

18.

LAMINATED STRUCTURE, MANUFACTURING METHOD FOR LAMINATED STRUCTURE, AND SEMICONDUCTOR DEVICE

      
Application Number JP2023030337
Publication Number 2024/048394
Status In Force
Filing Date 2023-08-23
Publication Date 2024-03-07
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Aoki Hayata
  • Nishimura Masumi

Abstract

The present invention includes: an amorphous substrate having an insulating surface; an alignment pattern formed on the amorphous substrate; an insulating layer that is in contact with a side surface of the alignment pattern and that surrounds a peripheral edge section of the alignment pattern; and a gallium nitride-containing semiconductor pattern formed on the alignment pattern. The insulating layer has a first region that overlaps with the semiconductor pattern, and a second region that does not overlap with the semiconductor pattern. An upper surface of the second region is located below an upper surface of the first region. The insulating layer has, in the second region, a side surface that is continuous with the upper surface of the first region.

IPC Classes  ?

  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • C30B 25/06 - Epitaxial-layer growth by reactive sputtering
  • C30B 29/38 - Nitrides
  • H01L 21/338 - Field-effect transistors with a Schottky gate
  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
  • H01L 29/812 - Field-effect transistors with field effect produced by a PN or other rectifying junction gate with a Schottky gate
  • H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
  • H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

19.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

      
Application Number JP2023021217
Publication Number 2024/047995
Status In Force
Filing Date 2023-06-07
Publication Date 2024-03-07
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Aoki Hayata
  • Nishimura Masumi

Abstract

This semiconductor device comprises: an amorphous substrate having an insulating surface; an orientation pattern located on the amorphous substrate; and a semiconductor pattern including gallium nitride and located on the upper surface of the orientation pattern, wherein the orientation pattern includes: a first pattern part in which the angle of the side face relative to the bottom face is a first angle; and a second pattern part in which the angle of the side face relative to the bottom face is a second angle smaller than the first angle, the second pattern part being positioned below the first pattern part.

IPC Classes  ?

  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
  • C23C 14/06 - Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H01L 21/338 - Field-effect transistors with a Schottky gate
  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
  • H01L 29/812 - Field-effect transistors with field effect produced by a PN or other rectifying junction gate with a Schottky gate
  • H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

20.

LIGHTING DEVICE

      
Application Number JP2023028018
Publication Number 2024/048166
Status In Force
Filing Date 2023-07-31
Publication Date 2024-03-07
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Saito, Hitoshi
  • Shao, Gang

Abstract

Provided is a lighting device capable of more appropriately controlling the change of the light distribution shape of light. This lighting device includes: a light source unit that emits light; a light distribution shape setting unit for setting the light distribution shape of light from the light source unit; a storage unit that stores light distribution shape data relating to the light distribution shape; and a control unit that controls the light distribution shape setting unit on the basis of the light distribution shape data. The light distribution shape setting unit sets the light distribution shape according to a signal level inputted from the control unit, and when changing the signal level inputted to the light distribution shape setting unit from a first level to a second level, the control unit changes the signal level from the first level to a third level between the first level and the second level, and after maintaining the third level for a predetermined time, changes the signal level from the third level to the second level.

IPC Classes  ?

  • H05B 47/105 - Controlling the light source in response to determined parameters
  • F21S 2/00 - Systems of lighting devices, not provided for in main groups  or , e.g. of modular construction
  • F21V 9/40 - Elements for modifying spectral properties, polarisation or intensity of the light emitted, e.g. filters with provision for controlling spectral properties, e.g. colour, or intensity
  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1347 - Arrangement of liquid crystal layers or cells in which the final condition of one light beam is achieved by the addition of the effects of two or more layers or cells
  • H05B 47/16 - Controlling the light source by timing means
  • F21Y 115/10 - Light-emitting diodes [LED]

21.

OXIDE SEMICONDUCTOR FILM, THIN FILM TRANSISTOR AND ELECTRONIC DEVICE

      
Application Number JP2023027648
Publication Number 2024/042997
Status In Force
Filing Date 2023-07-27
Publication Date 2024-02-29
Owner
  • JAPAN DISPLAY INC. (Japan)
  • IDEMITSU KOSAN CO., LTD. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya
  • Sasaki Daichi
  • Kawashima Emi
  • Tsuruma Yuki

Abstract

An oxide semiconductor film according to the present invention has a polycrystalline structure and is provided on a substrate; the crystal structure of the oxide semiconductor film is a bixbyite structure; and with respect to the out-of-plane XRD diffraction pattern of the oxide semiconductor film as obtained using a Cu-Kα ray, the ratio of the peak intensity of the (222) plane to the peak intensity of the (422) plane is 3.0 or less. The crystallite diameter as calculated from the peak of the (222) plane may be 10 nm or more.

IPC Classes  ?

22.

ILLUMINATION SYSTEM AND CONTROL DEVICE

      
Application Number JP2023023330
Publication Number 2024/042837
Status In Force
Filing Date 2023-06-23
Publication Date 2024-02-29
Owner JAPAN DISPLAY INC. (Japan)
Inventor Chien, Chiehan

Abstract

The present invention provides an illumination system and a control device that can change various settings of a plurality of illumination devices all at once. This illumination system comprises: a light source; a plurality of illumination devices provided on the optical axis of the light source, and provided with an optical element that can set the state of distribution of light emitted from the light source in a first direction, and a second direction intersecting the first direction; and a control device that controls the plurality of illumination devices so as to change the light distribution state. The control device comprises: a touch sensor having a detection region on which a plurality of detection elements are provided; a display panel on which a display region is provided overlapping the touch sensor detection region in plan view; and a first memory circuit that stores setting information including at least the setting value of the light distribution state. When the setting value has been changed, the control device transmits setting information to some or all of the plurality of illumination devices, and each illumination device is provided with a second memory circuit that stores setting information transmitted from the control device.

IPC Classes  ?

  • H05B 47/10 - Controlling the light source
  • H05B 45/10 - Controlling the intensity of the light
  • H05B 45/20 - Controlling the colour of the light
  • H05B 47/105 - Controlling the light source in response to determined parameters
  • H05B 47/155 - Coordinated control of two or more light sources
  • H05B 47/19 - Controlling the light source by remote control via wireless transmission

23.

OPTICAL DEVICE

      
Application Number JP2023024894
Publication Number 2024/034293
Status In Force
Filing Date 2023-07-05
Publication Date 2024-02-15
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Ikeda Kojiro
  • Koito Takeo

Abstract

This optical device includes: a light source; and an optical element that includes a plurality of liquid crystal cells which are layered and that controls distribution of light emitted from the light source. The plurality of liquid crystal cells each include: a first substrate (110-1) in which first electrodes (120-1) and second electrodes (120-2) are arranged alternatingly; a second substrate in which third electrodes and fourth electrodes are arranged alternatingly; and a liquid crystal layer between the first substrate and the second substrate. The first electrodes and the second electrodes each include: a first linear section (LP11) that extends at an angle α° with respect to a first direction; and a second linear section (LP 12) that extends at an angle β° with respect to the first direction. The third electrodes and the fourth electrodes each include: a third linear section that extends at an angle (90+α)° with respect to the first direction; and a fourth linear section that extends at an angle (90+β)° with respect to the first direction.

IPC Classes  ?

  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1343 - Electrodes
  • G02F 1/1347 - Arrangement of liquid crystal layers or cells in which the final condition of one light beam is achieved by the addition of the effects of two or more layers or cells

24.

DETECTION DEVICE

      
Application Number JP2023027709
Publication Number 2024/034431
Status In Force
Filing Date 2023-07-28
Publication Date 2024-02-15
Owner JAPAN DISPLAY INC. (Japan)
Inventor Kato, Hirofumi

Abstract

This detection device (1) comprises: a housing (200) which has a light-blocking first surface and a translucent second surface facing the first surface; a light source (60) which is provided within a first region (200A) of the housing (200) and which emits light such that the light is outputted from the second surface in contact with a measurement subject and travels toward the measurement subject; first light sensors (10A) that are provided within the first region (200A) of the housing (200) and are capable of receiving the light from the second surface; and second light sensors (10B) that are provided within a second region (200B), different from the first region (200A), of the housing (200). The housing (200) has openings (230) which are formed in the first surface in the second region (200B) and which allow light from the outside of the housing (200) to pass therethrough to the interior of the housing (200). The second light sensors (10B) receive light from the openings (230) and block light on the side facing the second surface.

IPC Classes  ?

  • A61B 5/02 - Measuring pulse, heart rate, blood pressure or blood flow; Combined pulse/heart-rate/blood pressure determination; Evaluating a cardiovascular condition not otherwise provided for, e.g. using combinations of techniques provided for in this group with electrocardiography; Heart catheters for measuring blood pressure
  • A61B 5/0245 - Measuring pulse rate or heart rate using sensing means generating electric signals
  • A61B 5/1171 - Identification of persons based on the shapes or appearances of their bodies or parts thereof
  • A61B 5/1172 - Identification of persons based on the shapes or appearances of their bodies or parts thereof using fingerprinting
  • A61B 5/1455 - Measuring characteristics of blood in vivo, e.g. gas concentration, pH-value using optical sensors, e.g. spectral photometrical oximeters

25.

METHOD FOR TESTING RADIO WAVE REFLECTING DEVICE

      
Application Number JP2023019428
Publication Number 2024/029170
Status In Force
Filing Date 2023-05-25
Publication Date 2024-02-08
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Suzuki Daiichi
  • Oka Shinichiro
  • Okita Mitsutaka

Abstract

According to this method for testing a radio wave reflecting device, which has a plurality of reflection elements arranged in a row direction and in a column direction, the plurality of reflection elements each has: a patch electrode; a common electrode lying on the side of the back surface of the patch electrode; and a liquid crystal layer located between the patch electrode and the common electrode. A voltage V1 is applied between each of the plurality of patch electrodes and the common electrode, thereby determining whether the reflection elements are good or bad on the basis of the change of a frame-shaped area appearing around the plurality of patch electrodes seen in a plan view when the voltage is applied between the plurality of patch electrodes and the common electrode.

IPC Classes  ?

  • H01P 1/18 - Phase-shifters
  • H01Q 3/36 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the distribution of energy across a radiating aperture varying the phase by electrical means with variable phase-shifters
  • H01Q 15/14 - Reflecting surfaces; Equivalent structures

26.

TRANSISTOR

      
Application Number JP2023020437
Publication Number 2024/029181
Status In Force
Filing Date 2023-06-01
Publication Date 2024-02-08
Owner JAPAN DISPLAY INC. (Japan)
Inventor Nishimura Masumi

Abstract

This transistor includes: an amorphous substrate; a first buffer layer on the amorphous substrate; a first nitride semiconductor layer that is provided in an island shape on the first buffer layer; a second nitride semiconductor layer that is on the first nitride semiconductor layer and covers the first nitride semiconductor layer; and a gate electrode layer that is on the second nitride semiconductor layer and overlaps with the first nitride semiconductor layer.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/338 - Field-effect transistors with a Schottky gate
  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
  • H01L 29/812 - Field-effect transistors with field effect produced by a PN or other rectifying junction gate with a Schottky gate

27.

LAMINATE STRUCTURE AND THIN-FILM TRANSISTOR

      
Application Number JP2023027457
Publication Number 2024/029429
Status In Force
Filing Date 2023-07-26
Publication Date 2024-02-08
Owner
  • JAPAN DISPLAY INC. (Japan)
  • IDEMITSU KOSAN CO., LTD. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya
  • Kawashima Emi
  • Tsuruma Yuki
  • Sasaki Daichi

Abstract

This laminate structure has an underlying insulating layer, a metal oxide layer disposed on the underlying insulating layer, and an oxide semiconductor layer disposed in contact with the metal oxide layer. The oxide semiconductor layer has a region in which a metal element, this metal element being the same as a metal element contained in the metal oxide layer, exhibits a concentration gradient, wherein the concentration gradient of the metal element exhibits an increase as the metal oxide layer/oxide semiconductor layer interface is approached.

IPC Classes  ?

  • H01L 21/363 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using physical deposition, e.g. vacuum deposition, sputtering
  • C23C 14/08 - Oxides
  • H01L 29/786 - Thin-film transistors

28.

THIN-FILM TRANSISTOR AND ELECTRONIC DEVICE

      
Application Number JP2023027496
Publication Number 2024/029437
Status In Force
Filing Date 2023-07-27
Publication Date 2024-02-08
Owner
  • JAPAN DISPLAY INC. (Japan)
  • IDEMITSU KOSAN CO., LTD. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya
  • Kawashima Emi
  • Tsuruma Yuki
  • Sasaki Daichi

Abstract

This thin-film transistor comprises: a substrate; a metal oxide layer provided on the substrate; an oxide semiconductor layer that is provided in contact with the metal oxide layer and that contains a plurality of crystal grains; a gate electrode provided on the oxide semiconductor layer; and a gate insulating layer provided between the oxide semiconductor layer and the gate electrode. The plurality of crystal grains include a crystal boundary in which the crystal orientation difference between two adjacent measurement points obtained by EBSD (electron beam backscatter diffraction) method exceeds 5°, and the average value of KAM values calculated using the EBSD method is 1.4° or greater.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/363 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using physical deposition, e.g. vacuum deposition, sputtering

29.

OXIDE SEMICONDUCTOR FILM, THIN-FILM TRANSISTOR, AND ELECTRONIC DEVICE

      
Application Number JP2023027497
Publication Number 2024/029438
Status In Force
Filing Date 2023-07-27
Publication Date 2024-02-08
Owner
  • JAPAN DISPLAY INC. (Japan)
  • IDEMITSU KOSAN CO., LTD. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya
  • Kawashima Emi
  • Tsuruma Yuki
  • Sasaki Daichi

Abstract

This oxide semiconductor film is provided on a substrate and includes a plurality of crystal grains. The oxide semiconductor film includes indium (In), and a first metal element selected from the group consisting of aluminum (Al), gallium (Ga), yttrium (Y), scandium (Sc), and lanthanide elements. The plurality of crystal grains include a crystal grain boundary that is defined when the crystal orientation difference of two adjacent measurement points, as obtained by an electron backscatter diffraction (EBSD) method, exceeds 5°, and the average KAM value as calculated by the EBSD method is 1.0° or greater. The average value of change in the crystal grain boundary orientation as calculated by the EBSD method may be 40° or less.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
  • H01L 21/203 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using physical deposition, e.g. vacuum deposition, sputtering
  • H01L 21/336 - Field-effect transistors with an insulated gate

30.

FILM FORMATION DEVICE AND METHOD FOR FORMING GALLIUM NITRIDE FILM

      
Application Number JP2023020436
Publication Number 2024/024267
Status In Force
Filing Date 2023-06-01
Publication Date 2024-02-01
Owner JAPAN DISPLAY INC. (Japan)
Inventor Ikeda Masanobu

Abstract

This film formation device includes a vacuum chamber, a substrate support part that supports a substrate, a target support part that supports a target including nitrogen and gallium, a sputtering gas supply unit that supplies a sputtering gas to the vacuum chamber, a sputtering power source that applies a voltage to the target, a first radical supply source that is capable of supplying a nitrogen radical and a hydrogen radical to the vacuum chamber, and a control unit, the control unit controlling the sputtering gas supply unit, the sputtering power source, and the first radical supply source so that a first period in which the sputtering gas, the nitrogen radical, and the hydrogen radical are supplied to the vacuum chamber and a voltage is applied to the target, and a second period in which a voltage is applied to the target without the nitrogen radical and the hydrogen radical being supplied to the vacuum chamber, are repeated.

IPC Classes  ?

  • C23C 14/34 - Sputtering
  • C23C 14/06 - Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
  • H01L 21/363 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using physical deposition, e.g. vacuum deposition, sputtering

31.

FILM FORMATION DEVICE

      
Application Number JP2023020438
Publication Number 2024/024268
Status In Force
Filing Date 2023-06-01
Publication Date 2024-02-01
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Ikeda Masanobu
  • Nishimura Masumi

Abstract

2233radical; and a control part that controls the sputtering gas supply part, the sputtering power supply, the first radical supply source, and the second radical supply source.

IPC Classes  ?

  • C23C 14/34 - Sputtering
  • C23C 14/06 - Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
  • H01L 21/203 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using physical deposition, e.g. vacuum deposition, sputtering
  • H01L 21/363 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using physical deposition, e.g. vacuum deposition, sputtering

32.

DISPLAY DEVICE AND METHOD FOR MANUFACTURING SAME

      
Application Number JP2023019137
Publication Number 2024/024239
Status In Force
Filing Date 2023-05-23
Publication Date 2024-02-01
Owner JAPAN DISPLAY INC. (Japan)
Inventor Nishimura Masumi

Abstract

A display device according to the present invention comprises a substrate, and a plurality of pixels and at least one reflective element positioned on the substrate. Each of the plurality of pixels comprises a pixel circuit and a light-emitting element, and the light-emitting element comprises a pixel electrode electrically connected with the pixel circuit, a first laminated structure on the pixel electrode, and a common electrode on the first laminated structure. The at least one reflective element has a lower electrode, a second laminated structure on the lower electrode, and a reflective film that overlaps the second laminated structure. The first laminated structure and the second laminated structure each include a plurality of inorganic semiconductor layers.

IPC Classes  ?

  • G09F 9/00 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • G09F 9/33 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
  • H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
  • H01L 33/60 - Reflective elements
  • H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
  • H05B 33/10 - Apparatus or processes specially adapted to the manufacture of electroluminescent light sources
  • H05B 33/12 - Light sources with substantially two-dimensional radiating surfaces
  • H05B 33/14 - Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of the electroluminescent material
  • H05B 33/22 - Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of auxiliary dielectric or reflective layers
  • H05B 33/26 - Light sources with substantially two-dimensional radiating surfaces characterised by the composition or arrangement of the conductive material used as an electrode
  • H05B 33/28 - Light sources with substantially two-dimensional radiating surfaces characterised by the composition or arrangement of the conductive material used as an electrode of translucent electrodes
  • H10K 59/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group

33.

ILLUMINATION DEVICE AND ILLUMINATION SYSTEM

      
Application Number JP2023024995
Publication Number 2024/024433
Status In Force
Filing Date 2023-07-05
Publication Date 2024-02-01
Owner JAPAN DISPLAY INC. (Japan)
Inventor Shao, Gang

Abstract

The present invention provides an illumination device and an illumination system with which it is possible to realize dynamic light distribution control using 1/f fluctuation. The present invention comprises: a light source; an optical element that is provided on an optical axis of the light source, and that controls the light distribution status of light emitted from the light source in two directions, a first direction and a second direction different from the first direction; and a processing circuit that executes at least light distribution control processing of the optical element. The processing circuit dynamically controls the light distribution status of at least one of the first direction and the second direction using 1/f fluctuation on the basis of the light distribution setting value which is the setting value for executing light distribution control processing.

IPC Classes  ?

  • H05B 47/105 - Controlling the light source in response to determined parameters
  • F21S 2/00 - Systems of lighting devices, not provided for in main groups  or , e.g. of modular construction
  • F21V 9/40 - Elements for modifying spectral properties, polarisation or intensity of the light emitted, e.g. filters with provision for controlling spectral properties, e.g. colour, or intensity
  • H05B 47/16 - Controlling the light source by timing means
  • H05B 47/165 - Controlling the light source following a pre-assigned programmed sequence; Logic control [LC]
  • F21Y 115/10 - Light-emitting diodes [LED]

34.

DETECTION DEVICE

      
Application Number JP2023024745
Publication Number 2024/014353
Status In Force
Filing Date 2023-07-04
Publication Date 2024-01-18
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Fujisawa, Akihiko
  • Ito, Kaoru
  • Seino, Shiori

Abstract

A detection device according to the present invention has a plurality of photodiodes that are provided to a substrate, a light source that is arranged opposite the photodiodes, and a liquid crystal panel that is arranged between the photodiodes and the light source in the direction perpendicular to the substrate. The liquid crystal panel has a plurality of pixels. As seen in plan view, the photodiodes are larger than each of the pixels and are arranged at positions that coincide with pluralities of pixels. The liquid crystal panel puts at least one pixel of the plurality of pixels that coincide with a photodiode in a transmission state and puts the other pixels in a non-transmission state.

IPC Classes  ?

  • H01L 27/146 - Imager structures
  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells

35.

DETECTION DEVICE

      
Application Number JP2023024787
Publication Number 2024/014356
Status In Force
Filing Date 2023-07-04
Publication Date 2024-01-18
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Ishihara, Tomoyuki
  • Fujisawa, Akihiko
  • Nakaoka, Chikyu
  • Harada, Tsutomu
  • Ito, Kaoru
  • Mamba, Norio

Abstract

This detection device has: a plurality of photodiodes provided on a substrate; a plurality of light emission parts arranged opposite to the plurality of photodiodes; and a collimating lens that is arranged between the plurality of photodiodes and the light emission parts and that enables emission of parallel light toward the plurality of photodiodes. Among the plurality of light emission parts, at least one light emission part is set to a lighting state, and the other light emission parts are set to a non-lighting state. The emission angle of parallel light from the collimating lens differs according to the position of the light emission part in the lighting state.

IPC Classes  ?

36.

FLUORESCENCE DETECTION DEVICE

      
Application Number JP2023022483
Publication Number 2024/009737
Status In Force
Filing Date 2023-06-16
Publication Date 2024-01-11
Owner JAPAN DISPLAY INC. (Japan)
Inventor Takahashi, Yasuhiro

Abstract

Provided is a fluorescence detection device with improved fluorescence detection sensitivity. The fluorescence detection device comprises: a light source that irradiates a sample with a circularly polarized excitation light; a cholesteric liquid crystal layer that transmits fluorescence emitted by the sample due to irradiation with the excitation light and reflects the excitation light; and a detection circuit that detects fluorescence transmitted by the cholesteric liquid crystal layer.

IPC Classes  ?

37.

DETECTION DEVICE

      
Application Number JP2023023173
Publication Number 2024/009790
Status In Force
Filing Date 2023-06-22
Publication Date 2024-01-11
Owner JAPAN DISPLAY INC. (Japan)
Inventor Haga, Yuta

Abstract

A detection device (1) comprises: a light source (60); a plurality of optical sensors (10) arranged to be able to receive light from the light source (60) and having different sizes of light receiving areas; a detection circuit (112) that is electrically connected to each of the plurality of optical sensors (10) and detects waveform data that can identify the amount of light received by each of the plurality of optical sensors (10); and a control circuit (121) that selects at least one piece of waveform data of which the waveform amplitude satisfies a selection condition, from among a plurality of pieces of waveform data detected from the plurality of optical sensors (10).

IPC Classes  ?

  • H01L 31/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto
  • A61B 5/1455 - Measuring characteristics of blood in vivo, e.g. gas concentration, pH-value using optical sensors, e.g. spectral photometrical oximeters

38.

LIGHT CONTROL DEVICE

      
Application Number JP2023017361
Publication Number 2024/009601
Status In Force
Filing Date 2023-05-09
Publication Date 2024-01-11
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Yoshida, Masato
  • Ohira, Hirofumi

Abstract

This light control device (100) comprises a panel unit in which a plurality of light control panels are layered. The light control panels have a first substrate, a second substrate, a liquid crystal layer (4), a first seal material (5) which extends along edges of the liquid crystal layer (4) and in which an injection opening (50) is provided, and a second seal material (6) that seals the injection opening (50), and the second seal material (6) protrudes to the outside from the edge of the light control panel as viewed from a first direction. When each of the plurality of light control panels is considered in sequence as a single light control panel, the second seal material (6) in each single light control panel is positioned inside of the edges of the light control panels other than the single light control panel as viewed from the first direction.

IPC Classes  ?

  • G02F 1/1347 - Arrangement of liquid crystal layers or cells in which the final condition of one light beam is achieved by the addition of the effects of two or more layers or cells
  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1339 - Gaskets; Spacers; Sealing of cells
  • G02F 1/1341 - Filling or closing of cells

39.

DRIVING METHOD FOR RADIO WAVE REFLECTION DEVICE

      
Application Number JP2023018325
Publication Number 2024/009618
Status In Force
Filing Date 2023-05-16
Publication Date 2024-01-11
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Okita Mitsutaka
  • Oka Shinichiro
  • Suzuki Daiichi
  • Matsuno Hiromi
  • Ohto Takuya
  • Amano Yoshiaki

Abstract

This driving method is for a radio wave reflection device, which has a plurality of reflecting elements arrayed in a row direction and a column direction and which controls an amount of phase change in reflected waves with a voltage applied to the plurality of reflecting elements, and is characterized by: dividing the arrays of the plurality of reflecting elements into a first region for controlling the amount of phase change for every column of each of a plurality of reflecting elements arrayed in the column direction, and a second region for controlling the amount of phase change for every two adjacent columns of a plurality of reflecting elements arrayed in the column direction; and simultaneously driving each of the plurality of reflecting elements belonging to the first region and the second region.

IPC Classes  ?

  • H01Q 15/14 - Reflecting surfaces; Equivalent structures

40.

DETECTION DEVICE

      
Application Number JP2023023070
Publication Number 2024/009781
Status In Force
Filing Date 2023-06-22
Publication Date 2024-01-11
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Asakura Shinya
  • Tsunashima Takanori

Abstract

Provided is a technology for detecting a neutron ray or an X-ray with low illuminance while reducing the pixel area of sensor pixels and maintaining a layout symmetry. This detection device has a plurality of photo sensors and signal read-out lines, and each of the plurality of photo sensors has a photodiode and an amplification circuit. The plurality of amplification circuits provided to the plurality of photo sensors are connected in series, the output of each of the plurality of photodiodes is connected to the input of each of the plurality of amplification circuits via a selective switch circuit, and the outputs of the plurality of amplification circuits are respectively connected to the signal read-out lines via read-out switch circuits.

IPC Classes  ?

  • H04N 25/30 - Circuitry of solid-state image sensors [SSIS]; Control thereof for transforming X-rays into image signals
  • H04N 25/76 - Addressed sensors, e.g. MOS or CMOS sensors
  • H04N 25/77 - Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

41.

DETECTION APPARATUS AND WEARABLE DEVICE

      
Application Number JP2023024123
Publication Number 2024/009876
Status In Force
Filing Date 2023-06-29
Publication Date 2024-01-11
Owner
  • JAPAN DISPLAY INC. (Japan)
  • THE UNIVERSITY OF TOKYO (Japan)
Inventor
  • Himoto, Kento
  • Nakamura, Takashi
  • Someya, Takao
  • Yokota, Tomoyuki
  • Cheng, Dongkai

Abstract

Provided are a detection apparatus and a wearable device which are capable of acquiring desired biological information. The detection apparatus comprises: a plurality of optical sensors (PD) arranged on a detection surface; a light source that irradiates light onto the optical sensors (PD); an AFE circuit that acquires a detection value from each of the plurality of optical sensors (PD); and a signal processing circuit that acquires prescribed biological information on the basis of first time domain data obtained by acquiring detection values in a time series. The signal processing circuit converts the first time domain data to a time domain matrix, subjects the time domain matrix to singular value decomposition, inversely calculates second time domain data on the basis of a prescribed singular value from among a plurality of singular values obtained as the results of the singular value decomposition, and uses the second time domain data to acquire, as image information, biological information that changes in a time series.

IPC Classes  ?

  • A61B 5/02 - Measuring pulse, heart rate, blood pressure or blood flow; Combined pulse/heart-rate/blood pressure determination; Evaluating a cardiovascular condition not otherwise provided for, e.g. using combinations of techniques provided for in this group with electrocardiography; Heart catheters for measuring blood pressure
  • A61B 5/0245 - Measuring pulse rate or heart rate using sensing means generating electric signals

42.

DISPLAY DEVICE AND LIQUID CRYSTAL DISPLAY DEVICE

      
Application Number JP2023015429
Publication Number 2024/004344
Status In Force
Filing Date 2023-04-18
Publication Date 2024-01-04
Owner JAPAN DISPLAY INC. (Japan)
Inventor Miyao Makoto

Abstract

The present invention addresses the problem of realizing a large-screen display device by disposing a plurality of display devices in parallel. The specific means are as described below. Provided is a display device including a first display device 1 and a second display device 2 that are disposed in parallel. The display device is characterized in that: the first display device 1 has a configuration in which a first transparent display panel 6 is sandwiched between a first transparent protection plate 500 and a second transparent protection plate 600; an end of the first transparent display panel 6 is retreated more inward than ends of the first transparent protection plate 500 and the second transparent protection plate 600; the second display device 2 has a configuration in which a second transparent display panel 7 is sandwiched between a third transparent protection plate 500 and a fourth transparent protection plate 600; the second transparent display panel 7 includes a protrusion protruding more outward than ends of the third transparent protection plate 500 and the fourth transparent protection plate 600; and the protrusion of the second transparent display panel 7 is sandwiched between the first transparent protection plate 500 and the second transparent protection plate 600.

IPC Classes  ?

  • G09F 9/40 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character is selected from a number of characters arranged one beside the other, e.g. on a common carrier plate
  • G02F 1/1333 - Constructional arrangements
  • G09F 9/00 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements

43.

IMAGE-CAPTURING DEVICE, SUBJECT DEPTH ESTIMATION METHOD, AND PROGRAM

      
Application Number JP2023014410
Publication Number 2024/004316
Status In Force
Filing Date 2023-04-07
Publication Date 2024-01-04
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Tanaka, Hitoshi
  • Nakatogawa, Hirondo
  • Aoki, Yoshiro

Abstract

The present invention improves practicality in subject depth estimation through encoded image-capturing. Provided is a subject depth estimation method which involves: acquiring captured unmasked images by capturing a subject in a state where a mask is not present; determining a representative edge direction on the basis of an edge image included in the captured unmasked image; selecting, from among a plurality of masks prepared in advance, a combination of masks of which depth estimation accuracies for an object, which corresponds to an image that represents an edge in the same direction as the representative edge, are relatively the highest; using each mask included in the selected combination of masks to capture the subject and acquire a plurality of captured masked images; and calculating depth estimation values at a plurality of positions in the subject by performing, on the plurality of captured masked images, decoding processes based on point spread functions that are unique to the selected masks, respectively.

IPC Classes  ?

  • G03B 9/08 - Shutters
  • G03B 11/00 - Filters or other obturators specially adapted for photographic purposes
  • G06T 7/571 - Depth or shape recovery from multiple images from focus
  • G01B 11/00 - Measuring arrangements characterised by the use of optical techniques
  • H04N 23/55 - Optical parts specially adapted for electronic image sensors; Mounting thereof
  • H04N 23/60 - Control of cameras or camera modules

44.

RADIO WAVE REFLECTION DEVICE

      
Application Number JP2023021593
Publication Number 2024/004595
Status In Force
Filing Date 2023-06-09
Publication Date 2024-01-04
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Suzuki Daiichi
  • Oka Shinichiro
  • Okita Mitsutaka

Abstract

This radio wave reflection device includes: a plurality of first patch electrodes; a plurality of second patch electrodes different in size from the plurality of first patch electrodes; a ground electrode provided opposite and at a distance from the plurality of first patch electrodes and the plurality of second patch electrodes; and a liquid crystal layer provided between the ground electrode and the plurality of first patch electrodes and plurality of second patch electrodes. The plurality of first patch electrodes and the plurality of second patch electrodes are arranged alternately in a first direction or in a second direction intersecting the first direction. The first patch electrodes are adjacent to the second patch electrodes, respectively, in the first direction or in the second direction.

IPC Classes  ?

  • H01Q 15/14 - Reflecting surfaces; Equivalent structures
  • H01Q 3/44 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the electric or magnetic characteristics of reflecting, refracting, or diffracting devices associated with the radiating element

45.

CAMERA MODULE

      
Application Number JP2023015021
Publication Number 2023/248589
Status In Force
Filing Date 2023-04-13
Publication Date 2023-12-28
Owner JAPAN DISPLAY INC. (Japan)
Inventor Nakatogawa, Hirondo

Abstract

A camera module according to an embodiment of the present invention comprises: an imaging element; and a liquid crystal panel. The liquid crystal panel includes an opening disposed at a position for causing light to enter the imaging element, a liquid crystal layer disposed at a position overlapping the opening, an electrode disposed at a position overlapping the liquid crystal layer, and a driver that drives the liquid crystal layer by applying a voltage to the electrode. The driver drives the liquid crystal layer on the basis of a first control value, and drives the liquid crystal layer on the basis of a second control value. A first image captured by driving the liquid crystal layer on the basis of the first control value is used for calculating the distance to an object having a first luminance. A second image captured by driving the liquid crystal layer on the basis of the second control value is used for calculating the distance to an object having a second luminance.

IPC Classes  ?

  • G01C 3/06 - Use of electric means to obtain final indication
  • G02B 7/36 - Systems for automatic generation of focusing signals using image sharpness techniques
  • G03B 7/00 - Control of exposure by setting shutters, diaphragms or filters, separately or conjointly
  • G03B 7/093 - Digital circuits for control of exposure time
  • G03B 9/02 - Diaphragms
  • G03B 11/00 - Filters or other obturators specially adapted for photographic purposes
  • G03B 15/00 - Special procedures for taking photographs; Apparatus therefor
  • G03B 30/00 - Camera modules comprising integrated lens units and imaging units, specially adapted for being embedded in other devices, e.g. mobile phones or vehicles
  • H04N 23/55 - Optical parts specially adapted for electronic image sensors; Mounting thereof
  • H04N 23/57 - Mechanical or electrical details of cameras or camera modules specially adapted for being embedded in other devices
  • H04N 23/73 - Circuitry for compensating brightness variation in the scene by influencing the exposure time
  • H04N 23/75 - Circuitry for compensating brightness variation in the scene by influencing optical camera components

46.

ILLUMINATION DEVICE CONTROL DEVICE AND ILLUMINATION SYSTEM

      
Application Number JP2023023345
Publication Number 2023/249110
Status In Force
Filing Date 2023-06-23
Publication Date 2023-12-28
Owner JAPAN DISPLAY INC. (Japan)
Inventor Chien, Chiehan

Abstract

Provided are an illumination device control device with which it is possible to intuitively set the diffusibility of light in two directions, and an illumination system. The illumination device control device is capable of controlling the diffusibility of light in a first direction and a second direction. An optical diffusibility setting screen for performing an optical diffusibility setting process for the illumination device is displayed in a display region (DA). The display region (DA) overlaps a touch sensor detection region (FA). In the optical diffusibility setting screen, an XY plane is defined in which the X-direction corresponds to the first direction and the Y-direction corresponds to the second direction, with a predetermined position in the optical diffusibility setting screen being located at the origin (O). The optical diffusibility setting screen is provided with: an optical-distribution shape object (OBJ) that has a central point at the origin (O) of the XY plane; a first slider (first optical diffusibility setting object S1) that has a central point at the position (x0) of an intersection point of the X-axis of the XY plane and the outline of the optical-distribution shape object (OBJ); and a second slider (second optical diffusibility setting object S2) that has a central point at the position (y0) of an intersection point of the Y-axis of the XY plane and the outline of the optical-distribution shape object (OBJ).

IPC Classes  ?

  • F21V 23/00 - Arrangement of electric circuit elements in or on lighting devices
  • F21V 23/04 - Arrangement of electric circuit elements in or on lighting devices the elements being switches
  • F21Y 115/10 - Light-emitting diodes [LED]
  • F21S 2/00 - Systems of lighting devices, not provided for in main groups  or , e.g. of modular construction
  • F21V 9/40 - Elements for modifying spectral properties, polarisation or intensity of the light emitted, e.g. filters with provision for controlling spectral properties, e.g. colour, or intensity
  • F21V 14/00 - Controlling the distribution of the light emitted by adjustment of elements
  • F21V 14/08 - Controlling the distribution of the light emitted by adjustment of elements by movement of screens
  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1333 - Constructional arrangements
  • G02F 1/1337 - Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
  • G02F 1/1343 - Electrodes
  • G02F 1/1347 - Arrangement of liquid crystal layers or cells in which the final condition of one light beam is achieved by the addition of the effects of two or more layers or cells
  • G06F 3/0481 - Interaction techniques based on graphical user interfaces [GUI] based on specific properties of the displayed interaction object or a metaphor-based environment, e.g. interaction with desktop elements like windows or icons, or assisted by a cursor's changing behaviour or appearance
  • G06F 3/0488 - Interaction techniques based on graphical user interfaces [GUI] using specific features provided by the input device, e.g. functions controlled by the rotation of a mouse with dual sensing arrangements, or of the nature of the input device, e.g. tap gestures based on pressure sensed by a digitiser using a touch-screen or digitiser, e.g. input of commands through traced gestures

47.

RADIO WAVE REFLECTION DEVICE

      
Application Number JP2023014623
Publication Number 2023/248584
Status In Force
Filing Date 2023-04-10
Publication Date 2023-12-28
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Okita Mitsutaka
  • Oka Shinichiro
  • Suzuki Daiichi

Abstract

This radio wave reflection device is provided with a patch electrode, a common electrode, a liquid crystal layer sandwiched between the patch electrode and the common electrode, and a metal film disposed on the opposite side of the common electrode from the liquid crystal layer side, wherein the metal film is disposed to be separate from the common electrode and the patch electrode is disposed to overlap the metal film. Provided that a value obtained by multiplying the distance T between the common electrode and the metal film by a wavelength λ of a radio wave radiated to the patch electrode is x, x may be 0.02-0.34. Further, x may be 0.10-0.22.

IPC Classes  ?

  • H01Q 15/14 - Reflecting surfaces; Equivalent structures

48.

GALLIUM NITRIDE-BASED SEMICONDUCTOR DEVICE ON AMORPHOUS SUBSTRATE AND METHOD FOR MANUFACTURING SAME

      
Application Number JP2023020439
Publication Number 2023/248753
Status In Force
Filing Date 2023-06-01
Publication Date 2023-12-28
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Onodera Ryo
  • Nishimura Masumi

Abstract

This gallium nitride-based semiconductor device comprises: an amorphous substrate; an orientation control layer on the amorphous substrate; a gallium nitride-based semiconductor layer on the orientation control layer; and at least one electrode in contact with the gallium nitride-based semiconductor layer. The at least one electrode uses a metal material as a vapor deposition material, and has the metal material formed on a crystalline gallium nitride-based semiconductor layer using a vacuum vapor deposition method using a resistance heating vapor source.

IPC Classes  ?

  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 21/203 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using physical deposition, e.g. vacuum deposition, sputtering
  • H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
  • H01L 29/47 - Schottky barrier electrodes
  • H01L 29/872 - Schottky diodes

49.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number JP2023020247
Publication Number 2023/238746
Status In Force
Filing Date 2023-05-31
Publication Date 2023-12-14
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Tamaru Takaya
  • Tsubuku Masashi
  • Watakabe Hajime
  • Sasaki Toshinari

Abstract

A semiconductor device according to the present invention comprises: a metal oxide layer provided on an insulating surface and having aluminum as a main component; an oxide semiconductor layer provided on the metal oxide layer; a gate electrode facing the oxide semiconductor layer; and a gate insulating layer between the oxide semiconductor layer and the gate electrode. The water contact angle at the top surface of the metal oxide layer is less than 20°.

IPC Classes  ?

50.

ELECTRONIC DEVICE

      
Application Number JP2023020266
Publication Number 2023/238749
Status In Force
Filing Date 2023-05-31
Publication Date 2023-12-14
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Tanaka, Hitoshi
  • Nakatogawa, Hirondo
  • Aoki, Yoshiro

Abstract

The purpose of the present embodiment is to provide an electronic device in which the occurrence of lines can be suppressed, and a decrease in precision can be suppressed. This electronic device comprises a first lower electrode connected to a first upper electrode, a second lower electrode connected to a second upper electrode, a third lower electrode connected to a third upper electrode, a fourth lower electrode connected to a fourth upper electrode, and a fifth lower electrode connected to a fifth upper electrode, the second lower electrode overlapping the first upper electrode and the second upper electrode, the third lower electrode overlapping the first upper electrode and the third upper electrode, the fourth lower electrode overlapping the second upper electrode, the third upper electrode, and the fourth upper electrode, and the fifth lower electrode overlapping the second upper electrode, the third upper electrode, and the fifth upper electrode.

IPC Classes  ?

  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1333 - Constructional arrangements
  • G02F 1/1343 - Electrodes

51.

THIN-FILM TRANSISTOR AND ELECTRONIC DEVICE

      
Application Number JP2023015626
Publication Number 2023/238521
Status In Force
Filing Date 2023-04-19
Publication Date 2023-12-14
Owner
  • JAPAN DISPLAY INC. (Japan)
  • IDEMITSU KOSAN CO., LTD. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya
  • Kawashima Emi
  • Tsuruma Yuki
  • Sasaki Daichi

Abstract

A thin-film transistor (10) includes: an oxide semiconductor layer (140) provided on a substrate (100) and having a polycrystalline structure; a gate electrode (160) provided on the oxide semiconductor layer; and a gate insulation layer (150) provided between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer includes: a first region (141) which overlaps the gate electrode and has a first carrier concentration (n1); a second region (142) which does not overlap the gate electrode and has a second carrier concentration (n2); and a third region (143) which is between the first region and the second region and overlaps the gate electrode. The second carrier concentration is greater than the first carrier concentration, the carrier concentration in the third region decreases in a channel length direction running from the second region toward the first second region, and the length of the third region in the channel length direction is 0.00 μm or more and 0.60 μm or less.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/66 - Testing or measuring during manufacture or treatment

52.

OPTICAL ELEMENT AND ILLUMINATION APPARATUS INCLUDING OPTICAL ELEMENT

      
Application Number JP2023019059
Publication Number 2023/234109
Status In Force
Filing Date 2023-05-23
Publication Date 2023-12-07
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Ikeda Kojiro
  • Koito Takeo

Abstract

This optical element comprises a first liquid crystal cell, a second liquid crystal cell, a third liquid crystal cell, and a fourth liquid crystal cell, which are disposed in order so as to overlap each other. The first, second, third, and fourth liquid crystal cells each include a plurality of first electrodes arranged like stripes and extending in a first extension direction, a first orientation film located on the plurality of first electrodes, a liquid crystal layer located on the first orientation film, a second orientation film located on the liquid crystal layer, and a plurality of second electrodes located on the second orientation film, arranged like stripes, extending in a second extension direction, and intersecting the plurality of first electrodes. Further detailed structures are described in the description.

IPC Classes  ?

  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1337 - Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
  • G02F 1/1343 - Electrodes
  • G02F 1/1347 - Arrangement of liquid crystal layers or cells in which the final condition of one light beam is achieved by the addition of the effects of two or more layers or cells

53.

LAMINATE STRUCTURE, METHOD FOR PRODUCING SAME, AND SEMICONDUCTOR DEVICE INCLUDING LAMINATE STRUCTURE

      
Application Number JP2023014647
Publication Number 2023/228605
Status In Force
Filing Date 2023-04-11
Publication Date 2023-11-30
Owner JAPAN DISPLAY INC. (Japan)
Inventor Nishimura Masumi

Abstract

This laminate structure (100) comprises a buffer layer (106), a first semiconductor layer (108), and a second semiconductor layer (110). The buffer layer and the first semiconductor layer overlap one another in a vertical direction. The second semiconductor layer is in contact with a side surface of the first semiconductor layer and surrounds at least part of the first semiconductor layer in a plan view perpendicular to the vertical direction. The first semiconductor layer and the second semiconductor layer each contain a group III-V material or a group III nitride material. The crystallinity of the first semiconductor layer is higher than the crystallinity of the second semiconductor layer. The buffer layer is exposed from the second semiconductor layer in the vertical direction.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • C09K 11/00 - Luminescent, e.g. electroluminescent, chemiluminescent, materials
  • C09K 11/62 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing inorganic luminescent materials containing gallium, indium or thallium
  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth

54.

SEMICONDUCTOR DEVICE

      
Application Number JP2023014850
Publication Number 2023/228616
Status In Force
Filing Date 2023-04-12
Publication Date 2023-11-30
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya

Abstract

A semiconductor device (10) including: a metal oxide layer (130) that includes aluminum and is on an insulating surface; and an oxide semiconductor layer (140) that is on the metal oxide layer, wherein the oxide semiconductor layer includes a first crystal region (144) that is in contact with the metal oxide layer, and a second crystal region (145) that is in contact with the first crystal region and has a larger area than the first crystal region in a cross-sectional view of the oxide semiconductor layer, and the first crystal region and the second crystal region differ with regard to at least one of crystal structure and crystal orientation. The oxide semiconductor layer includes two or more metals that include indium, and the proportion of indium among the two or more metals in the oxide semiconductor layer may be 50% or more.

IPC Classes  ?

55.

DETECTION DEVICE

      
Application Number JP2023019781
Publication Number 2023/229038
Status In Force
Filing Date 2023-05-26
Publication Date 2023-11-30
Owner JAPAN DISPLAY INC. (Japan)
Inventor Koide, Gen

Abstract

This detection device comprises: a light sensor; a light source that projects light to the light sensor; a detection signal amplifying circuit that coverts, to voltage, the fluctuations in the current supplied from the light sensor; and an A/D conversion circuit that converts the voltage-converted output voltage signal to a digital-value detection value (Raw). In a state where the light source is off, the A/D conversion circuit operates so that the detection value (Raw) is limited to the maximum gradient (Raw_max) or the minimum gradient (Raw_min) of the digital value.

IPC Classes  ?

  • A61B 5/1455 - Measuring characteristics of blood in vivo, e.g. gas concentration, pH-value using optical sensors, e.g. spectral photometrical oximeters
  • A61B 5/02 - Measuring pulse, heart rate, blood pressure or blood flow; Combined pulse/heart-rate/blood pressure determination; Evaluating a cardiovascular condition not otherwise provided for, e.g. using combinations of techniques provided for in this group with electrocardiography; Heart catheters for measuring blood pressure

56.

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number JP2023010846
Publication Number 2023/223657
Status In Force
Filing Date 2023-03-20
Publication Date 2023-11-23
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya

Abstract

This method for manufacturing semiconductor device includes: forming an oxide semiconductor layer on a substrate through the sputtering method; placing the substrate having the oxide semiconductor layer formed thereon in a heating furnace with a heating medium maintained at a set temperature in advance to apply first heating processing to the oxide semiconductor layer; forming a gate insulation layer on the oxide semiconductor layer after the first heating processing; and forming a gate electrode on the gate insulation layer. During the placement of the substrate in the heating furnace, a temperature decrease of the heating medium is suppressed within 15% of the set temperature.

IPC Classes  ?

  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
  • H01L 21/477 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
  • H01L 29/786 - Thin-film transistors

57.

CAMERA MODULE

      
Application Number JP2023011083
Publication Number 2023/223660
Status In Force
Filing Date 2023-03-22
Publication Date 2023-11-23
Owner JAPAN DISPLAY INC. (Japan)
Inventor Nakatogawa, Hirondo

Abstract

The camera module according to an embodiment of the present invention comprises: an imaging element; a liquid crystal panel which is provided with an incident light control area including first to fourth light transmissive areas, a liquid crystal layer, and a driver for driving the liquid crystal layer; and a lens. The sizes of the third and fourth light transmissive areas are smaller than the sizes of the first and second light transmissive areas. A first distance to a subject is calculated on the basis of a first image based on light which has passed through the first light transmissive area and the lens and is made incident to the imaging element and a second image based on light which has passed through the second light transmissive area and the lens and is made incident to the imaging element. A second distance to the subject is calculated on the basis of a third image based on light which has passed through the third light transmissive area and the lens and is made incident to the imaging element and a fourth image based on light which has passed through the fourth light transmissive area and the lens and is made incident to the imaging element.

IPC Classes  ?

  • G03B 9/02 - Diaphragms
  • G03B 15/00 - Special procedures for taking photographs; Apparatus therefor
  • G01C 3/06 - Use of electric means to obtain final indication
  • G02B 7/36 - Systems for automatic generation of focusing signals using image sharpness techniques
  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • H04N 23/55 - Optical parts specially adapted for electronic image sensors; Mounting thereof
  • H04N 23/60 - Control of cameras or camera modules

58.

DETECTION DEVICE

      
Application Number JP2023017851
Publication Number 2023/223950
Status In Force
Filing Date 2023-05-12
Publication Date 2023-11-23
Owner JAPAN DISPLAY INC. (Japan)
Inventor Koide, Gen

Abstract

A detection device (1) comprises: a housing (200); a light source (60) that is provided to the housing (200) so as to enable an irradiation side which is outside of the housing (200) to be irradiated; a light sensor (10) that is provided in the housing (200) so as to be aligned with the light source (60) in a first direction of the housing (200) and that is capable of detecting light incident from the irradiation side of the light source (60); and a reflection member (80) that is provided in the housing (200) so as to be positioned between the light source (60) and the light sensor (10) and that is capable of reflecting the incident light towards the irradiation side of the light source (60).

IPC Classes  ?

59.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

      
Application Number JP2023017246
Publication Number 2023/223858
Status In Force
Filing Date 2023-05-08
Publication Date 2023-11-23
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Ikeda Masanobu
  • Nishimura Masumi

Abstract

Provided is a gallium nitride semiconductor device comprising: an amorphous glass substrate; a gallium nitride semiconductor layer on a first surface of the amorphous glass substrate; and a compensation layer on a second surface of the amorphous glass substrate. The coefficient of thermal expansion of the compensation layer is greater than the coefficient of thermal expansion of the amorphous glass substrate, and less than the coefficient of thermal expansion of the gallium nitride semiconductor layer.

IPC Classes  ?

  • H01L 21/203 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using physical deposition, e.g. vacuum deposition, sputtering
  • C23C 14/06 - Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
  • C23C 14/08 - Oxides
  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/337 - Field-effect transistors with a PN junction gate
  • H01L 21/338 - Field-effect transistors with a Schottky gate
  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
  • H01L 29/786 - Thin-film transistors
  • H01L 29/808 - Field-effect transistors with field effect produced by a PN or other rectifying junction gate with a PN junction gate
  • H01L 29/812 - Field-effect transistors with field effect produced by a PN or other rectifying junction gate with a Schottky gate
  • H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

60.

DETECTION DEVICE

      
Application Number JP2023017360
Publication Number 2023/223877
Status In Force
Filing Date 2023-05-09
Publication Date 2023-11-23
Owner JAPAN DISPLAY INC. (Japan)
Inventor Koide, Gen

Abstract

This detection device comprises a substrate and a photodiode disposed on the substrate in which a lower electrode, a lower buffer layer, an active layer, an upper buffer layer, and an upper electrode are stacked in this order. In a plan view, the lower electrode is provided extending from a region overlapping an organic semiconductor layer including the lower buffer layer, the active layer, and the upper buffer layer, to a region outside a side surface of the organic semiconductor layer. Further, a detection device comprises a plurality of the photodiodes, wherein a plurality of the lower electrodes are arrayed respectively corresponding to the plurality of photodiodes and extend to a region outside the side surface of the organic semiconductor layer in at least a first direction. A plurality of the photodiodes are arrayed in a second direction intersecting the first direction, and the upper electrode is provided extending across the plurality of photodiodes in the second direction.

IPC Classes  ?

61.

FILM FORMATION DEVICE AND FILM FORMATION METHOD FOR GALLIUM NITRIDE FILM

      
Application Number JP2023014830
Publication Number 2023/218840
Status In Force
Filing Date 2023-04-12
Publication Date 2023-11-16
Owner JAPAN DISPLAY INC. (Japan)
Inventor Ikeda Masanobu

Abstract

Provided is a gallium nitride film formation method comprising disposing a substrate in a vacuum chamber so as to be opposite from a target including nitrogen and gallium, heating the substrate, supplying a sputtering gas to the vacuum chamber, supplying nitrogen radicals and hydrogen radicals to the vacuum chamber, and applying a voltage to the target to generate a plasma of the sputtering gas. Deposited on the substrate are gallium nitride which is produced by a recombination reaction between the nitrogen radicals and gallium released from the gallium of the target, and gallium nitride which is produced by a recombination reaction between gallium positive ions produced from the gallium of the target and nitrogen negative ions produced from the nitrogen radicals.

IPC Classes  ?

  • C23C 14/06 - Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
  • C23C 14/34 - Sputtering
  • C30B 29/38 - Nitrides
  • H01L 21/203 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using physical deposition, e.g. vacuum deposition, sputtering
  • H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

62.

DIMMER DEVICE

      
Application Number JP2023009401
Publication Number 2023/203917
Status In Force
Filing Date 2023-03-10
Publication Date 2023-10-26
Owner JAPAN DISPLAY INC. (Japan)
Inventor Hamano, Daisuke

Abstract

A dimmer device according to the present invention comprises an annular first frame, second frame, third frame, and plurality of dimmer panels laminated in a first direction. The first frame has a first tab which protrudes to one side in the first direction, and the second frame has a first notch which engages the first tab, and a second tab protruding to one side in the first direction. The third frame has a second notch which engages the second tab. The dimmer panels are disposed between the first frame and the second frame and between the second frame and the third frame.

IPC Classes  ?

  • G02F 1/1333 - Constructional arrangements
  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1347 - Arrangement of liquid crystal layers or cells in which the final condition of one light beam is achieved by the addition of the effects of two or more layers or cells

63.

DETECTION DEVICE

      
Application Number JP2023013924
Publication Number 2023/199793
Status In Force
Filing Date 2023-04-04
Publication Date 2023-10-19
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Koide, Gen
  • Nakamura, Takashi

Abstract

A detection device (1) comprises: a ring-shaped housing (200); a light source (60) provided in the housing (200); a first light sensor (10A) provided in the housing (200) so as to be adjacent to one end (61) of the light source (60) in the circumferential direction of the housing (200); and a second light sensor (10B) provided in the housing (200) so as to be adjacent to an opposite end (62) of the light source (60) in the circumferential direction (200C) of the housing (200). At least the first light sensor (10A) is an organic photodiode including a sensor substrate, a lower electrode, a lower buffer layer, an active layer, an upper buffer layer, and an upper electrode.

IPC Classes  ?

  • A61B 5/1171 - Identification of persons based on the shapes or appearances of their bodies or parts thereof
  • A61B 5/02 - Measuring pulse, heart rate, blood pressure or blood flow; Combined pulse/heart-rate/blood pressure determination; Evaluating a cardiovascular condition not otherwise provided for, e.g. using combinations of techniques provided for in this group with electrocardiography; Heart catheters for measuring blood pressure
  • A61B 5/0245 - Measuring pulse rate or heart rate using sensing means generating electric signals
  • A61B 5/1172 - Identification of persons based on the shapes or appearances of their bodies or parts thereof using fingerprinting
  • G01J 1/02 - Photometry, e.g. photographic exposure meter - Details
  • G01N 21/49 - Scattering, i.e. diffuse reflection within a body or fluid
  • H01L 31/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof - Details
  • H01L 31/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
  • H01L 31/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto

64.

DETECTION DEVICE

      
Application Number JP2023012412
Publication Number 2023/195380
Status In Force
Filing Date 2023-03-28
Publication Date 2023-10-12
Owner JAPAN DISPLAY INC. (Japan)
Inventor Oyama, Atsunori

Abstract

Provided is a small size detection device that can easily house, in an annular housing thereof, a battery, a light source, and a light sensor having multiple photodiodes. This detection device comprises: an annular housing; a first flexible substrate provided along the shape of the annular housing; a battery provided to the first flexible substrate; a light source provided to the first flexible substrate; a coil for charging the battery provided to the first flexible substrate; a second flexible substrate; multiple photodiodes provided to a detection region of the second flexible substrate; and a sheet-like light sensor. In the light sensor, one end of the second flexible substrate is laid over one end of the first flexible substrate so as to have the first and second flexible substrates electrically connected with each other. The coil is disposed at a position that is different from those of the light source and the one end of the first flexible substrate and that is located between the light source and the one end of the first flexible substrate.

IPC Classes  ?

  • A61B 5/1455 - Measuring characteristics of blood in vivo, e.g. gas concentration, pH-value using optical sensors, e.g. spectral photometrical oximeters
  • A61B 5/02 - Measuring pulse, heart rate, blood pressure or blood flow; Combined pulse/heart-rate/blood pressure determination; Evaluating a cardiovascular condition not otherwise provided for, e.g. using combinations of techniques provided for in this group with electrocardiography; Heart catheters for measuring blood pressure
  • H01L 27/146 - Imager structures
  • H10K 39/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic radiation-sensitive element covered by group

65.

DETECTION DEVICE

      
Application Number JP2023012431
Publication Number 2023/195381
Status In Force
Filing Date 2023-03-28
Publication Date 2023-10-12
Owner JAPAN DISPLAY INC. (Japan)
Inventor Oyama, Atsunori

Abstract

This detection device includes an annular casing and a sheet-shaped optical sensor including a first flexible substrate provided along the shape of the annular casing, a battery provided on a first surface of the first flexible substrate, a light source provided to the first flexible substrate, a second flexible substrate, and a plurality of photodiodes provided to a detection region of the second flexible substrate. In the optical sensor, one end section of the second flexible substrate is overlapped with one end section of the first flexible substrate, and the second flexible substrate and the first flexible substrate are electrically connected.

IPC Classes  ?

  • A61B 5/02 - Measuring pulse, heart rate, blood pressure or blood flow; Combined pulse/heart-rate/blood pressure determination; Evaluating a cardiovascular condition not otherwise provided for, e.g. using combinations of techniques provided for in this group with electrocardiography; Heart catheters for measuring blood pressure
  • A61B 5/1455 - Measuring characteristics of blood in vivo, e.g. gas concentration, pH-value using optical sensors, e.g. spectral photometrical oximeters

66.

DETECTION DEVICE

      
Application Number JP2023012604
Publication Number 2023/195393
Status In Force
Filing Date 2023-03-28
Publication Date 2023-10-12
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Oyama, Atsunori
  • Koide, Gen

Abstract

Provided is a compact detection device which can easily accommodate, in the interior of an annular housing thereof, a light source, a battery, and an optical sensor having a plurality of photodiodes. This detection device includes: an annular housing; a first flexible substrate disposed following the shape of the annular housing; a battery provided on a first surface of the first flexible substrate; a light source provided in a first region of a second surface of the first flexible substrate, the second surface being on the side opposite to the first surface; and an optical sensor provided in a second region different from the first region of the second surface of the first flexible substrate, the optical sensor having a plurality of photodiodes.

IPC Classes  ?

  • A61B 5/02 - Measuring pulse, heart rate, blood pressure or blood flow; Combined pulse/heart-rate/blood pressure determination; Evaluating a cardiovascular condition not otherwise provided for, e.g. using combinations of techniques provided for in this group with electrocardiography; Heart catheters for measuring blood pressure
  • A61B 5/1455 - Measuring characteristics of blood in vivo, e.g. gas concentration, pH-value using optical sensors, e.g. spectral photometrical oximeters
  • H01L 27/146 - Imager structures
  • H10K 39/32 - Organic image sensors

67.

RADIO WAVE REFLECTIVE ELEMENT USING LIQUID CRYSTAL MATERIAL

      
Application Number JP2023001962
Publication Number 2023/188735
Status In Force
Filing Date 2023-01-23
Publication Date 2023-10-05
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Matsunaga Kazuki
  • Oka Shinichiro
  • Okita Mitsutaka
  • Suzuki Daiichi

Abstract

This reflective element includes a plurality of patch electrodes arrayed in a first direction and a second direction intersecting the first direction, and common wires that connect the plurality of patch electrodes in series in an array along the first direction, and each of the patch electrodes has a first length along the first direction and a second length along the second direction, and the first length is longer than the second length.

IPC Classes  ?

  • H01Q 15/14 - Reflecting surfaces; Equivalent structures
  • H01Q 3/34 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the distribution of energy across a radiating aperture varying the phase by electrical means
  • H01Q 13/08 - Radiating ends of two-conductor microwave transmission lines, e.g. of coaxial lines, of microstrip lines
  • H01Q 21/08 - Arrays of individually energised antenna units similarly polarised and spaced apart the units being spaced along, or adjacent to, a rectilinear path

68.

CAMERA MODULE

      
Application Number JP2023005442
Publication Number 2023/188948
Status In Force
Filing Date 2023-02-16
Publication Date 2023-10-05
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Nakatogawa, Hirondo
  • Aoki, Yoshirou
  • Tanaka, Hitoshi

Abstract

A camera module according to an embodiment of the present invention comprises an image pickup element and a liquid crystal panel. The liquid crystal panel comprises: an opening portion which is disposed at a position for causing light to enter the image pickup element therethrough and in which first and second regions are formed; a liquid crystal layer disposed at a position superimposed on the opening portion; a first electrode disposed at a position superimposed on the first region and a second electrode disposed at a position superimposed on the second region; a driver that drives the liquid crystal layer by applying a voltage to each of the first and second electrodes; a non-opening portion surrounding the opening portion; and a first pad which electrically connects the first electrode and the driver to each other and a second pad which connects the second electrode and the driver to each other, the first pad and second pad each being disposed at a position superimposed on the non-opening portion.

IPC Classes  ?

  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1345 - Conductors connecting electrodes to cell terminals
  • G03B 9/08 - Shutters
  • G03B 15/00 - Special procedures for taking photographs; Apparatus therefor

69.

SEMICONDUCTOR DEVICE

      
Application Number JP2023009637
Publication Number 2023/189487
Status In Force
Filing Date 2023-03-13
Publication Date 2023-10-05
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya

Abstract

This semiconductor device comprises: a metal oxide layer on an insulating surface; an oxide semiconductor layer on the metal oxide layer; and an insulating layer on the oxide semiconductor layer. The insulating layer includes a first region overlapping the oxide semiconductor layer, and the first region has a first aluminum concentration of at least 1×1017atoms/cm3. The first region may be located at or within 50 nm from the surface of the insulating layer located on the opposite side from the oxide semiconductor layer.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • H10K 50/00 - Organic light-emitting devices

70.

SEMICONDUCTOR DEVICE

      
Application Number JP2023009642
Publication Number 2023/189489
Status In Force
Filing Date 2023-03-13
Publication Date 2023-10-05
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya

Abstract

This semiconductor device includes a substrate, an insulating layer over the substrate, a metal oxide layer over the insulating layer, and an oxide semiconductor layer over the metal oxide layer. The insulating layer includes a first region that overlaps with the metal oxide layer and a second region that does not overlap with the metal oxide layer. The hydrogen concentration in the first region is greater than the hydrogen concentration in the second region, and the nitrogen concentration in the first region is greater than the nitrogen concentration in the second region. The nitrogen concentration in the first region increases from the substrate toward the metal oxide layer.

IPC Classes  ?

71.

SEMICONDUCTOR DEVICE

      
Application Number JP2023009646
Publication Number 2023/189491
Status In Force
Filing Date 2023-03-13
Publication Date 2023-10-05
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya

Abstract

This semiconductor device includes: a metal oxide layer which is above an insulating surface; and an oxide semiconductor layer which is above the metal oxide layer. The fluorine concentration of the metal oxide layer is at least 1 × 1018atoms/cm3. In SIMS analysis, the secondary ion intensity of fluorine detected in the metal oxide layer may be at least ten times the secondary ion intensity of fluorine detected in the oxide semiconductor layer. The oxide semiconductor layer may abut the metal oxide layer. The metal oxide layer may include aluminum oxide. The oxide semiconductor layer may include two or more metals that include indium, with the proportion of indium in the two or more metals being 50% or greater.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • H01L 21/316 - Inorganic layers composed of oxides or glassy oxides or oxide-based glass
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H05B 33/02 - Electroluminescent light sources - Details
  • H10K 50/00 - Organic light-emitting devices
  • H10K 59/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group

72.

SEMICONDUCTOR DEVICE

      
Application Number JP2023009658
Publication Number 2023/189493
Status In Force
Filing Date 2023-03-13
Publication Date 2023-10-05
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Watakabe Hajime
  • Tamaru Takaya

Abstract

This semiconductor device that can realize a highly reliable high-mobility semiconductor device, comprises: a metal oxide layer disposed on a substrate and having aluminum as a main component; an oxide semiconductor layer disposed on the metal oxide layer; a gate electrode facing the oxide semiconductor layer; and a gate insulating layer between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer contains at least two metals that include indium, wherein the ratio of the indium in the at least two metals is at least 50%.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H10K 50/00 - Organic light-emitting devices

73.

SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE

      
Application Number JP2023009876
Publication Number 2023/189549
Status In Force
Filing Date 2023-03-14
Publication Date 2023-10-05
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Tamaru Takaya
  • Tsubuku Masashi
  • Watakabe Hajime
  • Sasaki Toshinari

Abstract

In this method for producing a semiconductor device, a metal oxide layer mainly composed of aluminum is formed on an insulating surface, the surface of the metal oxide layer is subjected to planarization, an oxide semiconductor layer is formed on the planarized surface, a gate insulating layer is formed on the oxide semiconductor layer, and a gate electrode is formed on the gate insulating layer so as to face the oxide semiconductor layer.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • G09F 9/00 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
  • H01L 21/3065 - Plasma etching; Reactive-ion etching
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H05B 33/02 - Electroluminescent light sources - Details
  • H10K 50/00 - Organic light-emitting devices
  • H10K 59/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group

74.

SEMICONDUCTOR DEVICE

      
Application Number JP2023009877
Publication Number 2023/189550
Status In Force
Filing Date 2023-03-14
Publication Date 2023-10-05
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya

Abstract

A semiconductor device (10) according to the present invention comprises an oxide semiconductor layer (140) that is provided on an insulation surface, a gate insulating layer (150) that is provided on the oxide semiconductor layer, and a gate electrode (160) that is provided on the oxide semiconductor layer with the gate insulating layer being interposed therebetween; the gate electrode sequentially has a titanium-containing layer (162) and a conductive layer (164) from the gate insulating layer side; the gate insulating layer comprises a first region (152) that overlaps with the gate electrode and a second region (154) that does not overlap with the gate electrode; and the thickness (T3) of the titanium-containing layer is 50% or less of the thickness (T1) in the first region.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H10K 50/00 - Organic light-emitting devices

75.

THIN-FILM TRANSISTOR AND ELECTRONIC DEVICE

      
Application Number JP2023006035
Publication Number 2023/189002
Status In Force
Filing Date 2023-02-20
Publication Date 2023-10-05
Owner
  • JAPAN DISPLAY INC. (Japan)
  • IDEMITSU KOSAN CO., LTD. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya
  • Kawashima Emi
  • Tsuruma Yuki
  • Sasaki Daichi

Abstract

This thin-film transistor comprises: a substrate; a metal oxide layer provided on the substrate; an oxide semiconductor layer provided in contact with the metal oxide layer and having crystallinity; a gate electrode provided so as to overlap the oxide semiconductor layer; and an insulating layer provided between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer contains a plurality of crystal grains, each including at least one of crystal orientation <001>, crystal orientation <101>, and crystal orientation <111> obtained by a electron backscatter diffraction (EBSD) method.

IPC Classes  ?

  • H01L 21/363 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using physical deposition, e.g. vacuum deposition, sputtering
  • H01L 29/786 - Thin-film transistors
  • H01L 21/336 - Field-effect transistors with an insulated gate

76.

THIN FILM TRANSISTOR AND ELECTRONIC DEVICE

      
Application Number JP2023006037
Publication Number 2023/189003
Status In Force
Filing Date 2023-02-20
Publication Date 2023-10-05
Owner
  • JAPAN DISPLAY INC. (Japan)
  • IDEMITSU KOSAN CO., LTD. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya
  • Kawashima Emi
  • Tsuruma Yuki
  • Sasaki Daichi

Abstract

A thin film transistor according to the present invention comprises a substrate, an oxide semiconductor layer which is provided on the substrate and has crystallinity, a gate electrode which is superposed on the oxide semiconductor layer, and an insulating layer which is arranged between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer contains a plurality of crystal grains, each of which has at least one of crystal orientation <001>, crystal orientation <101> and crystal orientation <111> as obtained by an electron backscattered diffraction (EBSD) method; and with respect to the occupancies of the crystal orientations as calculated on the basis of measurement points that have crystal orientations having a crystal misorientation of 0° to 15° with respect to the normal direction of the surface of the substrate, the occupancy of crystal orientation <111> is higher than the occupancy of crystal orientation <001> and the occupancy of crystal orientation <101>.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/363 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using physical deposition, e.g. vacuum deposition, sputtering

77.

RADIO WAVE REFLECTIVE ELEMENT USING LIQUID CRYSTAL MATERIAL

      
Application Number JP2023001961
Publication Number 2023/188734
Status In Force
Filing Date 2023-01-23
Publication Date 2023-10-05
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Matsunaga Kazuki
  • Oka Shinichiro
  • Okita Mitsutaka
  • Suzuki Daiichi

Abstract

This reflective element comprises common electrodes that are arrayed in a matrix shape at intervals in one direction and in a direction intersecting the one direction, bias electrodes that are arrayed so as to overlap with the common electrodes in a plan view, a liquid crystal layer between the common electrodes and the bias electrodes, and common wires that connect adjacent common electrodes in the array of common electrodes, and the length of the common wires is half the apparent wavelength λg of a radio wave having a specific wavelength λ when the radio wave having the specific wavelength λ propagates through the liquid crystal layer.

IPC Classes  ?

  • H01Q 15/14 - Reflecting surfaces; Equivalent structures

78.

DISPLAY DEVICE AND METHOD FOR PRODUCING DISPLAY DEVICE

      
Application Number JP2023009301
Publication Number 2023/189420
Status In Force
Filing Date 2023-03-10
Publication Date 2023-10-05
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Kamijo Yoichi
  • Imazeki Yoshikatsu
  • Miyasaka Koichi
  • Osawa Shuichi
  • Kamei Yoshifumi

Abstract

This display device comprises: a substrate on which a drive circuit is provided; an adhesive layer that covers the substrate; a first LED chip that is provided on the adhesive layer; a pixel circuit that is provided on the adhesive layer separately from the first LED chip; a light-shielding layer that is provided on the adhesive layer and that has a first opening which is substantially the same shape as the first LED chip in a plan view of the first LED chip, and a second opening which is substantially the same shape as the pixel circuit in a plan view of the pixel circuit; an insulation layer that covers the drive circuit and the pixel circuit; and first wiring that is provided on the insulation layer and the connects the first LED chip and the pixel circuit, wherein the first wiring overlaps with the light-shielding layer.

IPC Classes  ?

  • G09F 9/33 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
  • G09F 9/00 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • H01L 33/58 - Optical field-shaping elements

79.

DETECTION DEVICE

      
Application Number JP2023010558
Publication Number 2023/189717
Status In Force
Filing Date 2023-03-17
Publication Date 2023-10-05
Owner JAPAN DISPLAY INC. (Japan)
Inventor Koide, Gen

Abstract

This detection device comprises: a substrate; photodiodes that are arranged on the substrate and are each obtained by stacking, in order, on the substrate, a lower electrode, a lower buffer layer, an active layer, an upper buffer layer, and an upper electrode; signal lines that are each provided between the substrate and a photodiode in a direction orthogonal to the substrate and are electrically connected to the lower electrode of the photodiode; a detection circuit that is electrically connected to the photodiodes via the signal lines; and shielding layers that are each disposed between a signal line and a lower buffer layer in the direction orthogonal to the substrate and are supplied with a reference voltage.

IPC Classes  ?

80.

OXIDE SEMICONDUCTOR FILM, THIN-FILM TRANSISTOR, AND ELECTRONIC DEVICE

      
Application Number JP2023006039
Publication Number 2023/189004
Status In Force
Filing Date 2023-02-20
Publication Date 2023-10-05
Owner
  • JAPAN DISPLAY INC. (Japan)
  • IDEMITSU KOSAN CO., LTD. (Japan)
Inventor
  • Watakabe Hajime
  • Tsubuku Masashi
  • Sasaki Toshinari
  • Tamaru Takaya
  • Kawashima Emi
  • Tsuruma Yuki
  • Sasaki Daichi

Abstract

This oxide semiconductor film has crystalline properties and is provided on a substrate, the oxide semiconductor film including an indium (In) element, and a first metal (M1) element selected from the group consisting of an aluminum (Al) element, a gallium (Ga) element, an yttrium (Y) element, a scandium (Sc) element, and the lanthanide elements. The oxide semiconductor film includes a plurality of crystal grains, each including at least one of a crystal orientation <001>, a crystal orientation <101>, and a crystal orientation <111>, acquired by electron backscatter diffraction (EBSD). In an occupancy rate of crystal orientations calculated on the basis of a measuring point having crystal orientations in which the crystal orientation difference relative to the normal direction of the surface of the substrate is not less than 0 degrees and not more than 15 degrees, the occupancy rate of the crystal orientation <111> is greater than the occupancy rate of the crystal orientation <0001> and the occupancy rate of the crystal orientation <101>.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/363 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using physical deposition, e.g. vacuum deposition, sputtering

81.

DETECTION DEVICE

      
Application Number JP2023009545
Publication Number 2023/182032
Status In Force
Filing Date 2023-03-13
Publication Date 2023-09-28
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Hayashi, Makoto
  • Kato, Hirofumi
  • Kojima, Yoshitaka
  • Haga, Yuta
  • Kitamura, Ayato
  • Terada, Yoshiyuki

Abstract

This detection device includes: a light source which irradiates, with light, an object to be detected; a plurality of photodiodes each including a sensor electrode and an organic semiconductor layer, and arranged in a detection region; and one or more detection circuits respectively connected to the plurality of photodiodes. The plurality of photodiodes include a first photodiode and a second photodiode having a shorter distance from the light source than the first photodiode, and the first photodiode has a larger light-receiving area than the second photodiode.

IPC Classes  ?

  • H04N 25/70 - SSIS architectures; Circuits associated therewith
  • A61B 5/02 - Measuring pulse, heart rate, blood pressure or blood flow; Combined pulse/heart-rate/blood pressure determination; Evaluating a cardiovascular condition not otherwise provided for, e.g. using combinations of techniques provided for in this group with electrocardiography; Heart catheters for measuring blood pressure
  • H01L 27/146 - Imager structures
  • H10K 39/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic radiation-sensitive element covered by group

82.

REFLECT ARRAY

      
Application Number JP2023001964
Publication Number 2023/181614
Status In Force
Filing Date 2023-01-23
Publication Date 2023-09-28
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Suzuki Daiichi
  • Tsunashima Takanori
  • Ikari Masayuki
  • Oka Shinichiro
  • Okita Mitsutaka
  • Matsunaga Kazuki

Abstract

This reflect array comprises: a plurality of patch electrodes that are mutually connected but arranged apart from each other on an incident surface for electronic waves; a plurality of control electrodes arranged apart from each other so as to correspond to the patch electrodes and disposed on the back surface side of the patch electrodes; a liquid crystal layer provided between the patch electrodes and the control electrodes; and an auxiliary electrode disposed so as to overlap a region by which the control electrodes are separated from each other.

IPC Classes  ?

  • H01Q 15/14 - Reflecting surfaces; Equivalent structures
  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1343 - Electrodes

83.

RADIO WAVE REFLECTING PANEL

      
Application Number JP2023007788
Publication Number 2023/176472
Status In Force
Filing Date 2023-03-02
Publication Date 2023-09-21
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Araki Shigesumi
  • Oka Shinichiro
  • Okita Mitsutaka
  • Suzuki Daiichi

Abstract

This radio wave reflecting panel comprises a plurality of radio wave reflecting devices, an adjusting substrate on the plurality of radio wave reflecting devices, and an antireflective film which is positioned on the adjusting substrate to absorb radio waves. Each of the plurality of radio wave reflecting devices includes a pair of substrates and a plurality of radio wave reflecting elements between the pair of substrates. The antireflective film has a lattice shape as a whole. In each of the plurality of radio wave reflecting devices, an edge portion is covered by the antireflective film, and a part enclosed by the end portion is exposed from the antireflective film. The radio waves have a frequency of 400 MHz or more and 50 GHz or less, for example.

IPC Classes  ?

  • H01Q 15/14 - Reflecting surfaces; Equivalent structures

84.

DETECTION DEVICE

      
Application Number JP2023008442
Publication Number 2023/176566
Status In Force
Filing Date 2023-03-07
Publication Date 2023-09-21
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Asakura, Shinya
  • Nitta, Jun

Abstract

Provided is a detection device capable of suppressing a reduction in detection accuracy due to time-varying changes in a reverse bias characteristic. This detection device comprises: a sensor unit that has a first photodiode and a second photodiode; and a detection circuit that detects the output of the first photodiode and the output of the second photodiode alternately. A first potential is supplied to anodes of the first photodiode and the second photodiode, a second potential lower than the first potential is supplied to a cathode of the second photodiode during a first period (1F_odd) when the output of the first photodiode is detected, and the second potential is supplied to a cathode of the first photodiode during a second period (1F_even) when the output of the second photodiode is detected.

IPC Classes  ?

  • H04N 25/70 - SSIS architectures; Circuits associated therewith

85.

LIQUID CRYSTAL OPTICAL ELEMENT

      
Application Number JP2022046709
Publication Number 2023/171077
Status In Force
Filing Date 2022-12-19
Publication Date 2023-09-14
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Oka, Shinichiro
  • Tomioka, Yasushi
  • Igeta, Koichi
  • Higuchi, Ayaka
  • Iyama, Tsuyoshi
  • Matsumoto, Ryoichi
  • Shohara, Kiyoshi
  • Yamamoto, Takeshi

Abstract

A liquid crystal optical element according to one embodiment comprises: a substrate having a first main surface; a plurality of structures aligned at a prescribed pitch in each of a plurality of first areas arranged in a first direction of the first main surface and in a second direction intersecting the first direction; and a liquid crystal layer arranged across the plurality of first areas and a second area surrounding each of the plurality of first areas. The liquid crystal layer comprises: first liquid crystal molecules arranged in the first areas between the adjacent structures and aligned along the structures; and second liquid crystal molecules having the long axes aligned in the same direction in the second area. Further, the liquid crystal layer is cured in a state in which the orientation directions of the first liquid crystal molecules and the second liquid crystal molecules are fixed.

IPC Classes  ?

  • G02B 5/18 - Diffracting gratings
  • G02F 1/1337 - Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers

86.

DETECTION DEVICE

      
Application Number JP2023006912
Publication Number 2023/171431
Status In Force
Filing Date 2023-02-27
Publication Date 2023-09-14
Owner JAPAN DISPLAY INC. (Japan)
Inventor Koide, Gen

Abstract

A detection device provided with: a substrate; a plurality of photodiodes, which are arranged on the substrate and in each of which a lower electrode, a lower buffer layer, an active layer, an upper buffer layer, and an upper electrode are laminated in said order on the substrate; a plurality of signal lines that are electrically connected respectively to the lower electrodes of the plurality of photodiodes; a detection circuit that is connected to the plurality of photodiodes via the plurality of signal lines; and a shield layer that is arranged between the plurality of signal lines in plan view.

IPC Classes  ?

  • H04N 25/70 - SSIS architectures; Circuits associated therewith
  • G06T 1/00 - General purpose image data processing
  • H01L 27/146 - Imager structures
  • H01L 29/786 - Thin-film transistors
  • H04N 1/028 - PICTORIAL COMMUNICATION, e.g. TELEVISION - Details thereof - Details of scanning heads for picture-information pick-up
  • H04N 1/10 - Scanning arrangements using flat picture-bearing surfaces
  • H10K 39/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic radiation-sensitive element covered by group

87.

LIQUID CRYSTAL OPTICAL ELEMENT AND METHOD FOR MANUFACTURING SAME

      
Application Number JP2023004730
Publication Number 2023/171245
Status In Force
Filing Date 2023-02-13
Publication Date 2023-09-14
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Higuchi, Ayaka
  • Oka, Shinichiro
  • Tomioka, Yasushi
  • Igeta, Koichi

Abstract

The purpose of one embodiment is to provide a liquid crystal optical element that can have an increased area. According to one embodiment, the liquid crystal optical element comprises a substrate, an alignment film disposed on the substrate, and a liquid crystal layer disposed on the alignment film, wherein: the alignment film has a plurality of first regions subjected to an alignment treatment, and a second region surrounding each of the plurality of first regions; the liquid crystal layer has a first alignment region that overlaps the first region and has a plurality of first liquid crystal molecules forming an alignment pattern in which the major axes of the respective liquid crystal molecule continuously change, and a second alignment region that overlaps the second region and has a plurality of second liquid crystal molecules in which the major axes of the respective liquid crystal molecule are arranged side by side in the same direction; and the liquid crystal layer is cured in a state in which alignment directions of the first liquid crystal molecules and second liquid crystal molecules are fixed.

IPC Classes  ?

  • G02B 5/30 - Polarising elements
  • G02B 5/18 - Diffracting gratings
  • G02F 1/1337 - Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers

88.

LIQUID CRYSTAL OPTICAL ELEMENT AND PRODUCTION METHOD THEREFOR

      
Application Number JP2023004732
Publication Number 2023/171246
Status In Force
Filing Date 2023-02-13
Publication Date 2023-09-14
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Igeta, Koichi
  • Higuchi, Ayaka
  • Oka, Shinichiro

Abstract

The purpose of an embodiment of the present invention is to provide a liquid crystal optical element that is capable of having an enlarged area. The liquid crystal optical element according to an embodiment of the present invention comprises: a substrate; an alignment film disposed on the substrate; a first liquid crystal layer disposed on the alignment film; a second liquid crystal layer disposed on the alignment film and separated from the first liquid crystal layer; and an organic film that covers each of the first and second liquid crystal layers, and covers the alignment film around the first and second liquid crystal layers. Each of the first and second liquid crystal layers includes a plurality of liquid crystal molecules, and is cured in a state where the alignment orientations of the liquid crystal molecules are fixed.

IPC Classes  ?

  • G02B 5/30 - Polarising elements
  • G02B 5/18 - Diffracting gratings
  • G02F 1/1337 - Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers

89.

LIGHTING DEVICE

      
Application Number JP2023002557
Publication Number 2023/162572
Status In Force
Filing Date 2023-01-27
Publication Date 2023-08-31
Owner JAPAN DISPLAY INC. (Japan)
Inventor Wakana, Hiroyuki

Abstract

The objective of the present invention is to make the inside of a room uniformly bright regardless of the time of day. This lighting device includes: a light source unit for emitting light toward a floor surface of a room; a storage unit for storing light distribution zone data relating to a zone in the room into which the light is shone, in association with time information; a time information acquiring unit for acquiring time information relating to the current time; a light distribution zone setting unit for setting a light distribution zone for the light from the light source unit; and a control unit for reading the light distribution zone data corresponding to the time information acquired by the time information acquiring unit from the storage unit, and controlling the light distribution zone setting unit on the basis of the light distribution zone data. The brightness inside the room can be made uniform, regardless of the time of day, by setting the light distribution zone data appropriately.

IPC Classes  ?

  • H05B 47/16 - Controlling the light source by timing means
  • H05B 47/165 - Controlling the light source following a pre-assigned programmed sequence; Logic control [LC]

90.

LIGHTING DEVICE

      
Application Number JP2023000297
Publication Number 2023/157508
Status In Force
Filing Date 2023-01-10
Publication Date 2023-08-24
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Ikeda Kojiro
  • Koito Takeo
  • Takizawa Keiji

Abstract

This lighting device comprises a light source including at least two types of light emitting elements different in color temperature, an optical element which includes a plurality of liquid crystal cells stacked sequentially and which controls the light distribution of light emitted from the light source, and a control unit which controls the light source. The control unit controls the optical element to change from a first light distribution state to a second light distribution state, which is different from the first light distribution state in light distribution state, and controls the light source to maintain the same color temperature of the light emitted in a direction perpendicular to a surface of the optical element between the first light distribution state and the second light distribution state.

IPC Classes  ?

  • H05B 47/155 - Coordinated control of two or more light sources
  • F21S 2/00 - Systems of lighting devices, not provided for in main groups  or , e.g. of modular construction
  • F21V 9/40 - Elements for modifying spectral properties, polarisation or intensity of the light emitted, e.g. filters with provision for controlling spectral properties, e.g. colour, or intensity
  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/1333 - Constructional arrangements
  • F21Y 115/10 - Light-emitting diodes [LED]

91.

LIGHTING DEVICE

      
Application Number JP2023002230
Publication Number 2023/157587
Status In Force
Filing Date 2023-01-25
Publication Date 2023-08-24
Owner JAPAN DISPLAY INC. (Japan)
Inventor Wakana, Hiroyuki

Abstract

The present invention illuminates a location, such as the four corners of a room, that is distant from the position right under a lighting device. This lighting device is provided with: a light source for emitting light onto the floor surface of a room; a light distribution area setting unit for setting the light distribution of light from the light source to a first light distribution area or a second light distribution area, which is different from the first light distribution area; and a control unit for controlling the light distribution area setting unit such that the first light distribution area and the second light distribution area are illuminated in a time-division manner, wherein the second light distribution area set by the light distribution area setting unit includes a portion closer to the corner of the floor surface than the first light distribution area.

IPC Classes  ?

  • H05B 47/155 - Coordinated control of two or more light sources
  • F21S 8/04 - Lighting devices intended for fixed installation intended only for mounting on a ceiling or like overhead structure
  • H05B 47/165 - Controlling the light source following a pre-assigned programmed sequence; Logic control [LC]

92.

LIGHTING DEVICE

      
Application Number JP2023002518
Publication Number 2023/157602
Status In Force
Filing Date 2023-01-26
Publication Date 2023-08-24
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Takahata, Masashi
  • Ikeno, Kozo

Abstract

This lighting device is provided with: a light source that emits light; a dimmer device that has at least one liquid-crystal panel on the light-output side of the light source, and that controls the transmittance of light transmitted through the liquid crystal panel and the transmission range of the light transmitted through the liquid crystal panel, thereby adjusting the light distribution range of light emitted externally from the liquid crystal panel; a temperature sensor that acquires information indicating the temperature of the liquid crystal panel; a heating unit that heats the liquid crystal panel; and a control unit that causes the heating unit to operate if information that indicates a temperature below a prescribed temperature is acquired by the temperature sensor.

IPC Classes  ?

  • F21V 23/00 - Arrangement of electric circuit elements in or on lighting devices
  • F21V 29/90 - Heating arrangements
  • F21Y 115/10 - Light-emitting diodes [LED]
  • F21S 2/00 - Systems of lighting devices, not provided for in main groups  or , e.g. of modular construction
  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • H05B 45/10 - Controlling the intensity of the light
  • H05B 45/325 - Pulse-width modulation [PWM]

93.

DETECTION DEVICE

      
Application Number JP2023002953
Publication Number 2023/153262
Status In Force
Filing Date 2023-01-31
Publication Date 2023-08-17
Owner JAPAN DISPLAY INC. (Japan)
Inventor Koide, Gen

Abstract

The present invention provides a detection device which is capable of suppressing the occurrence of a short circuit between a second electrode and a first electrode that is on the outermost periphery. This detection device comprises a substrate and a plurality of photodiodes which are provided in a detection region of the substrate. The photodiodes each comprise a first electrode, a second electrode, a first carrier transport layer, an active layer and a second carrier transport layer, while comprising an organic photodiode layer that is provided so as to extend across a plurality of photodiodes. In the detection region, the first electrode, the first carrier transport layer, the active layer, the second carrier transport layer and the second electrode are sequentially stacked. On the outside of the detection region, a third electrode, to which the reference potential is applied, is arranged between the second electrode, which is provided so as to cover the lateral surface of the organic photodiode layer, and the first electrode, which is arranged on the outermost periphery.

IPC Classes  ?

  • H01L 27/146 - Imager structures
  • H01L 31/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
  • H04N 25/76 - Addressed sensors, e.g. MOS or CMOS sensors
  • H10K 39/32 - Organic image sensors

94.

DETECTION DEVICE

      
Application Number JP2023003025
Publication Number 2023/153271
Status In Force
Filing Date 2023-01-31
Publication Date 2023-08-17
Owner JAPAN DISPLAY INC. (Japan)
Inventor Kinjo, Hiroumi

Abstract

Provided is a detection device having a highly reliable ultrasonic conversion element with low cost. The detection device comprises a laminated body and a frame layer that is laminated on at least one of a first surface and second surface of the laminated body, the second surface being positioned on the opposite side of the first surface. The laminated body comprises a flexible substrate, a circuit layer including a plurality of first electrodes and laminated on the flexible substrate, and a piezoelectric layer laminated on the circuit layer. One ultrasonic conversion element comprises at least one first electrode contacting the piezoelectric layer and at least one second electrode contacting the piezoelectric layer. The frame layer has a cavity at a position overlapping with the first electrode in a plan view.

IPC Classes  ?

  • H04R 17/00 - Piezoelectric transducers; Electrostrictive transducers
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/043 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using propagating acoustic waves

95.

LIGHT CONTROL DEVICE AND PANEL UNIT

      
Application Number JP2022044878
Publication Number 2023/153064
Status In Force
Filing Date 2022-12-06
Publication Date 2023-08-17
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Koito, Takeo
  • Ikeda, Kojiro

Abstract

This light control device comprises: a panel unit in which a plurality of light control panels are layered in a first direction, each of the light control panels being polygonal and having a light-transmitting first substrate and a light-transmitting second substrate superposed on the first substrate; and a light source disposed on one side of the panel unit in the first direction, the first substrate or second substrate in each of the light control panels having a light control region irradiated by light from the light source, first wiring disposed on the periphery of the light control region, and second wiring, the first wiring serving as a first light-shielding region that covers between the light control region and at least one of a plurality of sides of the polygon, the second wiring serving as a second light-shielding region that covers between the light control region and a non-light-shielding region at edge sections of the other sides among the plurality of sides, and the first wiring of each of the plurality of light control panels being disposed in all the sides of the panel unit and shielding the non-light-shielding region of each of the plurality of light control panels when the panel unit is viewed from the first direction.

IPC Classes  ?

  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • F21V 9/00 - Elements for modifying spectral properties, polarisation or intensity of the light emitted, e.g. filters
  • F21V 9/40 - Elements for modifying spectral properties, polarisation or intensity of the light emitted, e.g. filters with provision for controlling spectral properties, e.g. colour, or intensity
  • G02F 1/1345 - Conductors connecting electrodes to cell terminals
  • G02F 1/1347 - Arrangement of liquid crystal layers or cells in which the final condition of one light beam is achieved by the addition of the effects of two or more layers or cells
  • F21Y 107/70 - Light sources with three-dimensionally disposed light-generating elements on flexible or deformable supports or substrates, e.g. for changing the light source into a desired form

96.

DISPLAY DEVICE AND LIQUID CRYSTAL DISPLAY DEVICE

      
Application Number JP2023000605
Publication Number 2023/153125
Status In Force
Filing Date 2023-01-12
Publication Date 2023-08-17
Owner JAPAN DISPLAY INC. (Japan)
Inventor Zako Muneaki

Abstract

The present invention addresses the problem of using a plurality of display devices to seamlessly form a large screen. To solve said problem, the present invention has the following configuration. That is, the display devices are characterized in that: a first display device 1000 has a first display area 10 and a first frame edge area 20 disposed outside the first display area 10; a second display device 2000 has a second display area 10 and a second frame edge area 20 disposed outside the second display area 10; the first display device 1000 and the second display device 2000 are disposed in parallel in a state of partially overlapping each other; the first frame edge area 20 of the first display device 1000 overlaps the second display area 10 of the second display device 2000; the second frame edge area 20 of the second display device 2000 overlaps the first display area 10 of the first display device 1000; and when viewed in a plan view, the first display area 10 and the second display area 10 are continuous to each other.

IPC Classes  ?

  • G02F 1/1333 - Constructional arrangements
  • G02F 1/1334 - Constructional arrangements based on polymer-dispersed liquid crystals, e.g. microencapsulated liquid crystals
  • G02F 1/13357 - Illuminating devices

97.

LIGHTING DEVICE

      
Application Number JP2023000684
Publication Number 2023/153128
Status In Force
Filing Date 2023-01-12
Publication Date 2023-08-17
Owner JAPAN DISPLAY INC. (Japan)
Inventor Shao, Gang

Abstract

The present invention provides a lighting device that can realize energy saving without a troublesome operation, and without wasteful energy consumption. The lighting device comprises: a light source; a position data acquisition unit that acquires position data indicating the respective positions of a plurality of people; a position data processing unit that calculates ellipse data corresponding to the positions of the plurality of people on the basis of the position data; a light quantity setting unit that sets the light quantity of a light source on the basis of the ellipse data calculated by the position data processing unit; an irradiation shape setting unit that sets the irradiation shape of light from the light source on the basis of the ellipse data calculated by the position data processing unit; and an irradiation angle setting unit that sets the irradiation angle of the light from the light source on the basis of the ellipse data calculated by the position data processing unit.

IPC Classes  ?

  • H05B 47/105 - Controlling the light source in response to determined parameters
  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells

98.

LIGHTING DEVICE

      
Application Number JP2023001634
Publication Number 2023/153165
Status In Force
Filing Date 2023-01-20
Publication Date 2023-08-17
Owner JAPAN DISPLAY INC. (Japan)
Inventor Takahata, Masashi

Abstract

This lighting device comprises: a light source that emits light; a light control device that has at least one liquid crystal panel on the light emitting side of the light source and adjusts the light distribution range of light emitted from the liquid crystal panel to the outside by controlling the transmittance of light passing through the liquid crystal panel and the transmittance range of light passing through the liquid crystal panel; and a heating unit that heats the liquid crystal panel.

IPC Classes  ?

  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • F21S 2/00 - Systems of lighting devices, not provided for in main groups  or , e.g. of modular construction

99.

DISPLAY DEVICE

      
Application Number JP2022046742
Publication Number 2023/149105
Status In Force
Filing Date 2022-12-19
Publication Date 2023-08-10
Owner JAPAN DISPLAY INC. (Japan)
Inventor
  • Imazeki, Yoshikatsu
  • Kamijo, Yoichi
  • Miyasaka, Koichi
  • Osawa, Shuichi
  • Kamei, Yoshifumi

Abstract

According to the present invention, a wiring line 31 and a wiring line 32 of a display device DSP2 each comprise: a metal wiring part 30A which is formed of a first metal material that is copper or a copper alloy; and a metal wiring part 30B which is electrically connected to the metal wiring part 30A and is formed of a second metal material that is different from the first metal material. The metal wiring part 30B is arranged but the metal wiring part 30A is not arranged in a region R1 that overlaps with a semiconductor layer 50. The metal wiring part 30A and the metal wiring part 30B are arranged in a region R2 which is arranged so as to surround the region R1 without overlapping with the semiconductor layer 50. The metal wiring part 30B arranged in the region R1 is covered with an organic insulating film 40.

IPC Classes  ?

  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • G09F 9/33 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
  • H01L 21/3205 - Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
  • H01L 29/41 - Electrodes characterised by their shape, relative sizes or dispositions
  • H01L 29/43 - Electrodes characterised by the materials of which they are formed
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched

100.

DETECTION DEVICE

      
Application Number JP2023001149
Publication Number 2023/149195
Status In Force
Filing Date 2023-01-17
Publication Date 2023-08-10
Owner JAPAN DISPLAY INC. (Japan)
Inventor Koide, Gen

Abstract

A detection device according to the present invention has a substrate and a plurality of photodiodes arranged on the substrate. Each of the plurality of photodiodes has a lower electrode, a lower buffer layer, an active layer, an upper buffer layer, and an upper electrode stacked in order on the substrate, and a plurality of openings are provided in the plurality of lower electrodes. Furthermore, the lower buffer layer includes one of a hole transport layer and an electron transport layer, and the upper buffer layer includes the other of the hole transport layer and the electron transport layer.

IPC Classes  ?

  • H01L 27/146 - Imager structures
  • G06T 1/00 - General purpose image data processing
  • H01L 31/0224 - Electrodes
  • H04N 25/70 - SSIS architectures; Circuits associated therewith
  • H10K 39/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic radiation-sensitive element covered by group
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