National Taiwan University

Taiwan, Province of China

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IPC Class
H01L 29/66 - Types of semiconductor device 130
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof 73
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate 73
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions 47
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched 43
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1.

METHOD OF MANUFACTURING SILICON NANO-POWDERS AND MANUFACTURING EQUIPMENT IMPLEMENTING SUCH METHOD

      
Application Number 18181997
Status Pending
Filing Date 2023-03-10
First Publication Date 2023-09-28
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor Lan, Chung-Wen

Abstract

A method of manufacturing silicon nano-powders and a manufacturing equipment implementing such method. The method according to the invention utilizes a plurality of aluminum powders to react with a silicon tetrahalide into a plurality of silicon nano-powders and an aluminum trihalide to obtain the silicon nano-powders.

IPC Classes  ?

  • C01B 21/068 - Binary compounds of nitrogen with metals, with silicon, or with boron with silicon
  • B82Y 30/00 - Nanotechnology for materials or surface science, e.g. nanocomposites
  • C01B 21/072 - Binary compounds of nitrogen with metals, with silicon, or with boron with aluminium
  • B82Y 40/00 - Manufacture or treatment of nanostructures

2.

SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME

      
Application Number 17871451
Status Pending
Filing Date 2022-07-22
First Publication Date 2023-09-28
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Kang, Wei-Cheng
  • Chang, Tzu-Hsuan
  • Weng, Wei-Yang
  • Cheng, Yu-Tzu
  • Hsu, Huang-Chun
  • Liao, Yu-Jung

Abstract

A semiconductor device having a standard cell comprises a first bottom transistor, a first top transistor, a second bottom transistor, a second top transistor, and a first bottom-transistor-level metal line. The first bottom transistor is in a first row. The first top transistor is disposed above the first bottom transistor in the first row. The first bottom transistor and the first top transistor share a first gate structure. The second bottom transistor is in a second row next to the first row. The second top transistor is disposed above the second bottom transistor in the second row. The second bottom transistor and the second top transistor share a second gate structure. The first bottom-transistor-level metal line extends laterally from a first source/drain region of the first bottom transistor to a source/drain region of the second bottom transistor.

IPC Classes  ?

3.

METHOD OF GENERATING RANDOMNESS BY PUBLIC PARTICIPATION

      
Application Number 18099024
Status Pending
Filing Date 2023-01-19
First Publication Date 2023-09-21
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Lee, Hsun
  • Hsu, Yuming
  • Wang, Jing-Jie
  • Yang, Hao Cheng
  • Chen, Yu-Heng
  • Hu, Yih-Chun
  • Hsiao, Hsu-Chun

Abstract

A method of generating randomness by public participation may comprise: communicating with the commodity devices to execute a protocol comprising a setup phase, a contribution phase and a result-generation phase, wherein: in the setup phase, parameters are initialized, a verifiable delay function is setup, and the parameters are published; the contribution phase is divided into at least one first stage, published parameters are provided, random values are received, and a Merkle tree root and Merkle tree audit paths are published in each of the first stage; and the result-generation phase is divided into at least one second stage of the same number as that of the first stage, each second stage is dedicated to one of the first stage ahead of the second stage for a period, and in each second stage, computation is performed to generate a result of randomness which is published.

IPC Classes  ?

  • H04L 9/06 - Arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for blockwise coding, e.g. D.E.S. systems

4.

PTGR2 INHIBITORS AND THEIR USE

      
Application Number 17688369
Status Pending
Filing Date 2022-03-07
First Publication Date 2023-09-07
Owner
  • National Health Research Institutes (Taiwan, Province of China)
  • National Taiwan University (Taiwan, Province of China)
Inventor
  • Tsou, Lun Kelvin
  • Hung, Ming-Shiu
  • Chen, Chieh Wen
  • Hsieh, Meng-Lun
  • Chang, Yi-Cheng
  • Chuang, Lee Ming

Abstract

Disclosed are compounds of formula (I) as follows: Disclosed are compounds of formula (I) as follows: in which each of R1, R2, R3, R4, R5, L1, W, and Het is defined herein. Also provides are a method of inhibiting prostaglandin reductase 2 (“PTGR2”) using such a compound and a pharmaceutical composition containing same.

IPC Classes  ?

  • C07D 487/04 - Ortho-condensed systems
  • C07D 417/12 - Heterocyclic compounds containing two or more hetero rings, at least one ring having nitrogen and sulfur atoms as the only ring hetero atoms, not provided for by group containing two hetero rings linked by a chain containing hetero atoms as chain links
  • C07D 239/56 - One oxygen atom and one sulfur atom

5.

ANTIBACTERIAL CHEMICAL COMPOUND, ITS MANUFACTURING METHOD AND ITS USE THEREOF

      
Application Number 17686949
Status Pending
Filing Date 2022-03-04
First Publication Date 2023-09-07
Owner
  • National Taiwan University (Taiwan, Province of China)
  • National Yang Ming Chiao Tung University (Taiwan, Province of China)
Inventor
  • Chiu, Hao-Chieh
  • Shiau, Chung-Wai

Abstract

The present invention provides an antibacterial chemical compound, its manufacturing method and its use thereof which acts as antibacterial agents being useful for treating a disease or condition characterized by infectious disease, such as gastroenteritis and invasive non-typhoidal Salmonellosis, and also providing a new therapeutic option for patients infected by the bacteria with the resistance to antibiotics.

IPC Classes  ?

  • A61K 31/5513 - 1,4-Benzodiazepines, e.g. diazepam
  • A61P 31/04 - Antibacterial agents
  • C07D 495/04 - Ortho-condensed systems
  • A61K 31/7036 - Compounds having saccharide radicals attached to non-saccharide compounds by glycosidic linkages attached to a carbocyclic compound, e.g. phloridzin having at least one amino group directly attached to the carbocyclic ring, e.g. streptomycin, gentamycin, amikacin, validamycin, fortimicins
  • A61K 31/65 - Tetracyclines
  • A61K 31/165 - Amides, e.g. hydroxamic acids having aromatic rings, e.g. colchicine, atenolol, progabide
  • A61K 31/431 - Compounds containing 4-thia-1-azabicyclo [3.2.0] heptane ring systems, i.e. compounds containing a ring system of the formula , e.g. penicillins, penems containing further heterocyclic ring systems, e.g. ticarcillin, azlocillin, oxacillin
  • A61K 31/496 - Non-condensed piperazines containing further heterocyclic rings, e.g. rifampin, thiothixene
  • A61K 31/5383 - 1,4-Oxazines, e.g. morpholine ortho- or peri-condensed with heterocyclic ring systems

6.

MEMORY DEVICE AND METHOD FOR FORMING THE SAME

      
Application Number 17681545
Status Pending
Filing Date 2022-02-25
First Publication Date 2023-08-31
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Li, Chia-Shuo
  • Wu, Yu-Tien
  • Chen, Bo-You
  • Ni, I-Chih
  • Wu, Chih-I

Abstract

A method includes forming a transistor over a substrate; and forming a resistive element over the transistor, in which forming the resistive element includes forming a bottom electrode electrically connected to a source/drain region of the transistor; forming a resistive switching layer over the bottom electrode, in which the resistive switching layer is made of metal halide; and forming a top electrode over the resistive switching layer.

IPC Classes  ?

  • H01L 45/00 - Solid state devices specially adapted for rectifying, amplifying, oscillating, or switching without a potential-jump barrier or surface barrier, e.g. dielectric triodes; Ovshinsky-effect devices; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
  • H01L 27/24 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including solid state components for rectifying, amplifying, or switching without a potential-jump barrier or surface barrier

7.

INTEGRATED CIRCUIT DEVICE AND METHOD FOR FABRICATING THE SAME

      
Application Number 17678094
Status Pending
Filing Date 2022-02-23
First Publication Date 2023-08-24
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Chiu, Jih-Chao
  • Liu, Chee-Wee

Abstract

A method for fabricating an integrated circuit device is provided. The method includes forming a field effect transistor (FET) on a semiconductor substrate; depositing a first dielectric layer over the FET; depositing a first metal-containing dielectric layer over the first dielectric layer; and forming a first thin film transistor (TFT) over the first metal-containing dielectric layer.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 29/66 - Types of semiconductor device
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings

8.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 17673890
Status Pending
Filing Date 2022-02-17
First Publication Date 2023-08-17
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Tu, Chien-Te
  • Lin, Hsin-Cheng
  • Liu, Chee-Wee

Abstract

A device includes a bottom transistor, a top transistor, and an epitaxial isolation structure. The bottom transistor includes a first channel layer, first source/drain epitaxial structures, and a first gate structure. The first source/drain epitaxial structures are on opposite sides of the first channel layer. The first gate structure is around the first channel layer. The top transistor is over the bottom transistor and includes a second channel layer, second source/drain epitaxial structures, and a second gate structure. The second source/drain epitaxial structures are on opposite sides of the second channel layer. The second gate structure is around the second channel layer. The epitaxial isolation structure is between and in contact with one of the first source/drain epitaxial structures and one of the second source/drain epitaxial structures, such that the one of the first source/drain epitaxial structures is electrically isolated from the one of the second source/drain epitaxial structures.

IPC Classes  ?

  • H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

9.

System and Method for Continuous Cell Production

      
Application Number 18107502
Status Pending
Filing Date 2023-02-09
First Publication Date 2023-08-10
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Young, Tai-Horng
  • Yen, Chia-Hsiang
  • Wu, Ying-Syuan
  • Shih, Chiao-Chi

Abstract

The application provides a system for continuous cell production, comprising: a culture container; and a polymer blended layer arranged on the inner surface of the culture container; wherein, the polymer blended layer is a pH-responsive polymer blended with nylon. Additionally, a method for continuous cell production using the system of the present application is provided.

IPC Classes  ?

  • C12M 1/12 - Apparatus for enzymology or microbiology with sterilisation, filtration, or dialysis means
  • C12N 5/077 - Mesenchymal cells, e.g. bone cells, cartilage cells, marrow stromal cells, fat cells or muscle cells
  • C12N 5/0775 - Mesenchymal stem cells; Adipose-tissue derived stem cells
  • C12N 5/071 - Vertebrate cells or tissues, e.g. human cells or tissues

10.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF

      
Application Number 18135650
Status Pending
Filing Date 2023-04-17
First Publication Date 2023-08-10
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Lan, Huang-Siang
  • Liu, Cheewee
  • Liu, Chi-Wen
  • Huang, Shih-Hsien
  • Wong, I-Hsieh
  • Yeh, Hung-Yu
  • Tsai, Chung-En

Abstract

A semiconductor device includes a fin extending along a first direction over a substrate, and a gate structure extending in a second direction overlying the fin. The gate structure includes a gate dielectric layer overlying the fin, a gate electrode overlying the gate dielectric layer, and insulating gate sidewalls on opposing lateral surfaces of the gate electrode extending along the second direction. A source/drain region is formed in the fin in a region adjacent the gate electrode structure, and a stressor layer is between the source/drain region and the semiconductor substrate. The stressor layer includes GeSn or SiGeSn containing 1019 atoms cm−3 or less of a dopant, and a portion of the fin under the gate structure is a channel region.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/165 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form including two or more of the elements provided for in group in different semiconductor regions
  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 29/66 - Types of semiconductor device

11.

MEMORY STRUCTURE AND FORMATION METHOD THEREOF

      
Application Number 17668514
Status Pending
Filing Date 2022-02-10
First Publication Date 2023-08-10
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Chen, Wei-Jen
  • Tsou, Ya-Jui
  • Liu, Chee-Wee
  • Lin, Shao-Yu
  • Wang, Chih-Lin

Abstract

A memory structure comprises a dielectric layer, a first ferromagnetic bottom electrode, a second ferromagnetic bottom electrode, an SOT channel layer, and an MTJ structure. The dielectric layer is over the substrate. The first ferromagnetic bottom electrode extends through the dielectric layer. The second ferromagnetic bottom electrode extends through the dielectric layer, and is spaced apart from the first ferromagnetic bottom electrode. The SOT channel layer extends from the first ferromagnetic bottom electrode to the second ferromagnetic bottom electrode. The MTJ structure is over the SOT channel layer.

IPC Classes  ?

  • H01L 43/04 - Devices using galvano-magnetic or similar magnetic effects; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details of Hall-effect devices
  • H01L 27/22 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate using similar magnetic field effects
  • H01L 43/06 - Hall-effect devices
  • H01L 43/14 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof for Hall-effect devices

12.

HUMANIZED ACE2-FC FUSION PROTEIN FOR TREATMENT AND PREVENTION OF SARS-COV-2 INFECTION

      
Application Number 18001947
Status Pending
Filing Date 2021-06-15
First Publication Date 2023-07-27
Owner
  • ACADEMIA SINICA (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Yang, Pan-Chyr
  • Chang, Sui-Yuan
  • Huang, Kuo-Yen

Abstract

Disclosed herein are ACE2-Fc fusion polypeptides that contain at least one binding site for a spike protein of a coronavirus and methods of using such for therapeutic and/or diagnostic purposes. Also provided herein are methods for producing such fusion polypeptides.

IPC Classes  ?

  • C07K 14/705 - Receptors; Cell surface antigens; Cell surface determinants
  • A61K 47/64 - Drug-peptide, drug-protein or drug-polyamino acid conjugates, i.e. the modifying agent being a peptide, protein or polyamino acid which is covalently bonded or complexed to a therapeutically active agent
  • A61P 31/14 - Antivirals for RNA viruses
  • C07K 14/55 - IL-2
  • A61K 38/20 - Interleukins
  • A61K 38/17 - Peptides having more than 20 amino acids; Gastrins; Somatostatins; Melanotropins; Derivatives thereof from humans
  • A61K 45/06 - Mixtures of active ingredients without chemical characterisation, e.g. antiphlogistics and cardiaca

13.

MEMORY DEVICE AND METHOD FOR FORMING THE SAME

      
Application Number 17582674
Status Pending
Filing Date 2022-01-24
First Publication Date 2023-07-27
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Hwu, Jenn-Gwo
  • Hsu, Ting-Hao

Abstract

A method includes forming a first dielectric layer over the substrate and covering first, second, third, fourth, fifth and sixth protrusion regions; forming first, second, and third gate conductors over the first, fourth, and fifth protrusion regions, respectively; performing a first implantation process to form a second source region and a second drain region in the fourth protrusion region; performing a second implantation process to form a first source region and a first drain region in the first protrusion region, and to form a third source region and a third drain region in the fifth protrusion region; forming a metal layer over the third protrusion region; patterning the metal layer to form an inner circular electrode and an outer ring electrode encircling the inner circular electrode; forming a word line; and forming a bit line.

IPC Classes  ?

  • H01L 27/102 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components
  • H01L 29/88 - Tunnel-effect diodes
  • H01L 29/66 - Types of semiconductor device

14.

SYSTEM FOR QUANTITATIVE DIFFERENTIAL PHASE CONTRAST MICROSCOPY WITH ISOTROPIC TRANSFER FUNCTION

      
Application Number 18121979
Status Pending
Filing Date 2023-03-15
First Publication Date 2023-07-27
Owner
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
  • YONGLIN HEALTHCARE FOUNDATION (Taiwan, Province of China)
Inventor
  • Luo, Yuan
  • Chuang, Yu-Hsuan
  • Lin, Yu-Zi

Abstract

A system for quantitative differential phase contrast microscopy with isotropic transfer function utilizes a modulation mechanism to create a detection light field having a radial or other axial orientation of optical intensity gradient or other distribution. A condenser generates an off-axis light field to project onto an object under examination, thereby generating an object light field, which is then guided to an image capturing device through an objective lens for capturing images. A differential phase contrast algorithm is applied to the images for obtaining a phase, thereby a depth information corresponding to the phase can be obtained to reconstruct the surface profile of the object.

IPC Classes  ?

  • G02B 21/14 - Condensers affording illumination for phase-contrast observation
  • G02B 21/00 - Microscopes

15.

NEEDLE FREE DELIVERY SYSTEM AND OPERATION METHOD THEREOF

      
Application Number 17661564
Status Pending
Filing Date 2022-05-01
First Publication Date 2023-07-27
Owner
  • National Taiwan University of Science and Technology (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
  • National Defense Medical Center (Taiwan, Province of China)
Inventor
  • Liao, Ai-Ho
  • Wang, Chih-Hung
  • Liu, Hao-Li

Abstract

The present disclosure provides a needle free delivery system, which includes a handheld device and a signal switching device. The signal switching device is electrically connected to the handheld device, and the handheld device includes an ultrasonic probe. The signal switching device provides a burst wave capable of generating a resonant carrier wave through piezoelectric material to the handheld device, so that an ultrasonic wave of the handheld device can perform a needleless delivery on a carrier.

IPC Classes  ?

  • A61B 8/00 - Diagnosis using ultrasonic, sonic or infrasonic waves
  • H04R 17/10 - Resonant transducers, i.e. adapted to produce maximum output at a predetermined frequency

16.

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

      
Application Number 17736819
Status Pending
Filing Date 2022-05-04
First Publication Date 2023-07-27
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Wang, Chun-Yuan
  • Chen, Miin-Jang

Abstract

A method for fabricating a semiconductor device is provided. The method includes depositing a gate dielectric layer over a semiconductor substrate; depositing a work function layer over the gate dielectric layer by an atomic layer deposition (ALD) process, wherein the work function layer comprises a metal element and a nonmetal element, and the ALD process comprises a plurality of cycles. Each of the cycles comprises: introducing a precursor gas comprising the metal element to a chamber to form a precursor surface layer on the semiconductor substrate in the chamber; purging a remaining portion of the precursor gas away from the chamber; performing a reactive-gas plasma treatment using a reactive-gas plasma comprising the nonmetal element to convert the precursor surface layer into a monolayer of the work function layer; purging a remaining portion of the reactive-gas plasma away from the chamber, and performing an inert-gas plasma treatment in the chamber.

IPC Classes  ?

  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 29/49 - Metal-insulator semiconductor electrodes

17.

DETECTION DEVICE AND DETECTION METHOD FOR DISTINGUISHING TYPES OF PARTICLES IN AQUEOUS SOLUTION

      
Application Number 17830294
Status Pending
Filing Date 2022-06-01
First Publication Date 2023-07-20
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Sun, Chi-Kuang
  • Wang, Peng-Jui

Abstract

A detection device and a detection method for distinguishing types of particles in an aqueous solution are provided. The detection device includes a detection chip, a signal source and a processing device. The detection chip includes a substrate, a coplanar waveguide transmission line and a super-hydrophobic film mask. When a to-be-detected aqueous solution that contains to-be-detected particles is provided on the detection chip, the super-hydrophobic film mask of the detection chip can confine the to-be-detected aqueous solution in a detection area. The processing device controls the signal source to provide detection microwave signals with different detection frequencies, simultaneously measures a first output signal and a second output signal at the different detection frequencies to generate a to-be-detected absorption spectrum, and compares the to-be-detected absorption spectrum with historical absorption spectra, so as to determine types of the to-be-detected particles.

IPC Classes  ?

18.

INTEGRATED CIRCUIT DEVICE AND METHOD FOR FABRICATING THE SAME

      
Application Number 17580536
Status Pending
Filing Date 2022-01-20
First Publication Date 2023-07-20
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Hwu, Jenn-Gwo
  • Lin, Jian-Yu

Abstract

An integrated circuit device includes a semiconductor structure, a tunneling layer, a top electrode, a passivation layer, and a conductive feature. The semiconductor structure has a base portion and a protruding portion over a top surface of the base portion. The tunneling layer is over a top surface of the protruding portion of the semiconductor structure. The top electrode is over the tunneling layer. The passivation layer is over a sidewall of the protruding portion of the semiconductor structure. The conductive feature is directly below the protruding portion of the semiconductor structure.

IPC Classes  ?

  • H01L 29/66 - Types of semiconductor device
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/88 - Tunnel-effect diodes
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/94 - Metal-insulator-semiconductors, e.g. MOS

19.

IDENTIFICATION METHOD OF PLASTIC MICROPARTICLES

      
Application Number 17833936
Status Pending
Filing Date 2022-06-07
First Publication Date 2023-07-20
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Fan, Chihhao
  • Lin, Jhen-Nan
  • Li, Jun-Wei
  • Huang, Ya-Zhen

Abstract

Provided is an identification method of plastic microparticles, including: performing an infrared analysis on plastic microparticles to identify whether the plastic microparticles include polyethylene terephthalate, polyethylene, polypropylene, or nylon 66, wherein the identification is to determine whether the plastic microparticles have a characteristic peak of each plastic, and the characteristic peak is selected from signals that do not overlap and interfere with each other in the infrared spectrum signals of each plastic.

IPC Classes  ?

  • G01N 21/3563 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using infrared light for analysing solids; Preparation of samples therefor
  • G01N 33/44 - Resins; Plastics; Rubber; Leather
  • G01J 3/42 - Absorption spectrometry; Double-beam spectrometry; Flicker spectrometry; Reflection spectrometry

20.

FLOATER STRUCTURE

      
Application Number 18092086
Status Pending
Filing Date 2022-12-30
First Publication Date 2023-07-06
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Ma, Kai-Tung
  • Hsu, I-Jen
  • Chiang, Mao-Hsiung
  • Huang, Yun-Tzu
  • Chou, Shean-Kwang

Abstract

The present invention provides a floater structure. The floater structure is used for bearing the tower of wind turbines, especially for the offshore wind turbines. The floater structure is constructed via a main column, two off columns and a pontoon. The off column is connected to any other main column and the off column via a horizontal bracing, and the pontoon is connected to the main column and the two off columns. The shape of the pontoon is triangle, and three corners of the triangle are round corners, polygon corners, or the combinations thereof.

IPC Classes  ?

  • B63B 35/38 - Rigidly-interconnected pontoons
  • B63B 35/44 - Floating buildings, stores, drilling platforms, or workshops, e.g. carrying water-oil separating devices
  • B63B 1/12 - Hydrodynamic or hydrostatic features of hulls or of hydrofoils deriving lift mainly from water displacement with multiple hulls the hulls being interconnected rigidly

21.

DETECTION PLATFORM AND METHOD FOR DETECTING ABUSED DRUGS

      
Application Number 17983401
Status Pending
Filing Date 2022-11-09
First Publication Date 2023-06-29
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Chang, Huan-Tsung
  • Yen, Yao-Te
  • Lin, Yu-Syuan

Abstract

A detection platform is suitable for detecting an abused drug in a sample. The detection platform includes a sensing array, an image and transmission tool, and a remote workstation. The sensing array includes a reaction container, gold nanoclusters, carbon quantum dots, silver nanoclusters and a mixed solution after reaction with a Marquis reagent. The reaction container has a plurality of first grooves and a plurality of second grooves. The gold nanoclusters, the carbon quantum dots, the silver nanoclusters, and the mixed solution after reaction with the Marquis reagent are arranged in the corresponding first grooves and the corresponding second grooves, respectively. When the abused drug reacts with the gold nanoclusters, carbon quantum dots and silver nanoclusters in the first grooves, respectively, and the mixed solution after the abused drug reacting with the Marquis reagent is added to the second groove, a detection result is obtained.

IPC Classes  ?

  • G01N 21/64 - Fluorescence; Phosphorescence
  • G01N 33/94 - Chemical analysis of biological material, e.g. blood, urine; Testing involving biospecific ligand binding methods; Immunological testing involving narcotics

22.

MEMORY DEVICE

      
Application Number 18163520
Status Pending
Filing Date 2023-02-02
First Publication Date 2023-06-15
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Hwu, Jenn-Gwo
  • Chen, Bo-Jyun
  • Lin, Kuan-Wun

Abstract

A memory device includes a semiconductor substrate and a memory cell at a memory region of the semiconductor substrate. A memory cell includes a memory portion of the semiconductor substrate, a tunneling layer, a storage layer, a first electrode, and a second electrode. The tunneling layer is over the memory portion of the semiconductor substrate. The storage layer is over and in contact with the tunneling layer. The first electrode is over the storage layer. The second electrode is over and in contact with the tunneling layer but is spaced apart from the storage layer.

IPC Classes  ?

  • H10B 99/00 - Subject matter not provided for in other groups of this subclass

23.

PHOTO DETECTOR

      
Application Number 18070025
Status Pending
Filing Date 2022-11-28
First Publication Date 2023-06-08
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Lin, Ching-Fuh
  • Su, Zih-Chun
  • Chang, Jen-Yao

Abstract

A photo detector is provided with a metal, a semiconductor, a first electrode, and a second electrode. In addition, a pre-treatment and/or a post-treatment is performed to the photo detector to reduce its noise and hence improves the signal-to-noise ratio (SNR). The provided photo detector can quickly respond to short mid-infrared light and generate low noise and high SNR currents.

IPC Classes  ?

  • H10K 30/00 - Organic devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation
  • H10K 30/81 - Electrodes
  • H10K 71/40 - Thermal treatment, e.g. annealing in the presence of a solvent vapour
  • H10K 85/30 - Coordination compounds

24.

QUANTUM CHARGE-COUPLED DEVICE

      
Application Number 17993887
Status Pending
Filing Date 2022-11-24
First Publication Date 2023-06-01
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Lin, Guin-Dar
  • Png, Wen-Han

Abstract

A quantum charge-coupled device including a first ion, a second ion, a fixed ion trap, an adjustable ion trap, and an excitation light source is provided. The fixed ion trap is configured to stationarily trap the first ion. The adjustable ion trap works as an ion rail disposed beside the fixed ion trap, wherein the ion rail is configured to make the second ion move at a constant velocity along the ion rail. The excitation light source is configured to irradiate an incident light beam. The incident light beam includes a series of light pulses and covers the first ion and the second ion when a distance between them becomes less than or equal to a proximity range, such that a quantum entangled state is directly built between the first ion and the second ion in uniform motion.

IPC Classes  ?

  • G06N 10/40 - Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control

25.

MEMORY DEVICE AND FORMING METHOD THEREOF

      
Application Number 17715886
Status Pending
Filing Date 2022-04-07
First Publication Date 2023-06-01
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Tsou, Ya-Jui
  • Chen, Wei-Jen
  • Liu, Pang-Chun
  • Liu, Chee-Wee
  • Lin, Shao-Yu
  • Wang, Chih-Lin

Abstract

A memory device comprises a source region, a drain region, a channel region, a gate dielectric layer, an MTJ stack, and a metal gate. The source region and the drain region are over a substrate. The channel region is between the source region and the drain region. The gate dielectric layer is over the channel region. The MTJ stack is over the gate dielectric layer. The MTJ stack comprises a first ferromagnetic layer, a second ferromagnetic layer with a switchable magnetization, and a tunnel barrier layer between the first and second ferromagnetic layers. The metal gate is over the MTJ stack.

IPC Classes  ?

26.

DATA PROCESSING METHOD FOR RAPIDLY SUPPRESSING HIGH-FREQUENCY BACKGROUND NOISE IN A DIGITIZED IMAGE

      
Application Number 17688902
Status Pending
Filing Date 2022-03-08
First Publication Date 2023-05-18
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Sun, Chi-Kuang
  • Borah, Bhaskar Jyoti

Abstract

A data processing method for rapidly suppressing background high frequency noise in a digitized image. The data processing method includes configuring a graphical processing unit to perform a first amplification process, a pixel binning process or a first interpolation process, a first low-pass filtering process, a second interpolation process, a first subtraction process, a second low-pass filtering process, a second amplification process, and a second subtraction process on an input image, so as to subtract a subtraction mask from the input image and generate a noise-suppressed output image.

IPC Classes  ?

  • G06T 5/00 - Image enhancement or restoration
  • G06T 3/40 - Scaling of a whole image or part thereof
  • G06T 5/20 - Image enhancement or restoration by the use of local operators
  • G06T 5/50 - Image enhancement or restoration by the use of more than one image, e.g. averaging, subtraction

27.

DATA PROCESSING SYSTEM FOR PROCESSING GENE SEQUENCING DATA

      
Application Number 17880281
Status Pending
Filing Date 2022-08-03
First Publication Date 2023-05-18
Owner
  • National Yang Ming Chiao Tung University (Taiwan, Province of China)
  • National Taiwan University (Taiwan, Province of China)
Inventor
  • Hung, Jui-Hung
  • Yang, Chia-Hsiang
  • Wu, Yi-Chung
  • Chen, Yen-Lung
  • Yang, Chung-Hsuan

Abstract

A data processing system can be operated in one of a preprocessing mode, a short-read mapping mode, a sequence assembly mode or a variant calling mode that are related to a to-be-tested DNA sequence. The data processing system includes a sorting engine that supports high-speed processing of sorting in the preprocessing mode and the sequence assembly mode, and a dynamic processing engine that supports dynamic programming calculations in the short-read mapping mode and the variant calling mode. The data processing system may be implemented on a system-on-chip (SoC) for performing accelerated processing of gene sequencing data with reduced memory requirements.

IPC Classes  ?

  • G16B 50/00 - ICT programming tools or database systems specially adapted for bioinformatics
  • G16B 30/20 - Sequence assembly
  • G06F 16/31 - Indexing; Data structures therefor; Storage structures

28.

DEVICE WITH ALTERNATE COMPLEMENTARY CHANNELS AND FABRICATION METHOD THEREOF

      
Application Number 17677929
Status Pending
Filing Date 2022-02-22
First Publication Date 2023-05-18
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Lin, Shih-Ya
  • Tu, Chien-Te
  • Tsai, Chung-En
  • Liu, Chee-Wee

Abstract

A device comprises a gate structure, n-type source/drain features, p-type source/drain features, an NFET channel, and a PFET channel. The gate structure is over a substrate. The n-type source/drain features are on opposite first and second sides of the gate structure, respectively. The p-type source/drain features are on opposite third and fourth sides of the gate structure, respectively. The NFET channel extends within the gate structure and connects the n-type source/drain features. The PFET channel extends within the gate structure and connects the p-type source/drain features. The NFET channel and the PFET channel are vertically spaced apart by the gate structure.

IPC Classes  ?

  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/786 - Thin-film transistors
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 29/66 - Types of semiconductor device

29.

SUPERCONDUCTIVE QUBIT DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 17715897
Status Pending
Filing Date 2022-04-07
First Publication Date 2023-05-04
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Yeh, Yu-Chen
  • Liang, Chi-Te
  • Goan, Hsi-Sheng

Abstract

A device includes a source region, a drain region, a channel region, a pair of depletion gates, an accumulation gate, and a superconductive resonator. The channel region is between the source region and the drain region. The pair of depletion gates are spaced apart from each other. The pair of depletion gates both overlap the channel region and define a quantum dot qubit region in the channel region and between the pair of depletion gates. The accumulation gate is above and crossing the pair of depletion gates. The superconductive resonator is laterally adjacent the quantum dot qubit region.

IPC Classes  ?

  • H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
  • H01L 39/12 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details characterised by the material
  • H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
  • H01P 7/08 - Strip line resonators
  • G06N 10/40 - Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control

30.

MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 18066205
Status Pending
Filing Date 2022-12-14
First Publication Date 2023-04-20
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Hwu, Jenn-Gwo
  • Chiang, Tzu-Hao

Abstract

A memory device includes a transistor, a memory cell, and an interconnect layer. The transistor includes a bottom source/drain portion, a channel portion, and a top source/drain portion stacked from bottom to top and a gate structure surrounding the channel portion. The memory cell includes a nanowire bottom electrode, a first dielectric layer, a second dielectric layer, and a top electrode. The first dielectric layer laterally surrounds the nanowire bottom electrode. The second dielectric layer is over the nanowire bottom electrode and the first dielectric layer. The second dielectric layer is in contact with a top surface of the nanowire bottom electrode and a sidewall of the first dielectric layer. The top electrode covers the second dielectric layer. The interconnect layer is over the transistor and the memory cell to interconnect the transistor and the memory cell.

IPC Classes  ?

  • H10B 63/00 - Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
  • H10N 70/00 - Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching

31.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 17991380
Status Pending
Filing Date 2022-11-21
First Publication Date 2023-04-13
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
  • NATIONAL TAIWAN NORMAL UNIVERSITY (Taiwan, Province of China)
Inventor
  • Chou, Chun-Yi
  • Cheng, Po-Hsien
  • Chen, Tse-An
  • Chen, Miin-Jang

Abstract

A device includes a conductive feature, a first dielectric layer, a via, an etch stop layer, a second dielectric layer, and a conductive line. The first dielectric layer is above the conductive feature. The via is in the first dielectric layer and above the conductive feature. The etch stop layer is above the first dielectric layer. A side surface of the etch stop layer is coterminous with a sidewall of the via. The second dielectric layer is above the etch stop layer. The conductive line is in the second dielectric layer and over the via. The conductive line is in contact with the side surface of the etch stop layer and a top surface of the etch stop layer.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 21/762 - Dielectric regions
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • C23C 16/04 - Coating on selected surface areas, e.g. using masks
  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
  • H01L 29/40 - Electrodes

32.

Methods For Non-Resist Nanolithography

      
Application Number 18065234
Status Pending
Filing Date 2022-12-13
First Publication Date 2023-04-13
Owner
  • Taiwan Semiconductor Manufacturing Company, Ltd. (Taiwan, Province of China)
  • National Taiwan University (Taiwan, Province of China)
Inventor
  • Chen, Miin-Jang
  • Tsai, Kuen-Yu
  • Liu, Chee-Wee

Abstract

A method for forming a semiconductor device is provided. A first patterned mask is formed on the substrate, the first patterned mask having a first opening therein. A second patterned mask is formed on the substrate in the first opening, the first patterned mask and the second patterned mask forming a combined patterned mask. The combined patterned mask is formed having one or more second openings, wherein one or more unmasked portions of the substrate are exposed. Trenches that correspond to the one or more unmasked portions of the substrate are formed in the substrate in the one or more second openings.

IPC Classes  ?

  • H01L 29/66 - Types of semiconductor device
  • H01L 21/308 - Chemical or electrical treatment, e.g. electrolytic etching using masks

33.

MONOCLONAL ANTIBODY

      
Application Number 17938543
Status Pending
Filing Date 2022-10-06
First Publication Date 2023-04-13
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Wei, Ling-Hung
  • Hua, Kuo-Tai
  • Chen, Min-Wei
  • Chou, Chun-Chi

Abstract

The present invention discloses an monoclonal antibody, which can bind to HyIL-6 with the binding constant 2.86×10−10 and significantly inhibit IL-6/IL-6R/gp130 complex formation. In addition, the monoclonal antibody of the present invention effectively inhibits HyIL-6-stimulated signal transducer and activator of transcription 3(STAT3) activation and related vascular endothelial growth factor (VEGF) induction. Data from hydrogen deuterium exchange mass spectrometry (HDX-MS) demonstrate that the antibody of the present invention mainly binds to site IIIa of IL-6 and blocks the final step in the interaction between gp130 and IL-6/IL-6R complex. Additionally, data from ELISA binding assays and kinetics assays indicate that the antibody of the present invention interacts simultaneously with IL-6 and IL-6R, while it does not interact with IL-6R alone. The unique features of the antibody of the present invention offer a novel alternative for IL-6 blockade and illuminate a better therapeutic intervention targeting IL-6.

IPC Classes  ?

  • C07K 16/24 - Immunoglobulins, e.g. monoclonal or polyclonal antibodies against material from animals or humans against cytokines, lymphokines or interferons
  • C12N 15/63 - Introduction of foreign genetic material using vectors; Vectors; Use of hosts therefor; Regulation of expression

34.

Isolated or Engineered Polypeptides, Microorganisms as well as Method for Synthesizing Phenolic Phytochemical Phosphate Derivatives using the Polypeptides or Microorganisms

      
Application Number 17852836
Status Pending
Filing Date 2022-06-29
First Publication Date 2023-04-06
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Su, Nan-Wei
  • Hsu, Chen

Abstract

An isolated or engineered polypeptide, a microorganism comprising a nucleic acid sequence encoded by the polypeptide, and a method for synthesizing a polyphenolic phytochemicals phosphate derivative using the polypeptide or the microorganism are provided. The polypeptide having a homologous protein sequence that is more than 70% identical to the polyphenol phosphorylation synthetase (SEQ ID NO: 13) comprises a conserved domain which sequentially comprises: an ATP-binding domain, which includes active catalytic sites of Lys27, Arg102, and Glu282; a substrate-binding domain, which includes a conserved motif of DDHHFYIDAMLDAKAR (SEQ ID NO: 14), and includes active catalytic sites ofAsp627, His629, and His630; and a phosphorylated histidine catalytic domain, which includes His795 based on SEQ ID NO: 13.

IPC Classes  ?

  • C12N 9/12 - Transferases (2.) transferring phosphorus containing groups, e.g. kinases (2.7)
  • C12P 9/00 - Preparation of organic compounds containing a metal or atom other than H, N, C, O, S, or halogen
  • C12P 17/18 - Preparation of heterocyclic carbon compounds with only O, N, S, Se, or Te as ring hetero atoms containing at least two hetero rings condensed among themselves or condensed with a common carbocyclic ring system, e.g. rifamycin
  • C12P 17/06 - Oxygen as only ring hetero atoms containing a six-membered hetero ring, e.g. fluorescein

35.

PROTECTIVE ASSEMBLY AND IMAGING EQUIPMENT SET

      
Application Number 17563313
Status Pending
Filing Date 2021-12-28
First Publication Date 2023-03-30
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Sun, Chi-Kuang
  • Wu, Pei-Jhe
  • Huang, Ying-Ting
  • Tseng, Hsiao-Chieh

Abstract

A protective assembly and an imaging equipment set are provided. The protective assembly is used to accommodate an imaging lens, and includes a housing, a transparent partition, and an adhesive member. The housing includes a tube body segment and a bottom segment that is connected to the tube body segment. A curved portion is formed on a periphery of the bottom segment, and an accommodating space is defined by the housing. The imaging lens is movably disposed in the accommodating space. An inner side of the curved portion has an inclined surface that is configured to abut against a shell of the imaging lens. The transparent partition is disposed on the bottom segment of the housing. The adhesive member has an outer surface that is sticky and an inner surface that is fixed onto a bottom surface of the housing.

IPC Classes  ?

  • G02B 7/02 - Mountings, adjusting means, or light-tight connections, for optical elements for lenses

36.

SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME

      
Application Number 17691977
Status Pending
Filing Date 2022-03-10
First Publication Date 2023-03-23
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Lin, Shih-Yen
  • Tsai, Po-Cheng

Abstract

A semiconductor device includes a substrate, a 2-D material channel layer, a 2-D material passivation layer, source/drain contacts, and a gate structure. The 2-D material channel layer is over the substrate, wherein the 2-D material channel layer is made of graphene. The 2-D material passivation layer is over the 2-D material channel layer, wherein the 2-D material passivation layer is made of transition metal dichalcogenide (TMD). The source/drain contacts are over the 2-D material passivation layer. The gate structure is over the 2-D material passivation layer and between the source/drain contacts.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 27/11582 - Electrically programmable read-only memories; Multistep manufacturing processes therefor with charge-trapping gate insulators, e.g. MNOS or NROM characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
  • H01L 29/66 - Types of semiconductor device

37.

ENDODONTIC ROBOTIC SURGICAL SYSTEM AND ENDODONTIC ROBOTIC SURGICAL ASSEMBLY

      
Application Number 17472714
Status Pending
Filing Date 2021-09-13
First Publication Date 2023-03-16
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Chen, Cheng-Wei
  • Li, Yi-Chan
  • Cheng, Hao-Fang

Abstract

An endodontic robotic surgical system is provided. The endodontic robotic surgical system includes a robot arm and an endodontic robotic surgical assembly electrically connected to the robot arm. The endodontic robotic surgical assembly includes a multiple-axis force sensing device, a treatment assembly and an assistive device. The treatment assembly includes a housing, a drawstring-positioning structure disposed on the housing, a plurality of drawstrings connected to the drawstring-positioning structure, and an endodontic surgical element fitted to the housing. The drawstring-positioning structure is electrically connected to the multiple-axis force sensing device. The assistive device is adapted to be put on a tooth structure in a human oral cavity. The drawstrings are connected to different points on the assistive device. An endodontic robotic surgical assembly is further provided.

IPC Classes  ?

  • A61B 34/30 - Surgical robots
  • A61B 90/00 - Instruments, implements or accessories specially adapted for surgery or diagnosis and not covered by any of the groups , e.g. for luxation treatment or for protecting wound edges

38.

DETECTION KIT AND METHOD FOR DETECTING ABUSED DRUGS

      
Application Number 17580571
Status Pending
Filing Date 2022-01-20
First Publication Date 2023-03-09
Owner
  • National Taiwan University (Taiwan, Province of China)
  • Investigation Bureau, Ministry of Justice (Taiwan, Province of China)
Inventor
  • Chang, Huan-Tsung
  • Yen, Yao-Te
  • Chang, Yin-Jue
  • Liu, Yuh-Lin

Abstract

A detection kit suitable for detecting a target in a sample is provided. The detection kit includes a syringe, a first reaction container, a second reaction container, and a plurality of fluorescent substances. The syringe is loaded with first organic solvent. The first reaction container is connected to the syringe and is loaded with the sample. The second reaction container is connected to the first reaction container and is loaded with second organic solvent. The fluorescent substances are dispersed in the second organic solvent and emit fluorescence. When the target in the sample is dissolved in the first organic solvent and reacts with the fluorescent substances in the second organic solvent, the fluorescence emitted by the fluorescent substances is quenched.

IPC Classes  ?

  • G01N 21/64 - Fluorescence; Phosphorescence
  • G01N 33/94 - Chemical analysis of biological material, e.g. blood, urine; Testing involving biospecific ligand binding methods; Immunological testing involving narcotics
  • G01N 33/543 - Immunoassay; Biospecific binding assay; Materials therefor with an insoluble carrier for immobilising immunochemicals

39.

MANUFACTURING METHOD OF HEMOSTATIC MATERIAL AND HEMOSTATIC MATERIAL PREPARED THEREBY

      
Application Number 17893716
Status Pending
Filing Date 2022-08-23
First Publication Date 2023-03-09
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Yu, Jiashing
  • Lu, Wei-Fan
  • Lu, Ting-Yu
  • Liu, Yi-Chen

Abstract

A preparation method of a hemostatic material is provided, wherein the method mainly includes mixing a keratin and an alginate; obtaining a keratin-alginate composite scaffold by a freeze-gelation method; and drying the keratin-alginate composite scaffold to obtain a hemostatic material. Further, a methylene blue can be loaded into the hemostatic material so that the hemostatic material has antimicrobial photodynamic abilities.

IPC Classes  ?

  • A61L 15/28 - Polysaccharides or their derivatives
  • A61L 15/42 - Use of materials characterised by their function or physical properties
  • A61L 15/32 - Proteins, polypeptides; Degradation products or derivatives thereof, e.g. albumin, collagen, fibrin, gelatin
  • A61L 15/56 - Wetness-indicators or colorants

40.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 17459924
Status Pending
Filing Date 2021-08-27
First Publication Date 2023-03-02
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Hwu, Jenn-Gwo
  • Chiang, Tzu-Hao

Abstract

A device includes a substrate, a dielectric structure, a gate electrode, and a drain electrode. The dielectric structure is over the substrate. The dielectric structure includes a first portion, a second portion, and a third portion. The first portion has a first equivalent oxide thickness. The second portion is spaced apart from the first portion and has a second equivalent oxide thickness. The third portion laterally surrounds the first and second portions and has a third equivalent oxide thickness greater than the first equivalent oxide thickness of the first portion. The gate electrode is over the dielectric structure and in contact with the first and third portions of the dielectric structure. The drain electrode is over the dielectric structure and in contact with the second and third portions of the dielectric structure.

IPC Classes  ?

41.

SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME

      
Application Number 17461793
Status Pending
Filing Date 2021-08-30
First Publication Date 2023-03-02
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Huang, Yu-Shiang
  • Liu, Chee-Wee

Abstract

A semiconductor device includes a substrate, a semiconductor strip, an isolation dielectric, a plurality of channel layers, a gate structure, a plurality of source/drain structures, and an isolation layer. The semiconductor strip extends upwardly from the substrate and has a length extending along a first direction. The isolation dielectric laterally surrounds the semiconductor strip. The channel layers extend in the first direction above the semiconductor strip and arrange in a second direction substantially perpendicular to the substrate. The gate structure surrounds each of the channel layers. The source/drain structures are above the semiconductor strip and on either side of the channel layers. The isolation layer is interposed between the semiconductor strip and the gate structure and further interposed between the semiconductor strip and each of the plurality of source/drain structures.

IPC Classes  ?

  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/786 - Thin-film transistors
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device

42.

SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME

      
Application Number 17461714
Status Pending
Filing Date 2021-08-30
First Publication Date 2023-03-02
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Lin, Shih-Yen
  • Tsai, Po-Cheng
  • Zhang, Yu-Wei

Abstract

A method includes forming a 2-D material semiconductor layer over a substrate; forming source/drain electrodes covering opposite sides of the 2-D material semiconductor layer, while leaving a portion of the 2-D material semiconductor layer exposed by the source/drain electrodes; forming a first gate dielectric layer over the portion of the 2-D material semiconductor layer by using a physical deposition process; forming a second gate dielectric layer over the first gate dielectric layer by using a chemical deposition process, in which a thickness of the first gate dielectric layer is less than a thickness of the second gate dielectric layer; and forming a gate electrode over the second gate dielectric layer.

IPC Classes  ?

  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 21/8234 - MIS technology
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched

43.

MARGIN ASSESSMENT METHOD

      
Application Number 17505709
Status Pending
Filing Date 2021-10-20
First Publication Date 2023-02-09
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Sun, Chi-Kuang
  • Liao, Yi-Hua
  • Chen, Chia-I

Abstract

A margin assessment method is provided. Under cooperation of harmonic generation microscopy (HGM) and a deep learning method, the margin assessment method can instantaneously and digitally determine whether a 3D image group generated by an HGM imaging system is a malignant tumor or the surrounding normal skin, so as to assist in determining margins of a lesion.

IPC Classes  ?

  • G02B 21/36 - Microscopes arranged for photographic purposes or projection purposes
  • G06T 7/00 - Image analysis
  • G02B 21/00 - Microscopes
  • G06N 3/04 - Architecture, e.g. interconnection topology

44.

COMPOSITION OF LACTIC ACID BACTERIUM FOR USE IN PREVENTING OR TREATING RETT SYNDROME

      
Application Number 17797968
Status Pending
Filing Date 2020-02-06
First Publication Date 2023-02-02
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Wong, Lee Chin
  • Wu, Yen-Tzu
  • Tsai, Wen-Che
  • Tsai, Ying-Chieh

Abstract

The present disclosure provides a method of preventing or treating Rett syndrome in a subject in need thereof, including administering to the subject an effective amount of Lactobacillus plantarum subsp. plantarum PS128. Also provided is a composition comprising Lactobacillus plantarum subsp. plantarum PS128 and a carrier thereof for use in preventing or treating Rett syndrome in a subject in need thereof.

IPC Classes  ?

  • A61K 35/747 - Lactobacilli, e.g. L. acidophilus or L. brevis
  • A61K 45/06 - Mixtures of active ingredients without chemical characterisation, e.g. antiphlogistics and cardiaca
  • A61P 25/14 - Drugs for disorders of the nervous system for treating abnormal movements, e.g. chorea, dyskinesia

45.

METHOD FOR DETECTING SHORT-CHAIN FATTY ACIDS IN BIOLOGICAL SAMPLE

      
Application Number 17648618
Status Pending
Filing Date 2022-01-21
First Publication Date 2023-02-02
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Hsu, Cheng-Chih
  • Kuo, Ting-Hao
  • Weng, Cheng-Yu
  • Chai, Laura Min Xuan
  • Zou, Hsin-Bai

Abstract

The present disclosure provides a method for detecting short-chain fatty acids in biological samples, including a derivatizing step, a loading step and a detecting step. The derivatizing step includes treating the short-chain fatty acids in the biological sample with 2-nitrophenylhydrazine for derivatizing the short-chain fatty acids into a sample to be detected. The loading step includes loading the sample onto a paper carrier. The detecting step includes analyzing the sample loaded onto the paper carrier by direct analysis in real time mass spectrometry for obtaining a detection result. The method provided by the present disclosure may complete the analysis of the biological sample within a short period of time and achieve a quantitative result comparable to that obtained by conventional chromatographic approaches.

IPC Classes  ?

  • G01N 33/483 - Physical analysis of biological material
  • H01J 49/16 - Ion sources; Ion guns using surface ionisation, e.g. field-, thermionic- or photo-emission
  • G01N 1/38 - Diluting, dispersing or mixing samples
  • G01N 1/40 - Concentrating samples
  • H01J 49/00 - Particle spectrometers or separator tubes

46.

INTEGRATED CIRCUIT STRUCTURE AND FABRICATION THEREOF

      
Application Number 17689784
Status Pending
Filing Date 2022-03-08
First Publication Date 2023-01-26
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Chung, Chia-Che
  • Cheng, Chun-Yi
  • Liu, Chee-Wee

Abstract

An IC structure comprises an MTJ cell, a transistor, a first word line, and a second word line. The transistor is electrically coupled to the MTJ cell. The transistor comprises a first gate terminal and a second gate terminal independent of the first gate terminal. The first word line is electrically coupled to the first gate terminal of the transistor. The second word line is electrically coupled to the second gate terminal of the transistor. A resistance state of the MTJ cell is dependent on a first word line voltage applied to the first word line and a second word line voltage applied to the second word line, and the resistance state of the MTJ cell follows an AND gate logic or an OR gate logic.

IPC Classes  ?

  • H01L 27/22 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate using similar magnetic field effects
  • H01L 43/12 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

47.

Method Of Using Aptamer For Detecting Glycated Hemoglobin In Whole Blood And Nanoelectronic Aptasensor

      
Application Number 17381622
Status Pending
Filing Date 2021-07-21
First Publication Date 2023-01-26
Owner National Taiwan University (Taiwan, Province of China)
Inventor Chen, Yit-Tsong

Abstract

Provided is a method of using an aptamer for detecting a glycated hemoglobin in a whole blood, the method includes that the aptamer is provided, the aptamer includes a DNA sequence selected from the group consisting of derived sequences of SEQ ID NOs: 1, 2, 3, and 4, in which the derived sequences refer to that 3′ end and/or 5′ end of the derived sequences are modified, and the derived sequences have 90% identity to the SEQ ID NOs: 1, 2, 3, and 4. The aptamer and the whole blood are contacted. A concentration of a conjugate of the aptamer and the glycated hemoglobin is estimated. Provided also is a nanoelectronic aptasensor including the above aptamer.

IPC Classes  ?

  • G01N 33/72 - Chemical analysis of biological material, e.g. blood, urine; Testing involving biospecific ligand binding methods; Immunological testing involving blood pigments, e.g. hemoglobin, bilirubin
  • C12N 15/115 - Aptamers, i.e. nucleic acids binding a target molecule specifically and with high affinity without hybridising therewith
  • G01N 33/543 - Immunoassay; Biospecific binding assay; Materials therefor with an insoluble carrier for immobilising immunochemicals
  • G01N 33/553 - Metal or metal coated

48.

MEMORY DEVICE AND FORMATION METHOD THEREOF

      
Application Number 17736652
Status Pending
Filing Date 2022-05-04
First Publication Date 2023-01-26
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Chiu, Jih-Chao
  • Tsou, Ya-Jui
  • Chen, Wei-Jen
  • Liu, Chee-Wee
  • Lin, Shao-Yu
  • Wang, Chih-Lin

Abstract

A memory device includes a spin-orbit-transfer (SOT) bottom electrode, an SOT ferromagnetic free layer, a first tunnel barrier layer, a spin-transfer-torque (STT) ferromagnetic free layer, a second tunnel barrier layer and a reference layer. The SOT ferromagnetic free layer is over the SOT bottom electrode. The SOT ferromagnetic free layer has a magnetic orientation switchable by the SOT bottom electrode using a spin Hall effect or Rashba effect. The first tunnel barrier layer is over the SOT ferromagnetic free layer. The STT ferromagnetic free layer is over the first tunnel barrier layer and has a magnetic orientation switchable using an STT effect. The second tunnel barrier layer is over the STT ferromagnetic free layer. The second tunnel barrier layer has a thickness different from a thickness of the first tunnel barrier layer. The reference layer is over the second tunnel barrier layer and has a fixed magnetic orientation.

IPC Classes  ?

  • G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
  • H01L 27/22 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate using similar magnetic field effects
  • H01L 43/04 - Devices using galvano-magnetic or similar magnetic effects; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details of Hall-effect devices
  • H01L 43/08 - Magnetic-field-controlled resistors
  • H01L 43/14 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof for Hall-effect devices
  • H01L 43/06 - Hall-effect devices

49.

INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FORMING THE SAME

      
Application Number 17572160
Status Pending
Filing Date 2022-01-10
First Publication Date 2023-01-19
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Lin, Shih-Yen
  • Zhang, Yu-Wei
  • Chen, Kuan-Chao
  • Lee, Si-Chen
  • Chen, Chi

Abstract

An integrated circuit includes a substrate, a transistor over the substrate, a first inter-metal dielectric (IMD) layer over the transistor, a metal via in the first IMD layer, a first 2-D material layer cupping an underside of the metal via, a second IMD layer over the metal via, a metal line in the second IMD layer, and a second 2-D material layer cupping an underside of the metal line. The second 2-D material layer span across the metal via and the first 2-D material layer.

IPC Classes  ?

  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 29/66 - Types of semiconductor device

50.

FLASH MEMORY DEVICE AND METHOD THEREOF

      
Application Number 17575054
Status Pending
Filing Date 2022-01-13
First Publication Date 2023-01-19
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Li, Jiun-Yun
  • Hsu, Nai-Wen
  • Hou, Wei-Chih
  • Wu, Yu-Jui
  • Chuang, Yen
  • Liu, Chia-Yu

Abstract

A flash memory device includes a substrate, a semiconductor quantum well layer, a semiconductor spacer, a semiconductor channel layer, a gate structure, and source/drain regions. The semiconductor quantum well layer is formed of a first semiconductor material and is disposed over the substrate. The semiconductor spacer is formed of a second semiconductor material and is disposed over the first semiconductor channel layer. The semiconductor channel layer is formed of the first semiconductor material and is disposed over the semiconductor spacer. Thea gate structure is over the second semiconductor channel layer. The source/drain regions are over the substrate and are on opposite sides of the gate structure.

IPC Classes  ?

  • H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
  • G11C 16/04 - Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
  • G11C 16/10 - Programming or data input circuits
  • G11C 16/14 - Circuits for erasing electrically, e.g. erase voltage switching circuits
  • G11C 16/26 - Sensing or reading circuits; Data output circuits
  • H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
  • H01L 29/161 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form including two or more of the elements provided for in group

51.

PHYSICALLY UNCLONABLE FUNCTION CELL AND OPERATION METHOD OF SAME

      
Application Number 17719155
Status Pending
Filing Date 2022-04-12
First Publication Date 2023-01-19
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Chung, Chia-Che
  • Tsen, Chia-Jung
  • Tsou, Ya-Jui
  • Liu, Chee-Wee

Abstract

A device is provided. The device includes a physical unclonable function (PUF) cell array. The PUF cell array includes multiple bit cells, and generates a PUF response output, in response to a challenge input, based on a data state of one bit cell in the bit cells. Each of the bit cells stores a bit data and includes a transistor having a control terminal coupled to a word line and a first terminal coupled to a source line, a first memory cell having a first terminal coupled to a first data line and a second terminal coupled to a second terminal of the transistor, and a second memory cell having a first terminal coupled to a second data line, different from the first data line, and a second terminal coupled to the second terminal of the first memory cell at the second terminal of the transistor.

IPC Classes  ?

  • G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
  • H03K 19/1776 - Structural details of configuration resources for memories

52.

Nanowire stack GAA device with selectable numbers of channel strips

      
Application Number 17871730
Grant Number 11742388
Status In Force
Filing Date 2022-07-22
First Publication Date 2023-01-19
Grant Date 2023-08-29
Owner
  • Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan, Province of China)
  • National Taiwan University (Taiwan, Province of China)
Inventor
  • Tsou, Ya-Jui
  • Luo, Zong-You
  • Huang, Wen Hung
  • Yan, Jhih-Yang
  • Liu, Chee-Wee

Abstract

The current disclosure describes techniques for individually selecting the number of channel strips for a device. The channel strips are selected by defining a three-dimensional active region that include a surface active area and a depth/height. Semiconductor strips in the active region are selected as channel strips. Semiconductor strips contained in the active region will be configured to be channel strips. Semiconductor strips not included in the active region are not selected as channel strips and are separated from source/drain structures by an auxiliary buffer layer.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes

53.

PHOTOCROSSLINKED HYDROGELS BLENDED COMPOSITION, PREPARATION AND USE THEREOF

      
Application Number 17806741
Status Pending
Filing Date 2022-06-14
First Publication Date 2023-01-12
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Kuo, Po-Ling
  • Fu, Shih-Hao

Abstract

The present invention discloses a partially crosslinked hydrogels blended composition with enhanced viscosity and yield stress, which is formed by the polymerization of one or more colloid monomers through crosslinking. The polymerization is initiated by a photoinitiator under irradiation of the light of a specific wavelength, which promotes crosslinking of the one or more colloid monomers. The hydrogels blended composition can be further crosslinked with one or more other colloid monomers through repeated excitation of the photoinitiator. The hydrogels blended composition can be polymerized into a gel upon re-irradiation, and can also be used as a biomaterial for wound repair, three-dimensional cell culture, personal nursing care, health care, medical and pharmaceutical applications.

IPC Classes  ?

54.

4,9-DIOXO-4,9-DIHYDRONAPHTHO[2,3-B]FURAN-3-CARBOXAMIDE DERIVATIVES AND USES THEREOF FOR TREATING PROLIFERATIVE DISEASES AND INFECTIOUS DISEASES

      
Application Number 17811880
Status Pending
Filing Date 2022-07-12
First Publication Date 2023-01-12
Owner
  • Academia Sinica (Taiwan, Province of China)
  • National Taiwan University (Taiwan, Province of China)
Inventor
  • Wong, Chi-Huey
  • Yang, Pan-Chyr
  • Chein, Rong-Jie
  • Pan, Szu-Hua
  • Cheng, Ting-Jen R.

Abstract

The present disclosure provides compounds of Formulas (I), (II), and pharmaceutically acceptable salts thereof. The compounds described herein are useful in treating proliferative diseases, for example, cancer (e.g., lung cancer), and infectious diseases (e.g., bacterial infections). The present disclosure provides compounds of Formulas (I), (II), and pharmaceutically acceptable salts thereof. The compounds described herein are useful in treating proliferative diseases, for example, cancer (e.g., lung cancer), and infectious diseases (e.g., bacterial infections).

IPC Classes  ?

  • C07D 405/12 - Heterocyclic compounds containing both one or more hetero rings having oxygen atoms as the only ring hetero atoms, and one or more rings having nitrogen as the only ring hetero atom containing two hetero rings linked by a chain containing hetero atoms as chain links
  • C07D 307/92 - Naphthofurans; Hydrogenated naphthofurans
  • C07D 403/12 - Heterocyclic compounds containing two or more hetero rings, having nitrogen atoms as the only ring hetero atoms, not provided for by group containing two hetero rings linked by a chain containing hetero atoms as chain links
  • C07D 413/12 - Heterocyclic compounds containing two or more hetero rings, at least one ring having nitrogen and oxygen atoms as the only ring hetero atoms containing two hetero rings linked by a chain containing hetero atoms as chain links

55.

INTEGRATED CIRCUIT DEVICE AND METHOD FOR FORMING THE SAME

      
Application Number 17583330
Status Pending
Filing Date 2022-01-25
First Publication Date 2023-01-12
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Chang, Ya-Ting
  • Huang, Jian-Zhi
  • Yang, Jin-Bin
  • Ni, I-Chih
  • Wu, Chih-I

Abstract

A method for forming an integrated circuit device is provided. The method includes forming a transistor over a frontside of a substrate; forming an interconnect structure over the transistor; depositing a first transition metal layer over the interconnect structure; performing a plasma treatment to turn the first transition metal layer into a first transition metal dichalcogenide layer; forming a dielectric layer over the first transition metal dichalcogenide layer; forming a first gate electrode over the dielectric layer and a first portion of the first transition metal dichalcogenide layer; and forming a first source contact and a first drain contact respectively connected with a second portion and a third portion of the first transition metal dichalcogenide layer, the first portion of the first transition metal dichalcogenide layer being between the second and third portions of the first transition metal dichalcogenide layers.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 29/66 - Types of semiconductor device
  • H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
  • H01L 21/84 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device

56.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 17685845
Status Pending
Filing Date 2022-03-03
First Publication Date 2023-01-12
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Hong, Minghwei
  • Kwo, Juei-Nai
  • Pi, Tun-Wen
  • Wan, Hsien-Wen
  • Cheng, Yi-Ting
  • Hong, Yu-Jie

Abstract

A method includes forming a semiconductive channel layer on a substrate. A dummy gate is formed on the semiconductive channel layer. Gate spacers are formed on opposite sides of the dummy gate. The dummy gate is removed to form a gate trench between the gate spacers, resulting in the semiconductive channel layer exposed in the gate trench. A semiconductive protection layer is deposited in the gate trench and on the exposed semiconductive channel layer. A top portion of the semiconductive protection layer is oxidized to form an oxidation layer over a remaining portion of the semiconductive protection layer. The oxidation layer is annealed after the top portion of the semiconductive protection layer is oxidized. A gate structure is formed over the semiconductive protection layer and in the gate trench after the oxidation layer is annealed.

IPC Classes  ?

  • H01L 21/8234 - MIS technology
  • H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/786 - Thin-film transistors

57.

INTERVERTEBRAL FUSION DEVICE

      
Application Number 17384824
Status Pending
Filing Date 2021-07-26
First Publication Date 2022-12-22
Owner National Taiwan University (Taiwan, Province of China)
Inventor Tuan, Wei-Hsing

Abstract

An intervertebral fusion device includes a structural ceramic body. The structural ceramic body has a bottom surface, a top surface, a peripheral surface connected between the bottom surface and the top surface, and at least one pore channel penetrating the bottom surface and the top surface. The inner surface of the pore channel is either a convex curved surface or a funnel-shaped surface. For the pore channel having the convex curved surface, the pore diameter of the pore channel gradually expands from the center of the pore channel to the top surface and the bottom surface. The pore diameter can also gradually expand from the bottom surface to the top surface. The peripheral surface of the structural ceramic body is wavy or zigzag.

IPC Classes  ?

  • A61L 27/38 - Animal cells
  • A61L 27/06 - Titanium or titanium alloys
  • A61L 27/10 - Ceramics or glasses
  • A61L 27/40 - Composite materials, i.e. layered or containing one material dispersed in a matrix of the same or different material
  • A61L 27/56 - Porous or cellular materials

58.

Use of known compounds as D-amino acid oxidase inhibitors

      
Application Number 16401892
Grant Number RE049340
Status In Force
Filing Date 2016-09-13
First Publication Date 2022-12-20
Grant Date 2022-12-20
Owner
  • Yufeng Jane Tseng (USA)
  • National Taiwan University (Taiwan, Province of China)
  • National Yang Ming Chiao Tung University (Taiwan, Province of China)
  • National Health Research Institutes (Taiwan, Province of China)
Inventor
  • Tseng, Yufeng Jane
  • Liu, Yu-Li
  • Sun, Chung-Ming
  • Hwu, Hai-Gwo
  • Liu, Chih-Min
  • Lai, Wen-Sung

Abstract

The invention utilizes virtual screening strategy to seek for current market drugs as anti-schizophrenia therapy drug repurposing. Drug repurposing strategy finds new uses other than the original medical indications of existing drugs. Finding new indications for such drugs will benefit patients who are in needs for a potential new therapy sooner since known drugs are usually with acceptable safety and pharmacokinetic profiles. In this study, repurposing marketed drugs for DAAO inhibitor as new schizophrenia therapy was performed with virtual screening on marketed drugs and its metabolites. The identified and available drugs and compounds were further confirmed with in vitro DAAO enzymatic inhibitory assay.

IPC Classes  ?

  • C12Q 1/26 - Measuring or testing processes involving enzymes, nucleic acids or microorganisms; Compositions therefor; Processes of preparing such compositions involving oxidoreductase
  • G16C 20/60 - In silico combinatorial chemistry
  • G16C 20/64 - Screening of libraries
  • G16B 35/00 - ICT specially adapted for in silico combinatorial libraries of nucleic acids, proteins or peptides
  • A61K 31/341 - Heterocyclic compounds having oxygen as the only ring hetero atom, e.g. fungichromin having five-membered rings with one oxygen as the only ring hetero atom, e.g. isosorbide not condensed with another ring, e.g. ranitidine, furosemide, bufetolol, muscarine
  • A61K 31/4439 - Non-condensed pyridines; Hydrogenated derivatives thereof containing further heterocyclic ring systems containing a five-membered ring with nitrogen as a ring hetero atom, e.g. omeprazole
  • A61K 31/451 - Non-condensed piperidines, e.g. piperocaine having a carbocyclic ring directly attached to the heterocyclic ring, e.g. glutethimide, meperidine, loperamide, phencyclidine, piminodine
  • A61K 31/4706 - 4-Aminoquinolines; 8-Aminoquinolines, e.g. chloroquine, primaquine
  • A61K 31/485 - Morphinan derivatives, e.g. morphine, codeine
  • A61K 31/551 - Heterocyclic compounds having nitrogen as a ring hetero atom, e.g. guanethidine or rifamycins having seven-membered rings, e.g. azelastine, pentylenetetrazole having two nitrogens as ring hetero atoms, e.g. clozapine, dilazep
  • G01N 33/00 - Investigating or analysing materials by specific methods not covered by groups

59.

METHODS FOR FORMING BONDING STRUCTURES

      
Application Number 17829752
Status Pending
Filing Date 2022-06-01
First Publication Date 2022-12-08
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Chuang, Tung-Han
  • Wu, Po-Ching
  • Lee, Pei-Ing
  • Lai, Yu-Chang
  • Tsai, Hsing-Hua
  • Chou, Chung-Hsin

Abstract

A method for forming a bonding structure is provided, including providing a first metal, wherein the first metal has a first absolute melting point. The method includes forming a silver nano-twinned layer on the first metal. The silver nano-twinned layer includes parallel-arranged twin boundaries. The parallel-arranged twin boundaries include 90% or more [111] crystal orientation. The method includes oppositely bonding the silver nano-twinned layer to a second metal. The second metal has a second absolute melting point. The bonding of the silver nano-twinned layer and the second metal is performed at a temperature of 300° C. to half of the first absolute melting point or 300° C. to half of the second absolute melting point.

IPC Classes  ?

  • B23K 20/233 - Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating taking account of the properties of the materials to be welded without ferrous layer
  • B23K 20/02 - Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating by means of a press
  • B23K 20/16 - Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating with interposition of special material to facilitate connection of the parts, e.g. material for absorbing or producing gas

60.

POWER NOISE SUPPRESSION CIRCUIT

      
Application Number 17457511
Status Pending
Filing Date 2021-12-03
First Publication Date 2022-12-01
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Wu, Tzong-Lin
  • Huang, Li-Ching

Abstract

The invention discloses a power noise suppression circuit applied to a power system. The power noise suppression circuit comprises at least one power noise to heat converter and at least one anti-power noise transmitted unit. When a power noise within a specific frequency band enters the power noise suppression circuit, the power noise to heat converter converts the power noise to a thermal energy, and the anti-power noise transmitted unit reflects the power noise within the specific frequency band to the power noise to heat converter. Accordingly, the power noise within the specific frequency band can be suppressed and absorbed in the power noise suppression circuit, so as to maintain the stability of the power system.

IPC Classes  ?

  • H03H 1/00 - Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
  • H04B 15/02 - Reducing interference from electric apparatus by means located at or near the interfering apparatus
  • H02M 1/14 - Arrangements for reducing ripples from dc input or output
  • H03H 7/42 - Balance/unbalance networks

61.

METHOD FOR REDUCING SCHOTTKY BARRIER HEIGHT AND SEMICONDUCTOR DEVICE WITH REDUCED SCHOTTKY BARRIER HEIGHT

      
Application Number 17884559
Status Pending
Filing Date 2022-08-09
First Publication Date 2022-12-01
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • National Taiwan University (Taiwan, Province of China)
Inventor
  • Cheng, Hung-Hsiang
  • Pan, Samuel C.

Abstract

A method for controlling Schottky barrier height in a semiconductor device includes forming an alloy layer including at least a first element and a second element on a first surface of a semiconductor substrate. The semiconductor substrate is a first element-based semiconductor substrate, and the first element and the second element are Group IV elements. A first thermal anneal of the alloy layer and the first element-based substrate is performed. The first thermal anneal causes the second element in the alloy layer to migrate towards a surface of the alloy layer. A Schottky contact layer is formed on the alloy layer after the first thermal anneal.

IPC Classes  ?

  • H01L 29/161 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form including two or more of the elements provided for in group
  • H01L 29/872 - Schottky diodes
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/47 - Schottky barrier electrodes
  • H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
  • H01L 29/45 - Ohmic electrodes
  • H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
  • H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form

62.

SEMICONDUCTOR DEVICE WITH FERROELECTRIC ALUMINUM NITRIDE

      
Application Number 17885456
Status Pending
Filing Date 2022-08-10
First Publication Date 2022-12-01
Owner
  • Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan, Province of China)
  • National Taiwan University (Taiwan, Province of China)
Inventor
  • Chen, Miin-Jang
  • Shieh, Tzong-Lin Jay
  • Lin, Bo-Ting

Abstract

Techniques in accordance with embodiments described herein are directed to semiconductor devices including a layer of aluminum nitride AlN or aluminum gallium nitride AlGaN as a ferroelectric layer and a method of making a thin film of AlN/AlGaN that possesses ferroelectric properties. In a ferroelectric transistor, a thin film of AlN/AlGaN that exhibits ferroelectric properties is formed between a gate electrode and a second semiconductor layer, e.g., of GaN.

IPC Classes  ?

  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 29/51 - Insulating materials associated therewith
  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 29/66 - Types of semiconductor device
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups

63.

MAGNETIC STRUCTURE CAPABLE OF FIELD-FREE SPIN-ORBIT TORQUE SWITCHING AND PRODUCTION METHOD AND USE THEREOF

      
Application Number 17739966
Status Pending
Filing Date 2022-05-09
First Publication Date 2022-11-24
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Pai, Chi-Feng
  • Chen, Tian-Yue
  • Liao, Wei-Bang

Abstract

A magnetic structure capable of field-free spin-orbit torque switching includes a spin-orbit coupling base layer and a ferromagnetic layer formed thereon. The spin-orbit coupling base layer is made from a particular crystal material. The ferromagnetic layer has magnetization perpendicular to a plane coupled to the spin-orbit coupling base layer, and is made from a particular ferromagnetic material with perpendicular magnetic anisotropy. The perpendicular magnetization of the ferromagnetic layer is switchable by an in plane current applied to the spin-orbit coupling base layer without application of an external magnetic field. A memory device and a production method regarding the magnetic structure are also provided.

IPC Classes  ?

  • H01L 43/04 - Devices using galvano-magnetic or similar magnetic effects; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details of Hall-effect devices
  • H01L 27/22 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate using similar magnetic field effects
  • H01L 43/06 - Hall-effect devices
  • H01L 43/10 - Selection of materials
  • H01L 43/14 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof for Hall-effect devices

64.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 17876487
Status Pending
Filing Date 2022-07-28
First Publication Date 2022-11-24
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
  • NATIONAL TAIWAN NORMAL UNIVERSITY (Taiwan, Province of China)
Inventor
  • Chou, Chun-Yi
  • Cheng, Po-Hsien
  • Chen, Tse-An
  • Chen, Miin-Jang

Abstract

A method includes forming a mask layer above a substrate. The substrate is patterned by using the mask layer as a mask to form a trench in the substrate. An isolation structure is formed in the trench, including feeding first precursors to the substrate. A bias is applied to the substrate after feeding the first precursors. With the bias turned on, second precursors are fed to the substrate. Feeding the first precursors, applying the bias, and feeding the second precursors are repeated.

IPC Classes  ?

  • H01L 21/762 - Dielectric regions
  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/40 - Electrodes
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • C23C 16/04 - Coating on selected surface areas, e.g. using masks

65.

LIGHT FIELD SYNTHESIS METHOD AND LIGHT FIELD SYNTHESIS SYSTEM

      
Application Number 17732474
Status Pending
Filing Date 2022-04-28
First Publication Date 2022-11-24
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Liu, Chang-Le
  • Chen, Hong-Ming
  • Shih, Kuang-Tsu

Abstract

A light field synthesis method and a light field synthesis system are provided. The light field synthesis method includes inputting light field information corresponding to a scene into a trained learning model. The light field information is a light field having a plurality of views. The light field synthesis method further includes configuring the trained learning model to generate a synthesized light field according to the input light field information. The synthesized light field has a plurality of new views other than the plurality of views. The trained learning model is obtained by performing a training process on a learning model, and the training process includes optimizing the learning model in a refocused image domain, so as to minimize refocused image errors.

IPC Classes  ?

  • H04N 13/111 - Transformation of image signals corresponding to virtual viewpoints, e.g. spatial image interpolation
  • H04N 13/282 - Image signal generators for generating image signals corresponding to three or more geometrical viewpoints, e.g. multi-view systems
  • G06T 7/00 - Image analysis
  • H04N 13/156 - Mixing image signals
  • G06T 3/00 - Geometric image transformation in the plane of the image
  • G06T 3/40 - Scaling of a whole image or part thereof
  • G06N 20/00 - Machine learning

66.

MAGNETIC TUNNEL JUNCTION STRUCTURES AND RELATED METHODS

      
Application Number 17871676
Status Pending
Filing Date 2022-07-22
First Publication Date 2022-11-10
Owner
  • Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan, Province of China)
  • National Taiwan University (Taiwan, Province of China)
Inventor
  • Luo, Zong-You
  • Tsou, Ya-Jui
  • Tung, I-Cheng
  • Liu, Cheewee

Abstract

The disclosure is directed to spin-orbit torque MRAM structures and methods. A SOT channel of the SOT-MRAM includes multiple heavy metal layers and one or more dielectric dusting layers each sandwiched between two adjacent heavy metal layers. The dielectric dusting layers each include discrete molecules or discrete molecule clusters of a dielectric material scattered in or adjacent to an interface between two adjacent heavy metal layers.

IPC Classes  ?

  • H01L 27/22 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate using similar magnetic field effects
  • H01L 43/12 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
  • H01L 43/10 - Selection of materials
  • G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
  • H01L 43/02 - Devices using galvano-magnetic or similar magnetic effects; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
  • H01L 43/08 - Magnetic-field-controlled resistors

67.

Semiconductor device and operation method thereof

      
Application Number 17871824
Grant Number 11722099
Status In Force
Filing Date 2022-07-22
First Publication Date 2022-11-10
Grant Date 2023-08-08
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Hwu, Jenn-Gwo
  • Hsu, Ting-Hao

Abstract

A device includes a substrate, a first electrode and a second electrode. The first electrode is disposed on the substrate, and configured to receive an input signal. The second electrode is disposed on the substrate, and configured to output an output signal based on the input signal. When the input signal is configured to oscillate within a first range between a first voltage value and a second voltage value with a first frequency, the output signal is an inverted version of the input signal, and has the first frequency. When the input signal is configured to oscillate within a second range including the first voltage value without the second voltage value with the first frequency, the output signal has a second frequency which is approximately twice of the first frequency.

IPC Classes  ?

  • H03B 19/14 - Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes by means of a semiconductor device
  • G05F 1/56 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
  • H01L 29/51 - Insulating materials associated therewith

68.

SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME

      
Application Number 17874005
Status Pending
Filing Date 2022-07-26
First Publication Date 2022-11-10
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
  • National Taiwan Normal University (Taiwan, Province of China)
Inventor
  • Chen, Kuan-Ting
  • Chang, Shu-Tong
  • Lee, Min-Hung

Abstract

A semiconductor device includes a substrate, a gate structure over the substrate, and source/drain regions in the substrate and on opposite sides of the gate structure. The gate structure includes an interfacial layer, a quasi-antiferroelectric (QAFE) layer over the interfacial layer, and a gate electrode over the QAFE layer. The QAFE layer includes Hf1−xZrxO2, in which x is greater than 0.5 and is lower than 1.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 29/66 - Types of semiconductor device

69.

Magnetoresistive memory device and manufacturing method thereof

      
Application Number 17871983
Grant Number 11749328
Status In Force
Filing Date 2022-07-25
First Publication Date 2022-11-10
Grant Date 2023-09-05
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Luo, Zong-You
  • Tsou, Ya-Jui
  • Liu, Chee-Wee
  • Lin, Shao-Yu
  • Chung, Liang-Chor
  • Wang, Chih-Lin

Abstract

A method includes forming bottom conductive lines over a wafer. A first magnetic tunnel junction (MTJ) stack is formed over the bottom conductive lines. Middle conductive lines are formed over the first MTJ stack. A second MTJ stack is formed over the middle conductive lines. Top conductive lines are formed over the second MTJ stack.

IPC Classes  ?

  • G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
  • H01L 27/22 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate using similar magnetic field effects
  • H01L 43/12 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
  • H01L 43/08 - Magnetic-field-controlled resistors
  • H01L 43/10 - Selection of materials
  • H01L 43/02 - Devices using galvano-magnetic or similar magnetic effects; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
  • H10B 61/00 - Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
  • H10N 50/01 - Manufacture or treatment
  • H10N 50/10 - Magnetoresistive devices
  • H10N 50/80 - Constructional details
  • H10N 50/85 - Magnetic active materials

70.

MICRO LIGHT EMITTING DIODE ARRAY AND MANUFACTURING METHOD THEREOF

      
Application Number 17863897
Status Pending
Filing Date 2022-07-13
First Publication Date 2022-11-03
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Lin, Ching-Fuh
  • Lin, Chun-Yu
  • Lin, Yi-Shan
  • Huang, Jung-Kuan

Abstract

An embodiment of the present invention provides a micro light emitting diode (LED) array and its manufacturing method. The micro-LED includes a substrate, an epitaxial layer formed on the substrate, and a conversion film formed on the epitaxial layer. Pixels can be defined through lithography, and the pixel size can be very small. This method is characterized in that a mass transfer is not required.

IPC Classes  ?

  • H01L 33/50 - Wavelength conversion elements
  • H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

71.

SYSTEMS AND METHODS FOR COOPERATIVE DRIVING OF CONNECTED AUTONOMOUS VEHICLES IN SMART CITIES USING RESPONSIBILITY-SENSITIVE SAFETY RULES

      
Application Number 17696450
Status Pending
Filing Date 2022-03-16
First Publication Date 2022-10-27
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Khayatian, Mohammad
  • Mehrabian, Mohammadreza
  • Allamsetti, Harshith
  • Liu, Kai- Wei
  • Huang, Po-Yu
  • Lin, Chung-Wei
  • Shrivastava, Aviral

Abstract

Various embodiments for systems and methods for cooperative driving of connected autonomous vehicles using responsibility-sensitive safety (RSS) rules are disclosed herein. The CAV system integrates proposed RSS rules with CAV's motion planning algorithm to enable cooperative driving of CAVs. The CAV system further integrates a deadlock detection and resolution system for resolving traffic deadlocks between CAVs. The CAV system reduces redundant calculation of dependency graphs.

IPC Classes  ?

  • B60W 60/00 - Drive control systems specially adapted for autonomous road vehicles
  • B60W 30/18 - Propelling the vehicle

72.

CELL CULTURE DEVICE

      
Application Number 17727664
Status Pending
Filing Date 2022-04-22
First Publication Date 2022-10-27
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Hsu, Yu-Hsiang
  • Wang, Hong-Wen

Abstract

A cell culture device is provided, which comprises a cavity and a base layer, wherein the base layer is a type of plastic thin film and has a thickness of 1 μm to 100 μm; a second-moment of inertia lower than 6×106 μm4; and a resultant flexural rigidity of 1×10−6 Pa·m4 to 0.02 Pa·4. Accordingly, the base layer can produce an out-of-plane strain, and bending deformation can occur. Therefore, a growth space close to in vivo environment is provided by the base layer for the cells when the cells attach to the base layer, thereby promoting the growth and maturation of the cells and tissues.

IPC Classes  ?

  • C12M 1/12 - Apparatus for enzymology or microbiology with sterilisation, filtration, or dialysis means
  • C12M 1/32 - Inoculator or sampler multiple field or continuous type

73.

METHODS OF FABRICATING POROUS MEMBRANE

      
Application Number 17846323
Status Pending
Filing Date 2022-06-22
First Publication Date 2022-10-20
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Mou, Chung-Yuan
  • Yang, Jingling
  • Tung, Kuo-Lun
  • Lin, Geng-Sheng

Abstract

Methods of fabricating a porous membrane are disclosed. The first method includes the following operations. A mesoporous silica thin film with perpendicular mesopore channels is grown on a polymer film. The mesoporous silica thin film and the polymer film are transferred onto a macroporous substrate, in which the polymer film is positioned between the macroporous substrate and the mesoporous silica thin film. The polymer film is removed to form the porous membrane. The second method includes the following operations. A polymer film is formed on a macroporous substrate, wherein the polymer film includes crosslinked polymers including cross-linked polystyrene, cross-linked polymethyl methacrylate, or a combination thereof. A mesoporous silica thin film with perpendicular mesopore channels is grown on the polymer film. The polymer film is removed to form the porous membrane.

IPC Classes  ?

  • B01D 71/02 - Inorganic material
  • B01D 71/34 - Polyvinylidene fluoride
  • B01D 71/40 - Polymers of unsaturated acids or derivatives thereof, e.g. salts, amides, imides, nitriles, anhydrides, esters
  • B01D 71/54 - Polyureas; Polyurethanes
  • B01D 71/36 - Polytetrafluoroethene
  • H01M 4/38 - Selection of substances as active materials, active masses, active liquids of elements or alloys
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
  • H01M 10/0562 - Solid materials
  • H01M 10/0565 - Polymeric materials, e.g. gel-type or solid-type
  • H01M 50/411 - Organic material
  • H01M 50/431 - Inorganic material
  • H01M 50/449 - Separators, membranes or diaphragms characterised by the material having a layered structure

74.

Tensor accelerator capable of increasing efficiency of data sharing

      
Application Number 17231011
Grant Number 11656909
Status In Force
Filing Date 2021-04-15
First Publication Date 2022-10-20
Grant Date 2023-05-23
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Chien, Shao-Yi
  • Lin, Yu-Sheng
  • Chen, Wei-Chao

Abstract

A tensor accelerator includes two tile execution units and a bidirectional queue. Each of the tile execution units includes a buffer, a plurality of arithmetic logic units, a network, and a selector. The buffer includes a plurality of memory cells. The network is coupled to the plurality of memory cells. The selector is coupled to the network and the plurality of arithmetic logic units. The bidirectional queue is coupled between the selectors of the tile execution units.

IPC Classes  ?

  • G06F 9/50 - Allocation of resources, e.g. of the central processing unit [CPU]
  • G06F 7/57 - Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups  or for performing logical operations
  • G06F 9/54 - Interprogram communication

75.

METHOD AND APPARATUS FOR GENERATING SOFTWARE TEST REPORTS

      
Application Number 17718299
Status Pending
Filing Date 2022-04-11
First Publication Date 2022-10-20
Owner National Taiwan University (Taiwan, Province of China)
Inventor Wang, Farn

Abstract

A method and an apparatus for generating software test reports are provided. The method includes following steps: providing a testing platform that supports retrieving one or more documents such as screenshots or DOM-like documents related to screen content of an application under test (AuT) and analyzing the documents to obtain description data of the screen content; selecting to execute a test report generator, and querying the description data, multiple test scripts ever executed on a system under test (SuT) and multiple test actionables from the testing platform by the test report generator, so as to evaluate a test trace of the AuT, calculate at least one test actionable and test data adapted for the AuT, and return the calculated test actionable to the testing platform; and executing the test actionable on the AuT in the SuT by the testing platform, so as to generate test reports of the AuT.

IPC Classes  ?

76.

SEMICONDUCTOR DEVICE AND FORMATION METHOD

      
Application Number 17372108
Status Pending
Filing Date 2021-07-09
First Publication Date 2022-09-29
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Ye, Hung-Yu
  • Huang, Yu-Shiang
  • Tu, Chien-Te
  • Liu, Chee-Wee

Abstract

A device comprises source/drain regions over a substrate and spaced apart along a first direction, a first gate structure between the source/drain regions, and a first channel structure surrounded by the first gate structure. The first channel structure comprises alternately stacking first semiconductor layers and second semiconductor layers. When viewed in a cross section taken along a second direction perpendicular to the first direction, central axes of the second semiconductor layers are laterally offset from central axes of the first semiconductor layers.

IPC Classes  ?

  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 21/8234 - MIS technology

77.

SAMPLING DEVICE, SEMI-AUTOMATIC SAMPLE FEEDING DEVICE AND TEST PAPER DETECTION SYSTEM

      
Application Number 17318605
Status Pending
Filing Date 2021-05-12
First Publication Date 2022-09-29
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Chen, Chien-Fu
  • Chen, Shih-Jie
  • Lin, Jia-Hui

Abstract

A sampling device is provided, including: a syringe barrel having an opening and a holding portion; a plunger body having a protruding wall and disposed in the syringe barrel through the opening, where the protruding wall has a first recessed portion; a spring disposed around the plunger body; and a fastening assembly having an engaging structure for engaging the fastening assembly with the holding portion, a groove rail for receiving the protruding wall of the plunger body and a fastening portion for limiting displacement of the plunger body. A semi-automatic sample feeding device is further provided and includes the sampling device and a flow control device, and a test paper detection system is also provided and includes the semi-automatic sample feeding device and a test paper device. The test paper detection system is able to stably introduce samples, suitable for large-volume samples, which meets the needs of point-of-care applications.

IPC Classes  ?

  • A61B 10/02 - Instruments for taking cell samples or for biopsy
  • G01N 1/14 - Suction devices, e.g. pumps; Ejector devices
  • G01N 21/78 - Systems in which material is subjected to a chemical reaction, the progress or the result of the reaction being investigated by observing the effect on a chemical indicator producing a change of colour

78.

SUBSTITUTED BENZIMIDAZOLE DERIVATIVES AS D-AMINO ACID OXIDASE (DAAO) INHIBITORS

      
Application Number 17709242
Status Pending
Filing Date 2022-03-30
First Publication Date 2022-09-29
Owner
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
  • NATIONAL YANG MING CHIAO TUNG UNIVERSITY (Taiwan, Province of China)
  • NATIONAL HEALTH RESEARCH INSTITUTES (Taiwan, Province of China)
Inventor
  • Tseng, Yufeng Jane
  • Liu, Yu-Li
  • Sun, Chung-Ming
  • Lai, Wen-Sung
  • Liu, Chih-Min
  • Hwu, Hai-Gwo

Abstract

The present invention provides novel substituted benzimidazole derivatives used as DAAO inhibitors and for treatment and/or prevention of neurological disorders.

IPC Classes  ?

  • C07D 401/12 - Heterocyclic compounds containing two or more hetero rings, having nitrogen atoms as the only ring hetero atoms, at least one ring being a six-membered ring with only one nitrogen atom containing two hetero rings linked by a chain containing hetero atoms as chain links
  • A61P 25/18 - Antipsychotics, i.e. neuroleptics; Drugs for mania or schizophrenia
  • C07D 401/14 - Heterocyclic compounds containing two or more hetero rings, having nitrogen atoms as the only ring hetero atoms, at least one ring being a six-membered ring with only one nitrogen atom containing three or more hetero rings
  • C07D 405/14 - Heterocyclic compounds containing both one or more hetero rings having oxygen atoms as the only ring hetero atoms, and one or more rings having nitrogen as the only ring hetero atom containing three or more hetero rings
  • C07D 409/14 - Heterocyclic compounds containing two or more hetero rings, at least one ring having sulfur atoms as the only ring hetero atoms containing three or more hetero rings
  • C07D 413/14 - Heterocyclic compounds containing two or more hetero rings, at least one ring having nitrogen and oxygen atoms as the only ring hetero atoms containing three or more hetero rings

79.

ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 17370691
Status Pending
Filing Date 2021-07-08
First Publication Date 2022-09-29
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Li, Jiun-Yun
  • Chen, Shih-Yuan
  • Chang, Yao-Chun
  • Huang, Ian
  • Chen, Chiung-Yu

Abstract

An electronic device includes a pair of depletion gates, an accumulation gate, and a conductive resonator. The depletion gates are spaced apart from each other. The accumulation gate is over the depletion gates. The conductive resonator is over the depletion gates and the accumulation gate. The conductive resonator includes a first portion, a second portion, and a third portion. The first portion and the second portion are on opposite sides of the accumulation gate. The third portion interconnects the first and second portions of the conductive resonator and across the depletion gates. A bottom surface of the first portion of the conductive resonator is lower than a bottom surface of the accumulation gate.

IPC Classes  ?

  • G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
  • H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
  • H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details

80.

SCALABLE PHASED-ARRAY SYSTEM FOR WIRELESS SYSTEMS

      
Application Number 17697918
Status Pending
Filing Date 2022-03-17
First Publication Date 2022-09-22
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Li, Chun-Hsing
  • Chiu, Pin-Chun

Abstract

A scalable phased-array system for a wireless system includes: a plurality of transceivers, which are switched to form a transmitter mode and a receiver mode by means of time division duplexing (TDD), wherein each transceiver includes: a millimeter wave (mmWave) up-conversion circuit used to convert a baseband (BB) transmitter signal into an intermediate frequency (IF) transmitter signal; a power divider/combiner circuit used to divide the IF transmitter signal into a plurality of pairs of IF transmitter differential signals in the transmitter mode, and combine a plurality of pairs of BB receiver differential signals into a BB receiver signal in the receiver mode; and a beamforming circuit used to convert the pairs of the IF transmitter differential signals into a plurality of radio frequency (RF) transmitter signals in the transmitter mode, and convert a plurality of RF receiver signals into the pairs of the BB receiver differential signals in the receiver mode.

IPC Classes  ?

  • H04L 5/14 - Two-way operation using the same type of signal, i.e. duplex
  • H01Q 3/30 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the distribution of energy across a radiating aperture varying the phase
  • H04B 1/401 - Circuits for selecting or indicating operating mode

81.

LIPID-BASED NANOPARTICLE DELIVERY SYSTEM FOR HYDROPHILIC CHARGED COMPOUND

      
Application Number 17697941
Status Pending
Filing Date 2022-03-18
First Publication Date 2022-09-22
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Chen, Chin-Tin
  • Lee, Chia Ying
  • Tsai, Tsuimin
  • Peng, Po-Chun

Abstract

A lipid-based nanoparticle (LNP) with high DL ratio and normalized release. The LNP of the present invention comprises an outer lipid monolayer encapsulating a plurality of lipid-active pharmaceutical ingredient (API) complexes, wherein each lipid-API complex comprises a complex of anionic lipid and API wherein the API comprises a positively charged form of an API and wherein the outer lipid monolayer of the LNP comprises neutral lipids. The present invention further comprises a method of preparation of the LNP of the present invention.

IPC Classes  ?

82.

Indoor positioning system and indoor positioning method

      
Application Number 17378778
Grant Number 11631195
Status In Force
Filing Date 2021-07-19
First Publication Date 2022-09-22
Grant Date 2023-04-18
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Hsieh, Shang-Hsien
  • Huang, Bo-Kai
  • Kuo, Wei-Liang

Abstract

An indoor positioning system and method are provided. The indoor positioning method includes: establishing an image database through a BIM model of a target area, and using a trained deep learning model to extract features of a virtual image; after obtaining a captured image in the target area, using the trained deep learning model to extract features thereof, and performing similarity matching with the image database to calculate a spatial position of a most similar image; calculating the most similar image and its essential matrix through multiple sets of feature points, and obtaining capturing positions and capturing pose parameters as positioning results; projecting the BIM model to a tracking captured image, and updating the positioning results and the capturing pose parameters with a visual inertial odometer; and continuously correcting the positioning results and the capturing pose parameters by detecting horizontal and vertical planes from the tracking captured image.

IPC Classes  ?

  • G06T 7/73 - Determining position or orientation of objects or cameras using feature-based methods
  • G06T 7/246 - Analysis of motion using feature-based methods, e.g. the tracking of corners or segments
  • G06V 10/75 - Image or video pattern matching; Proximity measures in feature spaces using context analysis; Selection of dictionaries
  • G06T 15/20 - Perspective computation
  • G06T 17/00 - 3D modelling for computer graphics
  • G06N 3/04 - Architecture, e.g. interconnection topology
  • G06N 3/08 - Learning methods
  • G01P 15/08 - Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces with conversion into electric or magnetic values
  • G01P 15/18 - Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration in two or more dimensions
  • G01C 19/00 - Gyroscopes; Turn-sensitive devices using vibrating masses; Turn-sensitive devices without moving masses; Measuring angular rate using gyroscopic effects
  • G06V 10/40 - Extraction of image or video features
  • G06V 10/74 - Image or video pattern matching; Proximity measures in feature spaces
  • G06F 18/22 - Matching criteria, e.g. proximity measures

83.

Method and system of deep face recognition for fisheye image

      
Application Number 17241150
Grant Number 11749022
Status In Force
Filing Date 2021-04-27
First Publication Date 2022-09-15
Grant Date 2023-09-05
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Li, Yi-Hsin
  • Lo, I-Chan
  • Chen, Hong-Ming

Abstract

A method and a system of deep face recognition for a fisheye image are provided. The method includes determining a category corresponding to an input image, performing an image rectification according to the category corresponding to the input image to generate a restored image, and performing a face recognition on the restored image to determine an identity corresponding to the input image. The category correlates to a radial distance corresponding to the input image.

IPC Classes  ?

  • G06V 40/16 - Human faces, e.g. facial parts, sketches or expressions
  • G06N 3/045 - Combinations of networks

84.

System and method for measuring void fraction of inside of heat conduction member

      
Application Number 17529269
Grant Number 11768166
Status In Force
Filing Date 2021-11-18
First Publication Date 2022-09-15
Grant Date 2023-09-26
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Sun, Chen-Li
  • Liu, Yu-Hsiang
  • Lien, Yu-Jen

Abstract

A system and a method for measuring a void fraction of an inside of a heat conduction member are provided. The system is used to measure the heat conduction member and includes: a heating device configured as a heat source to heat an evaporation end of the heat conduction member; a cooling device configured for cooling a condensation end of the heat conduction member; at least one pair of electrode pads respectively attached to two opposite surfaces of the heat conduction member; and an LCR meter electrically connected to the at least one pair of the electrode pads for measuring impedances of the heat conduction member. Each of the impedances is converted into the void fraction that corresponds to a measured position of the heat conduction member.

IPC Classes  ?

  • G01N 27/22 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating capacitance
  • G01K 3/14 - Thermometers giving results other than momentary value of temperature giving differentiated values in respect of space
  • G01N 33/00 - Investigating or analysing materials by specific methods not covered by groups

85.

SEMICONDUCTOR DEVICE HAVING 2D CHANNEL LAYER

      
Application Number 17827543
Status Pending
Filing Date 2022-05-27
First Publication Date 2022-09-15
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Wang, Yun-Yuan
  • Hsiao, Chih-Hsiang
  • Ni, I-Chih
  • Wu, Chih-I

Abstract

A device includes a substrate, a channel layer, a barrier layer, a gate electrode, and source/drain contacts. The channel layer is made of transition metal dichalcogenide. The barrier layer is over the channel layer. The gate electrode is over the barrier layer. The source/drain contacts are on opposite sides of the gate electrode and over the barrier layer.

IPC Classes  ?

  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/41 - Electrodes characterised by their shape, relative sizes or dispositions
  • H01L 29/40 - Electrodes

86.

GRADED EARLY WARNING SYSTEM FOR PEST QUANTITY COUNTING

      
Application Number 17211826
Status Pending
Filing Date 2021-03-25
First Publication Date 2022-09-08
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Lin, Ta-Te
  • Rustia, Dan Jeric Arcega
  • Chiu, Lin-Ya

Abstract

A graded early warning system for pest quantity counting includes: at least one image capturing device used to capture images of at least one pest trapping device in an environment to generate at least one pest trapping image; at least one environment monitoring and sensing device used to detect the environment to generate at least one environment parameter; at least one pest detecting and identifying device used to detect quantities and species of multiple pests based on the at least one pest trapping image; and a cloud server used to receive the at least one pest trapping image, the at least one environment parameter, and the quantities and species of multiple pests; wherein the cloud server immediately establishes pest probability models, generates early warning signals, and prompts suppression decisions according to the at least one environment parameter and the quantities and species of multiple pests.

IPC Classes  ?

  • A01M 1/02 - Stationary means for catching or killing insects with devices attracting the insects
  • G08B 5/22 - Visible signalling systems, e.g. personal calling systems, remote indication of seats occupied using electromagnetic transmission
  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • G06K 9/62 - Methods or arrangements for recognition using electronic means
  • H04N 7/18 - Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
  • G06T 11/00 - 2D [Two Dimensional] image generation

87.

NOVEL SUBSTITUTED BENZIMIDAZOLE DERIVATIVES AS D-AMINO ACID OXIDASE (DAAO) INHIBITORS

      
Application Number 17736924
Status Pending
Filing Date 2022-05-04
First Publication Date 2022-08-25
Owner
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
  • NATIONAL YANG MING CHIAO TUNG UNIVERSITY (Taiwan, Province of China)
  • NATIONAL HEALTH RESEARCH INSTITUTES (Taiwan, Province of China)
Inventor
  • Tseng, Yufeng Jane
  • Liu, Yu-Li
  • Sun, Chung-Ming
  • Lai, Wen-Sung
  • Liu, Chih-Min
  • Hwu, Hai-Gwo

Abstract

The present invention provides novel substituted benzimidazole derivatives used as DAAO inhibitors and for treatment and/or prevention of neurological disorders.

IPC Classes  ?

  • C07D 401/12 - Heterocyclic compounds containing two or more hetero rings, having nitrogen atoms as the only ring hetero atoms, at least one ring being a six-membered ring with only one nitrogen atom containing two hetero rings linked by a chain containing hetero atoms as chain links
  • A61P 25/18 - Antipsychotics, i.e. neuroleptics; Drugs for mania or schizophrenia
  • C07D 401/14 - Heterocyclic compounds containing two or more hetero rings, having nitrogen atoms as the only ring hetero atoms, at least one ring being a six-membered ring with only one nitrogen atom containing three or more hetero rings
  • C07D 405/14 - Heterocyclic compounds containing both one or more hetero rings having oxygen atoms as the only ring hetero atoms, and one or more rings having nitrogen as the only ring hetero atom containing three or more hetero rings
  • C07D 409/14 - Heterocyclic compounds containing two or more hetero rings, at least one ring having sulfur atoms as the only ring hetero atoms containing three or more hetero rings
  • C07D 413/14 - Heterocyclic compounds containing two or more hetero rings, at least one ring having nitrogen and oxygen atoms as the only ring hetero atoms containing three or more hetero rings

88.

Single-Mode Crystal Fiber

      
Application Number 17207852
Status Pending
Filing Date 2021-03-22
First Publication Date 2022-08-25
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Yang, Teng-I
  • Lin, Yu-Chan
  • Huang, Sheng-Lung

Abstract

A single-mode crystal fiber is provided. The fiber has a core. The core is made of a crystalline material with a melting point above 1900 degrees Celsius (° C.). The core has a coat. The coat is made of a crystalline material the same as that of the core. Through immersion plating under a low vacuum pressure and a high temperature, the material of the coat is sintered to form an outer layer covering the core. Thus, the thickness of the coat is controlled. A single crystal totally the same as that of the core is grown in a solid state with no ceramics contained. Consequently, the crystal contains no ceramics; and, through being sintered in a vacuum environment, the crystal has pores the smallest in size and the fewest in number, as compared to those sintered under a normal pressure.

IPC Classes  ?

  • G02B 6/02 - Optical fibres with cladding
  • C01F 17/34 - Aluminates, e.g. YAlO3 or Y3-xGdxAl5O12
  • D01F 8/18 - Conjugated, i.e. bi- or multicomponent, man-made filaments or the like; Manufacture thereof from other substances

89.

Antenna measurement system with disc-shaped reflection surface

      
Application Number 17307393
Grant Number 11552716
Status In Force
Filing Date 2021-05-04
First Publication Date 2022-08-11
Grant Date 2023-01-10
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Lin, Zhao He
  • Chou, Hsi Tseng
  • Chiu, Chih Wei

Abstract

An antenna measurement system includes an array of antennas, an array of reflectors, and a measurement surface. The array of antennas includes a plurality of antenna elements arranged in a straight line; any two adjacent antenna elements in the above antenna elements are separated by a predetermined distance, and each of the antenna elements in the above antenna elements has a radiator and a feed point. The array of reflectors includes at least one reflector and is arranged in a width direction or a height direction, and the array of reflectors is configured to generate a reflection signal according to a signal sent by the array of antennas. An antenna to be measured is configured to perform a measurement operation on the reflection signal on the measurement surface.

IPC Classes  ?

  • H04B 17/11 - Monitoring; Testing of transmitters for calibration
  • H01Q 19/12 - Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic using reflecting surfaces wherein the surfaces are concave
  • H04B 17/10 - Monitoring; Testing of transmitters
  • H01Q 19/18 - Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic using reflecting surfaces having two or more spaced reflecting surfaces
  • H01Q 21/08 - Arrays of individually energised antenna units similarly polarised and spaced apart the units being spaced along, or adjacent to, a rectilinear path

90.

Movable compact-range antenna measurement system

      
Application Number 17307251
Grant Number 11644496
Status In Force
Filing Date 2021-05-04
First Publication Date 2022-08-11
Grant Date 2023-05-09
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Chou, Hsi Tseng
  • Chiu, Chih Wei

Abstract

An antenna measurement system is configured to measure a radiation field pattern of an AUT fixed on a reference surface. The antenna measurement system includes an articulated robot, a measurement component, and a processor. The articulated robot is seated on a periphery of the reference surface, with a movable end capable of scanning a short-distance area defined by the reference surface. The measurement component is arranged on the movable end of the articulated robot, and a front surface of the measurement component is a specific geometric surface, which is used to face the antenna for radiation measurement. The processor is coupled to the movable end to control the movable end to drive the measurement component to move relative to the antenna along a predefined scanning path, and keep the specific geometric surface facing the antenna during the movement along the scanning path.

IPC Classes  ?

91.

PROBIOTIC COMPOSITIONS AND USES THEREOF

      
Application Number 17592510
Status Pending
Filing Date 2022-02-04
First Publication Date 2022-08-11
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Chen, Ming-Ju
  • Huang, Hsiao-Wen

Abstract

The present invention relates to an isolated bacterial strain of Lactiplantibacillus plantarum subsp. plantarum MFM 30-3 deposited at Food Industry Research and Development Institute, Taiwan, under accession number BCRC 911035. The present invention also relates to a probiotic composition comprising an isolated bacterial strain of Lactiplantibacillus plantarum subsp. plantarum MFM 30-3 deposited at Food Industry Research and Development Institute, Taiwan, under accession number BCRC 911035, and optionally, one or more additional probiotic organisms that enhance the probiotic activity of the Lactiplantibacillus plantarum subsp. plantarum MFM 30-3. The present invention further relates to a method for preventing or treating chronic kidney disease in a subject in need thereof comprising: administering to said subject a pharmaceutically effective amount of the probiotic composition comprising an isolated bacterial strain of Lactiplantibacillus plantarum subsp. plantarum MFM 30-3 deposited at Food Industry Research and Development Institute, Taiwan, under accession number BCRC 911035, and optionally, one or more additional probiotic organisms that enhance the probiotic activity of the Lactiplantibacillus plantarum subsp. plantarum MFM 30-3.

IPC Classes  ?

  • A61K 35/747 - Lactobacilli, e.g. L. acidophilus or L. brevis
  • A23L 33/135 - Bacteria or derivatives thereof, e.g. probiotics

92.

METHOD FOR PROCESSING POLYALKYLENE BENZENEDICARBOXYLATE MATERIAL

      
Application Number 17650325
Status Pending
Filing Date 2022-02-08
First Publication Date 2022-08-11
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Wu, Chia-Wen
  • Liao, Wei-Sheng
  • Chiao, Yu-Wen

Abstract

A method for processing a polyalkylene benzenedicarboxylate material includes subjecting a polyalkylene benzenedicarboxylate material to an immersion treatment with an immersion liquid including ethylene glycol, so as to obtain an immersed polyester material, and subjecting the immersed polyester material to a disintegration treatment to obtain a disintegrated polyester material. The immersed polyester material has crystallinity higher than that of the polyalkylene benzenedicarboxylate material.

IPC Classes  ?

  • C08J 11/08 - Recovery or working-up of waste materials of polymers without chemical reactions using selective solvents for polymer components

93.

method for classifying individuals in mixtures of DNA and its deep learning model

      
Application Number 17550380
Status Pending
Filing Date 2021-12-14
First Publication Date 2022-08-11
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Tsai, Mong-Hsun
  • Chuang, Eric Y
  • Hwa, Hsiao-Lin
  • Phan, Nam Nhut

Abstract

A method for classifying individuals in mixtures of DNA is disclosed. The method comprises: Provide next-generation sequencing (NGS) data which comprises raw sequence reads originated from mixtures of DNA; performing a data processing procedure to generate a plurality of sparse matrix; and input the plurality of sparse matrix into a trained deep learning model installed on computers to classify individuals in the mixtures of DNA. In particular, the method is used to classify individuals in mixture of the DNAs from forensic dataset or whole exome sequencing dataset.

IPC Classes  ?

  • G16B 40/00 - ICT specially adapted for biostatistics; ICT specially adapted for bioinformatics-related machine learning or data mining, e.g. knowledge discovery or pattern finding
  • G16B 30/00 - ICT specially adapted for sequence analysis involving nucleotides or amino acids
  • G06N 3/08 - Learning methods

94.

SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME

      
Application Number 17313379
Status Pending
Filing Date 2021-05-06
First Publication Date 2022-07-28
Owner
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Huang, Jian-Zhi
  • Hsu, Yun-Hsuan
  • Ni, I-Chih
  • Wu, Chih-I

Abstract

A plasma enhanced chemical vapor deposition (PECVD) method includes loading a wafer having a magnetic layer thereon into a processing chamber equipped with a radio frequency (RF) system, introducing an aromatic hydrocarbon precursor into the processing chamber, and turning on an RF source of the RF system to decompose the aromatic hydrocarbon precursor into active radicals at a frequency greater than about 1000 Hz to form a graphene layer over the magnetic layer.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/321 - After-treatment
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form

95.

Device of Generating 3D Light-Field Image

      
Application Number 17155157
Status Pending
Filing Date 2021-01-22
First Publication Date 2022-07-28
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Huang, Jiun-Woei
  • Liu, Chang-Le
  • Chen, Hong-Ming
  • Shih, Kuang-Tsu

Abstract

A device is provided to generate a three-dimensional (3D) real image. A display panel is divided into several sub-areas for emitting scenes. Through a projecting lens-array unit, the scenes enter a fusion lens unit to form a real image of light field at a position beyond common barrier. Through an eyepiece unit, the image is emitted to human eye. Thus, the present invention provides a device for near-eye viewing, which reduces existing human-eye vergence accommodation conflict (VAC) in most augmented reality and mixed reality devices. Therein, the display of near-eye light field is a process of light-field reproduction, which merges the scenes and reduces aberration.

IPC Classes  ?

  • G02B 30/10 - Optical systems or apparatus for producing three-dimensional [3D] effects, e.g. stereoscopic images using integral imaging methods
  • G02B 27/30 - Collimators

96.

CALIBRATION METHOD FOR A PHASED ARRAY OF ANTENNAS

      
Application Number 17149913
Status Pending
Filing Date 2021-01-15
First Publication Date 2022-07-21
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Chou, Hsi-Tseng
  • Liu, Jake Waldvogel

Abstract

A calibration method for a phased array of antennas, wherein the phased array of antennas comprises N antenna elements, the N antenna elements are decomposed into G sub-arrays, each of the G sub-arrays comprises M antenna elements, and the calibration method comprises: (a) inputting a set of digital control codes to RF devices in order to produce field signals corresponding to an operation order r to the G sub-arrays' radiations; (b) measuring the observation field signals of the G sub-arrays corresponding to the operation order r in a fixed position to produce a DFT relationship with respect to the RF devices' operations; and (c) repeating operations (a) to (b) corresponding to the operation order r from 1 to G for generating error-calibrating signals corresponding to the signals of the G sub-arrays.

IPC Classes  ?

  • G01S 7/40 - Means for monitoring or calibrating
  • H01Q 3/38 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the distribution of energy across a radiating aperture varying the phase by electrical means with variable phase-shifters the phase-shifters being digital

97.

METHOD FOR TREATING CANCER

      
Application Number 17578589
Status Pending
Filing Date 2022-01-19
First Publication Date 2022-07-21
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Tsai, Hsing-Chen
  • Lin, Chien-Ting
  • Yu, Chong-Jen
  • Huang, Tai-Chung
  • Weng, Rueyhung Roc
  • Lu, Hsuan-Hsuan
  • Liao, Jung-Chi

Abstract

Provided herein are methods for treating or ameliorating malignant diseases, such as cancers. Also provided herein are methods of increasing the immunity of an immune cell toward malignant cells.

IPC Classes  ?

  • A61K 35/17 - Lymphocytes; B-cells; T-cells; Natural killer cells; Interferon-activated or cytokine-activated lymphocytes
  • A61K 31/706 - Compounds having saccharide radicals and heterocyclic rings having nitrogen as a ring hetero atom, e.g. nucleosides, nucleotides containing six-membered rings with nitrogen as a ring hetero atom
  • A61K 31/708 - Compounds having saccharide radicals and heterocyclic rings having nitrogen as a ring hetero atom, e.g. nucleosides, nucleotides containing six-membered rings with nitrogen as a ring hetero atom containing condensed or non-condensed pyrimidines containing purines, e.g. adenosine, adenylic acid having oxo groups directly attached to the purine ring system, e.g. guanosine, guanylic acid
  • A61K 31/513 - Pyrimidines; Hydrogenated pyrimidines, e.g. trimethoprim having oxo groups directly attached to the heterocyclic ring, e.g. cytosine
  • A61P 35/00 - Antineoplastic agents
  • C12Q 1/6886 - Nucleic acid products used in the analysis of nucleic acids, e.g. primers or probes for diseases caused by alterations of genetic material for cancer
  • C12N 5/0783 - T cells; NK cells; Progenitors of T or NK cells

98.

AUXILIARY PROPELLING SET UP FOR MAN-POWERED VEHICLES

      
Application Number 17481886
Status Pending
Filing Date 2021-09-22
First Publication Date 2022-07-14
Owner National Taiwan University (Taiwan, Province of China)
Inventor
  • Lin, Ching-Fuh
  • Lin, Ta-Jung

Abstract

An auxiliary power for man-powered vehicles includes an air propelling device and a control system. The air propelling device is mounted on a man-powered vehicle for discharging air toward the back of the man-powered vehicle. Due to the reaction force, the man-powered vehicle is provided with forward thrust. The control system connects to the air propelling device in a wired or wireless manner to control the amount of air discharged by the air propelling device.

IPC Classes  ?

  • F04D 25/06 - Units comprising pumps and their driving means the pump being electrically driven
  • B62J 45/412 - Speed sensors
  • B62M 6/90 - Batteries
  • B62J 45/20 - Cycle computers as cycle accessories
  • F04D 19/00 - Axial-flow pumps specially adapted for elastic fluids

99.

A VACCINE COMPRISING A NANOPARTICLE ENCAPSULATING EPITOPES AND ADJUVANT FOR NEUTRALIZING VIRUS INFECTION

      
Application Number 17609822
Status Pending
Filing Date 2020-05-08
First Publication Date 2022-07-14
Owner
  • ACADEMIA SINICA (Taiwan, Province of China)
  • NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Hu, Che-Ming Jack
  • Yang, Hung-Chih

Abstract

We utilized a biocompatible hollow polymeric nanoparticle that coencapsulates T cell epitope peptides and oligodeoxynucleotide (ODN) CpG, and designed immunization strategies to evaluate its protectivity against influenza viruses in mice. This nanoparticle-based peptide vaccine adjuvanted with CpG stimulated robust antigen-specific CD4 and CD5 T cell immunity, but only caused minimal adverse effects compared with crude mixture of peptides and CpG. We used two peptides derived from the nucleocapsid protein (NP), MHC class I-restricted NP366-374 and MHC class ll-restricted NP311-325. This novel nanoparticle vaccine with two epitope peptides plus CpG induced robust and fully protective T cell immunity against influenza viruses. We demonstrates the utility of this novel hollow nanoparticle with co-encapsulation of only a pair of CD4+ and CD8+ T cell-stimulating influenza viral peptides and CpG in establishing near-sterilizing protective resident T cell immunity against heterosubtypic IAV infections, a critical step towards the development of universal influenza T cell vaccines.

IPC Classes  ?

  • A61K 39/12 - Viral antigens
  • A61K 39/39 - Medicinal preparations containing antigens or antibodies characterised by the immunostimulating additives, e.g. chemical adjuvants
  • A61K 9/51 - Nanocapsules

100.

FILTER DEVICE AND EQUIVALENT FILTER CIRCUIT THEREOF

      
Application Number 17643656
Status Pending
Filing Date 2021-12-10
First Publication Date 2022-07-07
Owner NATIONAL TAIWAN UNIVERSITY (Taiwan, Province of China)
Inventor
  • Wu, Tzong-Lin
  • Liu, Hsu-Wei
  • Cheng, Chi-Hsuan
  • Li, Po-Jui

Abstract

The invention discloses a filter device. The filter device comprises a substrate, at least one transmission conductor, and a reference conductor having a slotted structure. The substrate is provided at a first surface thereof with the transmission conductor, and provided at a second surface thereof with the reference conductor. The slotted structure comprises a frame portion, a slotted portion, and a hollow portion. The slotted portion surrounds the frame portion, and the hollow portion is formed in the frame portion. At least one impedance unit is configured on the frame portion. The equivalent filter circuit of the filter device is formed between the transmission conductor, the slotted structure, the reference conductor, and the impedance unit. Thereby, the equivalent filter circuit absorbs at least one noise at at least one specific frequency by the impedance unit to avoid the noise reflected to affect the transmission quality of signal.

IPC Classes  ?

  • H01P 1/20 - Frequency-selective devices, e.g. filters
  • H01P 3/08 - Microstrips; Strip lines
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