An assembled battery in which a plurality of battery cells is connected serially or in parallel, the battery cells each having an electrode surface having an electrode and a peripheral surface orthogonal to the electrode surface and being disposed such that the peripheral surfaces face each other. The assembled battery contains the battery cells, a flameproof material covering the peripheral surface of the battery cells, and a heat dissipation member covering the peripheral surface of the battery cells which is covered with the flameproof material.
H01M 50/213 - Racks, modules or packs for multiple batteries or multiple cells characterised by their shape adapted for cells having curved cross-section, e.g. round or elliptic
H01M 10/653 - Means for temperature control structurally associated with the cells characterised by electrically insulating or thermally conductive materials
H01M 10/6555 - Rods or plates arranged between the cells
H01M 50/474 - Spacing elements inside cells other than separators, membranes or diaphragms; Manufacturing processes thereof characterised by their position inside the cells
H01M 50/477 - Spacing elements inside cells other than separators, membranes or diaphragms; Manufacturing processes thereof characterised by their shape
A printed wiring board includes a first conductor layer, a resin insulating layer having an opening, a second conductor layer including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor including the seed and electrolytic plating layers and connecting the first and second conductor layers. The seed layer has a first portion on the surface of the insulating layer, a second portion on an inner wall surface in the opening of the insulating layer, and a third portion on a portion of the first conductor layer exposed by the opening of the insulating layer such that the first portion is thicker than the second and third portions, and the insulating layer includes resin and inorganic particles including first particles forming the inner wall surface and second particles embedded in the insulating layer and having shapes different from shapes of the first particles.
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering
A printed wiring board includes a first conductor layer, a resin insulating layer having an opening, a second conductor layer including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor including the seed layer and the electrolytic plating layer and connecting the first conductor and second conductor layers. The seed layer has a first portion on the surface of the insulating layer, a second portion on an inner wall surface in the opening of the insulating layer, and a third portion on a portion of the first conductor layer exposed by the opening of the insulating layer such that the first portion is thicker than the second portion and the third portion, the second portion has a first film and a second film electrically connected to the first film, and a portion of the first film is formed on the second film.
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering
A wiring substrate includes an insulating layer having through holes, a first conductor layer formed on first surface of the insulating layer, a second conductor layer formed on second surface of the insulating layer, and interlayer conductors formed along wall surfaces surrounding the through holes such that each interlayer conductor has a film-like shape and is connecting the first and second conductor layers. The interlayer conductors include first conductors formed in first region of the insulating layer and second conductors formed in second region of the insulating layer at density higher than density of the first conductors, and a thickness of each first interlayer conductor in its end part is substantially same as or larger than a thickness of each second conductor in its end part and a thickness of each first conductor in its center part is larger than a thickness of each second conductor in its center part.
A printed wiring board includes a first conductor layer, a resin insulating layer laminated on the first conductor layer and including resin material and inorganic particles, a second conductor layer formed on a first surface of the insulating layer such that the first conductor layer is facing a second surface of the insulating layer, and a via conductor formed in an opening extending through the insulating layer and connecting the first and second conductor layers. The insulating layer is formed such that the inorganic particles include first inorganic particles partially embedded in the resin and second inorganic particles completely embedded in the resin, the first inorganic particles have first portions protruding from the resin and second portions embedded in the resin respectively, and the first surface of the resin insulating layer includes a surface of the resin and surfaces of the first portions exposed from the surface of the resin.
A drill for forming through holes in a glass fiber reinforced substrate includes a drill body having a cutting edge part on a front end side, and a neck part on a base end side. The cutting edge part has a larger diameter than the neck part. The drill body has a step formed between the cutting edge and neck parts and a single continuous chip evacuation groove having main and secondary grooves. The main groove has an L-shaped cross section and is extending from front end of the cutting edge part over the step to the neck part. The secondary groove has a U-shaped cross section and smaller groove width and depth than the main groove and is extending along the main groove from the front end of the cutting edge part over the step to the neck part and merging into the main groove at the neck part.
A heat transfer suppression sheet for a battery pack, the heat transfer suppression sheet being used in a battery pack in which battery cells are connected in series or in parallel, and being interposed between the battery cells, the heat transfer suppression sheet containing a heat-insulating material containing at least one of inorganic particles or inorganic fibers, and a covering material covering at least a part of the heat-insulating material, in which a gap is formed between the heat-insulating material and the covering material.
A heat transfer suppression sheet for a battery pack, the heat transfer suppression sheet being used in a battery pack in which battery cells are connected in series or in parallel and being interposed between the battery cells, the heat transfer suppression sheet containing: a heat-insulating material containing at least one of inorganic particles or inorganic fibers; and a covering material covering at least a part of the heat-insulating material, in which a sealed gap is formed between the heat-insulating material and the covering material, and the covering material is configured such that a communication opening that allows the gap to communicate with the outside of the covering material is formed at a temperature of 60° C. or more.
A conduction inspection jig includes a first member having first openings and a flexural strength of 300 MPa or higher, a second member having second openings and positioned above the first member, a support member positioned between the first member and the second member such that the support member is forming a space between the first member and the second member, and a probe that is positioned in one of the first openings in the first member and one of the second openings in the second member such that the probe penetrates through the one of the first openings, the space formed between the first member and the second member, and the one of the second openings and has a first end portion protruding from the first member and a second end portion protruding from the second member on the opposite side with respect to the first end portion.
A wiring substrate includes an insulating layer, and a conductor layer formed on a surface of the insulating layer and including wiring patterns such that the conductor layer has a polished surface on the opposite side with respect to the insulating layer and includes an upper layer including a plating film and a lower layer including a seed layer for the plating film and directly formed on the surface of the insulating layer. The conductor layer is formed such that a ratio of a thickness of the lower layer to a thickness of the conductor layer is 2.5% or less, the wiring patterns have the minimum wiring width of 5 μm or less and the minimum inter-wiring distance of 7 μm or less, and each of the wiring patterns has an aspect ratio in a range of 2.0 to 4.0.
H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 1/09 - Use of materials for the metallic pattern
A printed wiring board includes an insulating layer, a conductor layer formed on the insulating layer, an adhesive layer formed on the conductor layer such that the adhesive layer is covering an upper surface and a side surface of the conductor layer, and a resin insulating layer formed on the insulating layer such that the resin insulating layer is covering the conductor layer formed on the insulating layer. The conductor layer is formed such that the upper surface of the conductor layer has an unevenness having a root mean square roughness Rq of 0.23 μm or less.
A wiring substrate includes a first build-up part includes first insulating layers, first conductor layers and first via conductors, and a second build-up part laminated to the first build-up part and including second insulating layers, second conductor layers and second via conductors. The first conductor layers in the first build-up part and the second conductor layers in the second build-up part include wirings such that a wiring width and an inter-wiring distance of the wirings in the first conductor layers are smaller than a wiring width and an inter-wiring distance of the wirings in the second conductor layers, an aspect ratio of the wirings in the first conductor layers is in the range of 2.0 to 4.0, the wiring width of the wirings in the first conductor layers is 3 μm or less, and the inter-wiring distance of the wirings in the first conductor layers is 3 μm or less.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering
A wiring substrate includes a core substrate; a first build-up part including first conductor layers, a second build-up part including second conductor layers, a third build-up part including third conductor layers and having the outermost surface of the wiring substrate, and a fourth build-up part including one or more fourth conductor layers and having the outermost surface of the wiring substrate. The minimum wiring width of wirings in the third conductor layers is smaller than that of wirings in the first, second and fourth conductor layers. The minimum inter-wiring distance of the wirings in the third conductor layers is smaller than that of the wirings in the first, second and fourth conductor layers. The wirings in the third conductor layers have the minimum wiring width of 3 μm or less, the minimum inter-wiring distance of 3 μm or less, and an aspect ratio in the range of 2.0 to 4.0.
A wiring substrate includes insulating layers, conductor layers formed on the insulating layers, and via conductors formed in the insulating layers such that the via conductors are connecting the conductor layers through the insulating layers. The conductor layers include a first conductor layer and the outermost conductor layer formed such that the outermost conductor layer includes first conductor pads positioned to mount a first component and second conductor pads positioned to mount a second component and that the first conductor layer includes wiring patterns including first wiring patterns connecting the first conductor pads and second conductor pads, and the first conductor layer in the conductor layers is formed such that the wiring patterns have the minimum wiring width of 3 μm or less, the minimum inter-wiring distance of 3 μm or less and an aspect ratio in the range of 2.0 to 4.0.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
15.
MATTING, EXHAUST GAS PURIFICATION DEVICE, AND METHOD FOR MANUFACTURING MATTING
A mat material having a sufficiently high initial compression surface pressure is provided. The mat material of the present disclosure includes inorganic fibers; and an inorganic binder and an organic binder attached to the inorganic fibers, wherein the mat material has an initial compression surface pressure of 900 kPa or more as measured when compressed to a bulk density of 0.50 g/cm3.
A wiring substrate includes a first insulating layer, a conductor layer formed on the first insulating layer and including a wiring pattern, an organic coating film formed on the conductor layer such that the organic coating film is formed on the wiring pattern of the conductor layer, and a second insulating layer formed on the first insulating layer such that the second insulating layer is covering the conductor layer. The conductor layer is formed such that the wiring pattern has a polished surface on the opposite side with respect to the first insulating layer, and the organic coating film is formed on the wiring pattern of the conductor layer such that the organic coating film is covering the polished surface of the wiring pattern.
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
A wiring substrate includes a core substrate, a first build-up part formed on a first surface of the substrate and including insulating layers and conductor layers, and a second build-up part formed on a second surface of the substate on the opposite side with respect to the first surface and including insulating layers and conductor layers. The first build-up part includes a first region and a second region such that a distance between adjacent conductor layers in the second region is smaller than a distance between adjacent conductor layers in the first region, the conductor layers in the second region include second wirings having the minimum wiring width and the minimum inter-wiring distance that are smaller than the minimum wiring width and the minimum inter-wiring distance of first wirings of the conductor layers in the first region and the insulating layers are continuous in the first region and second region.
A printed wiring board includes a first conductor layer, a resin insulating layer having an opening extending from a first surface to a second surface of the resin insulating layer and laminated on the first conductor layer, a second conductor layer formed on the first surface of the resin insulating layer such that the first conductor layer is facing the second surface of the resin insulating layer on the opposite side with respect to the first surface, and a via conductor formed in the opening of the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer and that the via conductor and the second conductor layer include a seed layer and an electrolytic plating layer formed on the seed layer. The seed layer includes an amorphous metal in a range of 5 wt % to 80 wt %.
H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
A printed wiring board includes an insulating layer, a conductor layer formed on the insulating layer and including one or more conductor circuits, an insulating adhesive layer covering a surface of the conductor layer and a part or parts of the insulating layer exposed from the conductor layer, and a resin insulating layer formed on the insulating layer and the conductor layer such that the insulating adhesive layer is sandwiched between the conductor layer and the resin insulating layer. The insulating adhesive layer includes a first portion covering an upper surface of the one or more conductor circuits and a second portion covering a side surface of the one or more conductor circuits and a thickness of the first portion is greater than a thickness of the second portion.
H05K 3/38 - Improvement of the adhesion between the insulating substrate and the metal
H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
A wiring substrate includes a resin insulating layer, and a conductor layer formed on the resin insulating layer and including a seed layer and a metal film formed on the seed layer such that the conductor layer has wiring patterns including wirings. The conductor layer is formed such that each of the wirings in the wiring patterns has undercut parts on side surfaces extending to the resin insulating layer, and the wirings in the conductor layer include outer wirings formed such that each of the outer wirings has the undercut part on the side surface facing an adjacent one of the wirings is smaller than the undercut part on the side surface farther from the adjacent one of the wirings.
H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
A wiring substrate includes an insulating layer, and a conductor layer including a wiring formed on the insulating layer. The wiring in the conductor layer has a first section and a second section formed such that a wiring width in the second section is smaller than a wiring width in the first section and that a wiring thickness in the second section is larger than a wiring thickness in the first section.
H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
A wiring substrate includes an insulating layer, a first conductor layer formed on the insulating layer and including a first wiring and a second wiring formed adjacent to the first wiring, and a second conductor layer on the opposite side with respect to first conductor layer such that the insulating layer is covering the second conductor layer. The first conductor layer is formed such that each of the first wiring and the second wiring has an aspect ratio in the range of 2.0 to 4.0 and a wiring width of 5 μm or less and that the first wiring and the second wiring are separated by the distance of 7 μm or less, and the first conductor layer includes a seed layer formed on the insulating layer, and an electrolytic plating film formed on the seed layer.
The objective of the invention is to provide a plant activator with superior plant growth-promoting effect and low toxicity and soil contamination. A plant activator comprising, as an active ingredient,
a hydroxy fatty acid derivative of general formula (I) and/or (II):
The objective of the invention is to provide a plant activator with superior plant growth-promoting effect and low toxicity and soil contamination. A plant activator comprising, as an active ingredient,
a hydroxy fatty acid derivative of general formula (I) and/or (II):
HOOC—(R1)—CH(OH)—CH(OH)—CH═CH—CH(OH)—R2 (I),
The objective of the invention is to provide a plant activator with superior plant growth-promoting effect and low toxicity and soil contamination. A plant activator comprising, as an active ingredient,
a hydroxy fatty acid derivative of general formula (I) and/or (II):
HOOC—(R1)—CH(OH)—CH(OH)—CH═CH—CH(OH)—R2 (I),
HOOC—(R1)—CH(OH)—CH═CH—CH(OH)—CH(OH)—R2 (II),
(wherein, R1 is a straight or branched hydrocarbon group with 4 to 12 carbon atoms, optionally comprises one or more double bonds and/or OH groups, and the position of the double bond is not limited, provided that the double bond is comprised, and R2 is a straight or branched hydrocarbon group with 2 to 8 carbon atoms, optionally comprises one or more double bonds and/or OH groups, and the position of the double bond is not limited, provided that the double bond is comprised) or a salt or an ester thereof.
A01N 37/36 - Biocides, pest repellants or attractants, or plant growth regulators containing organic compounds containing a carbon atom having three bonds to hetero atoms with at the most two bonds to halogen, e.g. carboxylic acids containing at least one carboxylic group or a thio-analogue, or a derivative thereof, and a singly bound oxygen or sulfur atom attached to the same carbon skeleton, this oxygen or sulfur atom not being a member of a carboxylic group or of a thio-anal
A wiring substrate includes a core substrate, a build-up part formed on a surface of the substrate and including insulating layers and conductor layers, and a covering insulating layer formed on the build-up part such that the covering layer is covering the outermost surface of the build-up part. The build-up part is formed such that the insulating layers include a first insulating layer forming the outermost one of the insulating layers, that the conductor layers include a first conductor layer formed on the first insulating layer and including a first conductor pad, and that an elongation rate of the first insulating layer is greater than an elongation rate of each insulating layer other than the first insulating layer in the build-up part, and the covering layer is formed such that the covering layer has an opening entirely exposing an upper surface and a side surface of the first conductor pad.
A wiring substrate includes a core substrate, a build-up part formed on a surface of the substrate and including insulating layers and conductor layers, and a covering insulating layer formed on the build-up part such that the covering layer is covering the outermost surface of the build-up part. The build-up part is formed such that the insulating layers include a first insulating layer forming the outermost one of the insulating layers, that the conductor layers include a first conductor layer formed on the first insulating layer and including a first conductor pad, and that a tensile strength of the first insulating layer is higher than a tensile strength of each insulating layer other than the first insulating layer in the first build-up part, and the covering layer is formed such that the covering layer has opening entirely exposing an upper surface and a side surface of the first conductor pad.
A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer, and a via conductor formed in an opening formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer. The via conductor is formed such that the via conductor includes a seed layer covering an inner wall surface of the resin insulating layer inside of the opening and an electrolytic plating layer formed on the seed layer such that the seed layer has a plurality of columnar parts grown in columnar shapes.
A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the insulating layer, and a via conductor formed in an opening formed in the insulating layer such that the via conductor is connecting the first and second conductor layers. The second conductor layer and via conductor include a seed layer and an electrolytic plating layer formed on the seed layer such that the seed layer has a first portion formed on the surface of the insulating layer, a second portion formed on an inner wall surface of the insulating layer in the opening, and a third portion formed on the first conductor layer exposed from the opening and that the first portion has a thickness that is greater than a thickness of the second portion and a thickness of the third portion.
H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering
A printed wiring board includes a first conductor layer, an insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the insulating layer and including a conductor circuit, and a via conductor formed in an opening formed in the insulating layer and connecting the first and second conductor layers. The second conductor layer and via conductor include a seed layer and an electrolytic plating layer formed on the seed layer such that the seed layer has a first layer and a second layer formed on the first layer, the first layer has a width greater than a width of the second layer in cross section of the conductor circuit in the second conductor layer and that the electrolytic plating layer has a width greater than the width of the first layer in cross section of the conductor circuit in the second conductor layer.
H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
29.
METHOD FOR MANUFACTURING PRINTED WIRING BOARD AND PRINTED WIRING BOARD
A method for manufacturing a printed wiring board includes forming a first conductor layer, forming an adhesive layer including a nitrogen-based organic compound and covering a surface of the first layer, forming a resin insulating layer covering the adhesive layer and having the second surface facing the first conductor layer, forming a protective film on the first surface of the insulating layer, forming an opening in the insulating layer such that the opening penetrates through the insulating layer and reaches the adhesive layer, applying plasma to the opening of the insulating layer such that the plasma cleans an inside of the opening, removing the protective film from the insulating layer after cleaning the inside of the opening, forming a second conductor layer on the first surface of the insulating layer, and forming a via conductor in the opening such that the via conductor connects the first layer and second layer.
H05K 1/09 - Use of materials for the metallic pattern
H05K 3/16 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material by cathodic sputtering
H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
A printed wiring board includes an insulating layer, a first conductor layer formed on the insulating layer, an adhesive layer formed on the first conductor layer, a resin insulating layer formed on the insulating layer such that the adhesive layer is formed between the first conductor layer and the resin insulating layer, and a second conductor layer formed on the resin insulating layer. The first conductor layer is formed such that the first conductor layer has a smooth upper surface and a smooth side surface and that the adhesive layer has a smooth film formed on the smooth upper and side surfaces, and a protruding part protruding from the smooth film.
A wiring substrate includes a core substrate including a core insulating layer, a first conductor layer, a second conductor layer, a first insulating layer, a second insulating layer, a third conductor layer, and a fourth conductor layer. The first conductor layer includes first land and first plane parts, the second conductor layer includes second land and second plane parts, the third conductor layer includes fine wirings and a third plane part, the fourth conductor layer includes fine wirings and a fourth plane part, the substrate includes a through-hole conductor connecting the first and second land parts through the core insulating layer, a first via conductor connecting the first land part and third conductor layer, a second via conductor connecting the second land part and fourth conductor layer, a third via conductor connecting the first and third plane parts, and a fourth via conductor connecting the second and fourth plane parts.
A printed wiring board includes a first conductor layer, an insulating layer formed on the first conductor layer, a second conductor layer formed on the insulating layer, and a via conductor formed in the insulating layer such that the via conductor is connecting the first and second conductor layers. The insulating layer has opening exposing portion of the first conductor layer such that the via conductor is formed in the opening, the second conductor layer and via conductor are formed such that the second conductor layer and via conductor include a seed layer and an electrolytic plating layer on the seed layer, and the insulating layer includes resin and inorganic particles dispersed in the resin such that the particles include first particles forming inner wall surface in the opening and second particles embedded in the insulating layer and the first particles have shapes different from shapes of the second particles.
A method for manufacturing a wiring substrate includes preparing a first support plate having a metal foil formed on surface of a support substrate, forming a wiring substrate on the foil such that the wiring substrate has first surface facing the foil, attaching a second support plate to second surface of the wiring substrate, and separating the support substrate from the foil after attaching the second support plate such that the foil is removed from the first surface and that the first surface is exposed. The wiring substrate has first conductor pads on the first surface, and second conductor pads on the second surface, and the method includes conducting first inspection such that conduction between the second pads is inspected before attaching the second plate to the second surface, and conducting second inspection such that conduction between the first pads is inspected after removing the foil from the first surface.
H05K 3/00 - Apparatus or processes for manufacturing printed circuits
H05K 3/20 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
H05K 1/14 - Structural association of two or more printed circuits
34.
WIRING SUBSTRATE AND METHOD FOR MANUFACTURING WIRING SUBSTRATE
A wiring substrate includes a first insulating layer, a first conductor layer formed on the first insulating layer, a second insulating layer formed on the first conductor layer, a second conductor layer formed on the second insulating layer, and a via conductor formed in the second insulating layer such that the via conductor is connecting the first and second conductor layers. The second insulating layer has a via hole in which the via conductor is formed, and the via conductor includes a first plating film and a second plating film such that the first plating film has a bottom portion formed at bottom of the via hole and a side portion formed on side of the via hole and separated from the bottom portion by gap and that the second plating film is covering the gap of the first plating film and at least part of the first plating film.
H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
A wiring substrate includes a first conductor pattern, a second conductor pattern, an insulating layer interposed between the first and second patterns and having a through hole, and a plating conductor integrally formed with the second pattern and filling the through hole in the insulating layer such that the plating conductor is in contact with the first pattern. The through hole has an expansion part such that an opening width of the through hole on the first pattern side is widened, and the plating conductor includes a first plating film directly formed on inner wall of the through hole and a second plating film formed on the first plating film such that the minimum thickness of the first plating film in the expansion part is in the range of 55% to 95% of the minimum thickness of the first plating film in the through hole other than the expansion part.
A wiring substrate includes an insulating layer including inorganic filler particles and resin, and a conductor layer including a metal film formed on a surface of the insulating layer and having a conductor pattern. The inorganic filler particles include first inorganic filler particles such that each of the first inorganic filler particles has a portion exposed on the surface of the insulating layer and is at least partially separated from the resin, the conductor layer is formed such that a part of the metal film is between the first inorganic filler particles and the resin from the surface of the insulating layer and that a distance between the surface of the insulating layer and the surface of the insulating layer at a deepest part of the part of the metal film is in the range of 0.1 μm to 0.5 μm.
A wiring substrate includes a first conductor layer including wirings, an interlayer insulating layer formed on the first conductor layer and covering the first conductor layer, a second conductor layer formed on the interlayer insulating layer and including wirings, a via conductor formed in the interlayer insulating layer such that the via conductor is penetrating through the interlayer insulating layer and connecting the first conductor layer and the second conductor layer, and a wiring part formed in the interlayer insulating layer and including an embedded wiring layer filling one or more grooves formed in the interlayer insulating layer. The interlayer insulating layer includes a first insulating layer and a second insulating layer laminated on the first insulating layer, and the embedded wiring layer is formed in the first insulating layer on a side facing the second insulating layer and filling the groove or grooves formed in the first insulating layer.
A wiring substrate includes a first conductor layer including wirings, an interlayer insulating layer formed on and covering the first conductor layer, a wiring layer formed in the interlayer insulating layer and including wirings, a second conductor layer formed on the interlayer insulating layer and including wirings, and a via conductor formed in the interlayer insulating layer such that the via conductor is penetrating through the interlayer insulating layer and connecting the first and second conductor layers. The interlayer insulating layer includes first and second insulating layers such that the wiring layer is formed on a surface of the first insulating layer, and the wiring layer is formed such that an aspect ratio of the wirings in the wiring layer is in the range of 2.0 to 6.0 and that aspect ratios of the wirings in the first and second conductor layers are in the range of 1.0 to 2.0.
A method for manufacturing a printed wiring board includes forming an electroless plating layer on a solder resist layer such that the electroless plating layer has a film thickness in the range of 0.05 μm to 0.70 μm, forming plating resist such that the plating resist has openings exposing portions of the electroless plating layer, applying electrolytic plating such that metal posts are formed in the openings of the plating resist, removing the plating resist, and etching the electroless plating layer exposed from the metal posts. The solder resist layer is formed such that the solder resist layer has openings exposing portions of the outermost conductor layer, the electroless plating layer is formed on the portions of the outermost conductor layer, and the plating resist is formed such that the openings of the plating resist expose the portions of the electroless plating layer formed in the openings of the solder resist layer.
H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
C23C 28/00 - Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of main groups , or by combinations of methods provided for in subclasses and
C23C 18/16 - Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, i.e. electroless plating
C25D 5/02 - Electroplating of selected surface areas
C25D 5/34 - Pretreatment of metallic surfaces to be electroplated
C25D 5/48 - After-treatment of electroplated surfaces
40.
PLATE-SHAPED HEAT INSULATOR, COMBUSTION CHAMBER, BOILER AND WATER HEATER
The present disclosure provides a plate-shaped heat insulator less susceptible to damage caused by thermal shrinkage. Provided is a plate-shaped heat insulator including an aggregate of multiple heat insulating members containing inorganic fibers, wherein the plate-shaped heat insulator is intended to be disposed in a combustion chamber.
An object of the present invention is to provide a plate-shaped heat insulator with good workability during construction and less susceptible to damage after construction. Provided is a plate-shaped heat insulator including a plate-shaped papermaking product containing inorganic fibers, wherein the plate-shaped heat insulator is intended to be disposed in a combustion chamber.
A wiring substrate includes a first insulating layer, a conductor layer including first and second pads, a second insulating layer having first openings exposing the first pads and a second opening exposing the second pads, metal posts formed on the first pads and filling the first openings, and a wiring structure positioned in the second opening and having first and second connection pads such that the second connection pads are connected to the second pads. The upper surfaces of the first connection pads and the upper surfaces of the metal posts form a component mounting surface having first, second and third regions, the first connection pads are formed in the first, second and third regions and include a group of first connection pads formed in the first and second regions and electrically connected and a group of first connection pads formed in the first and third regions and electrically connected.
A wiring substrate includes a first insulating layer, a conductor layer including first and second conductor pads, a second insulating layer having an opening exposing the second conductor pads, and a wiring structure including a resin insulating layer and a wiring layer and formed in the opening of the second insulating layer. The wiring structure has first surface side connection pads, second surface side connection pads and electrically connected to the second conductor pads of the conductor layer, and conductors that electrically connect the first surface side connection pads and the second surface side connection pads, the first surface side connection pads form a component mounting surface having first and second component mounting region, and the first surface side connection pads include a group of pads in the first region and a group of pads in the second region electrically connected to the group of pads in the first region.
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
A method for manufacturing a printed wiring board includes preparing an intermediate substrate including an insulating layer, a conductor layer including circuits, and a first resin insulating layer, inputting, to a laser processing machine that forms openings, positions of the openings, generating, based on analysis of the conductor layer, classification of the circuits, inputting, to the machine, shot numbers for forming the openings determined based on the classification, and executing the machine based on the positions and shot numbers such that the openings are formed. The circuits include power supply, ground, and signal circuits, the classification includes stratifying such that the power supply and ground circuits belong to the first category and the signal circuits belong to the second category, and the inputting includes setting the shot number for the openings belonging to the first category is smaller than the shot number for the openings belonging to the second category.
Provided are a heat transfer suppression sheet having an excellent heat transfer prevention effect and excellent retainability of inorganic particles and shape retainability at a high temperature, and a battery pack in which the heat transfer suppression sheet is interposed between battery cells. The heat transfer suppression sheet (10) includes inorganic particles (20), first inorganic fibers (30), and second inorganic fibers (31). The first inorganic fibers (30) are amorphous fibers. The second inorganic fibers (31) contain at least one kind selected from amorphous fibers having a glass transition point higher than that of the first inorganic fibers (30) and crystalline fibers.
H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding
H01M 50/293 - Mountings; Secondary casings or frames; Racks, modules or packs; Suspension devices; Shock absorbers; Transport or carrying devices; Holders characterised by spacing elements or positioning means within frames, racks or packs characterised by the material
Provided are a heat transfer suppression sheet having an excellent heat transfer prevention effect and excellent retainability of inorganic particles and shape retainability at a high temperature, and a battery pack in which the heat transfer suppression sheet is interposed between battery cells. The heat transfer suppression sheet (10) includes inorganic particles (20), first inorganic fibers (30), and second inorganic fibers (31). An average fiber diameter of the first inorganic fibers (30) is larger than an average fiber diameter of the second inorganic fibers (31). The first inorganic fibers (30) have a linear shape or a needle shape, and the second inorganic fibers (31) have a dendritic shape or a crimped shape.
A wiring substrate includes an insulating layer, a conductor layer formed on a surface of the insulating layer such that the conductor layer includes a conductor pad, and a solder resist layer formed on the surface of the insulating layer such that the solder resist layer is covering the conductor layer and having an opening exposing the conductor pad. The conductor pad of the conductor layer has a substantially rectangular planar shape such that the conductor pads has a main surface, a pair of long sides, a pair of short sides and four corner portions, and the solder resist layer is formed such that the opening is exposing side surfaces at the long sides and 50% or more of the main surface and that the solder resist layer is covering side surfaces at the short sides.
A method for manufacturing a wiring substrate includes forming a second resin insulating layer on a first resin insulating layer such that the second resin insulating layer is in contact with a surface of the first resin insulating layer, irradiating laser upon the second resin insulating layer such that a recess penetrating through the second resin insulating layer and exposing the first resin insulating layer is formed, and forming a conductor layer including conductor material filled in the recess formed through the second resin insulating layer such that the conductor layer is embedded in the second resin insulating layer. The second resin insulating layer are formed on the surface of the first resin insulating layer such that the first resin insulating layer and the second resin insulating layer have different processability with respect to the laser.
H05K 3/00 - Apparatus or processes for manufacturing printed circuits
H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
H05K 3/26 - Cleaning or polishing of the conductive pattern
A printed wiring board includes a resin insulating layer including resin and particles, and a conductor layer formed on a surface of the resin insulating layer. The particles in the resin insulating layer include first particles and second particles such that the first particles are partially embedded in the resin and the second particles are completely embedded in the resin, and the resin insulating layer is formed such that the first particles has exposed surfaces exposed from the resin and covered surfaces covered by the resin, respectively, the surface of the resin insulating layer includes the first exposed surfaces, and a ratio of a second area to a first area is in a range of 0.1 to 0.25 where the first area is an area of the surface of the resin insulating layer, and the second area is obtained by summing areas of the exposed surfaces of the first particles.
A semiconductor package includes a printed wiring board, a logic IC mounted on a first surface of the board, a connector mounted on a second surface of the board on the opposite side with respect to the first surface, an optical element that converts an optical signal and an electrical signal and positioned on the opposite side with respect to the first surface such that the optical element is at least partially embedded in the board, a path that is formed in the board and electrically connects the logic IC on the first surface and the optical element on the opposite side with respect to the first surface, and an optical waveguide that is embedded on the opposite side with respect to the first surface and optically connects the connector on the second surface and the optical element on the opposite side with respect to the first surface.
G02B 6/42 - Coupling light guides with opto-electronic elements
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
A wiring substrate includes an insulating layer, a conductor layer formed on the insulating layer and including a conductor pad, and a solder resist layer formed on the insulating layer such that the solder resist layer has an opening entirely exposing an upper surface and a side surface of the conductor pad. The conductor layer is formed such that the conductor pad has a pad body extending along a surface of the insulating layer, and a protective layer covering an upper surface and a side surface of the pad body and including material different from material of the pad body, and the pad body of the conductor pad has a notch part formed at a peripheral edge portion of the pad body such that the notch part separates a lower surface of the pad body and the surface of the insulating layer and is filled with the protective layer.
A method for manufacturing a wiring substrate includes forming a resin insulating layer on a first conductor layer such that the resin insulating layer covers the first conductor layer, applying a roughening treatment on a surface of the resin insulating layer on the opposite side with respect to the first conductor layer, forming an opening in the resin insulating layer after the roughening treatment on the surface of the resin insulating layer such that the opening penetrates through the resin insulating layer and exposes a portion of the first conductor layer, and forming a second conductor layer on the surface of the resin insulating layer such that the second conductor layer is formed in contact with the surface of the resin insulating layer and that a via conductor is formed in the opening of the resin insulating layer.
A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer and including a signal wiring, and a via conductor formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer. The resin insulating layer has an opening such that the opening is exposing a portion of the first conductor layer and that the via conductor is formed in the opening of the resin insulating layer, and the resin insulating layer includes inorganic particles and resin such that the resin is forming the surface of the resin insulating layer.
A method for manufacturing a wiring substrate includes preparing a substrate including an insulating layer and metal foils, forming a through hole in the substrate to penetrate through the insulating layer and foils, forming a first plating film on the substrate such that the first film is formed on the entire surface of each metal foil and the inner wall of the hole, laminating one or more resin sheets on the first film such that the resin sheet or sheets cover the first film on the entire surface of a respective one of the foils, pressing the resin sheet or sheets such that resin is extruded from the resin sheet or sheets into the hole and fills space surrounded by the first film inside the hole, removing the resin sheet or sheets, and forming a second plating film on the substrate to cover surface of the resin in the hole.
H05K 3/00 - Apparatus or processes for manufacturing printed circuits
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 3/04 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
H05K 3/02 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
H05K 3/26 - Cleaning or polishing of the conductive pattern
55.
Antiviral substrate, antiviral composition, method for manufacturing antiviral substrate, antimicrobial substrate, antimicrobial composition and method for manufacturing antimicrobial substrate
In an antimicrobial substrate, a cured material of a binder containing a copper compound and a polymerization initiator is fixed onto a surface of a base material. At least a part of the copper compound is exposed on a surface of the cured material of the binder.
A method for manufacturing a printed wiring board includes forming through holes in a double-sided copper-clad laminated plate such that a high-density region of the through holes and a low-density region of the through holes are formed, forming an electrolytic plating film on a copper foil of the plate in the high-density and low-density regions, forming a masking resist to mask the plating film in the high-density region, etching the plating film in the low-density region exposed from the resist such that the plating film in the low-density region is thinned, peeling off the resist from the plating film in the high-density region, and forming a conductor circuit including the copper foil and the plating film in the high-density and low-density regions. The forming of the plating film on the copper foil of the plate includes forming the plating film in the through holes in the high-density and low-density regions.
H05K 3/26 - Cleaning or polishing of the conductive pattern
H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
C25D 5/02 - Electroplating of selected surface areas
C25D 5/34 - Pretreatment of metallic surfaces to be electroplated
C25D 5/48 - After-treatment of electroplated surfaces
C25D 3/38 - Electroplating; Baths therefor from solutions of copper
H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
57.
METHOD FOR MANUFACTURING PRINTED WIRING BOARD AND COATING SYSTEM FOR IMPLEMENTING THE METHOD
A method for manufacturing a printed wiring board includes forming a seed layer on a surface of a resin insulating layer, applying liquid resist on the seed layer formed on the surface of the resin insulating layer, drying the liquid resist applied on the seed layer such that a resist layer is formed on the seed layer, applying pressure and heat simultaneously to an entire surface of the resist layer formed on the seed layer, forming a plating resist on the seed layer from the resist layer formed on the seed layer using a photographic technology, forming an electrolytic plating film on part of the seed layer exposed from the plating resist, removing the plating resist from the seed layer, and removing part of the seed layer exposed from the electrolytic plating film.
H05K 3/02 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
H05K 3/00 - Apparatus or processes for manufacturing printed circuits
C25D 5/02 - Electroplating of selected surface areas
C25D 5/22 - Electroplating combined with mechanical treatment during the deposition
C25D 5/54 - Electroplating of non-metallic surfaces
C25D 7/00 - Electroplating characterised by the article coated
58.
WIRING SUBSTRATE AND METHOD FOR MANUFACTURING WIRING SUBSTRATE
A wiring substrate includes an insulating layer including resin and filler particles, and an embedded wiring layer including wirings and embedded in the insulating layer such that the wirings are filling grooves formed on a surface of the insulating layer, respectively. The embedded wiring layer is formed such that the smallest line width of the wirings in the embedded wiring layer is in the range of 2 μm to 8 μm, and the insulating layer is formed such that the maximum particle size of the filler particles is 50% or less of the smallest line width of the wirings in the embedded wiring layer.
A wiring substrate includes an insulating layer including resin and filler particles, and an embedded wiring layer including wirings and embedded in the insulating layer such that the wirings are filling grooves formed on a surface of the insulating layer, respectively. The embedded wiring layer is formed such that the inter-wiring distance between the closest two wirings of the wirings in the embedded wiring layer is in the range of 2 μm to 8 μm, and the insulating layer is formed such that the maximum particle size of the filler particles is 50% or less of the inter-wiring distance.
A wiring substrate includes an insulating layer, a conductor layer formed on a surface of the insulating layer and including a conductor pad, a covering layer formed on the insulating layer and covering a portion of the insulating layer, an optical waveguide positioned on the surface of the insulating layer and including a core part, and a conductor post including plating metal and formed on the conductor pad such that the conductor post is penetrating through the covering layer and connected to a component. The insulating layer has a component region covered by the component when the component is connected to the conductor post, the core part has an end surface facing the opposite direction with respect to the insulating layer and exposed in the component region and a distance between the end surface and the surface of the insulating layer is greater than a thickness of the covering layer.
A wiring substrate includes an insulating layer, a conductor layer formed on surface of the insulating layer and including a conductor pad, a covering layer covering a portion of the insulating layer, an optical waveguide positioned on the surface of the insulating layer and including core part, and a conductor post including plating metal and formed on the conductor pad such that the post is penetrating through the covering layer and connected to a component. The insulating layer has component region covered by the component when the component is connected, the core part has side surface extending in direction along the surface of the insulating layer, the side surface has an exposed portion exposed in the component region and facing the opposite direction with respect to the insulating layer, and distance between the exposed portion and the surface of the insulating layer is greater than thickness of the covering layer.
The objective of the invention is to provide a plant activator with superior resistance-inducing activity and low toxicity and soil contamination. A plant activator comprising, as an active ingredient, an oxo fatty acid derivative of general formula (I):
The objective of the invention is to provide a plant activator with superior resistance-inducing activity and low toxicity and soil contamination. A plant activator comprising, as an active ingredient, an oxo fatty acid derivative of general formula (I):
HOOC—(R1)—C═C—C(═O)—R2 (I)
The objective of the invention is to provide a plant activator with superior resistance-inducing activity and low toxicity and soil contamination. A plant activator comprising, as an active ingredient, an oxo fatty acid derivative of general formula (I):
HOOC—(R1)—C═C—C(═O)—R2 (I)
(wherein, R1 is a straight or branched alkylene group with 6 to 12 carbon atoms, and optionally comprises one or more double bonds, R2 is an alkyl group with 2 to 8 carbon atoms, and optionally comprises one or more branches and/or double bonds) or a salt or an ester thereof.
A01N 37/42 - Biocides, pest repellants or attractants, or plant growth regulators containing organic compounds containing a carbon atom having three bonds to hetero atoms with at the most two bonds to halogen, e.g. carboxylic acids containing within the same carbon skeleton a carboxylic group or a thio-analogue, or a derivative thereof, and a carbon atom having only two bonds to hetero atoms with at the most one bond to halogen, e.g. keto-carboxylic acids
A semiconductor package includes a printed wiring board, a logic IC mounted on the printed wiring board, a connector mounted on the printed wiring board, an optical element that is accommodated inside the printed wiring board and converts an optical signal to an electrical signal and/or the electrical signal to the optical signal, an optical waveguide formed between the optical element inside the printed wiring board and the connector on the printed wiring board such that the optical waveguide optically connects the optical element and the connector, and an electrical path formed between the optical element and the logic IC such that the electrical path connects the logic IC and the optical element and that a length of the electrical path is 1 mm or less.
A wiring substrate includes an insulating layer including resin and filler particles, conductor layers including an upper-layer conductor layer and a lower-layer conductor layer such that the insulating layer is sandwiched between the upper-layer and lower-layer conductor layers, and a penetrating conductor formed in the insulating layer such that the penetrating conductor is penetrating through the insulating layer and connecting the upper-layer and lower-layer conductor layers. The penetrating conductor is formed such that the penetrating conductor has a first length which is the maximum width of the penetrating conductor in the direction orthogonal to the thickness direction of the wiring substrate and the first length is 25 μm or less, and the insulating layer is formed such that the maximum particle size of the filler particles in a region within the distance of 40% of the first length from the penetrating conductor is 20% or less of the first length.
A printed wiring board includes resin insulating layers, and conductor layers including a conductor layer such that the conductor layer includes a conductor circuit and that the conductor circuit has a surface index X/Y in a range of 1.00 to 2.20 where X is a length of an outer circumference of cross section of the conductor circuit, and Y is a length of an outer circumference of a reference quadrangle in the cross section of the conductor circuit. The reference quadrangle has a first reference line drawn with reference to bottom of deepest recess on first side, a second reference line is drawn with reference to bottom of deepest recess on second side, a third reference line is drawn with reference to bottom of deepest recess on third side, and a fourth reference line is drawn with reference to bottom of deepest recess on fourth side of the outer circumference.
A printed wiring board includes resin insulating layers, and conductor layers laminated on the resin insulating layers, respectively. The conductor layers includes a conductor layer including a conductor circuit formed such that the conductor circuit has recesses each having a depth of 2.0 μm or more and a bottom whose diameter is larger than a diameter of an opening part of a respective one of the recesses.
A printed wiring board includes a resin insulating layer, pads formed on the resin insulating layer, an uppermost resin insulating layer formed on the resin insulating layer such that the uppermost resin insulating layer is covering the pads and has openings exposing the pads, respectively, via conductors formed in the uppermost resin insulating layer such that the via conductors are formed on the pads exposed from the openings in the uppermost resin insulating layer, respectively, and metal posts formed on the via conductors such that each of the metal posts has a portion on a surface of the uppermost resin insulating layer around the via conductors and a side surface having a flared bottom extending toward the uppermost resin insulating layer.
Provided is a heat insulation sheet for battery pack that can achieve uniform heat insulation property and heat dissipation property, and can insulate heat between adjacent battery cells and quickly dissipate heat generated by the battery cells when thermal runaway occurs in the battery cells, and a battery pack in which a heat insulation sheet for battery pack is interposed between battery cells. A heat insulation sheet (10) for battery pack in which battery cells are connected in series or in parallel, the heat insulation sheet being interposed between the battery cells and containing: a first particle (21) that is uniformly dispersed and contains a silica nanoparticle; and an inorganic fiber (23) that is uniformly dispersed and oriented in one direction which is parallel to a main surface of the heat insulation sheet (10).
H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding
H01M 10/653 - Means for temperature control structurally associated with the cells characterised by electrically insulating or thermally conductive materials
A wiring substrate includes a first insulating layer, a conductor layer formed on the first insulating layer, a second insulating layer formed on the first insulating layer such that the second insulating layer is covering the conductor layer, and a coating film formed on a surface of the conductor layer such that the coating film is adhering the conductor layer and the second insulating layer. The conductor layer includes a conductor pad and a wiring pattern, and the conductor pad of the conductor layer has a mounting surface including a first region and a component mounting region formed such that the second insulating layer has a through hole exposing the component mounting region and that the first region is covered by the second insulating layer and roughened to have a surface roughness higher than a first surface roughness of a surface of the wiring pattern facing the second insulating layer.
To provide a heat insulation sheet for a battery pack that has a good shape retention property and can maintain an excellent heat insulation property even when vibration or pressure is applied, and a battery pack in which a heat insulation sheet for a battery pack is interposed between battery cells. A heat insulation sheet (10) of the present invention is a heat insulation sheet for a battery pack, the heat insulation sheet being interposed between battery cells in a battery pack in which a plurality of battery cells is connected in series or in parallel. The heat insulation sheet (10) includes: a first heat insulation material (21) containing a silica nanoparticle; and a second heat insulation material (22) containing a plate-shaped particle containing a silica component and having a curved surface.
A printed wiring board includes an insulating layer, and a conductor layer including a solid layer and wirings. The solid layer has an opening part. The wirings are formed in the opening part. The opening part includes first and second opening parts. The wirings include first and second wirings. The first wiring has a first land, a first portion, and a second portion. The second wiring has a second land, a third portion, and a fourth portion extending in parallel to the second portion. A first boundary between the first and second portions is in the second opening part. The first portion is bending at the first boundary and increasing distance between the first and second wirings. A second boundary between the third and fourth portions is in the second opening part. The third portion is bending at the second boundary and increasing distance between the first and second wirings.
A method for manufacturing a wiring substrate includes forming a conductor layer including first and second pads, forming a resin insulating layer on the conductor layer, forming, in the insulating layer, a first opening exposing the first pad and a second opening exposing the second pad, forming a covering layer on the insulating layer such that the covering layer covers the first and second openings, forming a third opening in the covering layer such that the third opening communicates with the first opening and the first pad is exposed in the third opening, forming, on a surface of the first pad, a protective film formed of material different from material forming the conductor layer, removing the covering layer from the insulating layer, and forming a conductor post on the second pad such that the conductor post is formed of material that is same as the material forming the conductor layer.
H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
C25D 5/02 - Electroplating of selected surface areas
C25D 7/00 - Electroplating characterised by the article coated
C23C 28/00 - Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of main groups , or by combinations of methods provided for in subclasses and
C23C 18/16 - Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, i.e. electroless plating
73.
Wiring substrate and method for manufacturing wiring substrate
A wiring substrate includes a first conductor layer, an insulating layer formed on the first conductor layer, a second conductor layer formed on the insulating layer, a connection conductor penetrating through the insulating layer and connecting the first and second conductor layers, and a coating film formed on a surface of the first conductor layer and adhering the first conductor layer and the insulating layer. The first conductor layer includes a conductor pad in contact with the connection conductor such that the conductor pad has a surface having a first region and a second region on second conductor layer side and that surface roughness of the first region is different from surface roughness of the second region, and the conductor pad of the first conductor layer is formed such that the first region is covered by the coating film and that the second region is covered by the connection conductor.
A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including pads, a solder resist layer formed on the base layer such that the solder resist layer is covering the conductor layer and has openings exposing the pads, and plating bumps formed on the pads such that each plating bump includes a base plating layer formed in a respective one of the openings, an intermediate layer formed on the base plating layer, and a top plating layer formed on the intermediate layer. The plating bumps are formed such that the base plating layer has a side surface including a portion protruding from the solder resist layer, that the intermediate layer has a thickness in a range of 2.7 to 7.0 μm, and that the top plating layer has a hemispherical shape and is covering only an upper surface of the intermediate layer.
A printed wiring board includes a base insulating layer, a conductor layer formed on the base insulating layer and including conductor pads, a solder resist layer formed on the base insulating layer such that the solder resist layer is covering the conductor layer and having openings exposing the conductor pads, respectively, and plating bumps formed on the conductor pads such that each of the plating bumps includes a base plating layer formed in a respective one of the openings of the solder resist layer, and a top plating layer formed on the base plating layer. The plating bumps are formed such that the base plating layer has an upper surface and a side surface including a portion protruding from the solder resist layer and having a rough surface and that the top plating layer has a hemispherical shape and is covering only the upper surface of the base plating layer.
A wiring substrate includes an insulating layer, and a build-up part formed on the insulating layer and including an interlayer insulating layer and a conductor layer. The build-up part has a cavity penetrating through the build-up part such that the cavity is formed to accommodate an electronic component and has an inner wall and a bottom surface having a groove and that the groove is extending entirely in an outer edge part of the bottom surface and formed continuously from the inner wall surface of the cavity.
A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including first and second pads, a solder resist layer formed on the base layer, covering the conductor layer and having first opening exposing the first pad and second opening exposing the second pad, a first bump formed on the first pad and including a base plating layer and a top plating layer, and a second bump formed on the second conductor pad and including a base plating layer and a top plating layer. The second opening has diameter smaller than diameter of the first opening, the second bump has diameter smaller than diameter of the first bump, the first pad has a first recess formed on the first pad, the second pad has a second recess formed on the second pad, and the first recess is larger than the second recess.
A method for manufacturing a printed wiring board includes forming a seed layer on a surface of a resin insulating layer, applying a dry film onto the seed layer using a laminating roll device, cutting the dry film applied onto the seed layer to a predetermined size, applying pressure and heat to the dry film, forming a plating resist on the seed layer from the dry film using photographic technology, forming an electrolytic plating film on part of the seed layer exposed from the resist, removing the resist from the seed layer, and removing the part of the seed layer exposed from the electrolytic plating film. The applying of the pressure and heat includes applying the pressure and heat to the dry film applied onto the seed layer such that the pressure and heat are applied to the entire surface of the dry film cut to the predetermined size simultaneously.
H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
H05K 3/14 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material
A printed wiring board includes a first insulating layer, a conductor layer, and a second insulating layer. The conductor layer includes first and second circuits such that space is formed between the circuits, the first circuit has first and second side walls, the second circuit has third and fourth side walls such that the second wall faces the third wall, the first circuit has first, second and third portions, the second circuit has fourth, fifth and sixth portions such that the first and fourth portions, the second and fifth portions and the third and sixth portions face each other, the first circuit is formed such that the second wall of the second portion is recessed from the second wall of the first and third portions, and the first insulating layer has recess between the second and fifth portions such that the second insulating layer is filling the space and recess.
An electronic component built-in wiring board includes a substrate having a cavity, an electronic component accommodated in the cavity of the substrate and having pads on a surface of the component, a coating insulating layer formed on the substrate such that the insulating layer is covering the component and has via holes, via conductors formed in the via holes such that the via conductors are penetrating through the insulating layer, and a resin coating formed between the component and the insulating layer and having through holes such that the through holes are partially exposing the pads in the via holes and that the coating has adhesion to the component that is stronger than adhesion of the insulating layer to the component. The via conductors are formed in the via holes and the through holes such that the via conductors are connected to the pads on the surface of the component.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
A wiring substrate having no core substrate includes a build-up layer including insulating layers and conductor layers such that the insulating layers include first, second, third and fourth insulating layers and that the conductor layers include a first conductor layer formed on the first insulating layer and a second conductor layer formed on the second insulating layer. The build-up layer has a first surface having the first insulating and first conductor layers, a second surface having the second insulating and second conductor layers, the third insulating layer formed on the first insulating layer on the opposite side of the first conductor layer, and the fourth insulating layer formed on the second insulating layer on the opposite side of the second conductor layer, and the build-up layer is formed such that the first and second insulating layers contain no core material and the third and fourth insulating layer include core material.
A wiring substrate includes a first insulating layer, a first conductor layer, a second insulating layer, a second conductor layer, a connection conductor, and a coating film. The first conductor layer includes a conductor pad and a wiring pattern such that the conductor pad is formed in contact with the connection conductor and that the wiring pattern is covered by the coating film, the conductor pad has a surface facing the second insulating layer and having first surface roughness higher than surface roughness of a surface of the wiring pattern, and the coating film has opening exposing a portion of the surface of the conductor pad from the coating film and having area larger than area of interface between the conductor pad and the connection conductor and that the connection conductor is formed on the portion of the surface of the conductor pad and is separated from the coating film.
A wiring substrate includes a first insulating layer, a first conductor layer, a second insulating layer, a second conductor layer, a connection conductor penetrating through the second insulating layer and connecting the first and second conductor layers, and a coating film formed on a surface of the first conductor layer such that the coating film is adhering the first conductor layer and the second insulating layer. The first conductor layer includes a conductor pad and a wiring pattern such that the conductor pad is in contact with the connection conductor and the wiring pattern is covered by the coating film, the conductor pad of the first conductor layer has a surface facing the second insulating layer and having a first surface roughness higher than a surface roughness of a surface of the wiring pattern, and the coating film has opening such that the opening is exposing the conductor pad entirely.
H05K 1/09 - Use of materials for the metallic pattern
H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
H05K 3/26 - Cleaning or polishing of the conductive pattern
H05K 3/38 - Improvement of the adhesion between the insulating substrate and the metal
H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
H01L 23/60 - Protection against electrostatic charges or discharges, e.g. Faraday shields
A printed wiring board includes a first insulating layer, a conductor layer on the first insulating layer, and a second insulating layer formed on the first insulating layer and covering the conductor layer. The conductor layer includes first, second and third circuits, the first circuit has first width of 15 μm or less, the first and second circuits have second space between the first and second circuits such that the second space has second width of 14 μm or less, the first and third circuits have third space between the first and third circuits such that the third space has third width of 20 μm or more, and the first circuit has first lower and upper surfaces, and second and third side walls such that second angle between the second wall and the first lower surface is larger than third angle between the third wall and the first lower surface.
A printed wiring board includes a first resin insulating layer, a conductor layer on the first resin insulating layer, and a second resin insulating layer formed on the first resin insulating layer such that the second resin insulating layer is covering the conductor layer. The conductor layer includes a first circuit having a width of 15 μm or less and a rectangular cross-sectional shape, a second circuit having a trapezoidal cross-sectional shape, a third circuit, a fourth circuit, a fifth circuit, and a sixth circuit, a space between the first and third circuits has a width of 14 μm or less, a space between the first and fourth circuits has a width of 14 μm or less, a space between the second and fifth circuits has a width of 20 μm or more, and a space between the second and sixth circuits has a width of 20 μm or more.
A wiring substrate includes a core substrate, and a build-up part formed on the core substrate and including insulating layers and conductor layers. The conductor layers include one or more conductor layers each having a first wiring and a second wiring such that the second wiring has a conductor thickness smaller than a conductor thickness of the first wiring and that a minimum value of a line width of a wiring pattern of the second wiring is smaller than a minimum value of a line width of a wiring pattern of the first wiring.
H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
87.
AGENT FOR INCREASING A PLANT FUNCTIONAL COMPONENT CONTENT AND A METHOD FOR MANUFACTURING THE SAME
The objective of the invention is to provide an agent for increasing a plant functional component content, which is capable of increasing a content of the plant functional component by being adequately sprayed to the plant or injected into the soil without using stress cultivation conditions or plants with high content of functional component, and a method for manufacturing the same. An agent for increasing a plant functional component content comprising a fatty acid metabolite obtainable by a metabolism of a fatty acid with 4-30 carbon atoms by proteobacteria under a dissolved oxygen concentration of 0.1-8 mg/L, and a method for manufacturing an agent for increasing a plant functional component content comprising a fatty acid metabolite, comprising a step for a fatty acid metabolism wherein a fatty acid with 4-30 carbon atoms is subjected to a proteobacterial metabolization under a dissolved oxygen concentration of 0.1-8 mg/L.
A01G 7/06 - Treatment of growing trees or plants, e.g. for preventing decay of wood, for tingeing flowers or wood, for prolonging the life of plants
C05F 11/08 - Organic fertilisers containing added bacterial cultures, mycelia or the like
C12P 1/04 - Preparation of compounds or compositions, not provided for in groups , by using microorganisms or enzymes; General processes for the preparation of compounds or compositions by using microorganisms or enzymes by using bacteria
88.
HEAT-INSULATING SHEET FOR BATTERY PACK, AND BATTERY PACK
A heat-insulating sheet for a battery pack is interposed between battery cells of the battery pack in which the battery cells are connected in series or in parallel. The heat-insulating sheet for the battery pack contains a first particle made from a silica nanoparticle and a second particle made from a metal oxide. A content of the first particle is 60 mass % or more and 95 mass % or less relative to a total mass of the first particle and the second particle.
H01M 10/658 - Means for temperature control structurally associated with the cells by thermal insulation or shielding
H01M 10/6555 - Rods or plates arranged between the cells
H01M 10/651 - Means for temperature control structurally associated with the cells characterised by parameters specified by a numeric value or mathematical formula, e.g. ratios, sizes or concentrations
A printed wiring board includes a first resin insulating layer, a second resin insulating layer formed on a surface of the first layer, and a conductor layer formed on the surface of the first layer such that the second layer is covering the conductor layer and that the conductor layer includes first, second, third, fourth, fifth, and sixth circuits such that the third and fourth circuits are sandwiching the first circuit and that the fifth and sixth circuits are sandwiching the second circuit. Widths between the first and third circuits and between the first and fourth circuits are 5 μm to 14 μm, and when a width between the second and fifth circuits and a width between the second and sixth circuits is 20 μm or more, the upper surface of the first circuit, and the upper surface and side walls of the second circuit are formed to have unevenness.
A wiring substrate includes an insulating layer, a conductor layer formed on the insulating layer and including a conductor pad having a rectangular planar shape, and a solder resist layer formed on the insulating layer such that the solder resist layer is covering the conductor layer formed on the insulating layer. The solder resist layer has an opening formed such that the opening is exposing 50% or more of an area of a surface of the conductor pad on the opposite side with respect to the insulating layer and exposing a side surface and the surface of the conductor pad at side portions of a peripheral edge of the conductor pad and that the solder resist layer is covering the side surface and the surface of the conductor pad at one or more of corner portions of the peripheral edge of the conductor pad.
An inductor built-in substrate includes a core substrate having an opening and a first through hole, a first plating film formed in the first through hole of the core substrate, a magnetic resin body having a second through hole and including a magnetic resin filled in the opening of the core substrate, and a second plating film formed in the second through hole of the magnetic resin body such that the second plating film is formed in contact with the magnetic resin body.
A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including conductor pads, an underlayer formed on one of the conductor pads and including a metal different from a metal of the conductor layer, a solder resist layer formed on the base layer such that the solder resist layer is covering the conductor layer and has openings exposing the conductor pads, and a bump formed directly on a first conductor pad of the conductor pads and including a base plating layer formed in a first opening of the openings and a top plating layer formed on the base plating layer such that a metal of the base plating layer is same as the metal of the conductor layer. The conductor pads include a second conductor pad such that the second conductor pad is the one of the conductor pads having the underlayer.
H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
A wiring substrate includes a conductor pad, an insulating layer formed on the conductor pad such that the insulating layer is covering the conductor pad and has a through hole, a bump formed on the conductor pad such that the bump is formed in the through hole penetrating through the insulating layer. The conductor pad is formed such that the conductor pad has a connecting surface connected to the bump, a concave part formed on the connecting surface of the conductor pad to the bump, and a convex part formed in the concave part.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
A method of inspecting a printed wiring board includes preparing a printed wiring board having product and inspection regions such that the board has inner-layer lands in the regions, forming vias on the inner-layer lands in the regions, forming outer peripheral part(s) in the wiring board such that the outer peripheral part(s) expose outer peripheral portion(s) of the inner-layer land in the inspection region, determining a center coordinate of the inner-layer land in the inspection region based on a position of the outer peripheral part(s), determining a center coordinate of the via(s) in the inspection region based on a shape of the via(s) in the inspection region, determining a misalignment amount based on a distance between the center coordinate of the inner-layer land and the center coordinate of the via(s) in the inspection region, and determining alignment accuracy between the via and the inner-layer land based on the misalignment amount.
A coil substrate includes a flexible substrate having first and second ends, a first coil formed on first surface of the substrate such that the first coil has center space and first wiring surrounding the space, and an second coil formed on second surface of the substrate such that the second coil has center space and second wiring surrounding the space and is positioned directly below the first coil. Each of the first and second wirings has outer and inner ends such that each wiring is formed in spiral shape between the outer and inner ends, a number of turns in the first coil is greater than a number of turns in the second coil, a width of the first wiring is substantially constant from the outer end to the inner end, and a width of the second wiring is not constant from the outer end to the inner end.
A coil substrate includes a flexible substrate having a first end and a second end, and coils formed on the substrate such that the coils extend from the first end to the second end of the substrate. The coils are formed such that each coil includes a center space and a wiring formed around the center space, each coil is formed such that the wiring includes one or more first wirings, one or more second wirings facing the first wiring(s) via the center space, and one or more third wirings connecting the first and second wiring(s) and that the first wiring(s) is positioned closer to the first end than the second wiring(s), and the wiring in each coil is formed such that a width w1 of the first wiring(s), a width w2 of the second wiring(s), and a width w3 of the third wiring(s) are substantially equal to each other.
A method for manufacturing a multilayer wiring substrate includes forming a resist layer having mask pattern, forming a conductor layer having conductor pattern using the resist layer, removing the resist layer, forming an insulating layer on the conductor layer such that the insulating layer is laminated on the conductor layer, forming a subsequent resist layer having mask pattern such that the subsequent resist layer is formed on the insulating layer, and forming a subsequent conductor layer having conductor pattern using the subsequent resist layer. The forming of the resist layer includes conducting first correction in which formation position of entire mask pattern of the resist layer is corrected with respect to reference position, and conducting second correction in which shape of the mask pattern of the resist layer is corrected with respect to reference shape, and the forming of the subsequent resist layer does not include conducting the second correction.
H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
A coil substrate includes a first flexible substrate, a coil formed on the first flexible substrate, a second flexible substrate extending from the first flexible substrate, and a wiring that is formed on the second flexible substrate and is electrically connected to the coil formed on the first flexible substrate. The second flexible substrate includes a first portion extending from the first flexible substrate and a second portion extending from the first portion such that the second portion is formed along the first flexible substrate and that the second flexible substrate forms a gap between the second portion and the first flexible substrate.
A conduction inspection jig includes a first member having first openings, a second member having second openings and formed to be positioned above the first member, a third member formed to be positioned between the first member and the second member such that the third member forms a space between the first member and the second member and at least substantially surrounds the space, and a probe formed to pass through one of the first openings and one of the second openings such that the probe extends through the space formed between the first member and the second member.
G01R 31/27 - Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects due to surrounding elements
G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
G01R 1/20 - Modifications of basic electric elements for use in electric measuring instruments; Structural combinations of such elements with such instruments
A wiring substrate includes an insulating layer having a through hole, a first conductor layer formed on a first surface of the insulating layer, a second conductor layer formed on a second surface of the insulating layer, an interlayer connection conductor formed in the through hole such that the interlayer connection conductor is connecting the first and second conductor layers, and a resin body formed in the through hole of the insulating layer such that a volume occupancy rate of the resin body is in a range of 30% to 55% in the through hole. The interlayer connection conductor is formed such that the interlayer connection conductor has a length in a range of 1000 μm to 2000 μm in a thickness direction of the insulating layer and that a volume occupancy rate of the interlayer connection conductor is in a range of 45% to 70% in the through hole.
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