The present invention provides a semiconductor device with a vertical, the vertical element having drift region of a first conductivity type provided on a semiconductor substrate, a first injection portion provided below the drift region, and a second injection portion provided below the drift region and having a lower carrier injection efficiency than that of the first injection portion. The first injection portion is larger in area than the second injection portion on a back surface of the semiconductor substrate, and the vertical element has the first injection portion and the second injection portion provided alternately in a predetermined direction.
In the present invention, the pH of a fluid is estimated without using a pH gauge. Provided is a pH estimation system 10 for a silica-oversaturated fluid, said system comprising: a first flow path L1 which is branched from a pipe 20, through which a silica-containing fluid flows, and extracts a portion of the fluid; a first measurement part 1 which is connected to the first flow path via an open/close valve B2; a retention section L2 which is connected to the first flow path; a second flow path L3 which is connected to the retention section and returns the fluid to the pipe; a second measurement part 2 which is connected to the second flow path via an open/close valve B3; and a calculation device 3 which is electrically connected to the first measurement part and the second measurement part. The first measurement part and the second measurement part comprise a fluid temperature measurement device and a silica concentration measurement device; and the calculation device stores a silica concentration reduction rate, a silica saturation concentration, and a temperature-pH relational expression and calculates the pH of the fluid on the basis of measurement results obtained at the first measurement part and the second measurement part and the relational expression.
The present invention reduces uneven filling of encapsulant in a semiconductor module using a case with an integrated lid. A semiconductor module (2) includes: a case (210) covering a circuit board (4) mounted on a base (200), the case including sides (211) surrounding the perimeter of the circuit board and a lid (212) located above the circuit board; a plurality of conductor plates (6A-6D), each being electrically connected to a conductor pattern on the circuit board and extending out of the case through a slit (220) provided in the case; and encapsulants (701, 702) encapsulating the circuit board, wherein the case has partitions (214, 215) which are placed in the area enclosed by the lid, the sides, and the circuit board and which are placed between the plurality of conductor plates to insulate the plurality of conductor plates from one another, and the partitions have notched sections (216, 217) at positions that do not overlap with the plurality of conductor plates, thereby making the height of the portion that does not overlap with the plurality of conductor plates lower than the height of the portion that does overlap.
H01L 23/28 - Encapsulation, e.g. encapsulating layers, coatings
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
The objective of the present invention is to provide a shielded conductor with an improved insulation property and an opening/closing device using the same. An aspect of the present invention is a shielded conductor (5) serving for electric field relaxation, characterized in that the surface of the shielded conductor is covered with a resin (10) containing a nano-filler. In addition, an opening/closing device (1) according to an aspect of the present invention is characterized by comprising: a hermetic container (2); an insulating spacer (3) fixed inside the hermetic container; high-pressure conductors (4) disposed on both sides of the center of the insulating spacer; and the shielded conductors (5) attached to the high-pressure conductors on both sides and having a diameter greater than that of the high-pressure conductor, the surface of the shielded conductors being covered with the resin (10) containing the nano-filler.
The present invention disperses heating caused by an energizing current in a semiconductor device comprising a plurality of semiconductor elements positioned side by side in a row. This semiconductor device (1) comprises: a plurality of semiconductor elements (11) positioned side by side in a row; a first terminal (21) and second terminals (22); a first conductor (31) electrically connected to the first terminal (21) and the plurality of semiconductor elements (11); and a second conductor (32) electrically connected to the plurality of semiconductor elements (11) and the second terminals (22). The first terminal (21) is positioned on one side in the alignment direction of the plurality of semiconductor elements (11) with respect to the plurality of semiconductor elements (11), the first conductor (31), and the second conductor (32), and the second terminals (22) are positioned on the other side. The second conductor (32) has two divided pieces (32a) in which both sides, in the width direction that crosses the alignment direction and the thickness direction of the second conductor (32), extend in the alignment direction with respect to the plurality of semiconductor elements (11), and are each electrically connected to the plurality of semiconductor elements (11).
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
The present invention limits reduction of the cooling capacity. A cooling housing (40) includes, when viewed in a plan view: outside surfaces (40a, 40c) located on the long side; outside surfaces (40b, 40d) located on the short side; and an inlet (40h) that is formed in the outside surface (40b) near the outside surface (40c) and that is in communication with a flow path area (41) and through which a medium flows in longitudinally toward the flow path area (41). An inflow area (42) is formed in a flow path bottom surface (41e) near the inlet (40h). The inflow area (42) is concave and depressed lower than the flow path bottom surface (41e), and leads to the inlet (40h). The inflow area (42) includes a diffusion surface (42d) opposed to the inlet (40h).
H01L 23/473 - Arrangements for cooling, heating, ventilating or temperature compensation involving the transfer of heat by flowing fluids by flowing liquids
According to the present invention, a front surface side of a semiconductor substrate (30) is provided with a source trench structure that comprises a gate trench (7), in which a gate electrode (9) is buried, and a source trench (11), in which a source electrode (13) is buried. A p-type base region (3) extends along the inner wall of the source trench (11) between the source trench (11) and an n- type drift region (2); and the bottom surface of the source trench (11) is surrounded by the p-type base region (3). An n-type current diffusion region (16) is provided so as to face the lower surface of a p-type base deep portion (4) of the p-type base region (3) in the depth direction (Z), the p-type base deep portion (4) extending along the bottom surface of the source trench (11). The n-type current diffusion region (16) has a function of lowering the breakdown voltage by making avalanche breakdown likely to occur in the vicinity of the bottom surface of the source trench (11) when an SiC-MOSFET is in an off state. Consequently, the present invention is capable of reducing the on-resistance.
The present invention suppresses the occurrence of a deviated flow distribution in a cooler and the increase in pressure loss. A cooler (10) comprises, inside a container (14): a first flow path (14e) disposed parallel with a first side wall (14a) and communicating with an introduction port (11); a second flow path (14f) disposed parallel with a second side wall (14b) and communicating with a discharge port (12); a third flow path (14g) communicating with the first flow path (14e) and the second flow path (14f); a first flow rate adjustment unit (15) disposed between the first flow path (14e) and the third flow path (14g); and a second flow rate adjustment unit (16) disposed between the second flow path (14f) and the third flow path (14g). The first flow rate adjustment unit (15) includes a first region (15a) having a first opening ratio and a second region (15b) having a second opening ratio smaller than the first opening ratio. The second flow rate adjustment unit (16) includes a third region (16a) having a third opening ratio and a fourth region (16b) having a fourth opening ratio greater than the third opening ratio.
H01L 23/473 - Arrangements for cooling, heating, ventilating or temperature compensation involving the transfer of heat by flowing fluids by flowing liquids
F28F 3/00 - Plate-like or laminated elements; Assemblies of plate-like or laminated elements
F28F 9/22 - Arrangements for directing heat-exchange media into successive compartments, e.g. arrangements of guide plates
H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
A unit cell (16) is a section between the centers of adjacent source trenches (11), includes two or more gate trenches (7) and one source trench (11), and has four or more channels formed therein. The two or more gate trenches (7) and the one source trench (11) are arranged repeating in an alternating manner in a direction parallel to the obverse surface of a semiconductor substrate (30). The total number of gate trenches (7) is greater than the total number of source trenches (11). The total area of the gate trenches (7) is greater than the total area of the source trenches (11). The width (w1) of the gate trenches (7) is equal to or less than the width (w2) of the source trenches (11). The depth (d2) of the source trenches (11) is equal to or greater than the depth (d1) of the gate trenches (7). A p-type base depth portion (4) of the bottom surfaces of the source trenches (11) relaxes an electric field in the vicinity of the bottom surfaces of the gate trenches (7). As a result, it is possible to reduce on-resistance.
Provided are a semiconductor module and a method for manufacturing the semiconductor module that make it possible to prevent voids from occurring by means of a joining layer formed of solder. The semiconductor module comprises a laminated substrate (5) on which is mounted a semiconductor element (1) that has a Ni film formed on a rear surface thereof, the rear surface of the semiconductor element (1) being joined to the laminated substrate (5) by solder that has a composition that includes more than 6 mass% but no more than 8.5 mass% of Sb, 2–4.5 mass% of Ag, 1.25–2.0 mass% of Cu, and a remainder made up of Sn and inevitable impurities.
H01L 21/52 - Mounting semiconductor bodies in containers
B23K 35/26 - Selection of soldering or welding materials proper with the principal constituent melting at less than 400°C
C22C 13/02 - Alloys based on tin with antimony or bismuth as the next major constituent
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
Provided is a method for manufacturing a semiconductor device, the method comprising: a step for forming an interlayer insulating film having a contact hole above a semiconductor substrate; a step for forming an initial metal film containing a predetermined first metal on the upper surface of the semiconductor substrate and on the side wall of the interlayer insulating film; a step for forming a first alloy layer containing the first metal on the upper surface of the semiconductor substrate; a step for forming a first barrier metal part containing the first metal on the side wall of the interlayer insulating film; a step for etching at least one of the initial metal film and the first barrier metal part; a step for forming an oxide layer on the upper surface of the first alloy layer; a step for etching the oxide layer; a step for forming a second barrier metal part, which is conductive, above the first alloy layer; and a step for forming a plug layer above the second barrier metal part.
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
The present invention inhibits misalignment of a center position of a hole that is detected by a binarization process based on an image of a flange portion of a sleeve. A sleeve (30A) comprises: a cylindrical portion (32) that is mounted to an electrically conductive layer of an insulated circuit board of a semiconductor device, and has a hole (31); and a flange portion (33) that is provided at an open end thereof. The flange portion (33) has a plurality of protrusions (34) that extend from a first outer edge portion (36a) of an inner surface (36) of the hole (31) to an outer circumference (33a) as seen in a plan view from the open end side of the flange portion (32), and a plurality of recesses (35) that are provided between the protrusions and extend from a second outer edge portion (36b) of the inner surface (36) to the outer circumference (33a). Each protrusion (34) has a top surface (34a) that is continuous with the inner surface (36) at the first outer edge portion (36a), and each recess (35) has a bottom surface (35a) that is continuous with the inner surface (36) at the second outer edge portion (36b).
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/12 - Mountings, e.g. non-detachable insulating substrates
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H01R 9/16 - Fastening of connecting parts to base or case; Insulating connecting parts from base or case
13.
SEMICONDUCTOR DEVICE AND PRODUCTION METHOD FOR SEMICONDUCTOR DEVICE
The present invention suppresses unnecessary stress on the members that constitute a device. A semiconductor device (10) comprises a base plate (2), a semiconductor element (1), protection members (pr1a, pr1b, pr2a, pr2b), and a cooling body (3). The base plate (2) includes a silicon carbide molded body (2a) and metal filling bodies (2b1, 2b2), and through holes are provided in the metal filling bodies (2b1, 2b2). The semiconductor element (1) is mounted on an upper surface of the silicon carbide molded body (2a) with an insulating substrate (12) therebetween. The protection members (pr1a, pr1b, pr2a, pr2b) are formed on the surface of the metal filling bodies (2b1, 2b2) and have a lower hardness than the silicon carbide molded body (2a). The cooling body (3) is adhered to a bottom surface side of the base plate (2) and is fastened to the base plate (2) by screws (sc1, sc2) that have been passed through the through holes.
Provided is a semiconductor device comprising: a semiconductor substrate; an interlayer insulation film that has a contact hole and is provided above the semiconductor substrate; a first alloy layer that is provided below the contact hole and on the upper surface of the semiconductor substrate; an oxide layer that is provided in the contact hole and on the upper surface of the first alloy layer; a conductive barrier metal layer that is provided in the contact hole and above the oxide layer; and a plug layer that is provided in the contact hole and above the barrier metal layer.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
The present invention minimizes damage to an insulating sheet when welding terminals of a semiconductor module. A semiconductor module (10A) comprises an insulating sheet (14), a first terminal (13), and a second terminal (15) that extend outward from a resin case (11). The first terminal (13) has a first end (13a) that is disposed on a first surface (14a) side so as to overlap with the insulating sheet (14) in plan view, and is distanced from the first surface (14a). The second terminal (15) has a second end (15a) that is disposed on a second surface (14b) side so as to overlap with the insulating sheet (14) and the first terminal (13) in plan view, and is distanced from the second surface (14b). The insulating sheet (14) extends farther outward from the resin case (11) in comparison to the first end (13a) and the second end (15a). Welding is performed on the first end (13a) and the second end (15a) that are distanced from the insulating sheet (14), thereby minimizing damage to the insulating sheet (14) during welding.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
The present invention relax stress concentration in a ceramic circuit board, thereby preventing the ceramic circuit board from the occurrence of a crack. A semiconductor device (10) according to the present invention comprises: a ceramic circuit board (11); and terminals (12, 12-1) and a semiconductor chip (18), which are bonded to the front surface of the ceramic circuit board (11). The ceramic circuit board (11) comprises an insulating plate (11a), conductive plates (11b, 11b-1) and a metal plate (11c). The insulating plate (11a) is mounted on a surface of a base plate (15). The conductive plates (11b, 11b-1) are mounted on the insulating plate (11a); and the terminal (12), which is provided on a case (17), is bonded onto the conductive plate (11b) by the intermediary of a bonding material (13). A bonding material leaking/spreading inhibition structure (1) for inhibiting leaking and spreading of a melted bonding material (13) is provided in the vicinity of an edge (eg1) of the conductive plate (11b).
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
Provided is a semiconductor device manufacturing method capable of suppressing variance in characteristics attributable to the concentration of carbon in a semiconductor substrate. This semiconductor device manufacturing method: includes a process in which trenches (11) are formed from an upper surface side of a first-conductivity-type semiconductor substrate (10), a process in which an insulated-gate-type electrode structure (6, 7) is embedded in the trenches (11), a process in which second-conductivity-type base regions (3) in contact with the trenches (11) are formed in an upper part of the semiconductor substrate (10), a process in which first-conductivity-type first main electrode regions (4) in contact with the trenches (11) are formed on top of the base regions (3), and a process in which a second-conductivity-type second main electrode region (9) is formed on a lower surface side of the semiconductor substrate (10); and adjusts manufacturing conditions of the base regions (3) and/or the second main electrode region (9) according to the concentration of carbon in the semiconductor substrate (10).
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
This semiconductor device comprises: a semiconductor package; a cooler for cooling the semiconductor package; a sealing member that is provided interposed between the semiconductor package and the cooler, the sealing member having an opening that penetrates between the semiconductor package and the cooler; and a heat conduction member that is constituted by a metal that has fluidity, said metal being filled into the opening.
H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
H01L 23/40 - Mountings or securing means for detachable cooling or heating arrangements
H01L 23/473 - Arrangements for cooling, heating, ventilating or temperature compensation involving the transfer of heat by flowing fluids by flowing liquids
H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
This semiconductor module comprises: an insulating substrate; a conductive pattern; a transistor; a negative-side power supply terminal which is positioned in a first direction with respect to the transistor; and an auxiliary wire joined to the conductive pattern. The transistor includes an emitter electrode and a gate electrode which is positioned in the first direction with respect to the emitter electrode. In the conductive pattern, electric current flows from a specific point via the transistor to the negative-side power supply terminal. The emitter electrode includes a first portion and a second portion which is positioned in a second direction opposite to the first direction with respect to the first portion. The auxiliary wire includes a first end close to the specific point, and a second end close to the transistor. The second end is closer to the second portion than to the first portion.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H01L 23/12 - Mountings, e.g. non-detachable insulating substrates
Provided is a semiconductor device comprising: a semiconductor substrate provided with a drift region of a first conductivity type; an emitter region of a first conductivity type provided in contact with the upper surface of the semiconductor substrate and having a doping concentration higher than the drift region; a base region of a second conductivity type provided in contact with the emitter region; a collector region of a second conductivity type provided between the drift region and the lower surface of the semiconductor substrate; and a floating region of a first conductivity type provided in contact with the upper surface of the collector region and having a doping concentration higher than the collector region. The collector region has a first region not covered with the floating region and a second region covered with the floating region.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/41 - Electrodes characterised by their shape, relative sizes or dispositions
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
Provided is a water quality analyzing device for measuring the concentration of a substance to be measured, contained in sample water, the water quality analyzing device comprising: a flow cell which comprises a wall portion through which light is transmitted, and an internal space enclosed by the wall portion, wherein the sample water passes through the internal space; a light source for emitting light toward the flow cell; a light source monitor for detecting a light source light intensity, which is a light intensity of the light emitted by the light source; a transmitted light detecting unit for detecting a transmitted light intensity, which is the light intensity of transmitted light that has been transmitted through the flow cell; and a dirt detecting unit for detecting dirt on the wall portion of the flow cell on the basis of the light source intensity and the transmitted light intensity.
The purpose of the present invention is to suppress the occurrence of wire breakage. A wiring portion (63) includes a vertical portion (64), a parallel portion (65), and an inclined portion (66). A lower end portion of the vertical portion (64) is connected to a chip bonding portion (61), and an upper end portion of the vertical portion (64) rises vertically upward relative to the chip bonding portion (61). The parallel portion (65) is connected to the upper end portion of the vertical portion (64) and is formed parallel with wiring boards (43b, 43d) and a semiconductor chip (50c) from said upper end portion. The inclined portion (66) is inclined from the parallel portion (65) toward a wiring bonding portion (62). Even when a wire (71b) is bonded to an obverse surface of the parallel portion (65) of the wiring portion (63) included in such a lead frame (60), the occurrence of deformation of the parallel portion (65) toward an insulated-circuit-board (40) side is suppressed.
H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
The present invention provides a semiconductor device that is provided with: a semiconductor substrate which has an upper surface, a lower surface and a drift region of a first conductivity type; and a buffer region of the first conductivity type, the buffer region being provided between the drift region and the lower surface of the semiconductor substrate, while having a higher doping concentration than the drift region. With respect to this semiconductor device, the buffer region has a first recombination center density peak and a second recombination center density peak which is positioned closer to the upper surface of the semiconductor substrate than the first recombination center density peak; and the integral value of the second recombination center density peak in the depth direction is larger than the integral value of the first recombination center density peak in the depth direction.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
The present invention realizes a high-performance semiconductor device. A semiconductor device (1A) comprises: a group of semiconductor elements (30A) having collector electrodes (31) and emitter electrodes (32); a conductive plate (22) electrically connected to the collector electrodes (31); and a case (10) for containing these members. The semiconductor device (1A) further comprises an OUT terminal (40) that is disposed inside and outside the case (10) and that is provided with an extension part (42) having: a stem part (42a) that extends inward from one edge (11a) side of the case (10); and a pair of branch parts (42b, 42c) that branch from the stem part (42a) in a plan view and are electrically connected to the emitter electrodes (32). The semiconductor device (1A) still further comprises a P terminal (50) that is disposed inside and outside the case (10), that includes an extension part (52) sandwiched between the pair of branch parts (42b, 42c), and that is electrically connected to the conductive plate (22). In the semiconductor device (1A), it is possible to realize inductance reduction, overheat suppression during operation, and the like.
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
Provided is a semiconductor device which is equipped with: a semiconductor substrate which has a top surface and a bottom surface and is provided with a drift region of a first conductive type; a transistor section which has a collector region of a second conductive type which contacts the bottom surface of the semiconductor substrate and an emitter region of the first conductive type which has a higher doping concentration than does the drift region and is provided adjacent to the top surface of the semiconductor substrate; and a diode section which has a cathode region of the first conductive type which contacts the bottom surface of the semiconductor substrate. Therein, the avalanche breakdown in the diode section is at least 0.7 times and less than 1 time the avalanche breakdown in the transistor section.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
A control device according to one aspect is a control device that outputs an operation amount for a control target and makes a control amount of the control target follow a target value, the control device including: a target deviation calculation unit configured to calculate a target deviation, which is a difference between the target value and a current control amount; a forgetting expected time series storage unit configured to store forgetting expected time series in which an expected value of a past control amount based on a plant response function, which is a function representing a plant response model of the control target is asymptotically forgotten; a corrected target deviation calculation unit configured to calculate, on the basis of the forgetting expected time series, a corrected target deviation from an expected value of the control amount after elapse of a predetermined read-ahead length and the target deviation; an operation change amount calculation unit configured to calculate a change amount of the operation amount on the basis of the corrected target deviation and a predetermined control gain; and an operation amount calculation unit configured to calculate a new operation amount by adding a change amount of the operation amount to the operation amount.
G05B 13/04 - Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric involving the use of models or simulators
27.
SEMICONDUCTOR DEVICE AND OVERCURRENT PROTECTION DEVICE
he present invention suppresses oscillation in a sense current detection signal outputted from a power semiconductor element for current monitoring. A voltage control circuit (1c) includes a diode (D1) for charging a gate voltage to be applied to the gate of a current monitoring element (1b) and a diode (D2) for discharging the gate voltage, and controls the gate voltage for the current monitoring element (1b). The collector of an output element (1a) and the collector of the current monitoring element (1b) are connected to a supply voltage via a terminal (C). The emitter of the output element (1a) is connected to a load (2) via a terminal (E). The sense emitter of the current monitoring element (1b) is connected to a terminal (SE). The anode of the diode (D1) is connected to the gate of the output element (1a) and the cathode of the diode (D2). The cathode of the diode (D1) is connected to the anode of the diode (D2) and the gate of the current monitoring element (1b).
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
H03K 17/00 - Electronic switching or gating, i.e. not by contact-making and -breaking
H03K 17/08 - Modifications for protecting switching circuit against overcurrent or overvoltage
Provided is a gas analyzer for measuring the concentration of a measurement target component that is included in a sample gas, the gas analyzer comprising: a light source part from which light including an absorption wavelength of the measurement target component is emitted; a cell in which at least one reflection mirror for reflecting the light is accommodated in a space where the sample gas is sealed; a light-receiving element for acquiring a radiation spectrum of the light having passed through the cell; a notch filter which is provided to one of light paths from the light source part to the light-receiving element and which has a restricted band where the intensity of one of the peaks in the radiation spectrum of the light emitted from the light source part is reduced; and a processing part for processing a reception light signal of the light-receiving element and for measuring the concentration of the measurement target component.
G01N 21/33 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using ultraviolet light
Provided is a gas analyzer that measures the concentration of a measured component contained in a sample gas. The gas analyzer according to the present invention comprises: a light source unit that emits light having an absorption wavelength for the measured component; a collimating unit that converts the light into collimated light; a cell that accommodates, in a space where the sample gas is sealed, one or more reflecting mirrors that reflect the light; a light-receiving element that acquires an emission spectrum of the light that has passed through the cell; and a processing unit that processes a light-receiving signal of the light-receiving element and measures the concentration of the measured component. The one or more reflecting mirrors include a first reflecting mirror that initially reflects the collimated light. The first reflected mirror includes a recessed surface portion that reflects the collimated light, and the width of the recessed surface portion is smaller than the width of the collimated light.
G01N 21/33 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using ultraviolet light
30.
SEMICONDUCTOR DEVICE AND OVERCURRENT PROTECTION DEVICE
The present invention suppresses oscillation occurring in a detection signal of a sense electric current outputted from a semiconductor element for electric current monitoring. Collectors of a main IGBT (1a) and a sense IGBT (1b) are connected to an electric power supply voltage via a terminal (C). An emitter of the main IGBT (1a) is connected to a load (2) via a terminal (E). A sense emitter of the sense IGBT (1b) is connected to a terminal (SE). A gate of the main IGBT (1a) is connected to one end of a capacitance (C0) and a terminal (G), and the other end of the capacitance (C0) is connected to a gate of the sense IGBT (1b). When a turn-on instruction for the main IGBT (1a) by a driving signal (s0) has been issued, the sense IGBT (1b) allows a sense electric current, which is proportional to the electric current flowing through the main IGBT (1a), to flow from the collector to the sense emitter.
H03K 17/00 - Electronic switching or gating, i.e. not by contact-making and -breaking
H03K 17/08 - Modifications for protecting switching circuit against overcurrent or overvoltage
H03K 17/082 - Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
H03K 17/16 - Modifications for eliminating interference voltages or currents
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
31.
SEMICONDUCTOR DEVICE AND OVERCURRENT PROTECTION DEVICE
In the present invention, the gates of a load actuation power semiconductor element and a current monitor power semiconductor element are charged at an appropriate voltage. A collector of a main IGBT (1a) and a sense IGBT (1b) is connected to a power supply voltage through a terminal (C). An emitter of the main IGBT (1a) is connected to a load (3) through a terminal (E). A voltage divider circuit (1c) is connected between the gate of the main IGBT (1a) and the sense emitter of the sense IGBT (1b), divides the voltage of a drive signal (s0) applied to the gate of the main IGBT (1a), and applies the same to the gate of the sense IGBT (1b). The gate of the main IGBT (1a) is connected to a terminal (G) and one end of a resistor (Rdiv1). The other end of the resistor (Rdiv1) is connected to the gate of the sense IGBT(1b) and one end of a resistor (Rdiv2). The other end of the resistor (Rdiv2) is connected to the sense emitter of the sense IGBT (1b) and a terminal (SE).
The purpose of the present invention is to provide a method for selecting a chemical agent for scale removal use which is suitable for scales and a base material. Provided is a method for selecting a chemical agent for scale removal use, the method comprising: a step for obtaining a coordinate A of an inherent physical value based on a Hansen solubility parameter for the whole of a target scale; a step for obtaining a coordinate B of an inherent physical value based on a Hansen solubility parameter for a base material-side surface of the target scale; a step for obtaining a coordinate C of an inherent physical value based on a Hansen solubility parameter for a target base material; a step for selecting a penetrating agent having a coordinate D of an inherent physical value based on a Hansen solubility parameter, on the basis of an interaction radius Ra of the target scale which is centered on the coordinate A; a step for selecting a peeling agent having a coordinate E of an inherent physical value based on a Hansen solubility parameter, on the basis of the positional relationship between the coordinate B and the coordinate C; and a step for selecting an inducing agent having a coordinate F of an inherent physical value based on a Hansen solubility parameter, on the basis of the positional relationship between the coordinate D and the coordinate E.
C02F 5/00 - Softening water; Preventing scale; Adding scale preventatives or scale removers to water, e.g. adding sequestering agents
C02F 5/08 - Treatment of water with complexing chemicals or other solubilising agents for softening, scale prevention or scale removal, e.g. adding sequestering agents
F01D 25/00 - Component parts, details, or accessories, not provided for in, or of interest apart from, other groups
F03G 4/00 - Devices for producing mechanical power from geothermal energy
The present invention stabilizes the disposition orientation of a metal wiring board. A metal wiring board (7) comprises: a first joining section (70) which is rectangular in plan view and is joined to the top surface of a main electrode in a semiconductor element; a second joining section (71) which is rectangular in plan view and is joined to the top surface of a prescribed circuit board; and a linking section (72) which links the first joining section (70) and the second joining section (71). One side of the first joining section and one side of the second joining section are disposed so as to face each other, and one end of the linking section is connected to the middle in the width-direction of the one side of the first joining section.
H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
The present invention reduces inductance by shortening a wiring path. A semiconductor module (1) comprises: a first circuit board (52) to which one end of a P terminal is electrically connected; a second circuit board (53) to which one end of an M terminal is electrically connected; a third circuit board (54) to which one end of an N terminal is electrically connected; a first semiconductor element (6a) disposed on the upper surface of the first circuit board; a second semiconductor element (6b) disposed on the upper surface of the second circuit board; a first metal wiring board (7) that connects the first semiconductor element to the second circuit board; and a second metal wiring board (9) that connects the second semiconductor element (6b) to the third circuit board. The first metal wiring board is equipped with: a first joint portion that is rectangular in plan view and is joined to the upper surface of a main electrode on the upper side of the first semiconductor element; a second joint portion that is rectangular in plan view and is joined to the upper surface of the second circuit board; and a first coupling portion that couples the first joint portion and the second joint portion. The first joint portion and the second joint portion are arranged so that one side of the first joint portion and one side of the second joint portion face each other in plan view. The first coupling portion couples the side of the first joint portion and the side of the second joint portion which face each other. The second metal wiring board is equipped with: a third joint portion that is rectangular in plan view and is joined to the upper surface of a main electrode on the upper side of the second semiconductor element; a fourth joint portion that is rectangular in plan view and is joined to the upper surface of the third circuit board; and a second coupling portion that couples the third joint portion and the fourth joint portion. The third joint portion and the fourth joint portion are arranged so that one side of the third joint portion and one side of the fourth joint portion face each other in plan view. The second coupling portion couples the side of the third joint portion and the side of the fourth joint portion which face each other.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
This beverage supply device comprises an extractor 30, which introduces ground coffee beans and hot water into a cylinder 341 and extracts coffee, the device supplying the coffee extracted from the extractor 30 to a cup C, wherein the extractor 30 is provided with a cylindrical passage constituting member 35, which is disposed in a mode in which the inside of the extractor communicates with an upper surface opening of the cylinder 341, thereby constituting a passage 351 through which ground coffee beans and hot water pass, and which is elastically deformed by an external force and can thereby close the passage 351.
A47J 31/42 - Beverage-making apparatus with incorporated grinding or roasting means for coffee
A47J 31/36 - Coffee-making apparatus in which hot water is passed through the filter under pressure with hot water under liquid pressure with mechanical pressure-producing means
G07F 13/06 - Coin-freed apparatus for controlling dispensing of fluids, semiliquids or granular material from reservoirs with selective dispensing of different fluids or materials or mixtures thereof
36.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
Provided is a semiconductor device comprising: a first conductive drift region provided in a semiconductor substrate having a front surface and a back surface; and a first conductive buffer region provided closer to the back surface of the semiconductor substrate than the drift region in the depth direction of the semiconductor substrate, wherein the buffer region has a concentration peak group including one or more concentration peaks of doping concentration, the concentration peak group includes a first concentration peak provided closest to the back surface of the semiconductor substrate among the one or more concentration peaks in the depth direction of the semiconductor substrate, and the semiconductor substrate includes a first hydrogen peak, which is the atomic density peak of hydrogen, provided at the same depth as the depth position of the first concentration peak, or closer to the back surface of the semiconductor substrate than the depth position of the first concentration peak in the depth direction of the semiconductor substrate.
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
Provided is a semiconductor device that comprises: a base region of a second conductivity type that is disposed between a drift region and an upper surface of a semiconductor substrate; a first lifetime region that is disposed in a drift region further on a lower-surface side of the semiconductor substrate than the base region; and a second lifetime region that is disposed so as to be sandwiched by the first lifetime region in a first direction that is parallel to the upper surface of the semiconductor substrate and has a longer carrier lifetime than the first lifetime region. The width of the second lifetime region in the first direction is at least 0.2 times the thickness of the first lifetime region in a second direction that is perpendicular to the upper surface of the semiconductor substrate.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
C02F 5/00 - Softening water; Preventing scale; Adding scale preventatives or scale removers to water, e.g. adding sequestering agents
C02F 5/08 - Treatment of water with complexing chemicals or other solubilising agents for softening, scale prevention or scale removal, e.g. adding sequestering agents
C02F 5/10 - Treatment of water with complexing chemicals or other solubilising agents for softening, scale prevention or scale removal, e.g. adding sequestering agents using organic substances
39.
SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY (Japan)
Inventor
Tawara, Takeshi
Harada, Shinsuke
Kato, Masashi
Fukui, Takuya
Abstract
This silicon carbide semiconductor substrate comprises: a first-conductive type silicon carbide semiconductor substrate (1); a first-conductive type first semiconductor layer (2) having an impurity concentration lower than that of the silicon carbide semiconductor substrate (1); a second-conductive type second semiconductor layer (3); a first-conductive type first semiconductor region (7); a trench (16); a first base region (4); a second-conductive type second base region (5); and co-doped regions (26, 26') doped with aluminum and nitrogen, as a region of the first semiconductor layer (2) between first base region (4) and the second base region (5), and a region of the first semiconductor layer (2) closer to the silicon carbide semiconductor substrate (1) than the first base region (4) and the second base region (5). The carrier lifetime of the co-doped regions (26, 26') is 0.01 μs or less.
Provided is a semiconductor device comprising: a first conductivity type drift region provided on a semiconductor substrate having a front surface and a reverse surface; and a first conductivity type or second conductivity type reverse-surface-side region that is provided further to the reverse surface side of the semiconductor substrate than the drift region in the semiconductor substrate and has a higher atomic density than the drift region. The distribution of the atomic density in the rear-surface-side region includes: a gentle gradient region in which the atomic density of a dopant increases from the reverse surface side toward the front surface side of the semiconductor substrate in the depth direction of the semiconductor substrate; a steep gradient region that is provided further to the front surface side than the gentle gradient region and in which the atomic density of the dopant increases by a greater gradient of the atomic density than in the gentle gradient region; a peak region that is provided further to the front surface side than the steep gradient region and includes a peak in the distribution of the atomic density of the dopant; and a decreasing region that is provided between the peak region and the drift region and in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
The present invention provides a simplified configuration at a lower cost, and makes assembly work and installation work easier. A semiconductor module (1) is provided with: a metal base plate (11) having an upper surface on which a semiconductor unit (2) including a semiconductor element (6) is mounted; and a case (3) that is bonded to the upper surface of the metal base plate and surrounds the semiconductor unit. The case comprises: a projecting part (34) protruding toward the metal base plate; and a through hole (35) formed so as to at least partially overlap the projecting part in plan view. The metal base plate comprises a through hole (11b) with which the projecting part can be engaged.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/28 - Encapsulation, e.g. encapsulating layers, coatings
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
42.
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
According to the present invention, a p-type impurity concentration profile (41) in the depth direction of a p-type base region is controlled by means of ion implantation into the p-type base region in two or more stages. The ion implantation into the p-type base region in two or more stages are performed at different accelerating voltages, while setting the dose amount such that the higher the accelerating voltage is, the lower the dose amount is. With respect to the p-type impurity concentration profile (41) in the depth direction of the p-type base region, the impurity concentration asymmetrically decreases from a depth position (D1), at which the impurity concentration is highest, toward the n+type source region side and toward the n+type drain region side. With respect to the p-type impurity concentration profile (41), the impurity concentration decreases in stages at one or more different depth positions on the n+ type drain region side from the depth position (D1). Consequently, the present invention is able to ameliorate the trade-off relationship between increase of a gate threshold voltage and decrease of an on-resistance.
Provided is a semiconductor device in which doping concentration peaks in a buffer region each have an apex at which the doping concentration shows a maximum, a lower tail in which the doping concentration monotonously decreases from the apex toward a lower surface, and an upper tail in which the doping concentration monotonously decreases from the apex toward an upper surface. At least one of the doping concentration peaks in the buffer region is a gradual concentration peak of which a slope ratio calculated by dividing the absolute value of the slope of the upper tail by the absolute value of the slope of the lower tail is 0.1 to 3 inclusive.
Provided is a semiconductor device comprising a semiconductor substrate provided with a drift region of a first conductivity type. The semiconductor substrate has an active part and trench portions provided in the active part in the upper surface of the semiconductor substrate. The active part includes a first region in which trench portions are arrayed at a first trench interval in the array direction and a second region in which trench portions are arrayed at a second trench interval larger than the first trench interval in the array direction. The first region has a second-conductivity type first bottom region extending over the bottoms of at least two of the trench portions, and the second region has a second-conductivity type second bottom region provided at the bottom of one of the trench portions.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
A semiconductor device (100) comprises: a plurality of trenches that are provided farther below a base region (14) from an upper surface of a semiconductor substrate (10), the trenches including a gate trench (G) and a dummy trench (E); a first lower end region (202) of a second conductivity type that is provided in contact with the lower ends of at least two trenches including a gate trench; a well region (11) of the second conductivity type that is disposed at a position different from the first lower end region in top view, that is provided farther below the base region from the top surface of the semiconductor substrate, and that has a higher doping concentration than the base region; and a second lower end region (205) of the second conductivity type that is provided between the first lower end region and the well region so as to be separated from the first lower end region and the well region in top view, and that is provided in contact with the lower end of at least one trench including a gate trench.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
Provided is a semiconductor device (100) comprising: a plurality of trench portions which are provided from an upper surface of a semiconductor substrate (10) to below a base region (14), and include a gate trench portion (G) and a dummy trench portion (E); a first lower end region (202) of a second conductivity type provided in contact with the lower end of two or more trench portions including the gate trench portion; a well region (11) of the second conductivity type which is disposed in a position different from the first lower end region in a top view, provided from the upper surface of the semiconductor substrate to below the base region, and has a higher doping concentration than the base region; and a second lower end region (205) of a second conductivity type which is provided between the first lower end region and the well region in the top view, is separated from the first lower end region and the well region, and is in contact with the lower end of one or more trench portions including the gate trench portion.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
This uninterruptible power supply device comprises uninterruptible power supply modules each with a power converter housing for accommodating a power converter. The uninterruptible power supply device further comprises a busbar member that is provided outside of the power converter housings of the uninterruptible power supply modules and used for inputting/outputting power to/from the uninterruptible power supply modules. The uninterruptible power supply device further comprises, between the uninterruptible power supply modules and the busbar member, module circuit breakers that electrically disconnect the uninterruptible power supply modules from the busbar member. The uninterruptible power supply device further comprises a bypass circuit unit, which has a switching circuit that switches between conduction and non-conduction, and which supplies AC power from an AC power supply for bypassing to a load without intermediation by the uninterruptible power supply modules.
H02J 9/06 - Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over
This semiconductor device comprises: a gate trench part provided on a semiconductor substrate; a first trench part provided on the semiconductor substrate and located adjacent to the gate trench part; an emitter region of a first electric conductivity type provided in contact with the gate trench part in a mesa part between the gate trench part and the first trench part; a contact region of a second electric conductivity type provided in contact with the first trench part in the mesa part; a metal layer provided over the semiconductor substrate; and a resistor of the first electric conductivity type provided in contact with the metal layer and the emitter region, said resistor having a lower doping concentration than that of the emitter region.
Provided is a semiconductor device provided with a gate trench portion, and a first trench portion adjacent to the gate trench portion, the semiconductor device comprising: a first conductive-type drift region provided in a semiconductor substrate; a second conductive-type base region provided above the drift region; a first conductive-type emitter region provided above the base region and having a higher doping concentration than the drift region; and a second conductive-type contact region provided above the base region and having a higher doping concentration than the base region. The contact region may have a first contact portion and a second contact portion provided extending from the first trench portion to below the lower end of the emitter region in a mesa portion between the gate trench portion and the first trench portion. The first contact portion may be provided extending from the first trench portion rather than the second contact portion in a trench arrangement direction.
Provided is a semiconductor module comprising: a first switching element provided on one of an upper arm and a lower arm; a second switching element provided on the other of the upper arm and the lower arm; a first diode element provided in parallel with the first switching element; a second diode element provided in parallel with the second switching element; a stacked substrate having two sides extending in a first direction and a second direction and of which the main surface is predetermined; and a gate external terminal and an auxiliary source external terminal provided on a negative side in the first direction relative to the upper arm and the lower arm and arranged in the second direction, wherein the first switching element, the second switching element, the first diode element, and the second diode element are provided on the stacked substrate, and at least one of the first switching element or the first diode element is provided facing at least one of the second switching element or the second diode element in the second direction.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
51.
SEMICONDUCTOR MODULE, SEMICONDUCTOR DEVICE, AND VEHICLE
A semiconductor module (1) comprises: a laminated substrate (2) having a first circuit board (22) disposed to a top surface of an insulation plate (20); a semiconductor element (3) disposed to a top surface of the first circuit board; a metal wiring board (4) including a first joint portion (40) joined to a top surface of the semiconductor element with a joining material (S) therebetween; and a sealing resin (5) sealing the laminated substrate, the semiconductor element, and the metal wiring board. The first joint portion includes a plate-shaped portion having a top surface and a bottom surface. The metal wiring board comprises: a first rising portion (43) rising upward from one end of the first joint portion; and a second rising portion (44) rising upward from another end of the first joint portion. The first rising portion constitutes a portion of a wiring path along which a main current flows. The second rising portion constitutes a non-wiring path along which the main current does not flow.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/28 - Encapsulation, e.g. encapsulating layers, coatings
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
In this semiconductor device, an edge termination structure portion includes: one or more guard rings of a second conductivity type provided between a well region and a terminal side of a semiconductor substrate, and exposed on an upper surface of the semiconductor substrate; a first conductivity-type region provided between the well region and a first guard ring among the one or more guard rings that is closest to the well region; and a first field plate provided over the upper surface of the semiconductor substrate and connected to the first guard ring. The first field plate overlaps 90% or more of the first conductivity-type region between the first guard ring and the well region.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/41 - Electrodes characterised by their shape, relative sizes or dispositions
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
In the present invention, an n+-type source region (4), a low-concentration region (5), and a p++-type contact region (6) are selectively provided on the surface region of the front surface of a semiconductor substrate (30), and are in contact with a source electrode. The n+-type source region (4) and the low-concentration region (5) are in contact with a gate-insulating film (8) on the side wall of a trench (7), and adjoin a channel part of a p-type base region in a depth direction (Z). The p++-type contact region (6) is disposed away from the trench (7). In the surface region of an epitaxial layer (33) which becomes the p-type base region, the n--type or p--type low concentration region (5) is configured by the portion left without forming the n+-type source region (4) and the p++-type contact region (6). The low concentration region (5) is periodically disposed along the side wall of the trench (7) between the p++-type contact region (6) and the trench (7). Using such a structure, it is possible to increase the short circuit tolerance without increasing the number of steps.
Provided is a semiconductor device which has a MOS gate structure and comprises: a semiconductor substrate; a first interlayer insulating film that is provided above the upper surface of the semiconductor substrate and that has a first opening; and a second interlayer insulating film that is laminated on the first interlayer insulating film and that has a second opening overlapping the first opening in a top view. The width of the first opening in a first direction is different from the width of the second opening in the first direction at the height of the boundary between the first interlayer insulating film and the second interlayer insulating film.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
Provided is a method for producing a silicon carbide semiconductor device, the method making is possible to suppress degradation of a built-in diode due to charging, and to suppress any variation in on-resistances of active elements. The method includes: a step for epitaxially growing a first-electroconductivity-type drift layer (2) on the upper-surface side of a first-electroconductivity-type silicon carbide substrate (1s); a step for forming a second-electroconductivity-type base region on the upper-surface side of the drift layer (2); a step for forming a first-electroconductivity-type main region on the upper-surface side of the drift layer (2) such that the main region is in contact with the base region; a step for forming a gate insulation film so as to be in contact with the base region and the main region; a step for forming a gate electrode so as to be in contact with the base region and the main region with the gate insulation film interposed therebetween; and a step for irradiating the drift layer (2) with a lifetime killer from the upper-surface side of the drift layer (2) to form a lifetime killer region (23) at a depth that includes the lower surface of the drift layer (2), said step being carried out after the step for epitaxially growing the drift layer (2) and before the step for forming the gate insulation film.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
Provided is a gas analyzer for measuring the concentration of a component of interest contained in a sample gas, the gas analyzer comprising: an entrance window through which light enters; a central mirror; two or more reflecting mirrors opposed to the central mirror; a folding mirror disposed at an opposite side of the central mirror to the entrance window; and an exit window disposed at the same side of the central mirror as the entrance window. The folding mirror folds light that has entered through the entrance window back to the exit window.
Provided is a semiconductor device manufacturing method comprising: a step for forming a lifetime control region from the top face side of a semiconductor substrate; a step for ion-implanting Ti in the bottom surface of a contact hole provided so as to penetrate through an interlayer insulating film disposed on the top face of the semiconductor substrate; and a step for forming a Ti silicide layer on the bottom surface of the contact hole by annealing. Further provided is a semiconductor device comprising: a semiconductor substrate having a transistor unit and a diode unit; and an interlayer insulting film which is disposed on the top face of the semiconductor substrate and through which a contact hole is provided. The semiconductor substrate has a lifetime control region formed by the top surface of the semiconductor substrate and so as to span from the diode unit to at least a portion of the transistor unit; a Ti silicide layer is provided on the bottom surface of the contact hole; and the side wall of the contact hole is provided with a TiN layer that contacts the interlayer insulating film.
The purpose of the present invention is to provide a semiconductor device capable of inhibiting switching element loss during high temperatures without increasing the radiation noise of the switching element. This semiconductor device (2a) comprises: an IGBT (21) having a gate (G) to which a gate signal is input; a temperature detection element (23) that detects the temperature of the IGBT (21); and a capacitance adjustment unit (11) that is disposed between the gate (G) of the IGBT (21) and a reference potential terminal (41), and adjusts the capacitance between the gate (G) and an emitter (E) of the IGBT (21) in accordance with the detected temperature detected by the temperature detection element (23).
H03K 17/16 - Modifications for eliminating interference voltages or currents
H03K 17/567 - Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
H03K 17/695 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors having inductive loads
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
59.
METHOD FOR PREDICTING GENERATED AMOUNT OF SILICA SCALE
There is a growing need for saving space for circuit apparatuses comprising a capacitor apparatus. Provided is a capacitor apparatus comprising an insertion hole portion into which an external terminal is inserted, and a first connection terminal provided on an inner surface of the insertion hole portion to electrically connect to the external terminal. The insertion hole portion includes a pressing portion for pressing the external terminal inserted into the insertion hole portion against the first connection terminal. The capacitor apparatus further comprises a second connection terminal exposed on an outer surface of the capacitor apparatus to electrically connect to another external terminal.
H01G 4/40 - Structural combinations of fixed capacitors with other electric elements not covered by this subclass, the structure mainly consisting of a capacitor, e.g. RC combinations
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
61.
SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING SEMICONDUCTOR MODULE
The present invention improves bonding strength between a semiconductor element and a metal wiring board, while ensuring the thickness of a joining member. The semiconductor module (1) comprises a multi-layer substrate (2) having a plurality of circuit boards (22) arranged on the upper surface of an insulating plate (20), a semiconductor element (3) arranged on the upper surface of at least one circuit board, and a metal wiring board (4) arranged on the upper surface of the semiconductor element. The metal wiring board has a first junction (40) joined to the upper surface of the semiconductor element via a first joining member (S3). The first junction includes a tabular portion having an upper surface and a lower surface, and has a boss (45) formed on the lower surface of the tabular portion and protruding toward the semiconductor element, a first recess (46) that is formed in the upper surface of the tabular portion at a location corresponding to directly above the boss, and a plurality of second recesses (49) that are formed in the upper surface and are smaller than the first recess.
H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
A gate polysilicon wiring layer (62) is provided on the front surface of a semiconductor substrate (10) with an insulating layer interposed therebetween, in an intermediate region (3) between an active region (1) and an edge termination region (2), the insulating layer being formed by laminating a gate insulation film (38) and a field oxide film (61) in this order. The inner end (61a) of the field oxide film (61) is positioned immediately below the gate polysilicon wiring layer (62), the gate polysilicon wiring layer (62) extending inward from above the field oxide film (61) and terminating on the gate insulation film (38). In the surface of the insulating layer immediately below the gate polysilicon wiring layer (62), a step is formed on the inner end (61a) of the field oxide film (61) by the thickness difference caused by the presence or absence of the field oxide film (61). The distance (w1) from this step in the surface of the insulating layer to contact holes (40a, 40b) in the active region (1) is 21 μm or less. With the above configuration, the temperature application range of the operating environment is widened and reliability is improved.
A semiconductor module (1) comprises: a laminate substrate (2) composed of a laminate of an insulating plate (20) having an upper surface and a lower surface, a heat-dissipating plate (21) disposed on the lower surface of the insulating plate, and a circuit board (22) disposed on the upper surface of the insulating plate; a semiconductor element (3, 4) disposed on the upper surface of the circuit board; a case (6) surrounding the laminate substrate and housing the semiconductor element; a sealing resin (7) filling the interior of the case and sealing the semiconductor element; and a partition wall (8) extending in an upper-lower direction and dividing the sealing resin into a plurality of sections. An end of the partition wall is connected to at least a part of the upper surface of the circuit board.
H01L 23/28 - Encapsulation, e.g. encapsulating layers, coatings
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
Provided is a bi-directional switch having: a first silicon carbide transistor; a first diode provided in series with the first silicon carbide transistor, the first diode having a lower on voltage at the rated current of the bi-directional switch than a built-in diode in the first silicon carbide transistor; a second silicon carbide transistor provided in parallel with the first diode; a second diode provided in series with the second silicon carbide transistor and provided in parallel with the first silicon carbide transistor, the second diode having a lower on voltage at the rated current of the bi-directional switch than a built-in diode in the second silicon carbide transistor; and a connection line for connecting a first contact point between the first silicon carbide transistor and the first diode and a second contact point between the second silicon carbide transistor and the second diode.
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 5/02 - Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
65.
ELECTRIC-POWER CONVERSION DEVICE, CONNECTOR FIXING STRUCTURE, AND METHOD OF MANUFACTURING ELECTRIC-POWER CONVERSION DEVICE
This electric-power conversion device is provided with: a base plate on which an element for carrying out electric-power conversion is mounted; a connector which is fixed to the base plate, and which is for electrically connecting a device exterior section and the base plate; a top-plate member which is made of sheet metal and is disposed so as to cover the base plate; and a bottom-plate member which is made of sheet metal and is disposed so as to oppose the top-plate member. The sheet-metal bottom plate member has a bottom-plate bent section that is bent along an end section on the side where the connector is disposed and that abuts the connector to keep the connector from shifting.
H05K 7/14 - Mounting supporting structure in casing or on frame or rack
B60R 16/02 - Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric
H01R 13/516 - Means for holding or embracing insulating body, e.g. casing
H01R 13/74 - Means for mounting coupling parts to apparatus or structures, e.g. to a wall for mounting coupling parts in openings of a panel
H02G 3/16 - Distribution boxes; Connection or junction boxes structurally associated with support for line-connecting terminals within the box
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
Provided is a semiconductor device in which each of a transistor portion and a diode portion includes one or more trench contact portions provided in a depth direction of a semiconductor substrate from an upper surface of the semiconductor substrate. The transistor portion includes a first bottom portion region of a second conductivity type provided in contact with a bottom portion of one of the trench contact portions. The diode portion includes a second bottom portion region of the second conductivity type provided in contact with a bottom portion of one of the trench contact portions. The length of the first bottom portion region in an extending direction thereof is greater than the length of the second bottom portion region in an extending direction thereof.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
Provided is a semiconductor device comprising: a semiconductor substrate including a drift region of a first electroconductive type; a base region of a second electroconductive type provided between the drift region and an upper surface of the semiconductor substrate; a plurality of trenches provided from the upper surface of the semiconductor substrate to below the base region; a lower end region of the second electroconductive type provided so as to be in contact with a lower end of two or more trenches; a well region of the second electroconductive type provided from the upper surface of the semiconductor substrate to below the base region, the well region having a higher doping concentration than the base region; and a high-resistance region of the second electroconductive type disposed between the lower end region and the well region when observed in a top view, the high-resistance region having a lower doping concentration than the lower end region.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
2323332323232233 film. A temperature of this POA is suitably set in a range from 700 degrees C to less than 900 degrees C. As a result, without disposing, near a bottom of a trench (7) embedded with the MOS gate, a p+-type region for mitigating electric field, electric field applied to the gate insulating film (8) at the bottom of the trench (7) can be mitigated, and reliability of the gate insulating film (8) can be ensured.
Provided is a semiconductor device comprising: a drift region of a first conductivity type provided in a semiconductor substrate; a buffer region of a first conductivity type provided closer to a back surface of the semiconductor substrate than the drift region and having a first peak of doping concentration; and a first lattice defect region provided closer to an upper surface of the semiconductor substrate than the first peak in the depth direction of the semiconductor substrate, and having a recombination center. The buffer region is provided closer to the upper surface of the semiconductor substrate than the first lattice defect region, and has a hydrogen peak where the hydrogen chemical concentration distribution is at a peak. In the depth direction of the semiconductor substrate, an integrated concentration obtained by integrating doping concentrations from the upper end of the drift region to the hydrogen peak is greater than or equal to a critical integrated concentration.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
Provided is an insulated gate bipolar transistor comprising: a base region provided between an emitter region and a drift region; an accumulation region provided between the base region and the drift region and having a higher doping concentration than the drift region; a gate trench portion provided on an upper surface of a semiconductor substrate under the accumulation region; and a lower end region provided in contact with a lower end of the gate trench portion. The accumulation region in a depth direction has a first concentration peak at which the doping concentration shows a maximum value, and the distance between the first concentration peak and the lower end region in the depth direction is less than the distance between the first concentration peak and the base region in the depth direction.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
Provided is a water quality analysis device that performs calibration work using a calibration water solution and measures the concentration of a measurement target substance within a water sample, said water quality analysis device comprising: a flow cell in which the water sample and the calibration water solution flow; and a first switching unit that switches whether the water sample or the calibration water solution is supplied to the flow cell.
G01N 21/27 - Colour; Spectral properties, i.e. comparison of effect of material on the light at two or more different wavelengths or wavelength bands using photo-electric detection
Provided is a semiconductor module comprising: a first switching element which is reverse conducting and is provided to one of an upper arm and a lower arm; a second switching element which is reverse conducting and is provided to the other one of the upper arm and the lower arm; a first passage member which is electrically connected to one of a gate electrode and an emitter electrode of the first switching element; and a second passage member which is electrically connected to the other one of the gate electrode and the emitter electrode of the first switching element. The first passage member is disposed in proximity to the second switching element compared to the second passage member. The current flowing to the first passage member flows antiparallel to a reverse recovery current of the arm to which the second switching element is provided.
H01L 23/12 - Mountings, e.g. non-detachable insulating substrates
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
73.
SILICON CARBIDE SEMICONDUCTOR DEVICE AND SILICON CARBIDE SEMICONDUCTOR SUBSTRATE
According to the present invention, first and second buffer regions (11, 12) and an n-type drift region (2) are sequentially epitaxially grown on an n+type starting substrate (21). The impurity concentration of the first buffer region (11) is higher than the impurity concentration of the n-type drift region (2), but lower than the impurity concentration of the n+type starting substrate (21). The impurity concentration of the second buffer region (12) is higher than the impurity concentration of the first buffer region (11), and continuously increases from the gradient change point (41a) on the n- type drift region (2) side toward the gradient change point (41b) on the first buffer region (11) side at a first impurity concentration gradient (41), while continuously decreasing from the gradient change point (41a) toward a first interface (27) at a second impurity concentration gradient (42) and continuously decreasing from the gradient change point (41b) toward a second interface (26) at a third impurity concentration gradient (43). The second impurity concentration gradient (42) is smaller than the third impurity concentration gradient (43). Consequently, reliability is improved.
Provided is a sensor device comprising: a semiconductor substrate; a glass substrate; a physical quantity sensor; and a pad section electrically connected to the physical quantity sensor, wherein a recess provided in at least one of the semiconductor substrate and the glass substrate is sealed by joining a first joining portion in the glass substrate and a second joining portion in the semiconductor substrate, the physical quantity sensor and the pad section are arranged in a sealed space sealed by the semiconductor substrate and the glass substrate, and the glass substrate has a cation-deficient layer in the first joining portion, the cation-deficient layer having a cation concentration lower than that of the glass substrate.
G01L 9/00 - Measuring steady or quasi-steady pressure of a fluid or a fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
G01P 15/08 - Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces with conversion into electric or magnetic values
G01P 15/12 - Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces with conversion into electric or magnetic values by alteration of electrical resistance
75.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SAME
Provided is a method for manufacturing a semiconductor device, with which it is possible for the surface of sintering paste to be flattened before a power semiconductor chip is mounted, and with which high-density mounting is possible. The method includes: a step of applying sintering paste (2x) having protruding portions (2a) on the surface thereof onto a main surface of an electrically conductive plate (11a); a step of drying the sintering paste (2x); a step of applying pressure to the sintering paste (2x) to flatten the surface of the sintering paste (2x) by squashing the protruding portions (2a); a step of mounting a semiconductor chip on the main surface of the electrically conductive plate (11a) with the sintering paste (2x) interposed therebetween; and a step of forming a bonding layer by applying heat and pressure to sinter the sintering paste (2x), to bond the semiconductor chip and the electrically conductive plate (11a) together by way of the bonding layer.
This gas treatment system is intended to be used for separating carbon dioxide from a gas of interest containing carbon dioxide, and is provided with: a first unit which includes at least one first compressor that pressurizes the gas of interest and a first separator that separates the gas of interest that has been pressurized by the at least one first compressor into a first gas having a higher carbon dioxide concentration than that in the gas of interest and a second gas having a lower carbon dioxide concentration than that in the gas of interest; a second unit which includes at least one second compressor that pressurizes the first gas and a second separator that separates the first gas that has been pressurized by the at least one second compressor into a third gas having a higher carbon dioxide concentration than that in the first gas and a fourth gas having a lower carbon dioxide concentration than that in the first gas; and an expander which collects a kinetic energy from the second gas and the fourth gas and transfers the collected kinetic energy to either one of the at least one first compressor or the at least one second compressor.
C10L 3/10 - Working-up natural gas or synthetic natural gas
B01D 53/22 - Separation of gases or vapours; Recovering vapours of volatile solvents from gases; Chemical or biological purification of waste gases, e.g. engine exhaust gases, smoke, fumes, flue gases or aerosols by diffusion
Provided is a water quality analysis device that is for measuring the concentration of a measurement-target substance in sample water, and that comprises: a turbidity meter that measures the turbidity of the sample water by measuring the intensity of scattering light or transmission light from the measurement-target substance; a fluorometer that measures the fluorescence intensity of the measurement-target substance; a fluorescence intensity correction unit that corrects the fluorescence intensity of the measurement-target substance on the basis of the turbidity of the sample water; and a concentration calculation unit that sets a concentration calibration coefficient for converting the fluorescence intensity of the measurement-target substance into the concentration of the measurement-target substance on the basis of the result of measuring the fluorescence intensity of a fluorescence intensity calibration aqueous solution including a fluorescence intensity calibration substance that has a known concentration and that has a fluorescence intensity characteristic having a sensitivity wavelength range that overlaps that of the measurement-target substance.
The present invention provides a semiconductor device which uses a bonding layer that is formed of a sintered material, and which is prevented from variation in a service life. This semiconductor device is provided with a conductive plate (11a) that has a main surface, a semiconductor chip (3) that is arranged so as to face the main surface of the conductive plate (11a), and a bonding layer (2a) that is arranged between the conductive plate (11a) and the semiconductor chip (3), while comprising a porous sintered material. With respect to this semiconductor device, a first outer edge of a bonded interface (21) between the bonding layer (2a) and the conductive plate (11a) is positioned inside the outer circumference of the semiconductor chip (3) and inside a second outer edge of a bonded interface (22) between the bonding layer (2a) and the semiconductor chip (3).
[Problem] When a protection operation is simply cancelled in accordance with the resolution of a short-circuit, there is a risk that the short-circuit could occur again and cause device breakdown. [Solution] Provided is a control device comprising: a protection unit that, in accordance with a short-circuit occurring in a main switching element, limits current flowing to the main switching element; and a protection operation control unit that causes the protection unit to continue the protection operation until the supply of power to a drive control unit controlling driving of the main switching element in accordance with a drive signal is stopped. The protection operation control unit has a first holding unit that holds information indicating that the protection operation should be executed until a first cancellation condition is satisfied, which includes resolution of a short-circuit when a short-circuit has occurred, and stopping of the supply of power.
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
80.
SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING SAME
A semiconductor module comprising: a semiconductor chip including a main electrode; a connection conductor electrically connected to the main electrode; a housing portion enclosing the semiconductor chip and at least a part of the connection conductor; an encapsulant filling a space enclosed by the housing portion; and a connection unit fixed to the housing portion. An electrical conduction portion as a part of the connection conductor is exposed from the surface of the encapsulant. The connection unit includes a connection terminal bonded to the electrical conduction portion of the connection conductor, and a support composed separately from the housing portion and supporting the connection terminal.
H01L 23/28 - Encapsulation, e.g. encapsulating layers, coatings
H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
Provided is a semiconductor device comprising a transistor portion and a diode portion. The semiconductor device comprises a drift region, a base region, an emitter region, and a plurality of trench portions. The transistor portion includes a boundary region disposed adjacent to the diode portion. In a direction in which the plurality of trench portions are arranged, a lifetime control region is provided across the boundary region from the diode portion to the transistor portion in which the emitter region is provided. The boundary region is provided extending in an extending direction of the plurality of trench portions, and includes a second conductivity-type plug region having a higher doping concentration than the base region. On an upper surface in the boundary region, a contact region and the base region are alternately arranged in the extending direction.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
Provided is a semiconductor device comprising: a first conductivity type drift region that is disposed on a semiconductor substrate; a first conductivity type buffer region that is disposed further toward the back surface side of the semiconductor substrate than the drift region and that has a first peak of a doping concentration and a second peak which is disposed further toward the front surface side of the semiconductor substrate than the first peak; and a first lifetime control region that is disposed between the first peak and the second peak in the depth direction of the semiconductor substrate. In the depth direction of the semiconductor substrate, the integral concentration from the upper end of the drift region to the second peak may be greater than or equal to a critical integral concentration.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
This semiconductor device comprising: a first conductive pattern; a second conductive pattern; a first semiconductor chip in which a switching element having a high-potential-side electrode on the back surface and a low-potential-side electrode on the front surface is formed and which is arranged on the first conductive pattern; a second semiconductor chip in which a diode element having a cathode electrode on the back surface and an anode electrode on the front surface is formed and which is arranged on the first conductive pattern; a first wire that connects the low-potential-side electrode and the second conductive pattern to each other; and a second wire that connects the anode electrode and the second conductive pattern to each other and has a length substantially equal to the length of the first wire, wherein the first and second semiconductor chips are arranged on the first conductive pattern along a first direction, the first and second wires are parallel to a second direction orthogonal to the first direction, the first direction is parallel to a predetermined side of the first conductive pattern, n (n is a plurality) of the first semiconductor chips, the n of the second semiconductor chips, a plurality of the first wires and a plurality of the second wires are included, the n first semiconductor chips and the n second semiconductor chips are arranged on the first conductive pattern in two rows along the first direction, and at least one of the first semiconductor chips and at least one of the second semiconductor chips are included in each of the two rows.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
A semiconductor device comprising a first conductive pattern and a second conductive pattern which are provided on a main surface of an insulating substrate, and a first semiconductor element and a second semiconductor element which are each disposed on the first conductive pattern. The first conductive pattern includes a first input region overlapping the first semiconductor element, and a second input region overlapping the second semiconductor element. An output electrode of the first semiconductor element and an output electrode of the second semiconductor element are interconnected by means of a first wiring member. An output electrode of the second semiconductor element and the second conductive pattern are interconnected by means of a second wiring member. The ratio of a current that flows from the second input region to the second conductive pattern via the second semiconductor element, with respect to a current that flows from the first input region to the second conductive pattern via the first semiconductor element, is 0.90 to 1.10 inclusive.
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
Provided is an exhaust gas treatment device, comprising a reaction tower to which exhaust gas discharged from a power device and a liquid for treating the exhaust gas are supplied and which discharges waste liquid resulting from exhaust gas treatment, a switching control unit for switching whether or not the waste liquid is supplied to the reaction tower, a storage unit for storing the waste liquid, a water quality measurement unit for measuring the water quality of the waste liquid, and a mixing control unit, wherein: the reaction tower discharges first waste liquid resulting from exhaust gas treatment when the waste liquid is supplied to the reaction tower; the reaction tower discharges second waste liquid resulting from exhaust gas treatment, when the waste liquid is not supplied to the reaction tower; the storage unit stores the first waste liquid; and the mixing control unit controls the mixing ratio between the second waste liquid and the first waste liquid stored in the storage unit on the basis of the water quality of the second drainage measured by the water quality measurement unit.
B01D 53/14 - Separation of gases or vapours; Recovering vapours of volatile solvents from gases; Chemical or biological purification of waste gases, e.g. engine exhaust gases, smoke, fumes, flue gases or aerosols by absorption
Provided is a temperature adjustment device that supplies, to a thermostatic tank inside which a test subject is provided, a gas, the temperature of which has been adjusted to a set temperature, and that collects the gas from the thermostatic tank, said temperature adjustment device comprising a base heater that heats the collected gas, a cooling coil that cools the gas heated by the base heater, and a heater for temperature adjustment that adjusts the temperature of the gas cooled by the cooling coil to the set temperature.
The present invention provides a semiconductor device which is provided with a semiconductor substrate that comprises an active part and a plurality of gate trench parts that are formed in the upper surface of the semiconductor substrate in the active part, while extending in the extension direction. This semiconductor device is additionally provided with: a gate wiring line which is arranged between the active part and an edge of the semiconductor substrate; and a plurality of gate polysilicons which are arranged at a distance from each other along the edge so as to respectively connect the plurality of gate trench parts to the gate wiring line.
Provided is a semiconductor device (100) comprising: a first conductive-type emitter region (12) in contact with a gate trench section (40); a second conductive-type contact region (15) disposed alternately with the emitter region in the longitudinal direction of the gate trench section; a first trench contact section (54-1) provided up to the inside of the contact region; a second trench contact section (54-2) provided up to the inside of the emitter region; a second conductive-type first plug section (201) which is provided in contact with the lower end of the first trench contact section and has a higher concentration than the base region; and a second conductive-type second plug section (202) which is provided in contact with the lower end of the second trench contact section, is provided up to a lower surface side from the first plug section, and has a higher concentration than the base region.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
89.
SEMICONDUCTOR DEVICE AND PRODUCTION METHOD FOR SEMICONDUCTOR DEVICE
The present invention makes it possible to reliably mechanically and electrically connect conductive posts. A semiconductor device (10) in which a printed board (30) is arranged opposite an insulating circuit board (20) such that the printed board (30) and a top surface of the insulating circuit board (20) sandwich spacer parts (50), and pressing parts (51) are arranged above the spacer parts (50) on a top surface of the printed board (30) such that the pressing parts (51) and the spacer parts (50) sandwich the printed board (30). The pressing parts (51) make it possible to correct warpage of the printed board (30) caused by the application of heat to bond conductive posts (41a–41e) to the insulating circuit board (20) and semiconductor chips (24a, 24b). Because the printed board (30) is kept substantially horizontal, lower end parts of the conductive posts (41a–41e) are bonded to the insulating circuit board (20) and the semiconductor chips (24a, 24b) without withdrawing from the insulating circuit board (20) and the semiconductor chips (24a, 24b).
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
Provided is a semiconductor device which is easily assembled and which has high reliability and corrosion resistance. The present invention comprises: a mounting member (1) which has a wiring layer (1b) that contains copper as a main component; a first coating layer (2) which coats the wiring layer (1b) such that a portion of an upper surface of the wiring layer (1b) is exposed at an opening (8) and which contains nickel; a joint layer (3) which is metallurgically joined to the wiring layer (1b) at the opening (8); a second coating layer (6) which contains nickel and to which the upper surface of the joint layer (3) is metallurgically joined; and a semiconductor chip (7), the lower surface of which is covered with the second coating layer (6). The joint layer (3) has a lower layer (5a) which is in contact with the wiring layer (1b), an upper layer (5b) which is in contact with the second coating layer (6), and an intermediate layer (4) between the lower layer (5a) and the upper layer (5b). The lower layer (5a) and the upper layer (5b) contains, as a main component, an intermetallic compound which contains tin, copper and nickel, and the intermediate layer (4) is made of an alloy which contains tin as a main component and which does not contain lead.
NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY (Japan)
Inventor
Tawara, Takeshi
Harada, Shinsuke
Abstract
This silicon carbide semiconductor device (50) comprises: an n-type silicon carbide semiconductor substrate (1); an n-type first semiconductor layer (2, 6) having a lower impurity concentration than the silicon carbide semiconductor substrate (1); an n-type first JFET region (6b) provided on a surface layer of the first semiconductor layer, the first JFET region having a higher effective donor concentration than the first semiconductor layer; a p-type second semiconductor layer (3) provided to the surface of the first semiconductor layer that is opposite from the silicon carbide semiconductor substrate (1); an n-type first semiconductor region (7) selectively provided to a surface layer of the second semiconductor layer; and a trench (16) that passes through the first semiconductor region (7), the second semiconductor layer, and the first JFET region (6b). The first JFET region (6b) is doped with aluminum and a donor composed of either nitrogen or phosphorus.
Provided is an integrated circuit provided with: a power-supply line to which a power-supply voltage is applied; a constant-current source electrically connected to the power-supply line; and a reference voltage circuit electrically connected to the constant-current source.
H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
This semiconductor device is provided with an active portion including a transistor portion and a diode portion, and a breakdown voltage structure portion provided at an outer periphery of the active portion, wherein: the transistor portion includes a drift region of a first conduction type, provided in a semiconductor substrate, a base region of a second conduction type, provided above the drift region, a trench portion extending from a front surface of the semiconductor substrate to the drift region, and a trench bottom portion of the second conduction type, provided at a lower end of the trench portion; and the diode portion is provided between the transistor portion in close proximity to the breakdown voltage structure portion and the breakdown voltage structure portion as seen in a top view.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
Provided is a semiconductor device provided with a transistor unit, the semiconductor device comprising a first drift region of a first conductivity type provided on a semiconductor substrate, a plurality of trench portions extending from a front surface of the semiconductor substrate to the drift region, an emitter region of the first conductivity type that is provided extending from one trench portion to an adjacent trench portion of the plurality of trench portions in the front surface of the semiconductor substrate and has a higher doping concentration than the drift region, and a trench bottom portion of a second conductivity type provided at a lower end of the trench portions. The transistor unit, as seen in a top view, has an electron transmission region where the trench bottom portion is not provided.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
This semiconductor device enables preventing deterioration of a ceramic laminate substrate. A ceramic board (20) is plate shape and has a front surface and a back surface on the side opposite of the front surface, and comprises a plurality of ceramic particles. A high-potential voltage is applied to a metal layer (30), the metal layer (30) is bonded to the front surface of the ceramic board (20), is electrically connected to a semiconductor chip, and contains copper. A low-potential voltage is applied to a metal layer (40), and the metal layer (40) is connected to the back surface of the ceramic plate (20), and contains copper. An intermediate layer (50b) is formed between the back surface of the ceramic plate (20) and the metal layer (40), and contains an oxide (51b) that has magnesium, which is an oxide having magnesium. By means of the oxides (51b) having magnesium included between the ceramic plate (20) and the metal layer (40), reduction in bonding of the metal layer (40) to the ceramic plate (20) is suppressed even when a high voltage is applied at high temperature to a ceramic laminate plate (10).
The present invention provides an overcurrent detection circuit that can appropriately detect overcurrent even when the level of the overcurrent to be detected differs depending on the phase of a main switching element. This overcurrent detection circuit (4) comprises: a detection unit (40) that detects whether the current flowing between main terminals of a main switching element (Q) used in a power conversion device is overcurrent; and a switching unit (41) that switches the threshold used for determining overcurrent in the detection unit (40) depending on in which phase of the power conversion device the main switching element (Q) is used.
H03K 17/08 - Modifications for protecting switching circuit against overcurrent or overvoltage
H03K 17/082 - Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
H02M 7/48 - Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
CEGCGC) between the control terminal and the second main terminal, a terminal-to-terminal capacitance peak (180) is present in a region with the power supply voltage of greater than or equal to 500 V.
The present invention prevents the generation of cracks in a ceramic circuit board. A ceramic circuit board (30, 40, 50) includes: a ceramic substrate (31, 41, 51); and, arranged on a front surface of the ceramic board (31, 41, 51), a high potential circuit pattern (32a, 42a, 52a) on which a semiconductor chip (60a-62a) is mounted; a midpoint potentional circuit pattern (32b, 42b, 52b) on which a semiconductor chip (60b-62b) is mounted; a low potential circuit pattern (32c, 42c, 52c); and a control circuit pattern (32d, 42d, 52d). The ceramic circuit board (30, 40, 50) is arranged straddling a center line (XL) on a front surface of a cooling base substrate (70) . The control circuit pattern (32d, 42d, 52d) is arranged straddling the center line (XL) on the opening side of a cavity section.
H01L 23/12 - Mountings, e.g. non-detachable insulating substrates
H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 21/336 - Field-effect transistors with an insulated gate
Provided is a semiconductor device comprising transistor portions provided in a semiconductor substrate and diode portions provided in the semiconductor substrate, wherein the area ratio of the transistor portions to the diode portions on a front surface of the semiconductor substrate is greater than 3.1 and less than 4.7. Provided is a semiconductor module comprising: a semiconductor device having transistor portions and diode portions provided in a semiconductor substrate; an external connection terminal electrically connected to the semiconductor device; and a coupling part that electrically connects the semiconductor device and the external connection terminal. The coupling part may be in planar contact with a front surface electrode of the semiconductor device via a predetermined bonding surface. The area ratio of the transistor portions to the diode portions may be greater than 2.8 and less than 4.7.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
The present invention makes it possible to curb any decrease in cooling performance while ensuring rigidity and corrosion resistance. A top plate (21) forms a rectangular shape in a plan view; a cooling region (21b), in which a plurality of heat-radiating fins (24f) are arranged, is set in the middle of the reverse surface of the top plate (21) in the longitudinal direction; and communicating regions (21c, 21d) are respectively set on either side of the cooling region (21b). A side wall (22) is connected in an annular manner to the reverse surface of the top plate (21) so as to include the cooling region (21b) and the communicating regions (21c, 21d). The thickness (T2) of the cooling region (21b) of the top plate (21) is thinner than the thickness (T1) of outer margin regions (21e, 21f) to the outside from the side wall (22) of the top plate (21). Therefore, the distance from the front surface of the cooling region (21b) of the top plate (21) to the plurality of heat-radiating fins (24f) is short. The heat of a semiconductor module (10) is more readily conducted to the plurality of heat-radiating fins (24f), thus improving the cooling capability from refrigerant.
H01L 23/473 - Arrangements for cooling, heating, ventilating or temperature compensation involving the transfer of heat by flowing fluids by flowing liquids
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different subgroups of the same main group of groups , or in a single subclass of ,