UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
National Taiwan University (Taiwan, Province of China)
Inventor
Wang, Chin-Hsun
Wu, Ruey-Beei
Chen, Ching-Sheng
Hung, Chun-Jui
Liao, Wei-Yu
Chang, Chi-Min
Abstract
A transmission device for suppressing the glass-fiber effect includes a circuit board and a transmission line. The circuit board includes a plurality of glass fibers, so as to define a fiber pitch. The transmission line is disposed on the circuit board. The transmission line includes a plurality of non-parallel segments. Each of the non-parallel segments of the transmission line has an offset distance with respect to a reference line. The offset distance is longer than or equal to a half of the fiber pitch.
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
National Taiwan University (Taiwan, Province of China)
Inventor
Wang, Yu-Kuang
Wu, Ruey-Beei
Chen, Ching-Sheng
Huang, Chun-Jui
Liao, Wei-Yu
Chang, Chi-Min
Abstract
A transmission device includes a daisy chain structure composed of at least three daisy chain units arranged periodically and continuously. Each of the daisy chain units includes first, second and third conductive lines, and first and second conductive pillars. The first and second conductive lines at a first layer extend along a first direction and are discontinuously arranged. The third conductive line at a second layer extends along the first direction and is substantially parallel to the first and second conductive lines. The first conductive pillar extends in a second direction. The second direction is different from the first direction. A first part of the first conductive pillar is connected to the first and third conductive lines. The second conductive pillar extends in the second direction. A first part of the second conductive pillar is connected to the second and third conductive lines.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Chen, Jyun-Hong
Kuo, Chi-Hai
Lin, Pu-Ju
Ko, Cheng-Ta
Abstract
A package structure includes a first substrate, a second substrate disposed on the first substrate, a third substrate disposed on the second substrate, and multiple chips mounted on the third substrate. A second coefficient of thermal expansion (CTE) of the second substrate is less than a first CTE of the first substrate. The third substrate includes a first sub-substrate, a second sub-substrate in the same level with the first sub-substrate, a third sub-substrate in the same level with the first sub-substrate. A CTE of the first sub-substrate, a CTE of the second sub-substrate, and a CTE of the third sub-substrate are less than the second CTE of the second substrate.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
H01L 23/14 - Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
H01L 23/373 - Cooling facilitated by selection of materials for the device
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices having separate containers
4.
CIRCUIT BOARD WITH LOW GRAIN BOUNDARY DENSITY AND FORMING METHOD THEREOF
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Chen, Chien Jung
Liang, Jia Hao
Lin, Ching Ku
Abstract
The present disclosure provides a circuit board including a first circuit layer, a dielectric layer on the first circuit layer, and a seed layer on the dielectric layer and directly contacting the first circuit layer, in which a top surface of the seed layer includes a levelled portion. The circuit board also includes a second circuit layer on the levelled portion of the seed layer, in which a grain boundary density of the second circuit layer is lower than that of a portion of the seed layer directly contacting the first circuit layer.
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Wu, Ming-Hao
Wang, Chia-Ching
Abstract
A circuit board structure is provided. The circuit board structure includes a via hole, a conductive layer, and an alternate stacking of a plurality of circuit layers and a plurality of insulating layers. The via hole penetrates through the plurality of circuit layers and the plurality of insulating layers. The lateral ends of the plurality of insulating layers form the sidewall of the via hole. The conductive layer is conformally disposed within the via hole. The conductive layer exposes the first region of the sidewall and covers the second region of the sidewall. The sidewall extends in the longitudinal direction of the via hole and has no misalignments in the radial direction.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Chen, Yu-Shen
Tsai, I-Ta
Abstract
The present disclosure provides a circuit board with an embedded chip, which includes a dielectric layer, a first circuit layer, a chip, a conductive connector, and an insulating protection layer. The first circuit layer includes at least one first trace in the dielectric layer. The chip is in the dielectric layer and adjacent to the first trace, where the chip includes a plurality of chip pads at an upper surface of the chip. The conductive connector is on the upper surface of the chip and on the first circuit layer, where a lower surface of the conductive connector contacts at least one chip pad of the chip pads and an upper surface of the first trace. The insulating protection layer is on the chip, the first circuit layer, and the conductive connector, where the insulating protection layer contacts the upper surface of the chip.
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
7.
CIRCUIT BOARD ASSEMBLY AND MANUFACTURING METHOD THEREOF
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Chen, Yu-Shen
Abstract
This disclosure provides a circuit board assembly and a manufacturing method thereof. The circuit board assembly includes circuit board, embedded chip, heat dissipation assembly and temperature switch structure. The temperature switch structure includes a first metal layer and a second metal layer stacked on each other. The first metal layer of the temperature switch structure is electrically connected to the circuit board and is thermally coupled to the embedded chip. A thermal expansion coefficient of the first metal layer is different from a thermal expansion coefficient of the second metal layer so that the temperature switch structure is deformed in response to a temperature change of the embedded chip to be in contact with or spaced apart from the second electrically conductive contact of the heat dissipation assembly.
H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H05K 1/18 - Printed circuits structurally associated with non-printed electric components
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/373 - Cooling facilitated by selection of materials for the device
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01H 37/52 - Thermally-sensitive members actuated due to deflection of bimetallic element
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Lee, Shao-Chien
Chen, Ching-Sheng
Nien, Heng-Ming
Wang, Pei-Wei
Abstract
A manufacturing method for circuit board structure includes steps of providing a carrier, forming a first build-up layer including a plurality of first circuits, forming a second build-up layer including a plurality of second circuits on a side of the first build-up layer located away from the carrier, attaching a side of the second build-up layer located away from the first build-up layer to a core layer, and removing the carrier from the first build-up layer, where the first circuits are finer than the second circuits.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Yang, Kai-Ming
Peng, Chia-Yu
Lau, John Hon-Shing
Abstract
An integrated circuit (IC) package structure includes a chip, a redistribution layer (RDL) structure, a molding compound structure and an electromagnetic interference (EMI) shielding structure. The RDL structure is formed on the chip and electrically connected thereto. The molding compound layer is provided on outer surfaces of the chip and the RDL structure. The EMI shielding structure is provided on outer surfaces of the molding compound structure. The molding compound structure layer provided on outer surfaces of the chip and the RDL structure provide protection and reinforcement to multiple faces of the IC package structure; and the EMI shielding structure provided on outer surfaces of the molding compound structure provides EMI protection to multiple faces of the chip and the RDL structure.
H01L 23/552 - Protection against radiation, e.g. light
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
10.
MULTI-LAYERED RESONATOR CIRCUIT STRUCTURE AND MULTI-LAYERED FILTER CIRCUIT STRUCTURE
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
TUNGHAI UNIVERSITY (Taiwan, Province of China)
Inventor
Chen, Chi-Feng
Yen, Po-Sheng
Wu, Ruey-Beei
Tain, Ra-Min
Wang, Chin-Sheng
Chen, Jun-Ho
Abstract
A multi-layered resonator circuit structure and a multi-layered filter circuit structure. The multi-layered resonator circuit structure includes a multi-layered substrate, a plurality of resonators and a plurality of conductive components. The multi-layered substrate has a top surface, a bottom surface, and a ground layer. The top surface and the bottom surface face away from each other. The ground layer is located between the top surface and the bottom surface. A part of the plurality of resonators is/are disposed on the top surface. Another part of the plurality of resonators is/are disposed on the bottom surface. The plurality of conductive components is located in the multi-layered substrate. The plurality of resonators is electrically connected to the ground layer, respectively, via the plurality of conductive components.
Unimicron Technology Corporation (Taiwan, Province of China)
Inventor
Hsieh, Ching-Ho
Wu, Ming-Hsing
Wu, Kuei-Sheng
Abstract
A circuit board assembly is provided and includes a first circuit board, a second circuit board and a first connecting module. The first connecting module includes a first connecting wire, a first connector and a second connector. The first circuit board includes a first processor, and the second circuit board includes a second processor. One end of the first connector is connected to one end of the first connecting wire, and the other end of the first connector is connected to the first circuit board. One end of the second connector is connected to the other end of the first connecting wire, and the other end of the second connector is connected to the second circuit board. The first connector is adjacent to the first processor, and the second connector is adjacent to the second processor.
H01R 12/79 - Coupling devices for flexible printed circuits, flat or ribbon cables or like structures connecting to rigid printed circuits or like structures
12.
Printed Circuit Board and Manufacturing Method Thereof
Unimicron Technology Corporation (Taiwan, Province of China)
Inventor
Wang, Po-Hsiang
Wu, Ming-Hao
Abstract
The present disclosure provides a printed circuit board and a method thereof. The printed circuit board has a first substrate, at least one first trace layer and at least one second trace layer. The first substrate has a first surface and a second surface. The first surface and the second surface are corresponding to each other along an axis. The first trace layer is formed on the first surface and/or the second surface of the first substrate. The first trace layer has at least one first trace and at least one first gap beside the first trace by etching. The second trace layer is formed on the first trace layer. The second trace layer has at least one second trace and at least one second gap beside the second trace by etching.
H05K 3/32 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lau, John Hon-Shing
Tseng, Tzyy-Jang
Abstract
A package structure includes a circuit board, a package substrate, a fine metal L/S RDL-substrate, an electronic assembly, a photonic assembly, a heat dissipation assembly, and an optical fiber assembly. The package substrate is disposed on and electrically connected to the circuit board. The fine metal L/S RDL-substrate is disposed on and electrically connected to the package substrate. The electronic assembly includes an application specific integrated circuit (ASIC) assembly, an electronic integrated circuit (EIC) assembly, and a photonic integrated circuit (PIC) assembly which are respectively disposed on the fine metal L/S RDL-substrate and electrically connected to the package substrate by the fine metal L/S RDL-substrate. The heat dissipation assembly is disposed on the electronic assembly. The optical fiber assembly is disposed on the package substrate and electrically connected to the package substrate and the PIC assembly. A packaging method of the VCSEL array chip is presented.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lau, John Hon-Shing
Tseng, Tzyy-Jang
Abstract
A package structure includes a circuit board, a package substrate, an electronic/photonic assembly, a film redistribution layer, a heat dissipation assembly, and an optical fiber assembly. The package substrate is disposed on the circuit board and electrically connected to the circuit board. The electronic/photonic assembly includes an ASIC assembly, an EIC assembly, and a PIC assembly. The EIC assembly and the PIC assembly are stacked and disposed on the package substrate and electrically connected to the package substrate via the film redistribution layer. An orthographic projection of the EIC assembly on the film redistribution layer is overlapped with an orthographic projection of the PIC assembly on the film redistribution layer. The heat dissipation assembly is disposed on the electronic/photonic assembly. The optical fiber assembly is disposed on the package substrate and optically connected to the PIC assembly.
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
H01L 23/38 - Cooling arrangements using the Peltier effect
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Chen, Ying-Chu
Li, Jeng-Ting
Kuo, Chi-Hai
Ko, Cheng-Ta
Lin, Pu-Ju
Abstract
A manufacturing method of a package structure includes: forming a redistribution layer on a top surface of a glass substrate; forming a protective layer on the top surface of the glass substrate; cutting the glass substrate and the protective layer such that the glass substrate has a cutting edge, in which a crack is formed in the cutting edge of the glass substrate; and heating the protective layer such that a portion of the protective layer flows towards a bottom surface of the glass substrate to cover the cutting edge of the glass substrate and fill the crack in the cutting edge of the glass substrate.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lu, Chih-Chiang
Nien, Heng-Ming
Chen, Ching-Sheng
Chang, Ching
Chang, Ming-Ting
Chang, Chi-Min
Lee, Shao-Chien
Huang, Jun-Rui
Cheng, Shih-Lian
Abstract
Provided is a manufacturing method of circuit board, including a first substrate, a second substrate, a third substrate, a fourth substrate, multiple conductive structures, and a conductive via structure. The third substrate has an opening and includes a first dielectric layer. The opening penetrates the third substrate, and the first dielectric layer fills the opening. Multiple conductive structures are formed so that the first substrate, the second substrate, the third substrate, and the fourth substrate are electrically connected through the conductive structures to define a ground path. A conductive via structure is formed to penetrate the first substrate, the second substrate, the first dielectric layer of the third substrate, and the fourth substrate. The conductive via structure is electrically connected to the first substrate and the fourth substrate to define a signal path, and the ground path surrounds the signal path.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Kuo, Chun-Hung
Abstract
A method for manufacturing a circuit board includes providing a composite material film including a metal film and a polymeric film, disposing a dielectric layer on the polymeric film to form a stacked structure, forming a circuit layer with a contact pad on a substrate, bonding the stacked structure onto the substrate and the circuit layer, and forming a first opening extending through the metal film to form a patterned metal film. The dielectric layer directly contacts the substrate and entirely covers the circuit layer. The method further includes plasma etching the dielectric layer with the patterned metal film as a mask to form a second opening in the dielectric layer and expose the contact pad in the second opening, removing the composite material film, and depositing a conductive material in the second opening to form a conductive blind hole electrically connected to the contact pad.
H05K 3/00 - Apparatus or processes for manufacturing printed circuits
H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
18.
ELECTRONIC PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Wang, Chin-Sheng
Tain, Ra-Min
Chan, Chih-Kai
Chen, Jun-Ho
Abstract
An electronic packaging structure including a first circuit structure, a second circuit structure and at least one electronic device is provided. The bottom side of the first circuit structure has at least one cavity. The first circuit structure is disposed on the second circuit structure. The first circuit structure and the second circuit structure are electrically connected to each other. The electronic device is disposed on the second circuit structure. The electronic device is disposed corresponding to the cavity of the first circuit structure.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Wang, Chin-Sheng
Tain, Ra-Min
Chan, Chih-Kai
Abstract
An electronic packaging structure including a first circuit structure, a second circuit structure and at least one electronic device is provided. The first circuit structure includes a bottom conductive plate having at least one cavity. The first circuit structure is disposed on the second circuit structure. The first circuit structure and the second circuit structure are electrically connected to each other. The electronic device is disposed on the second circuit structure. The electronic device is disposed corresponding to the cavity of the first circuit structure.
H01L 21/52 - Mounting semiconductor bodies in containers
H01Q 1/22 - Supports; Mounting means by structural association with other equipment or articles
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Wang, Chin-Sheng
Peng, Chia-Yu
Yang, Kai-Ming
Lin, Pu-Ju
Ko, Cheng-Ta
Abstract
The present invention provides an etching device which comprises an oxygen supplier, so that the etching device of the present invention can etch copper gently by means of the dissolved oxygen in the etching solution to accurately control the etching degree so as to fulfill the stricter requirements of microcircuit manufacturing. The present invention further provides an etching method. Finally, the etching waste solution of the present invention can be recycled to further ameliorate the environmental pollution and reduce the production cost, so the present invention is widely applicable in integrated circuit packaging.
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Cheng, Shih-Lian
Abstract
In the manufacture method of the present invention, an inner circuit structure is prepared, and a docking pad is formed on the first surface of the inner circuit structure. A release film is mounted on the first surface to cover the docking pad before mounting a build-up circuit structure upon the first surface. The release film and part of the build-up circuit structure above it are removed. The docking pad is therefore exposed and a docking opening is formed in the build-up circuit structure. The docking opening is for mounting a circuit board to be docked to form a circuit board module of the present invention.
H05K 3/04 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Kuo, Chun-Hung
Abstract
The present disclosure provides a circuit board and its manufacturing method. The circuit board includes a first circuit layer, a first conductive post, and a second circuit layer. The first circuit layer includes a first pad and a first seed layer covering a sidewall of the first pad. The first conductive post is on the first pad and directly connected to the first pad. The second circuit layer includes a second pad and a second seed layer covering a sidewall of the second pad. The second pad is on a first connecting end of the first conductive post. The first connecting end is embedded in the second pad, and the second pad is connected to and directly contacts the first connecting end. The first seed layer and the second seed layer do not extend on a sidewall of the first conductive post.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Kuo, Chun-Hung
Wang, Tzu-Hsuan
Abstract
An electronic device including a light-emitting element, an IC chip, a substrate, an optical waveguide layer, and an optical signal outlet is provided. The IC chip is configured to control the light-emitting element to emit an optical signal. The light-emitting element is disposed on a first surface of the substrate, and the IC chip is disposed on a second surface of the substrate. The optical waveguide layer is disposed on the first surface of the substrate, and the optical waveguide layer includes a core layer, a cladding layer, and a metal layer. The metal layer is disposed on at least a portion of an interface between the core layer and the cladding layer. The optical signal outlet corresponds to the light-emitting element, and the optical signal reaches the optical signal outlet after being transmitted in the core layer.
G02B 6/42 - Coupling light guides with opto-electronic elements
G02B 6/43 - Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
H04B 10/80 - Optical aspects relating to the use of optical transmission for specific applications, not provided for in groups , e.g. optical power feeding or optical transmission through water
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Hsieh, Ching-Ho
Wu, Ming-Hsing
Wu, Keui-Sheng
Abstract
A connector includes a substrate, a coverlay and a spring contact. The substrate has a first surface, a second surface opposite to the first surface and a conductive through hole extending between the first and second surfaces. The coverlay is disposed on the first surface and includes a first opening. The spring contact includes an anchor member, a rising member and a pin. The anchor member is disposed between the substrate and the coverlay. The rising member extends from the anchor member and through the first opening in a direction away from the substrate. A first portion of the rising member is in the first opening, and a second portion of the rising member is out of the first opening. The pin extends from the anchor member to an inside of the conductive through hole, and is electrically connected to the conductive through hole.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lin, Ai Jing
Lan, Chung-Yu
Liang, Jia Hao
Abstract
A circuit board includes a conductive metal layer, at least one insulating layer, at least one thermally conductive insulating layer and a heat dissipation element. The conductive metal layer is mainly used to transmit electronic signals. The insulating layer is connected to the conductive metal layer. The thermally conductive insulating layer is sandwiched between the conductive metal layer and the insulating layer, and thermally contacts the conductive metal layer, and is used for thermally conducting the heat of the conductive metal layer. The heat dissipation element is in thermal contact with the thermally conductive insulating layer, and is used to conduct the heat of the thermally conductive insulating layer to the outside through a heat dissipation channel.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Kuo, Chun-Hung
Abstract
An electronic circuit assembly includes an interposer substrate, a wiring substrate, an electrical connective part and an electronic component. The interposer substrate with a first coefficient of thermal expansion (CTE) includes a first surface, a second surface opposite to the first surface, and a first side surface connecting to the first surface and the second surface. The wiring substrate with a second CTE is disposed below the second surface. The first CTE is lower than the second CTE. The electrical connective part is disposed in the interposer substrate and extends to the first side surface. The electronic component is attached to the first side surface and is electrically connected to the electrical connective part.
H05K 1/18 - Printed circuits structurally associated with non-printed electric components
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
H05K 3/32 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
27.
ELECTRONIC PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Wang, Chin-Sheng
Tain, Ra-Min
Lin, Wen-Yu
Wang, Tse-Wei
Chen, Jun-Ho
Ma, Guang-Hwa
Abstract
An electronic package structure and manufacturing method thereof. The electronic package structure includes a circuit board, an interposer, a chip, a circuit structure, and a coaxial conductive element. The interposer is disposed on the circuit board. The interposer has a through groove. The chip is disposed in the through groove and located on the circuit board to electrically connect with the circuit board. The circuit structure is disposed on the interposer. The coaxial conductive element penetrates the interposer to electrically connect the circuit structure and the circuit board. The coaxial conductive element includes a first conductive structure, a second conductive structure, and a first insulating structure. The second conductive structure surrounds the first conductive structure. The first insulating structure is disposed between the first conductive structure and the second conductive structure.
H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
H01L 23/552 - Protection against radiation, e.g. light
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H05K 1/14 - Structural association of two or more printed circuits
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
28.
ELECTRONIC PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Wang, Chin-Sheng
Tain, Ra-Min
Lin, Wen-Yu
Wang, Tse-Wei
Chen, Jun-Ho
Ma, Guang-Hwa
Abstract
An electronic package structure and its manufacturing method are provided. The electronic package structure includes an interposer, a circuit board, a chip, and a circuit structure. The interposer includes an interposer substrate and a coaxial conductive element located in the interposer substrate. The interposer substrate includes a cavity. The coaxial conductive element includes a first conductive structure, a second conductive structure surrounding the first conductive structure, and a first insulation structure. The first insulation structure is disposed between the first and second conductive structures. The circuit board is disposed on a lower surface of the interposer substrate and electrically connected to the coaxial conductive element. The chip is disposed in the cavity and located on the circuit board, so as to be electrically connected to the circuit board. The circuit structure is disposed on an upper surface of the interposer substrate and electrically connected to the coaxial conductive element.
H01Q 1/38 - Structural form of radiating elements, e.g. cone, spiral, umbrella formed by a conductive layer on an insulating support
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lu, Chih-Chiang
Huang, Jun-Rui
Wu, Ming-Hao
Lin, Tung-Chang
Abstract
Provided is a circuit board structure including a substrate, a loop-wrapping ground layer, an insulating structure, a first build-up layer, a top wiring layer, a bottom wiring layer, a first conductive via, and a plurality of second conductive vias. The aforementioned structure defines a signal transmitting structure. An equivalent circuit of the signal transmitting structure at least includes a first equivalent circuit, a second equivalent circuit, a third equivalent circuit and a fourth equivalent circuit, which correspond to different uniform transmitting sections respectively. The first equivalent circuit, the second equivalent circuit, the third equivalent circuit and the fourth equivalent circuit are connected in series with each other according to an ABCD transmission matrix series connection principle.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Chien, Chun-Hsien
Lee, Hsin-Hung
Lai, Hsuan-Yu
Hsieh, Yu-Chung
Yu, Hung-Pin
Abstract
A bare circuit board is provided, in which the bare circuit board includes a substrate, an antenna, a chip pad, a ground pattern and a trace. The substrate includes a surface. The antenna and the chip pad are formed on the substrate. The ground pattern is formed on the surface. The trace is formed on the surface and isn’t connected to the ground pattern. A measuring gap is formed between the trace and an edge of the ground pattern, and the trace includes a first end and a second end. The first end is electrically connected to the chip pad, whereas the second end is electrically connected to the antenna. The bare circuit board is adapted to transmit a signal. The width of the measuring gap is smaller than a quarter of an equivalent wavelength of the signal.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lu, Chih-Chiang
Huang, Jun-Rui
Wu, Ming-Hao
Lin, Yi-Pin
Lin, Tung-Chang
Abstract
A circuit board, including a first dielectric material, a second dielectric material, a third dielectric material, a fourth dielectric material, a first external circuit layer, a second external circuit layer, a conductive structure, a first conductive via, and multiple second conductive vias, is provided. The first conductive via at least passes through the first dielectric material and the fourth dielectric material, and is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path. The second conductive vias pass through the first dielectric material, the second dielectric material, the third dielectric material, and a part of the conductive structure, and surround the first conductive via. The second conductive vias are electrically connected to the first external circuit layer, the conductive structure, and the second external circuit layer to define a ground path, and the ground path surrounds the signal path.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lu, Chih-Chiang
Chang, Chi-Min
Wu, Ming-Hao
Lin, Yi-Pin
Lin, Tung-Chang
Huang, Jun-Rui
Abstract
A circuit board structure includes a substrate, a first build-up structure layer, first and second external circuit layers, at least one first conductive via, and second conductive vias. The first build-up structure layer is disposed on a first circuit layer of the substrate. The first external circuit layer is disposed on the first build-up structure layer. The second external circuit layer is disposed on a second circuit layer and a portion of a third dielectric layer of the substrate. The first conductive via is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path. The second conductive vias surround the first conductive via, and the first external circuit layer, the second conductive vias, the first circuit layer, the outer conductive layer, and the second external circuit layer define a first ground path. The first ground path surrounds the signal path.
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Wang, Tzu Hsuan
Lin, Yu Cheng
Abstract
A method of a circuit signal enhancement of a circuit board comprises the following steps: forming a first substrate body with a first signal transmission circuit layer and a second substrate body with a second signal transmission circuit layer; forming a first signal enhancement circuit layer and a second signal enhancement circuit layer on the first substrate body and the second substrate body; forming a third substrate body with a third signal transmission circuit layer and a fourth substrate body with a fourth signal transmission circuit layer on the carrier; separating the third substrate body and the fourth substrate body from the carrier; combining the first signal transmission circuit layer and the third signal transmission circuit layer through the first signal enhancement circuit layer; and combining the second signal transmission circuit layer and the fourth signal transmission circuit layer through the second signal enhancement circuit layer.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lin, Wen-Yu
Yang, Kai-Ming
Lin, Chen-Hao
Lin, Pu-Ju
Ko, Cheng-Ta
Wang, Chin-Sheng
Ma, Guang-Hwa
Tseng, Tzyy-Jang
Abstract
A circuit board structure includes a circuit substrate having opposing first and second sides, a redistribution structure disposed at the first side, and a dielectric structure disposed at the second side. The circuit substrate includes a first circuit layer disposed at the first side and a second circuit layer disposed at the second side. The redistribution structure is electrically coupled to the circuit substrate and includes a first leveling dielectric layer covering the first circuit layer, a first thin-film dielectric layer disposed on the first leveling dielectric layer and having a material different from the first leveling dielectric layer, and a first redistributive layer disposed on the first thin-film dielectric layer and penetrating through the first thin-film dielectric layer and the first leveling dielectric layer to be in contact with the first circuit layer. The dielectric structure includes a second leveling dielectric layer disposed below the second circuit layer.
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/488 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of soldered or bonded constructions
H01L 23/544 - Marks applied to semiconductor devices, e.g. registration marks, test patterns
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Wu, Ming-Hao
Cheng, Shih-Lian
Abstract
A printed circuit board stack structure includes a first printed circuit board, a second printed circuit board, and a filling glue layer. The first printed circuit board has at least one overflow groove, and includes first pads and a retaining wall surrounding the first pads. The second printed circuit board is disposed on the first printed circuit board, and includes second pads and conductive pillars located on some of the second pads. The conductive pillars are respectively connected to some of the first pads to electrically connect the second printed circuit board to the first printed circuit board. The filling glue layer fills between the first and the second printed circuit boards, and covers the first pads, the second pads, and the conductive pillars. The retaining wall blocks the filling glue layer so that a portion of the filling glue layer is accommodated in the overflow groove.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Tseng, Hao-Wei
Kuo, Chi-Hai
Li, Jeng-Ting
Chen, Ying-Chu
Lin, Pu-Ju
Ko, Cheng-Ta
Abstract
A package structure includes a substrate, a plurality of conductive pads, a light-emitting diode, a photo imageable dielectric material, and a black matrix. The substrate includes a top surface. The conductive pads are located on the top surface of the substrate. The light-emitting diode is located on the conductive pads. The photo imageable dielectric material is located between the light-emitting diode and the top surface of the substrate and between the conductive pads. An orthogonal projection of the light-emitting diode on the substrate is overlapped with an orthogonal projection of the photo imageable dielectric material on the substrate. The black matrix is located on the top surface of the substrate and the conductive pads.
H01L 33/54 - Encapsulations having a particular shape
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
37.
CIRCUIT BOARD STRUCTURE AND MANUFACTURING METHOD THEREOF
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Fan, Kuang-Ching
Hsieh, Chih-Peng
Wang, Cheng-Hsiung
Abstract
A circuit board structure includes a circuit substrate, a first circuit layer, and a second circuit layer. The circuit substrate has a surface and includes at least one conductive structure and at least one patterned circuit layer. The conductive structure is electrically connected to the patterned circuit layer, and an upper surface of the conductive structure is aligned with the surface. The first circuit layer is directly disposed on the surface of the circuit substrate and electrically connected to the conductive structure. A line width of the first circuit layer is less than or equal to ¼ of a line width of the patterned circuit layer. The second circuit layer is directly disposed on the first circuit layer and electrically connected to the first circuit layer.
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Lin, Wen Yu
Yang, Kai-Ming
Lin, Pu-Ju
Abstract
The invention discloses a glass carrier having a protection structure, comprising a glass body and a protection layer. The glass body has a top surface, a bottom surface, and a lateral surface. The protection layer covers the lateral surface of the glass body. The protection layer is a hard material with a stiffness coefficient higher than a stiffness coefficient of the glass body. The invention further discloses a manufacturing method of a glass carrier having a protection structure, comprising the following steps: covering the protection layer around the lateral surface of the glass body, wherein the protection layer is the hard material with the stiffness coefficient higher than the stiffness coefficient of the glass body.
C03C 17/00 - Surface treatment of glass, e.g. of devitrified glass, not in the form of fibres or filaments, by coating
C03C 17/42 - Surface treatment of glass, e.g. of devitrified glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating of an organic material and at least one non-metal coating
C03C 17/22 - Surface treatment of glass, e.g. of devitrified glass, not in the form of fibres or filaments, by coating with other inorganic material
H01L 23/10 - Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
39.
LIGHT-EMITTING DIODE PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lin, Wen-Yu
Yang, Kai-Ming
Abstract
A light-emitting diode package structure includes a heat dissipation substrate, a redistribution layer, and multiple light-emitting diodes. The heat dissipation substrate includes multiple copper blocks and a heat-conducting material layer. The copper blocks penetrate the heat-conducting material layer. The redistribution layer is disposed on the heat dissipation substrate and electrically connected to the copper blocks. The light-emitting diodes are disposed. on the redistribution layer and are electrically connected to the redistribution layer. A side of the light-emitting diodes away from the redistribution layer is not in contact with any component.
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
40.
LIGHT-EMITTING DIODE PACKAGE AND MANUFACTURING METHOD THEREOF
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lin, Wen-Yu
Yang, Kai-Ming
Lin, Chen-Hao
Abstract
A light-emitting diode package includes a redistribution layer, a light-emitting diode, a first dielectric layer, a plurality of wavelength conversion structures, and a transparent encapsulant. The light-emitting diode is disposed on and electrically connected to the redistribution layer. The light-emitting diode includes a first light-emitting diode, a second light-emitting diode, and a third light-emitting diode. The first dielectric layer is disposed on the redistribution layer and covers the light-emitting diode. The wavelength conversion structures are disposed on the first dielectric layer and respectively in contact with the second light-emitting diode and the third light-emitting diode. The transparent encapsulant is disposed on the first dielectric layer and covers the plurality of wavelength conversion structures. In addition, a manufacturing method of the light-emitting diode package is provided.
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Liao, Chun-Lin
Huang, Pei-Chang
Abstract
A circuit board includes an insulation part, a support layer disposed on the insulation part, a metal case disposed in the insulation part, a heat-exchanging fluid distributed within the enclosed space, and a first porous material distributed within the enclosed space. The metal case is thermally coupled to the support layer and includes a first inner surface, a second inner surface opposite to the first inner surface and positioned between the first inner surface and the support layer, a third inner surface connecting the first inner surface and the second inner surface, and an enclosed space surrounded by the first inner surface, the second inner surface and the third inner surface. The first porous material is disposed on the first inner surface.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Ko, Cheng-Ta
Lin, Pu-Ju
Chen, Shih-Chieh
Kuo, Chi-Hai
Li, Jeng-Ting
Abstract
A flexible circuit board and a manufacturing method thereof are provided. The flexible circuit board includes a circuit structure, a first cover layer, and a second cover layer. The circuit structure has a top surface and a bottom surface opposite to the top surface. The circuit structure includes multiple circuit layers and multiple insulating layers stacked alternately. A material of the insulating layers is a photosensitive dielectric material and a Young's modulus of the insulating layers is between 0.36 GPa and 8 GPa. The first cover layer is disposed on the top surface of the circuit structure. The second cover layer is disposed on the bottom surface of the circuit structure.
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
43.
CHIP PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Tseng, Tzyy-Jang
Lau, John Hon-Shing
Lin, Pu-Ju
Ko, Cheng-Ta
Abstract
A chip packaging structure and a manufacturing method thereof are provided. The chip packaging structure includes a substrate, at least one first chip, an adhesive material, a redistribution circuit structure, and multiple second chips. The substrate has a first surface, a second surface opposite to the first surface, and at least one cavity. The at least one first chip is disposed in the at least one cavity. The adhesive material is disposed in the at least one cavity and located between the substrate and the at least one first chip. The redistribution circuit structure is disposed on the first surface of the substrate, and is electrically connected to the at least one first chip. The second chips are disposed on the redistribution circuit structure, and are electrically connected to the redistribution circuit structure.
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Cheng, Shih-Lian
Abstract
A circuit board structure includes a substrate, a third dielectric layer, a fourth dielectric layer, a first external circuit layer, a second external circuit layer, a conductive through hole, a first annular retaining wall, and a second annular retaining wall. The conductive through hole penetrates through the third dielectric layer, a second dielectric layer, and the fourth dielectric layer. The conductive through hole is electrically connected to the first external circuit layer and the second external circuit layer. The first annular retaining wall is disposed in the third dielectric layer, surrounds the conductive through hole, and is electrically connected to the first external circuit layer and the first inner circuit layer. The second annular retaining wall is disposed in the fourth dielectric layer, surrounds the conductive through hole, and connects to the second external circuit layer and the second inner circuit layer electrically.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Cheng, Shih-Lian
Abstract
A circuit board structure includes a substrate, a third dielectric layer, a fourth dielectric layer, a first external circuit layer, a second external circuit layer, a conductive through hole electrically connected to the first and second external circuit layers, a first annular retaining wall surrounding the conductive through hole, and a second annular retaining wall surrounding the conductive through hole. The first annular retaining wall is electrically connected to the first external circuit layer and a first inner circuit layer. The second annular retaining wall is electrically connected to the second external circuit layer and a second inner circuit layer. A first ground circuit, the first annular retaining wall, and the first inner circuit layer define a first ground path surrounding a first signal circuit. A second ground circuit, the second annular retaining wall, and the second inner circuit layer define a second ground path surrounding a second signal circuit.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Cheng, Shih-Lian
Abstract
A circuit board structure includes a first dielectric layer, first and second inner circuit layers, a conductive connection layer, a second dielectric layer, two third dielectric layers, third and fourth inner circuit layers, two conductive through vias, first and second annular retaining walls, two fourth dielectric layers, first and second external circuit layers, and third and fourth annular retaining walls. The conductive through vias penetrate the third and second dielectric layers and electrically connect the third and fourth inner circuit layers. The first and second annular retaining walls surround the conductive through vias and electrically connect the third and first and the fourth and second inner circuit layers. The third and fourth annular retaining walls are respectively disposed in the fourth dielectric layers and electrically connect the first external circuit layer and the third inner circuit layer and the second external circuit layer and the fourth inner circuit layer.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lau, John Hon-Shing
Tain, Ra-Min
Ko, Cheng-Ta
Tseng, Tzyy-Jang
Chien, Chun-Hsien
Abstract
A circuit carrier includes a substrate, a first build-up circuit structure, a second build-up circuit structure, a fine redistribution structure and at least one conductive through hole. The substrate has a top surface and a bottom surface opposite to each other. The first build-up circuit structure is disposed on the top surface of the substrate and electrically connected to the substrate. The second build-up circuit structure is disposed on the bottom surface of the substrate and electrically connected to the substrate. The fine redistribution structure is directly attached on the first build-up circuit structure, wherein a line width and a line spacing of the fine redistribution structure are smaller than those of the first build-up circuit structure. The conductive through hole penetrates the fine redistribution structure and a portion of the first build-up circuit structure and is electrically connected to the fine redistribution structure and the first build-up circuit structure.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Nien, Heng-Ming
Lu, Chih-Chiang
Chan, Chih-Kai
Cheng, Shih-Lian
Abstract
An electroplating apparatus includes an anode and a cathode, a power supply, a regulating plate, and a controller. The power supply is electrically connected to the anode and the cathode. The regulating plate is disposed between the anode and the cathode. The regulating plate includes an insulation grid plate and a plurality of wires. The controller is electrically connected to the plurality of wires to control a state of an electromagnetic field around the plurality of wires. An electroplating method is also provided.
H05K 3/18 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
Unimicron Technology Corporation (Taiwan, Province of China)
Inventor
Hsieh, Ching-Ho
Wu, Ming-Hsing
Wu, Kuei-Sheng
Abstract
A circuit board assembly is provided and includes a first circuit board, a second circuit board and a first connecting module. The first connecting module includes a first connecting wire, a first connector and a second connector. The first circuit board includes a first processor, and the second circuit board includes a second processor. One end of the first connector is connected to one end of the first connecting wire, and the other end of the first connector is connected to the first circuit board. One end of the second connector is connected to the other end of the first connecting wire, and the other end of the second connector is connected to the second circuit board. The first connector is adjacent to the first processor, and the second connector is adjacent to the second processor.
H01R 12/79 - Coupling devices for flexible printed circuits, flat or ribbon cables or like structures connecting to rigid printed circuits or like structures
50.
Electroplating apparatus and electroplating method
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Nien, Heng-Ming
Lu, Chih-Chiang
Wu, Cho-Ying
Cheng, Shih-Lian
Abstract
An electroplating apparatus including an anode and a cathode, a power supply, and a regulating plate is provided. The power supply is electrically connected to the anode and the cathode. The regulating plate is arranged between the anode and the cathode. The regulating plate includes an insulating grid plate and a plurality of magnetic components. The plurality of magnetic components are uniformly and randomly arranged on the insulating grid plate. An electroplating method is also provided.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Chen, Ming-Ru
Tseng, Tzyy-Jang
Lo, Cheng-Chung
Abstract
A manufacturing method of a light emitting diode (LED) package structure includes the following steps. A carrier is provided. A redistribution layer is formed on the carrier. A plurality of active devices are formed on the carrier. A plurality of LEDs are transferred on the redistribution layer. The LEDs and the active devices are respectively electrically connected to the redistribution layer. The active devices are adapted to drive the LEDs, respectively. A molding compound is formed on the redistribution layer to encapsulate the LEDs. The carrier is removed to expose a bottom surface of the redistribution layer.
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
H01L 33/56 - Materials, e.g. epoxy or silicone resin
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
52.
Package structure with interconnection between chips and packaging method thereof
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Chen, Jia Shiang
Lan, Chung-Yu
Chen, Yu-Shen
Abstract
A packaging method includes steps of: forming first and second wiring layers electrically connected to each other on two opposite surfaces of a substrate; then configuring mother substrate interconnecting bumps on the first wiring layer and along perimeter of a daughter substrate unit, and then cutting along the perimeter of the daughter substrate unit to expose lateral faces of the mother substrate interconnecting bumps and configuring solder materials thereon; then configuring first and second chips on the first and the second wiring layers to form electrical interconnection between the two chips. A package structure enables interconnecting two chips through one single daughter substrate unit with its wiring layers directly connecting with lateral face contacts of the mother carrier substrate through the mother substrate interconnecting bumps. Hence, area of the daughter substrate unit is reduced; lengths of the interconnection paths are shortened, and qualities of communication and space utilization are enhanced.
H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H05K 1/18 - Printed circuits structurally associated with non-printed electric components
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
53.
METHOD OF IMPROVING WIRE STRUCTURE OF CIRCUIT BOARD AND IMPROVING WIRE STRUCTURE OF CIRCUIT BOARD
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Kuo, Chun Yi
Liang, Jia Hao
Lin, Ching Ku
Abstract
The invention discloses a method of improving a wire structure of a circuit board, comprising the following steps: providing a multi-layer circuit board, including an inner circuit and a surface circuit; forming an opening to expose the inner circuit; forming a first circuit layer in the opening; removing the first circuit layer, the first conductive circuit, and the surface circuit on the multi-layer circuit board and removing a part of the first circuit layer in the opening; forming an adhesion promoter layer in the opening and on the multi-layer circuit board; forming a second conductive circuit on the adhesion promoter layer and on the first conductive circuit layer in the opening; forming a photoresist layer on the second conductive circuit layer; forming a second circuit layer in the opening and on the multi-layer circuit board, and removing the photoresist layer and a part of the second conductive circuit.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Tain, Ra-Min
Lau, John Hon-Shing
Lin, Pu-Ju
Ye, Wei-Ci
Kuo, Chi-Hai
Ko, Cheng-Ta
Tseng, Tzyy-Jang
Abstract
A vapor chamber structure includes a thermally conductive shell, a capillary structure layer, and a working fluid. The thermally conductive shell includes a first thermally conductive portion and a second thermally conductive portion. The first thermally conductive portion and the second thermally conductive portion are a thermally conductive plate that is integrally formed, and the thermally conductive shell is formed by folding the thermally conductive plate in half and then sealing the thermally conductive plate. The first thermally conductive portion has at least one first cavity, the second thermally conductive portion has at least one second cavity. At least one sealed chamber is defined between the thermally conductive plate, the first cavity and the second cavity. A pressure in the sealed chamber is lower than a standard atmospheric pressure. The capillary structure layer covers an inner wall of the sealed chamber. The working fluid is filled in the sealed chamber.
F28D 15/04 - Heat-exchange apparatus with the intermediate heat-transfer medium in closed tubes passing into or through the conduit walls in which the medium condenses and evaporates, e.g. heat-pipes with tubes having a capillary structure
F28D 15/02 - Heat-exchange apparatus with the intermediate heat-transfer medium in closed tubes passing into or through the conduit walls in which the medium condenses and evaporates, e.g. heat-pipes
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Chen, Yu-Shen
Lan, Chung-Yu
Abstract
A substrate is manufactured by drilling a chip containing groove in a composite inner layer circuit structure, having a component connecting end of a circuit layer protruding from a mounting side wall in the chip containing groove, mounting a chip component in the chip containing groove, and connecting the surface bonding pad to the component connecting end. The chip component in the present invention penetrates at least two circuit layers, and the surface bonding pad is bonded to the component connecting end of the circuit layer directly, reducing the occupied area of the chip component in each one of the circuit layers, and increasing the area for circuit disposing and the possible amount of chip components that may be mounted in the substrate.
H05K 3/02 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
H01L 23/485 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
H05K 1/18 - Printed circuits structurally associated with non-printed electric components
H05K 3/32 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Ma, Guang-Hwa
Wang, Chin-Sheng
Tain, Ra-Min
Abstract
A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, at least one second build-up circuit layer, at least one conductive through hole, and a fine redistribution layer (RDL). The embedded block is fixed in a through cavity of the dielectric substrate. The electronic component is disposed in an opening of the embedded block. The first build-up circuit layer is disposed on a top surface of the dielectric substrate and electrically connected with the electronic component. The second build-up circuit layer is disposed on a bottom surface of the dielectric substrate and covers the embedded block. The conductive through hole is disposed in a via of the embedded block and electrically connects the first and the second build-up circuit layers. The fine RDL is disposed on and electrically connected to the first build-up circuit layer.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lee, Hsin-Hung
Chien, Chun-Hsien
Hsieh, Yu-Chung
Fang, Yi-Hsiu
Tseng, Tzyy-Jang
Abstract
An inspection apparatus used for inspecting a bare circuit board is provided, where the bare circuit board includes an antenna. The inspection apparatus includes a holding stage, a probing device, and a measurement device. The holding stage can hold the bare circuit board. The measurement device is electrically connected to the probing device and electrically connected to the antenna via the probing device. The measurement device can input a first testing signal to the antenna. The antenna can input a second testing signal to the measurement device after receiving the first testing signal. The measurement device can measure the antenna according to the second testing signal, where the first testing signal and the second testing signal both pass through no active component.
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Wang, Tse-Wei
Abstract
The invention discloses a circuit board enhancing structure and a manufacture method thereof. The method includes the following steps: providing a substrate; forming a first circuit on the substrate; forming a first dielectric layer enclosing the first circuit on the substrate; forming a first opening on the first dielectric layer; forming a first pattern photoresist layer on the first dielectric layer to divide a surface of the first dielectric layer as a first structure enhancing area and a second circuit area, wherein the first opening is disposed in the first structure enhancing area; forming a second circuit in the second circuit area and a first enhancing structure in the first opening, wherein the first enhancing structure protrudes from the first opening; removing the first pattern photoresist layer; and forming a second dielectric layer enclosing the second circuit and the first enhancing structure on the first dielectric layer.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Li, Ke-Chien
Kuo, Chun-Hung
Liang, Chih-Chun
Abstract
A circuit board includes a substrate, a build-up circuit structure, a graphene oxide layer, a graphene layer, and an insulating material layer. The build-up circuit structure is disposed on the substrate, including at least one inner circuit, at least one dielectric layer, an outer circuit, and multiple conductive vias. The dielectric layer is disposed on the inner circuit. The outer circuit is disposed on the dielectric layer. The conductive vias penetrate the dielectric layer and electrically connect the inner circuit and the outer circuit. The graphene oxide layer and the graphene layer are disposed on the build-up circuit structure at an interval. The graphene oxide layer and the graphene layer are respectively disposed in correspondence to the dielectric layer and the outer circuit. The insulating material layer is disposed on the graphene oxide layer and the graphene layer. The insulating material layer has an opening, which exposes the graphene layer.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Tseng, Tzyy-Jang
Wang, Chin-Sheng
Tain, Ra-Min
Abstract
A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, and at least one second build-up circuit layer. The dielectric substrate includes a through cavity penetrating the dielectric substrate. The embedded block is fixed in the through cavity. The embedded block includes a first through hole and a second through hole. The electronic component is disposed in the through hole of the embedded block. The first build-up circuit layer is disposed on the top surface of the dielectric substrate and covers the embedded block. The second build-up circuit layer is disposed on the bottom surface of the dielectric substrate and covers the embedded block.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Chang, Chi-Min
Chen, Ching-Sheng
Huang, Jun-Rui
Liao, Wei-Yu
Lin, Yi-Pin
Abstract
An interlayer connective structure is suitable for being formed in a wiring board, in which the wiring board includes two traces and an insulation part between the traces. The insulation part has a through hole. The interlayer connective structure located in the through hole is connected to the traces. The interlayer connective structure includes a column and a pair of protuberant parts. The protuberant parts are located at two ends of the through hole respectively and connected to the column and the traces. The protuberant parts stick out from the outer surfaces of the traces respectively. Each of the protuberant parts has a convex curved surface, in which the distance between the convex curved surface and the axis of the through hole is less than the radius of the through hole.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Peng, Chia-Yu
Lau, John Hon-Shing
Yang, Kai-Ming
Lin, Pu-Ju
Ko, Cheng-Ta
Tseng, Tzyy-Jang
Abstract
A circuit board structure includes a redistribution structure layer, a build-up circuit structure layer, and a connection structure layer. The redistribution structure layer has a first and second surface, and includes an inner and outer dielectric layer, first connecting pads, and chip pads. A bottom surface of each first connecting pad is aligned with the first surface, and the chip pads are protruded from and located on the second surface. The build-up circuit structure layer includes second connecting pads. The connection structure layer is disposed between the redistribution structure layer and the build-up circuit structure layer and includes a substrate and conductive paste pillars penetrating the substrate. The first connecting pads are electrically connected to the second connecting pads via the conductive paste pillars, respectively. A top surface of each conductive paste pillar is aligned with the first surface of the redistribution structure layer.
H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Wang, Chin-Sheng
Huang, Pei-Chang
Abstract
A method of manufacturing a circuit board is provided. The method includes forming an open substrate, in which the open substrate includes a substrate body having a top surface and a bottom surface; an opening in the substrate body, in which the opening has a first sidewall and a second sidewall opposite to the first sidewall; and at least one first fixing portion and at least one second fixing portion extending from the substrate body toward the opening, in which the first fixing portion and the second fixing portion are respectively protruded from the first sidewall and the second sidewall. A heat dissipation block is inserted in the opening to clamp the heat dissipation block between the first fixing portion and the second fixing portion, in which the heat dissipation block includes the heat dissipation block comprises a ceramic or a composite material.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Yang, Kai-Ming
Lin, Chen-Hao
Ko, Cheng-Ta
Lau, John Hon-Shing
Chen, Yu-Hua
Tseng, Tzyy-Jang
Abstract
A method of manufacturing package structure with following steps is disclosed herein. An insulating composite layer is formed on a metal layer of a carrier board. A chip packaging module including a sealant and a first chip embedded therein is disposed on the insulating composite layer, in which the first chip has a plurality of conductive pads. A first circuit layer module including a dielectric layer and a circuit layer is formed on the chip packaging module, in which the circuit layer is on the dielectric layer and electrically connected to the conductive pads through a conductive vias in the dielectric layer. A second chip is disposed on the first circuit layer module. A second circuit layer module is formed on the first circuit layer module and the second chip. A protecting layer is formed on the second circuit layer module.
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lin, Pu-Ju
Yang, Kai-Ming
Ko, Cheng-Ta
Abstract
A manufacturing method of a chip package structure includes the following steps. A plurality of chips is disposed on a first insulating layer. The back surface of each of the chips is in direct contact with the first insulating layer. A stress buffer layer is formed to extend and cover the active surface and the peripheral surface of each of the chips, and a bottom surface of the stress buffer layer is aligned with the back surface of each of the chips. The stress buffer layer has an opening exposing a part of the active surface of each of the chips, and the redistribution layer is electrically connected to each of the chips through the opening. A plurality of solder balls is electrically connected to the redistribution layer exposed by the blind holes. A singularizing process is performed to form a plurality of chip package structures separated from each other.
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lau, John Hon-Shing
Ko, Cheng-Ta
Lin, Pu-Ju
Yang, Kai-Ming
Kuo, Chi-Hai
Peng, Chia-Yu
Tseng, Tzyy-Jang
Abstract
A package structure includes a redistribution layer, a chip assembly, a plurality of solder balls, and a molding compound. The redistribution layer includes redistribution circuits, photoimageable dielectric layers, conductive through holes, and chip pads. One of the photoimageable dielectric layers located on opposite two outermost sides has an upper surface and openings. The chip pads are located on the upper surface and are electrically connected to the redistribution circuits through the conductive through holes. The openings expose portions of the redistribution circuits to define solder ball pads. Line widths and line spacings of the redistribution circuits decrease in a direction from the solder ball pads towards the chip pads. The chip assembly is disposed on the chip pads and includes at least two chips with different sizes. The solder balls are disposed on the solder ball pads, and the molding compound at least covers the chip assembly.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
68.
Package structure and manufacturing method thereof
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lau, John Hon-Shing
Ko, Cheng-Ta
Lin, Pu-Ju
Yang, Kai-Ming
Peng, Chia-Yu
Kuo, Chi-Hai
Tseng, Tzyy-Jang
Abstract
A package structure includes at least one first redistribution layer, at least one second redistribution layer, a chip pad, a solder ball pad, a chip, a solder ball, and a molding compound. The first redistribution layer includes a first dielectric layer and a first redistribution circuit that fills a first opening and a second opening of the first dielectric layer. The first dielectric layer is aligned with the first redistribution circuit. The second redistribution layer includes a second and a third dielectric layers and a second redistribution circuit. The third dielectric layer is aligned with the second redistribution circuit. The chip pad and the solder ball pad are electrically connected to the first and the second redistribution circuits respectively. The chip and the solder ball are disposed on the chip pad and the solder ball pad respectively. The molding compound at least covers the chip and the chip pad.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
69.
Circuit board structure and manufacturing method thereof
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Kuo, Chun-Hung
Chen, Kuo-Ching
Abstract
A circuit board structure, including a circuit layer, a first dielectric layer, a first graphene layer, a first conductive via, and a first built-up circuit layer, is provided. The circuit layer includes multiple pads. The first dielectric layer is disposed on the circuit layer and has a first opening. The first opening exposes the pads. The first graphene layer is conformally disposed on the first dielectric layer and in the first opening, and has a first conductive seed layer region and a first non-conductive seed layer region. The first conductive via is disposed in the first opening. The first built-up circuit layer is disposed corresponding to the first conductive seed layer region. The first built-up circuit layer exposes the first non-conductive seed layer region and is electrically connected to the pads through the first conductive via and the first conductive seed layer region.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Tseng, Tzyy-Jang
Chen, Yu-Hua
Chien, Chun-Hsien
Yeh, Wen-Liang
Tain, Ra-Min
Abstract
An embedded component structure includes a board, an electronic component, and a dielectric material layer. The board has a through cavity. The board includes an insulating core layer and a conductive member. The insulating core layer has a first surface and a second surface opposite thereto. The through cavity penetrates the insulating core layer. The conductive member extends from a portion of the first surface along a portion of the side wall of the through cavity to a portion of the second surface. The electronic component includes an electrode. The electronic component is disposed in the through cavity. The dielectric material layer is at least filled in the through cavity. The connection circuit layer covers and contacts the conductive member and the electrode. A manufacturing method of an embedded component structure is also provided.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Peng, Yan-Jia
Chen, Kuo-Ching
Lin, Pu-Ju
Abstract
A method of fabricating a wiring board with an embedded interposer substrate includes preparing a main substrate, forming a recess on the main substrate, placing an interposer substrate into the recess, electrically connecting a second pad of the interposer substrate and the first pad of the main substrate, and filling a gap between the interposer substrate and the main substrate with an underfill. The recess exposes a first pad of the main substrate. A second pad of interposer substrate and the first pad of the main substrate are made of the same metal and formed in different outer surface profiles. The underfill entirely touches side surfaces and a bottom surface of the interposer substrate.
H01L 23/12 - Mountings, e.g. non-detachable insulating substrates
H01L 23/528 - Layout of the interconnection structure
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 23/16 - Fillings or auxiliary members in containers, e.g. centering rings
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 21/50 - Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
72.
Light emitting diode package structure and manufacturing method thereof and manufacturing method of display device
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Li, Jeng-Ting
Kuo, Chi-Hai
Ko, Cheng-Ta
Lin, Pu-Ju
Abstract
A light emitting diode (LED) package structure includes a glass substrate, conductive through holes, active elements, an insulating layer, LEDs and pads. The glass substrate has an upper surface and a lower surface. The conductive through holes penetrate the glass substrate and connect the upper and the lower surfaces. The active elements are disposed on the upper surface of the glass substrate and electrically connected to the conductive through holes. The insulating layer is disposed on the upper surface and covers the active elements. The LEDs are disposed on the insulating layer and electrically connected to at least one of the active elements. The pads are disposed on the lower surface of the glass substrate and electrically connected to the conductive through holes. A source of at least one active elements is directly electrically connected to at least one of the corresponding pads through the corresponding conductive through hole.
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
73.
Circuit board structure and manufacturing method thereof
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lau, John Hon-Shing
Ko, Cheng-Ta
Lin, Pu-Ju
Kuo, Chi-Hai
Yang, Kai-Ming
Peng, Chia-Yu
Lee, Shao-Chien
Tseng, Tzyy-Jang
Abstract
A circuit board structure includes a first sub-board including a plurality of circuit patterns, a second sub-board including a plurality of pads, and a connecting structure layer having a plurality of through holes and including an insulating layer, first and second adhesive layers, and a plurality of conductive blocks. The first adhesive layer is directly connected to the first sub-board. The second adhesive layer is directly connected to the second sub-board. The through holes penetrate through the first adhesive layer, the insulating layer, and the second adhesive layer. The conductive blocks are located in the through holes. An upper surface and a lower surface of each conductive block are respectively lower than a first surface of the first adhesive layer and a second surface of the second adhesive layer relatively away from the insulating layer. Each circuit pattern contacts the upper surface, and each pad contacts the lower surface.
H05K 1/09 - Use of materials for the metallic pattern
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 1/14 - Structural association of two or more printed circuits
H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
H05K 1/18 - Printed circuits structurally associated with non-printed electric components
H05K 3/20 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
H05K 3/36 - Assembling printed circuits with other printed circuits
H05K 3/38 - Improvement of the adhesion between the insulating substrate and the metal
H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
H05K 3/02 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
74.
Package structure and manufacturing method thereof
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Tseng, Tzyy-Jang
Ko, Cheng-Ta
Lin, Pu-Ju
Kuo, Chi-Hai
Yang, Kai-Ming
Abstract
A manufacturing method of a package structure is provided, which includes the following steps. A carrier having a surface is provided. A copper foil layer is laminated on the surface of the carrier. A subtractive process is performed on the copper foil layer to form a copper foil circuit layer on the carrier. The copper foil circuit layer exposes a part of the surface of the carrier. A build-up structure layer is formed on the copper foil circuit layer and the surface of the carrier. A first surface of the copper foil circuit layer is aligned with a second surface of the build-up structure layer. At least one electronic component is disposed on the build-up structure layer. A package colloid is formed to cover the electronic component and the build-up structure layer. The carrier is removed to expose the first surface of the copper foil circuit layer.
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 33/54 - Encapsulations having a particular shape
75.
Metal bump structure and manufacturing method thereof and driving substrate
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Tseng, Tzyy-Jang
Chen, Ming-Ru
Lo, Cheng-Chung
Wang, Chin-Sheng
Tang, Wen-Sen
Abstract
A manufacturing method of a metal bump structure is provided. A driving base is provided. At least one pad and an insulating layer are formed on the driving base. The pad is formed on an arrangement surface of the driving base and has an upper surface. The insulating layer covers the arrangement surface of the driving base and the pad, and exposes a part of the upper surface of the pad. A patterned metal layer is formed on the upper surface of the pad exposed by the insulating layer, and extends to cover a part of the insulating layer. An electro-less plating process is performed to form at least one metal bump on the patterned metal layer. A first extension direction of the metal bump is perpendicular to a second extension direction of the driving base.
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Wang, Pei-Wei
Nien, Heng-Ming
Chen, Ching-Sheng
Lin, Yi-Pin
Cheng, Shih-Liang
Abstract
A co-axial structure includes a substrate, a first conductive structure, a second conductive structure, and an insulating layer. The substrate includes a first surface. The first conductive structure includes a first circuit deposited on the first surface and a first via penetrating the substrate. The second conductive structure includes a second circuit deposited on the first surface and a second via penetrating the substrate. The first via and the second via extend along a first direction. The first circuit and the second circuit extend along a second direction, and the second direction is perpendicular to the first direction. The insulating layer is located between the first via and the second via. The insulating layer includes a filler. The first conductive structure and the second conductive structure are electrically insulated. The first circuit and the second circuit are coplanar.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lu, Chih-Chiang
Chang, Chi-Min
Lee, Shao-Chien
Huang, Jun-Rui
Chang, Ming-Ting
Abstract
A circuit board includes a first dielectric material, a second dielectric material, a third dielectric material, a first external circuit layer, a second external circuit layer, multiple conductive structures, and a conductive via structure. Dielectric constants of the first, the second and the third dielectric materials are different. The first and the second external circuit layers are respectively disposed on the first and the third dielectric materials. The conductive via structure at least penetrates the first and the second dielectric materials and is electrically connected to the first and the second external circuit layers to define a signal path. The conductive structures are electrically connected to each other and surround the first, the second and the third dielectric materials. The conductive structures are electrically connected to the first and the second external circuit layers to define a ground path surrounding the signal path.
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 3/00 - Apparatus or processes for manufacturing printed circuits
H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
78.
CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF AND ELECTRONIC DEVICE
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Huang, Jun-Rui
Lu, Chih-Chiang
Lin, Yi-Pin
Chen, Ching-Sheng
Abstract
A circuit board includes a first substrate, a second substrate, a third substrate, a plurality of conductive structures and a conductive via structure. The second substrate is disposed between the first substrate and the third substrate. The third substrate has an opening and includes a first dielectric layer, a second dielectric layer, and a third dielectric layer. The opening penetrates the first dielectric layer and the second dielectric layer, and the third dielectric layer fully fills the opening. The conductive via structure penetrates the first substrate, the second substrate, the third dielectric layer of the third substrate, and is electrically connected to the first substrate and the third substrate to define a signal path. The first substrate, the second substrate, and the third substrate are electrically connected through the conductive structures to define a ground path, and the ground path surrounds the signal path.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lu, Chih-Chiang
Liu, Hsin-Ning
Huang, Jun-Rui
Wang, Pei-Wei
Chen, Ching Sheng
Cheng, Shih-Lian
Abstract
A circuit board includes a first external circuit layer, a first substrate, a second substrate, a third substrate, and a conductive through hole structure. The first substrate includes conductive pillars electrically connecting the first external circuit layer and the second substrate. The second substrate has an opening and includes a first dielectric layer. The opening penetrates the second substrate, and the first dielectric layer fills the opening. The third substrate includes an insulating layer, a second external circuit layer, and conductive holes. A conductive material layer of the conductive through hole structure covers an inner wall of a through hole and electrically connects the first and the second external circuit layers to define a signal path. The first external circuit layer, the conductive pillars, the second substrate, the conductive holes and the second external circuit layer are electrically connected to define a ground path surrounding the signal path.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lu, Chih-Chiang
Nien, Heng-Ming
Chen, Ching-Sheng
Chang, Ching
Chang, Ming-Ting
Chang, Chi-Min
Lee, Shao-Chien
Huang, Jun-Rui
Cheng, Shih-Lian
Abstract
Provided is a circuit board, including a first substrate, a second substrate, a third substrate, a fourth substrate, multiple conductive structures, and a conductive via structure. The second substrate is disposed between the first substrate and the third substrate. The third substrate is disposed between the second substrate and the fourth substrate. The third substrate has an opening penetrating the third substrate and includes a first dielectric layer filling the opening. The conductive via structure penetrates the first substrate, the second substrate, the first dielectric layer of the third substrate, and the fourth substrate, and is electrically connected to the first substrate and the fourth substrate to define a signal path. The first substrate, the second substrate, the third substrate and the fourth substrate are electrically connected through the conductive structures to define a ground path, and the ground path surrounds the signal path.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Yu, Yunn-Tzu
Hsieh, Ching-Ho
Tsai, Wang-Hsiang
Abstract
A circuit board structure includes a body, multiple first pads, a conductive assembly, multiple first engaging components, and multiple second engaging components. The body includes a first portion and a second portion integrally formed. A first surface of the first portion directly contacts a second surface of the second portion. A first region of the first surface protrudes from the second portion, and a second region of the second surface protrudes from the first portion. The first pads and the first engaging components are disposed on the first portion of the body and located in the first region of the first surface. The conductive assembly and the second engaging components are disposed on the second portion of the body and located in the second region of the second portion. The first pads are located between the first engaging components, and the conductive assembly is located between the second engaging components.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Chen, Ming-Ru
Tseng, Tzyy-Jang
Lo, Cheng-Chung
Abstract
A manufacturing method of a light emitting diode (LED) package structure includes the following steps. A carrier is provided. A redistribution layer is formed on the carrier. A plurality of active devices are formed on the carrier. A plurality of LEDs are transferred on the redistribution layer. The LEDs and the active devices are respectively electrically connected to the redistribution layer. The active devices are adapted to drive the LEDs, respectively. A molding compound is formed on the redistribution layer to encapsulate the LEDs. The carrier is removed to expose a bottom surface of the redistribution layer.
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H01L 33/56 - Materials, e.g. epoxy or silicone resin
83.
Device and method for measuring thickness of dielectric layer in circuit board
Unimicron Technology Corporation (Taiwan, Province of China)
Inventor
Chang, Cheng-Jui
Chang, Hung-Lin
Abstract
A method for measuring a thickness of a dielectric layer in a circuit board is provided. The method for measuring the thickness of the dielectric layer includes the following steps. First, a circuit board including at least one dielectric layer and at least two circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes a test area including a test pattern and a through hole. The test pattern includes at least two metal layers. Next, a measuring device including a main body, at least one light source and a lens module is provided. When the main body is moved into the through hole, the light source emits light to the dielectric layer and the metal layer, and the lens module shoots the dielectric layer and the metal layer to form a captured image. The thickness of the dielectric layer is obtained via the captured image.
Unimicron Technology Corporation (Taiwan, Province of China)
Inventor
Chang, Cheng-Jui
Chang, Hung-Lin
Chiang, Jeng-Wey
Abstract
A method for measuring thickness of dielectric layer in circuit board includes the following steps: First, circuit board including dielectric layer and circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes test area including test pattern and through hole. The test pattern includes first conductor and second conductors. The distance between the side of the through hole and the second conductor is less than the distance between the side of the through hole and the first conductor. Next, measuring device including conductive pin and sensing element is provided. Next, the conductive pin is powered, and one end of the conductive pin is electrically connected to the second conductor. Next, the sensing element is moved along the through hole to obtain sensing curve, and the thickness of the dielectric layer is calculated via variations of the sensing curve.
G01B 7/06 - Measuring arrangements characterised by the use of electric or magnetic techniques for measuring length, width, or thickness for measuring thickness
Unimicron Technology Corporation (Taiwan, Province of China)
Inventor
Chang, Cheng-Jui
Chang, Hung-Lin
Abstract
An electromagnetic measuring probe device for measuring a thickness of a dielectric layer of a circuit board and a method thereof are disclosed. The circuit board has at least one dielectric layer, at least two conductive layers and a test area. The test area has a test pattern and a through hole. The electromagnetic measuring probe device has a probe-measuring unit, an external conductive element, plural magnetic powder groups, and a maintaining unit. The probe-measuring unit has a transparent tube and an internal conductive pin. The external conductive element electrically connects with the test pattern. The conductive layers and the internal conductive pin generate a magnetic field while the probe-measuring unit enters into the through hole. The magnetic powder groups magnetically attracted are gathered to positions corresponding to thickness-range positions of the conductive layers and held by the maintaining unit, thus a gap between the two dielectric layers is obtained.
G01B 7/06 - Measuring arrangements characterised by the use of electric or magnetic techniques for measuring length, width, or thickness for measuring thickness
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Kuo, Chun Hung
Chen, Kuo Ching
Abstract
A circuit board is manufactured by mounting a first circuit layer, mounting a conductive bump on the first circuit layer, covering the first circuit layer with a first dielectric layer which exposes the conductive bump, mounting a second dielectric layer on the first dielectric layer with a second dielectric layer opening that exposes the conductive bump, and finally, mounting a second circuit layer on the surface of the second dielectric layer and in the second dielectric layer opening. Since the surface roughness of the second dielectric layer and the second dielectric layer opening is low, it is unlikely to form nano voids between the second dielectric layer and the second circuit layer, and the second circuit layer may be attached to the second dielectric layer firmly, which is an advantage for fine line circuit disposal.
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 3/20 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
87.
Chip packaging structure and manufacturing method thereof
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Yang, Kai-Ming
Peng, Chia-Yu
Chen, Pei-Chi
Lin, Pu-Ju
Ko, Cheng-Ta
Abstract
A chip packaging structure includes a chip, a redistribution layer, a solder ball, an encapsulant, and a stress buffer layer. The chip has an active surface and a back surface opposite to each other, and a peripheral surface connected to the active surface and the back surface. The redistribution layer is disposed on the active surface of the chip. The solder ball is disposed on the redistribution layer, and the chip is electrically connected to the solder ball through the redistribution layer. The encapsulant encapsulates the active surface and the back surface of the chip, the redistribution layer, and part of the solder ball. The stress buffer layer at least covers the peripheral surface of the chip. An outer surface of the stress buffer layer is aligned with a side surface of the encapsulant.
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
88.
Chip package structure and manufacturing method thereof
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lin, Pu-Ju
Yang, Kai-Ming
Ko, Cheng-Ta
Abstract
A chip package structure including a chip, a stress buffer layer, a first insulating layer, a redistribution layer, a second insulating layer, and a solder ball is provided. The chip has an active surface, a back surface and a peripheral surface. The stress buffer layer covers the active surface and the peripheral surface, and the first insulating layer is disposed on the back surface. A bottom surface of the stress buffer layer is aligned with the back surface of the chip. The redistribution layer is electrically connected to the chip through an opening of the stress buffer layer. The second insulating layer covers the stress buffer layer and the redistribution layer. The solder ball is disposed in a blind hole of the second insulating layer and electrically connected to the redistribution layer. A top surface of the solder ball protrudes from an upper surface of the second insulating layer.
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Chen, Chun-Hao
Lin, Chia-Lung
Chou, Chien-Hsiang
Chiang, Yi-Lin
Lin, Chien-Chen
Abstract
A wiring board includes an insulating layer, a wiring layer and a plurality of conductive columns. The insulating layer has a first surface and a second surface opposite to the first surface. The wiring layer is disposed in the insulating layer and has a third surface and a fourth surface opposite to the third surface. The insulating layer covers the third surface, and the second surface of the insulating layer is flush with the fourth surface of the wiring layer. The conductive columns are disposed in the insulating layer and connected to the wiring layer. The conductive columns extend from the third surface of the wiring layer to the first surface of the insulating layer, and protrude from the first surface.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H05K 3/06 - Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
90.
Stacked die chip package structure and method of manufacturing the same
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Wang, Tzu-Hsuan
Liu, Chen-Hsien
Abstract
A chip package structure includes a wiring board, a first chip, a second chip, a thermally conductive material, a molding compound and a heat dissipation part. The wiring board includes a plurality of circuit pads. The first chip is mounted on the wiring board and is electrically connected to at least one of the circuit pads. The first chip is located between the second chip and the wiring board. The thermally conductive material is located on the wiring board and penetrates the second chip and the first chip to extend to the wiring board. The molding compound is disposed on the wiring board, and the heat dissipation part is disposed on the molding material and thermally coupled to the thermally conductive material.
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices
H01L 23/433 - Auxiliary members characterised by their shape, e.g. pistons
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lin, Shih-Yao
Chan, Ming-Chang
Lin, Leng-Chieh
Chan, Po-Ching
Chan, Meng-Chia
Cheng, Kuo-Feng
Abstract
A display device includes a display and a transflective module. The transflective module is disposed at one side of the display and includes a glass substrate and a transflective structure layer. The transflective structure layer is disposed on the glass substrate and located between the glass substrate and the display.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Wu, Ming-Hao
Chen, Hsuan-Wei
Po, Chi-Chun
Abstract
A package carrier includes a circuit structure layer and a heat-conducting element. The circuit structure layer includes a notch portion. The heat-conducting element includes a first heat-conducting portion and a second heat-conducting portion vertically connected to the first heat-conducting portion. The notch portion exposes the first heat-conducting portion, and an outer surface of the second heat-conduction portion is aligned with a side surface of the circuit structure layer.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H05K 3/00 - Apparatus or processes for manufacturing printed circuits
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Lin, Chien-Chen
Lee, Ho-Shing
Abstract
A circuit substrate has an open substrate, a heat-dissipation block, multiple high thermal conductivity members, a first dielectric layer, a second dielectric layer, multiple first heat conductive members, and multiple second heat conductive members. The heat-dissipation block is disposed in the open substrate. Multiple high thermal conductivity members are mounted through the heat-dissipation block. The first dielectric layer exposes a part of one of two surfaces of the heat-dissipation block. The second dielectric layer exposes a part of the other surface of the heat-dissipation block. The first heat conductive members are in contact with the heat-dissipation block exposed from the first dielectric layer. The second heat conductive members are in contact with the part of the heat-dissipation block exposed from the second dielectric layer. Therefore, heat can be transferred quickly via the heat-dissipation block and the high thermal conductivity members to improve heat-dissipating capacity of the circuit substrate.
H01L 23/367 - Cooling facilitated by shape of device
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
94.
Vapor chamber device and manufacturing method thereof
UNIMICRON TECHNOLOGY CORP. (Taiwan, Province of China)
Inventor
Lin, Pu-Ju
Chen, Ying-Chu
Ye, Wei-Ci
Kuo, Chi-Hai
Ko, Cheng-Ta
Abstract
A vapor chamber device and a manufacturing method are disclosed. The vapor chamber has a housing and multiple independent chambers. The housing includes two shells opposite to each other. The independent chambers are formed between the two shells. Each independent chamber contains a working fluid and has at least one diversion bump and a capillary structure. The diversion bump is formed on an inner surface of the second shell, and the capillary structure is mounted on the diversion bump. When the vapor chamber device is vertically mounted to a heat source, the independent chambers at an upper portion of the vapor chamber device still contain the working fluid. The working fluid in the independent chambers may not all flow to a bottom of the vapor chamber device. Therefore, a contact area between the working fluid and the heat source is increased and heat dissipation efficiency is improved.
B23P 15/26 - Making specific metal objects by operations not covered by a single other subclass or a group in this subclass heat exchangers
F28D 15/04 - Heat-exchange apparatus with the intermediate heat-transfer medium in closed tubes passing into or through the conduit walls in which the medium condenses and evaporates, e.g. heat-pipes with tubes having a capillary structure
C23F 17/00 - Multi-step processes for surface treatment of metallic material involving at least one process provided for in class and at least one process covered by subclass or or class
H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
H01L 23/427 - Cooling by change of state, e.g. use of heat pipes
95.
Light-emitting package and method of manufacturing the same
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Yang, Kai-Ming
Lin, Chen-Hao
Chang, Chia-Hao
Lee, Tzu-Nien
Abstract
A light-emitting package includes an encapsulating member, a plurality of light-emitting components disposed in the encapsulating member, a plurality of first electrode pads, a plurality of second electrode pads, and a plurality of conductive connection structures. The encapsulating member has a first surface and a second surface opposite to each other. Each light-emitting component has a light-emitting surface exposed on the first surface. Both the first electrode pads and the second electrode pads are exposed on the second surface. A first bonding surface of each first electrode pad and a second bonding surface of each second electrode pad are both flush with the second surface. The light-emitting components disposed on the first electrode pads are electrically connected to the first electrode pads. The conductive connection structures passing through the encapsulating member are electrically connected to the light-emitting components and the second electrode pads.
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 33/54 - Encapsulations having a particular shape
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Tseng, Tzyy-Jang
Lin, Pu-Ju
Ko, Cheng-Ta
Lau, John Hon-Shing
Abstract
A circuit substrate structure includes a circuit substrate, at least two chips, and a bridge element. The circuit substrate has a first surface and a second surface opposite to each other. The chips are arranged in parallel on the first surface of the circuit substrate and electrically connected to the circuit substrate. The chips have active surfaces, back surfaces opposite to the active surfaces, and side surfaces connecting the active surfaces and the back surfaces. The chips include side circuits. The side circuits are arranged on the side surfaces and have first ends and second ends, the first ends extend to the active surfaces along the side surfaces, and the second ends extend to the back surfaces along the side surfaces. The bridge element is arranged on the back surfaces of the chips and electrically connected to the active surfaces of the chips through the side circuits.
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Lin, Shih-Yao
Lee, Ansheng
Hsu, Ming-Yuan
Chan, Meng-Chia
Abstract
A touch display device includes a flexible substrate, a light emitting structure layer, and a flexible touch sensing layer. The flexible substrate has a first surface and a second surface opposite to each other. The light emitting structure layer is disposed on the first surface of the flexible substrate. The flexible touch sensing layer is disposed on the second surface of the flexible substrate.
G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
H01L 25/04 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Tseng, Tzyy-Jang
Lin, Shih-Yao
Lee, Ansheng
Chan, Meng-Chia
Hsu, Ming-Yuan
Weng, Chengming
Abstract
A rear-view mirror with a display function includes a rear-view mirror body and a display structure layer. The display structure layer is disposed on one side of the rear-view mirror body and includes a plurality of light-emitting diodes and a driving circuit layer. The light-emitting diodes are located between the rear-view mirror body and the driving circuit layer. The light-emitting diodes are electrically connected to the driving circuit layer.
Unimicron Technology Corp. (Taiwan, Province of China)
Inventor
Tain, Ra-Min
Wang, Po-Hsiang
Po, Chi-Chun
Abstract
A package structure includes a first circuit board, a second circuit board, at least one electronic component, at least one conductive lead, and a molding compound. The first circuit board includes a first circuit layer and a second circuit layer. The second circuit board includes a third circuit layer and a fourth circuit layer. The electronic component is disposed between the first circuit board and the second circuit board. The conductive lead contacts at least one of the second circuit layer and the third circuit layer. The conductive lead has a vertical height, and the vertical height is greater than a vertical distance between the second circuit layer and the third circuit layer. The molding compound covers the first circuit board, the second circuit board, the electronic component, and the conductive lead. The molding compound exposes the first circuit layer and the fourth circuit layer, and the conductive lead extends outside the molding compound.
H01L 23/06 - Containers; Seals characterised by the material of the container or its electrical properties
H01L 23/367 - Cooling facilitated by shape of device
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/373 - Cooling facilitated by selection of materials for the device
H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group