According to the present disclosure there is provided a front-end module comprising a first antenna port and a second antenna port, a first filter forming a first signal path with the first antenna port and a second filter forming a second signal path with the second antenna port, the first or second filter being an adjustable filter. There is also provided a wireless device.
A supply-glitch-tolerant voltage regulator includes a regulated voltage node and an output transistor having a source terminal, a gate terminal, and a drain terminal. The source terminal is coupled to the regulated voltage node. The supply-glitch-tolerant voltage regulator includes a first current generator coupled between a first node and a first power supply node. The supply-glitch-tolerant voltage regulator includes a second current generator coupled between the first node and a second power supply node. The supply-glitch-tolerant voltage regulator includes a feedback circuit coupled to the first current generator and the second current generator and is configured to adjust a voltage on the first node based on a reference voltage and a voltage level on the regulated voltage node. The supply-glitch-tolerant voltage regulator includes a diode coupled between the drain terminal and the first power supply node and a resistor coupled between the gate terminal and the first node.
G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is dc
Disclosed herein are ceramic materials, such as bismuth substituted garnets, which can have high curie temperatures and high dielectric constants. In certain implementations, indium can be incorporated into the ceramic to improve certain properties and to avoid calcium compensation. The ceramic materials disclosed herein can be particular advantageous for below resonance applications.
H01F 1/34 - Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties of inorganic materials characterised by their coercivity of soft-magnetic materials non-metallic substances, e.g. ferrites
According to the present disclosure there is provided a front-end module comprising a first antenna port and a second antenna port, a first filter forming a first signal path with the first antenna port and a second filter forming a second signal path with the second antenna port, the first or second filter being an adjustable filter. There is also provided a wireless device.
A receiver has a sample rate converter that outputs samples of orthogonal frequency division multiplexing symbols. The receiver includes a fast Fourier transform engine that receives the samples and converts them into a plurality of frequency domain sub-carriers. A timing control circuit generates a timing error and controls the sample rate converter to adjust a sample rate of the orthogonal frequency division multiplexing symbols based at least in part on the timing error.
Radio-frequency multiplexing systems, devices and methods. In some embodiments, a front-end system can include a quadplexer configured to support uplink carrier aggregation with a first antenna. The quadplexer can include a low-band filter, a mid-band filter, a first high-band filter, and a second high-band filter, with each filter having a respective input node, and the quadplexer including a common output node associated with the first antenna. The front-end system can further include a triplexer configured to support uplink carrier aggregation with a second antenna. The triplexer can include a mid-band filter, a first high-band filter, and a second high-band filter, with each filter having a respective input node, and the triplexer including a common output node associated with the second antenna.
H04B 7/08 - Diversity systems; Multi-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
Systems and methods for pulse shaping voltage transitions in envelope tracking systems are provided. In one aspect, a radio frequency module includes a power amplifier configured to receive a radio frequency input signal and a voltage source. The power amplifier further configured to amplify a radio frequency input signal using the voltage source to generate an output radio frequency signal. The radio frequency module further includes a multi-level switch modulator configured to receive an envelope signal indicative of an envelope of the radio frequency input signal and generate the voltage source based on the envelope signal at one of a plurality of discrete voltage levels. The multi-level switch modulator is further configured to generate the voltage source using an analog component during transitions between discrete voltage levels and a digital component following the transitions.
A transistor comprising a first source region, a first drain region disposed on a first side of the first source region, a first active region being formed between the first source region and the first drain region, a second drain region disposed on a second side of the first source region, a second active region being formed between the first source region and the second drain region, directions of greatest extension of the first and second active regions being non-parallel, a first gate electrode finger disposed over the first active region, and a second gate electrode finger disposed over the second active region.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
9.
WIDE BANDGAP TRANSISTOR LAYOUT WITH STAGGERED GATE ELECTRODE FINGERS
A transistor comprising a first drain region, a first source region disposed on a first side of the first drain region, a first active region defined between the first drain region and the first source region, a second source region disposed on a second side of the first drain region opposite the first side and displaced in a widthwise direction from the first source region, a second active region defined between the first drain region and the second source region, a first gate electrode finger disposed over the first active region, and a second gate electrode finger disposed over the second active region.
A wireless device comprising a first antenna and second antenna, a transceiver and a radio frequency front end system electrically coupled between the transceiver and the antennas. The RF front end system includes a first module operable to provide a high band transmit signal to the first antenna, receive a first high band receive signal and a first mid band receive signal from the first antenna. The first high band receive signal has a frequency range greater than that of the first mid band receive signal. The RF front end system further includes a second module operable to provide a mid band transmit signal to the second antenna, receive a second mid band receive signal and a second high band receive signal from the second antenna. The second high band receive signal has a frequency range greater than that of the second mid band receive signal.
H04B 1/00 - TRANSMISSION - Details of transmission systems not characterised by the medium used for transmission
H04B 7/0404 - Diversity systems; Multi-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas the mobile station comprising multiple antennas, e.g. to provide uplink diversity
H04B 7/08 - Diversity systems; Multi-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
11.
SURFACE ACOUSTIC WAVE DEVICES WITH LITHIUM NIOBATE PIEZOELECTRIC MATERIAL
An acoustic wave device configured to generate a surface acoustic wave having a wavelength L is disclosed. The acoustic wave device can include a substrate, a piezoelectric layer that includes lithium niobate, an interdigital transducer electrode, an overcoat dielectric layer, and/or a raised frame structure. The piezoelectric layer is disposed at least partially between the substrate and the interdigital transducer electrode. The overcoat dielectric layer is positioned over the interdigital transducer electrode. The raised frame structure is positioned over the overcoat dielectric layer. The raised frame structure includes a material of the overcoat dielectric layer. The raised frame structure is positioned in an edge region within 0.25 L and 0.45 L from an edge of an active region where the surface acoustic wave is generated. The acoustic wave device can include a trap-rich layer over the substrate and an intervening dielectric layer over the trap-rich layer.
An acoustic wave device configured to generate a surface acoustic wave having a wavelength L is disclosed. The acoustic wave device can include a substrate, a piezoelectric layer that includes lithium niobate, an interdigital transducer electrode, an overcoat dielectric layer, and/or a raised frame structure. The piezoelectric layer can have a trench in an edge region within 0.25L and 0.45L from an edge of an active region where the surface acoustic wave is generated. The piezoelectric layer is disposed at least partially between the substrate and the interdigital transducer electrode. The overcoat dielectric layer is positioned over the interdigital transducer electrode. The raised frame structure is positioned over the overcoat dielectric layer. The raised frame structure is positioned in an edge region of the active region. The acoustic wave device can include a trap-rich layer over the substrate and an intervening dielectric layer over the trap-rich layer.
An isolated gate driver includes a first input terminal to receive gate information and one or more input terminals to receive configuration information. A modulation circuit generates a modulated signal having four possible states, each of the four possible states corresponding to a different unique pair of values of the gate information and the configuration information. The modulation circuit represents two of the states using on-off keying (OOK) while the configuration information is at a first value and represents two of the states as a modification to the OOK modulation based on the configuration information being at a second value. The modulated signal is sent over an isolation communication channel coupling a transmitter and receiver of the isolated gate driver.
An audio amplification system can include a digital audio path configured to provide a digital signal, and an audio amplifier configured to receive the digital signal as an input signal and generate an output signal. The audio amplification system can further include one or more features configured to support operation of the audio amplification system. In some embodiments, such an audio amplification system can be implemented in a wireless audio device such as a wireless headphone or a wireless earphone.
Disclosed is a diversity receive radio frequency front-end architecture with support for carrier aggregation and multiple-input/multiple-output. The front-end architecture can include multi-stage low noise amplifiers. Outputs from multiple initial low noise amplifier stages can be switched into each secondary low noise amplifier stage, thereby reducing the amount of componentry. The secondary low noise amplifier stages can be dynamically tuned depending on a currently active band and can be relatively broadband compared to the initial low noise amplifier stages.
Systems and methods for magnitude and phase trimming are provided. In one aspect, a radio frequency (RF) trimmer circuit includes an input terminal configured to receive an RF signal, an output terminal configured to output the RF signal, a control input configured to receive a control signal, at least one impedance element, and at least one transistor configured to selectively connect the impedance element onto a path between the input and output terminals. The selectively connecting the impedance element controls at least one of a magnitude trim and a phase trim of the RF signal.
A transistor comprising a first drain region, a first source region disposed on a first side of the first drain region, a first active region being formed between the first drain region and the first source region, a second source region disposed on a second side of the first drain region opposite the first side, a second active region being formed between the first drain region and the second source region, the first active region having a different width than the second active region, a first gate electrode finger disposed over the first active region, and a second gate electrode finger disposed over the second active region.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
18.
WIDE BANDGAP TRANSISTOR LAYOUT WITH STAGGERED GATE ELECTRODE FINGERS AND SPLIT ACTIVE REGIONS
A transistor comprising a first drain region split into first and second drain sub-regions aligned lengthwise and separated by a first low conductivity region, a first source region disposed on a first side of the first drain region split into first and second source sub-regions aligned lengthwise and separated by a second low conductivity region, a second source region disposed on a second side of the first drain region opposite the first side, the second source region split into third and fourth source sub-regions aligned lengthwise and separated by a third low conductivity region, a first gate electrode finger disposed over first and second active regions between the first drain region and first source region, and a second gate electrode finger disposed over third and fourth active regions between the first drain region and second source region.
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
19.
WIDE BANDGAP TRANSISTOR LAYOUT WITH STAGGERED THROUGH WAFER VIAS OUTSIDE OF TRANSISTOR LAYOUT
Disclosed is a field effect transistor integrated within an associated transistor area, the field effect transistor comprising: a contact configuration with interleaved contact fingers including a number of source contact fingers connected to a source contact by through wafer vias staggered at alternating ends of the source contact fingers.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
Disclosed in a field effect transistor integrated within an associated transistor area, the field effect transistor comprising a contact configuration with interleaved contact fingers including gate contact fingers having electrically connected gate contact finger sections being distributed in the transistor area and being provided between a source contact finger and a drain contact finger of the contact configuration.
Disclosed is a field effect transistor integrated within an associated transistor area, the field effect transistor comprising transistor contacts having a contact configuration of interleaved contact fingers including outer drain contact fingers located at opposite edges of the transistor area.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
Devices and methods related to stack assembly. In some embodiments, a radio-frequency (RF) module can include a packaging substrate configured to receive a plurality of components, and an electro-acoustic device mounted on the packaging substrate. The RF module can further include a die having an integrated circuit and mounted over the electro-acoustic device to form a stack assembly. The electro-acoustic device can be, for example, a filter device such as a surface acoustic wave filter. The die can be, for example an amplifier die such as a low-noise amplifier implemented on a silicon die.
H10N 30/071 - Mounting of piezoelectric or electrostrictive parts together with semiconductor elements, or other circuit elements, on a common substrate
H01L 23/552 - Protection against radiation, e.g. light
A method of fabricating an acoustic wave resonator includes forming a dielectric layer on an upper surface of a substrate, forming a lower electrode on an upper surface of the dielectric layer, forming a layer of piezoelectric material on an upper surface of the lower electrode, forming a dielectric material layer via in the dielectric layer subsequent to forming the lower electrode and the layer of piezoelectric material, and forming a conductive through substrate via passing through the substrate and the dielectric material layer via and contacting a lower surface of the lower electrode.
H03H 9/17 - Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
H03H 3/02 - Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
24.
RADIO FREQUENCY SIGNAL SPLITTING WITH DIFFERENTIAL FILTER AND LOW NOISE AMPLIFIERS
Apparatus and methods for radio frequency (RF) signal splitting are disclosed. In certain embodiments, a front-end system includes a filter that filters an RF receive signal to generate a differential filtered RF signal between a first output and a second output, a first low noise amplifier (LNA) that generates a first amplified RF signal by amplifying a first component of the differential filtered RF signal received from the first output, a second LNA that generates a second amplified RF signal by amplifying a second component of the differential filtered RF signal received from the second output, a first multi-throw switch that receives the first amplified RF signal, and a second multi-throw switch that receives the second amplified RF signal.
Disclosed is a diversity receive radio frequency front-end architecture with support for carrier aggregation and multiple-input/multiple-output. The front-end architecture can include multi-stage low noise amplifiers. Outputs from multiple initial low noise amplifier stages can be switched into each secondary low noise amplifier stage, thereby reducing the amount of componentry. The secondary low noise amplifier stages can be dynamically tuned depending on a currently active band and can be relatively broadband compared to the initial low noise amplifier stages.
Front-end systems with an adjustable filter architecture are provided. In certain embodiments, a front-end system includes a first bandpass filter with a first passband, a second bandpass filter with a second passband, a stopband filter with a stopband, and switches for controlling connectivity of the filters along transmit and receive paths. The first passband and the second passband include a frequency overlap region, which the stopband at least partially overlaps. The re-configurability of the switches allows for the overall filtering characteristic of the adjustable filter to adjust the duplex gap between transmit and receive passband edges, as well as the passband edges themselves.
A power management device is disclosed, including a first DC-DC converter coupled to a first output voltage line, a second DC-DC converter coupled to a second output voltage line, a first set of switches associated with the first DC-DC converter, and a second set of switches associated with the second DC-DC converter. The power management device may further include a controller configured to toggle one or more switches of the first set of switches and one or more switches of the second set of switches, and a multi-mode radio-frequency front-end block communicatively coupled to the controller.
H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
H03F 3/213 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
H03F 3/24 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
28.
RADIO FREQUENCY AMPLIFIERS WITH CAPACITANCE NEUTRALIZATION
Radio frequency (RF) amplifiers with capacitance neutralization are provided. In certain embodiments, an RF amplifier includes an RF input terminal, an RF output terminal, a gain transistor including a control terminal that receives an RF signal from the RF input terminal, a cascode transistor connected in series with the gain transistor and that provides an amplified RF signal to the RF output terminal, and a neutralization capacitor connected in parallel with the cascode transistor.
Front-end systems with antenna switching that bypasses a transmit band filter are disclosed herein. In certain embodiments, a front-end architecture is based on switching the RF transmit signal behind or before the bandpass filter of the band. This enables the switch-combining and filter ganging used to support carrier aggregation and EN-DC connectivity to be maintained, and the SRS switching done this way for a target TDD band does not impact, interrupt, and/or otherwise re-route the partner bands. Accordingly, both an anchor carrier and a secondary carrier can be maintained without interruption or impact. Furthermore, carrier aggregation features can be maintained and is not interrupted by SRS.
H04B 7/06 - Diversity systems; Multi-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
A piezoelectric microelectromechanical system microphone has a piezoelectric sensor layer with at least two sensing electrodes and at least one piezoelectric layer. Each piezoelectric layer can deform and generate an electrical potential responsive to impingement of sound waves on the piezoelectric layer. The sensing electrodes and the at least one piezoelectric layer form a stacked electrode structure. Each sensing electrode is disposed on or below a corresponding piezoelectric layer and senses the generated electrical potential. At least one of the sensing electrodes can include first corrugations which are configured such to release residual stress and to improve sensitivity of the microelectromechanical system microphone.
H10N 30/067 - Forming single-layered electrodes of multilayered piezoelectric or electrostrictive parts
H10N 30/074 - Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing
A front-end system includes a first terminal that receives a radio frequency signal from a transceiver and a second terminal coupled to an antenna. A front-end module including a power amplifier amplifies the radio frequency signal when powered by a supply signal. The front-end module includes a reference signal generator that generates a reference signal and modulates the reference signal frequency based on the supply signal. The frequency-modulated reference signal is transmitted to the transceiver through the first terminal. The front-end module can also include a voltage sensor that senses a voltage level at the first terminal when the frequency-modulated reference signal is being transmitted to the transceiver to determine at least one control signal for controlling the front-end module.
An electronic device package comprises an electrical device disposed on a base substrate, a conductive column in electrical communication with the electrical device and having a first end bonded to the base substrate, a cap substrate disposed over the electrical device and bonded to a second end of the conductive column, a layer of organic dielectric buffer coat material on the lower surface of the base substrate, a through substrate via in electrical communication with the conductive column and passing through the base substrate and the layer of organic dielectric buffer coat material, a redistribution layer disposed on the layer of organic dielectric buffer coat material, and a contact pad formed on the redistribution layer and in electrical communication with the through substrate via through the redistribution layer, the contact pad being horizontally displaced from a position directly below the through substrate via.
Multi-mode broadband low noise amplifiers (LNAs) are disclosed herein. In certain embodiments, an LNA includes a first amplification stage and a second amplification stage having a lower gain than the first amplification stage. The LNA is operable in a plurality of operating modes including a first mode in which the first amplification stage and the second amplification stage operate in a cascade to amplify a radio frequency (RF) receive signal, and a second mode in which the first amplification stage amplifies the RF receive signal and the second amplification stage is bypassed.
Front end systems and related devices, integrated circuits, modules, and methods are disclosed. One such front end system includes a low noise amplifier in a receive path and a multi-mode power amplifier circuit in a transmit path. The low noise amplifier includes a first inductor, an amplification circuit, and a second inductor magnetically coupled to the first inductor to provide negative feedback to linearize the low noise amplifier. The multi-mode power amplifier circuit includes a stacked output stage including a transistor stack of two or more transistors. The multi-mode power amplifier circuit also includes a bias circuit configured to control a bias of at least one transistor of the transistor stack based on a mode of the multi-mode power amplifier circuit. Other embodiments of front end systems are disclosed, along with related devices, integrated circuits, modules, methods, and components thereof.
H03F 1/22 - Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively
H03F 1/32 - Modifications of amplifiers to reduce non-linear distortion
H03F 1/34 - Negative-feedback-circuit arrangements with or without positive feedback
H03F 1/56 - Modifications of input or output impedances, not otherwise provided for
H03F 3/195 - High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
H03F 3/24 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
A packaging substrate assembly for fabricating a packaged module can include a packaging substrate having a surface, and an array of conductive pads implemented on the surface. The assembly can further include a conductive post formed over each conductive pad, with the conductive post including a first portion having a lateral dimension formed over the conductive pad and a second portion having a lateral dimension formed over the first portion. In some embodiments, the lateral dimension of the first portion is less than the lateral dimension of the second portion. In some embodiments, a dielectric layer can be implemented over the surface to cover the conductive pads and surround the first portion of each conductive post.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 23/528 - Layout of the interconnection structure
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices the devices being of types provided for in two or more different main groups of groups , or in a single subclass of , , e.g. forming hybrid circuits
An amplifier assembly including an amplification circuit configured to amplify a radio frequency signal when biased by a biasing signal, a temperature sensing circuit configured to sense a temperature at a certain position of the amplification circuit, and at least one biasing circuit configured to generate the biasing signal with a temperature gradient dependent on the sensed temperature. The biasing circuit includes a first transistor biased by a reference voltage and a second transistor biased by an input voltage proportional to the sensed temperature, the first transistor and the second transistor connected to a current source via respective slope resistors such to induce current proportional to the sensed temperature. The biasing circuit further includes a third transistor configured to output the biasing signal based on a control current flowing through the second transistor, the temperature gradient of the biasing signal being determined by the respective slope resistors.
Aspects of this disclosure relate to an acoustic wave resonator having at least two resonant frequencies. An acoustic wave filter can include series acoustic wave resonators and shunt acoustic wave resonators together arranged to filter a radio frequency signal. A first shunt resonator of the shunt acoustic wave resonators can include an interdigital transducer electrode and have at least a first resonant frequency and a second resonant frequency. Related acoustic wave resonators, multiplexers, wireless devices, and methods are disclosed.
An acoustic wave device is disclosed. The acoustic wave device includes a piezoelectric layer, an interdigital transducer electrode positioned over the piezoelectric layer, and an anti-refection layer over a conductive layer of the interdigital transducer electrode. The conductive layer can include aluminum, for example. The anti-reflection layer can include silicon. The anti-reflection layer can be free from a material of the interdigital transducer electrode. The acoustic wave device can further include a temperature compensation layer positioned over the anti-reflection layer in certain embodiments.
A die includes at least two surface acoustic wave resonators having different resonant frequencies. A first of the at least two surface acoustic wave resonators includes first interdigital transducer electrodes having a first duty factor and disposed on a multilayer piezoelectric substrate. The multilayer piezoelectric substrate a layer of piezoelectric material having a lower surface bonded to an upper surface of a layer of a second material different from the piezoelectric material. A second of the at least two surface acoustic wave resonators includes second interdigital transducer electrodes having a second duty factor different from the first duty factor and disposed on the multilayer piezoelectric substrate to improve band balance of a device formed from the at least two surface acoustic wave resonators.
A shield enclosure includes a housing with a peripheral wall that defines a cavity, and a cover removably coupleable to the housing to at least partially seal the cavity. The cavity is sized to receive a printed circuit board therein. The housing shields the printed circuit board from electromagnetic interference and noise during noise figure testing of a radiofrequency component on the printed circuit board.
G01R 1/18 - Screening arrangements against electric or magnetic fields, e.g. against earth's field
H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
H05K 9/00 - Screening of apparatus or components against electric or magnetic fields
Aspects of this disclosure relate to a parallel hybrid acoustic passive filter. The parallel hybrid acoustic passive filter includes a first sub-filter and a second sub-filter. The first sub-filter includes a first acoustic resonator and a first non-acoustic passive component. The second sub-filter includes a second acoustic resonator and second first non-acoustic passive component. The first sub-filter and the second sub-filter are together arranged to filter a radio frequency signal. The parallel hybrid acoustic filter can be a band pass filter or a band stop filter, for example. Related multiplexers, wireless communication devices, and methods are disclosed.
A packaging substrate assembly for fabricating a packaged module can include a packaging substrate having a surface, and an array of conductive pads implemented on the surface. The assembly can further include a conductive post formed over each conductive pad, with the conductive post including a first portion having a lateral dimension formed over the conductive pad and a second portion having a lateral dimension formed over the first portion. In some embodiments, the lateral dimension of the first portion is less than the lateral dimension of the second portion. In some embodiments, a dielectric layer can be implemented over the surface to cover the conductive pads and surround the first portion of each conductive post.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
In some embodiments, nested filters can be implemented as a radio-frequency device that includes a substrate, and first and second filter devices mounted on the substrate with respective support structures, such that at least a portion of the second filter device is positioned in a space defined by an underside of the first filter device and the support structures for the first filter device. Such a radio-frequency device can be, for example, a packaged module for use in an electronic device such as a wireless device.
Composite cascode power amplifiers for envelope tracking applications are provided herein. In certain embodiments, an envelope tracking system includes a composite cascode power amplifier that amplifies a radio frequency (RF) signal and that receives power from a power amplifier supply voltage, and an envelope tracker that generates the power amplifier supply voltage based on an envelope of the RF signal. The composite cascode power amplifier includes an enhancement mode (E-MODE) field-effect transistor (FET) for amplifying the RF signal and a depletion mode (D-MODE) FET in cascode with the E-MODE FET.
H03F 3/24 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
H04B 1/38 - Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
45.
MODULE ARRANGED TO BIDIRECTIONALLY PASS COUPLED POWER SIGNAL
Aspects of this disclosure relate to a radio frequency module with a radio frequency coupler and a coupler switching circuit. The coupler switching circuit can provide an indication of radio frequency power generated by the radio frequency coupler to a first input/output port. The coupler switching circuit can also pass an indication of radio frequency power received at the first input/output port to a second input/output port, and pass an indication of radio frequency power received at the second input/output port to the first input/output port.
Doherty power amplifier systems are provided herein. In certain embodiments, a Doherty power amplifier system includes a main amplifier, a first auxiliary amplifier, and a second auxiliary amplifier that operate in combination with one another to amplify an RF signal. The Doherty power amplifier system further includes a bias circuit that biases the first and second auxiliary amplifiers based on an envelope of the RF signal to control a state of the Doherty power amplifier system. For example, in certain implementations, the first and second auxiliary amplifiers are selectively activated based on a power level indicating by the envelope.
Systems and methods including variable power amplifier bias impedance are disclosed. In one aspect, there is provided a power amplifier system including a bias circuit configured to receive a bias voltage and generate a bias signal and a power amplifier stage configured to receive an input radio frequency (RF) signal and generate an output RF signal. The power amplifier system may also include a bias impedance component operatively coupled between the bias circuit and the power amplifier stage. The bias impedance is component configured to receive a control signal and adjust an impedance value of the bias impedance component in response to the control signal.
Configurable filters for asymmetrical radio frequency communication are disclosed. In one aspect, a radio frequency module includes a first filter configured to band-pass frequencies for a first transmit sub-band of a first communication band, a second filter configured to band-pass frequencies for a second transmit sub-band of the first communication band, and a third filter configured to band-pass frequencies for a receive band of the first communication band. The radio frequency module further includes an antenna terminal and at least one antenna switch module configured to connect the third filter and one of the first and second filters to the antenna terminal.
H04B 1/00 - TRANSMISSION - Details of transmission systems not characterised by the medium used for transmission
H04B 1/66 - TRANSMISSION - Details of transmission systems not characterised by the medium used for transmission for improving efficiency of transmission
49.
DOHERTY POWER AMPLIFIER SYSTEMS WITH ENVELOPE CONTROLLED STATE
Doherty power amplifier systems with envelope controlled state are provided herein. In certain embodiments, a Doherty power amplifier system includes a main amplifier, a first auxiliary amplifier, and a second auxiliary amplifier that operate in combination with one another to amplify an RF signal. The Doherty power amplifier system further includes a bias circuit that biases the first and second auxiliary amplifiers based on an envelope of the RF signal to control a state of the Doherty power amplifier system. For example, in certain implementations, the first and second auxiliary amplifiers are selectively activated based on a power level indicating by the envelope.
A method of forming an integrated microstrip circulator includes translating a ferrite disc into an aperture in a dielectric substrate, securing the ferrite disc in the dielectric substrate with an adhesive to form a composite structure, and forming circuitry on an upper surface of the composite structure and forming surface mount contacts on a lower surface of the composite structure by metallizing the upper and lower surfaces of the composite structure.
A circuit can include a capacitor that has a semiconductor layer, a dielectric layer, and a conductive layer. The circuit can include an insulating layer and a metal or conductive layer. The metal layer can have a first portion that has a first plurality of fingers, and a second portion that has a second plurality of fingers, which can be interdigitated with the first plurality of fingers. The circuit can include one or more first electrical connections that electrically couple the first portion of the metal layer to the semiconductor layer of the capacitor. The circuit can include one or more second electrical connections that electrically couple the second portion of the metal layer to the conductive layer of the capacitor. A capacitance provided by the interdigitated first and second pluralities of fingers can be at least about 3% of a capacitance provided by the capacitor.
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
Combiners for Doherty power amplifier systems are provided herein. In certain embodiments, a combiner structure includes a first balun combiner for combining an output of a first auxiliary amplifier and a second auxiliary amplifier, and a second balun combiner for combining the output of a main amplifier and an output of the first balun combiner. Each combiner can include a balun having a first conductor connected between a first input port and an output port, a second conductor connected between an isolated node and a second input port and magnetically coupled to the first conductor. An isolation capacitor is connected between the first input port and the isolated node, and an output capacitor is connected between the second input port and the output port. In certain implementations, the balun combiner further includes a termination capacitor between the isolated node and ground.
An impedance matching apparatus for providing impedance matching for an RF component. The apparatus includes a balun transformer circuit having a primary coil at an input side of the balun transformer circuit. The primary coil can be connected to a signal source to receive an input signal from the signal source. The balun transformer circuit further includes a secondary coil at an output side of the balun transformer circuit, the secondary coil being coupled to the primary coil to supply an output signal to the RF component and having a parasitic leakage inductance configured to match the output impedance of the signal source to the input impedance of the RF component
This disclosure relates to variable-gain amplifiers that include degeneration circuits configured to adapt to a gain mode that is currently being implemented. For example, a variable-gain amplifier can operate in a plurality of gain modes to amplify a signal with different levels of amplification. The variable-gain amplifier can include a gain circuit configured to amplify a signal and a degeneration circuit coupled to the gain circuit. The degeneration circuit can include an inductor and a switching-capacitive arm coupled in parallel to the inductor. The degeneration circuit can operate based on a current gain mode to change an inductance for the variable-gain amplifier.
Antenna-plexers for interference cancellation are provided herein. In certain embodiments, a wireless device includes an antenna, an antenna-plexer coupled to the antenna and configured to generate a feedback signal, a transmitter configured to transmit a transmit signal to the antenna by way of the antenna-plexer, a receiver configured to process a receive signal, and a feedback receiver configured to process the feedback signal from the antenna-plexer to provide compensation to the receive signal.
Aspects of this disclosure relate to methods of manufacturing bulk acoustic wave components. Such methods include plasma dicing to singulate individual bulk acoustic wave components. A buffer layer can be formed over a substrate of bulk acoustic wave components such that streets are exposed. The bulk acoustic wave components can be plasma diced along the exposed streets to thereby singulate the bulk acoustic wave components
H03H 3/02 - Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
A level shifter having: an input configured to receive an input signal, an output configured to provide an output signal, a voltage rail configured to provide a rail voltage, at least two diodes including a first and second diode connected in series between the voltage rail and the input, at least three switches, and a capacitor. The at least three switches include a first switch coupled between the voltage rail and the output of the first diode, a second switch coupled between the voltage rail and the output of the second diode, and a third switch coupled between the voltage rail and the input. The capacitor is coupled between the output of the second diode and ground.
Integrated Doherty power amplifiers are provided herein. In certain implementations, a Doherty power amplifier includes a carrier amplification stage that generates a carrier signal, a peaking amplification stage that generates a peaking signal, and an antenna structure that combines the carrier signal and the peaking signal. The antenna structure radiates a transmit wave in which the carrier signal and the peaking signal are combined with a phase shift.
Aspects of this disclosure relate to hybrid acoustic LC filter with harmonic suppression. The hybrid acoustic LC filter includes a hybrid passive/acoustic and a non-acoustic LC filter cascaded with the hybrid passive/acoustic filter. The hybrid passive/acoustic filter can be configured to filter a radio frequency signal. The hybrid passive/acoustic filter can include acoustic resonators and a non-acoustic passive component. The non-acoustic LC filter can be configured to suppress a harmonic of the radio frequency signal. The non-acoustic LC filter can be a low pass filter or a harmonic notch filter, for example. Related multiplexers, wireless communication devices, and methods are disclosed.
Configurable filter bands for radio frequency communication are disclosed. In one aspect, a radio frequency module includes a plurality of n-plexers, each of the n-plexers including n filters, each of the filters configured to pass at least one radio frequency band, and at least two of the radio frequency bands having overlapping frequencies, an antenna terminal, and an antenna switch module configured to connect two or more of the n-plexers to the antenna terminal.
Multiplexers are disclosed. A multiplexer can include a first filter and a second filter that are coupled to a common node. The second filter can include a first type of acoustic wave resonators (e.g., bulk acoustic wave resonators) and a series acoustic wave resonator of a second type (e.g., a surface acoustic wave resonator) that is coupled between the acoustic wave resonators of the first type and the common node. The first filter can provide a single-ended radio frequency signal. In certain embodiments, the first filter can be a receive filter and the second filter can be a transmit filter.
A surface acoustic wave filter package includes a cavity formed in or above a substrate and one or more surface acoustic wave filters formed on the substrate. The surface acoustic wave filter package includes a cavity roof including a filler material and having a low coefficient of thermal expansion.
H03H 3/08 - Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of resonators or networks using surface acoustic waves
Devices and methods related to unpowered switching module. A switching module can include a first input terminal, a second input terminal, and an output terminal. The output terminal can be configured to output a radio-frequency (RF) component of an input signal received on the first input terminal or the second input terminal in response to the input signal including a positive direct-current (DC) voltage.
An RF front-end module including a first transceiver unit, a second transceiver unit, a first antenna, a second antenna, a first diplexer, and a second diplexer. The first transceiver unit has a first transmitter and a first receiver and is configured to transmit at a first LTE 4G band, and the second transceiver unit has a second transmitter and a second receiver and is configured to transmit at a first new radio 5G (NR) band. The first antenna is connected via the first diplexer to the first transmitter and the first receiver, the first receiver being configured to receive at the first new radio 5G band, and the second antenna is connected via the second diplexer to the second transmitter and the second receiver, the second receiver being configured to receive at the first LTE 4G band.
An electronic device comprises one or more heat generating circuit elements and a no-contact via thermally coupled to the one or more heat generating circuit elements to increase dissipation of heat from the electronic device.
A switched attenuator comprising a radio frequency input, a radio frequency output and an attenuation cell connected between the RF input and the RF output. The attenuation cell includes a variable switch with a variable on-resistance (Ron).
User equipment and base station with efficient data transmission in unlicensed spectrum. The user equipment comprises a transceiver, at least one processor, and a memory storing instructions that cause the at least one processor to perform operations including receiving uplink scheduling information of a plurality of sub-bands, performing carrier sensing on each of the plurality of sub-bands, determining a transmission frequency band for the uplink transmission based on the carrier sensing, the transmission frequency band including at least one idle sub-band among the plurality of sub-bands that is free for transmission, processing a baseband signal according to a number of sub-bands included in the determined transmission frequency band, shifting a frequency of the processed baseband signal based on a center frequency of the transmission frequency band, generating an RF signal of the adjusted baseband signal, and performing the uplink transmission for the generated RF signal to the base station.
A power amplification system may include a shared common cascode input stage. A power amplification system may include a plurality of cascode output stages parallelly connected to the shared common cascode input stage, each cascode output stage associated with a frequency band.
H03F 1/22 - Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively
H03F 3/24 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
69.
SATURATION DETECTION BANDWIDTH ENHANCEMENT USING VIRTUAL GROUNDS
The invention provides a differential power amplification stage comprising a first amplification unit adapted to amplify a first differential signal and to output an amplified first differential signal, a second amplification unit adapted to amplify a second differential signal having opposite phase to the first differential signal and to output an amplified second differential signal, and a saturation detection unit adapted to detect gain saturation of the first and second amplification unit, to generate a saturation detection signal indicating the gain saturation of first and second amplification unit, and to provide a virtual ground for the first and second differential signals for RF cancellation on the first and second differential signals. The virtual ground principle is also applied to a Doherty power amplifier module which comprises a saturation detection unit for detecting saturation in the carrier amplification stage.
Apparatus and methods for amplifier linearization are disclosed. In certain embodiments, an RF amplifier includes an RF input terminal that receives an RF input signal, an RF output terminal that provides an RF output signal, a gallium nitride field-effect transistor (GaN FET) having a gate connected to the RF input terminal and a drain connected to the RF output terminal. The GaN FET amplifies the RF input signal. The RF amplifier further includes a gallium arsenide field-effect transistor (GaAs FET) having a gate connected to the RF input terminal and a drain connected to the RF output terminal. The GaAs FET is operable to linearize the GaN FET.
A radio frequency acoustic filter includes a plurality of resonators arranged to filter a signal. At least one resonator of the plurality of resonators includes a support substrate, a functional layer, and a piezoelectric layer. Both the piezoelectric layer and the functional layer are supported by the support substrate. An interdigital transducer structure is at least partially formed in the piezoelectric layer.
H03H 9/25 - Constructional features of resonators using surface acoustic waves
H03H 3/04 - Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks for obtaining desired frequency or temperature coefficient
Apparatus and methods for biasing power amplifiers are provided herein. In certain embodiments, a power amplifier includes a bipolar transistor having a base biased by a bias network having a reactance that controls an impedance at the transistor base to achieve substantially flat phase response over large dynamic power levels. For example, the bias network can have a frequency response, such as a high-pass or band-pass response, that reduces the impact of power level on phase distortion (AM/PM).
A switching circuit comprises a first series switch coupled to a first output port, the first series switch including a first field-effect transistor (FET), a second FET, a third FET, a fourth FET, a fifth FET, and a sixth FET, a second series switch coupled to a second output port, and coupling circuitry configured to couple a gate of the fifth FET and a gate of the sixth FET to a first node, a source of the fifth FET and a drain of the sixth FET to a second node, a source of the first FET and a drain of the second FET to a third node, a gate of the first FET and a drain of the fifth FET to a fourth node, a gate of the second FET and a source of the sixth FET to a fifth node, the fourth node and the fifth node to a first gate voltage, and the first node to a second gate voltage that is different than the first gate voltage.
H03K 17/693 - Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
74.
ANTENNA SWITCH FOR TIME DIVISION DUPLEXING AND FREQUENCY DIVISION DUPLEXING
Radio frequency front end modules implementing coexisting time division duplexing and frequency division duplexing are provided. In one aspect, a front end system includes a time-division duplexing transmit terminal, a time-division duplexing receive terminal, a frequency division duplexing terminal, and an antenna terminal. The front end system further includes first, second, and third switches configured to selectively connect the terminals to either a node or the antenna. The front end system also includes a controller configured to provide delays between disconnecting the terminals from the antenna and connecting the terminals to the node.
A driver circuit includes a first deglitcher circuit that delays a rising edge or a falling edge of an input signal according to a mode control signal and supplies a first output signal. A second deglitcher circuit receives the first output signal and delays either a rising edge or a falling edge of the first output signal by a second delay according to the mode control signal and supplies a second output signal. Logic gates combine the first and second output signals to supply gate control signals for output transistors to drive the driver circuit output. A sum of the first delay and the second delay determines the total deglitch time defining a pulse width of pulses that are suppressed by the driver circuit and the second delay determines a non-overlap time. The non-overlap time overlaps in time with the total deglitch time.
H03K 3/012 - Modifications of generator to improve response time or to decrease power consumption
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
H03K 19/20 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
76.
TRANSVERSE MODE SUPPRESSION METHOD OF MULTILAYER PIEZOELECTRIC SUBSTRATE DEVICE WITH TAPERED INTERDIGITAL TRANSDUCER STRUCTURE
Apparatus and methods for multi-gate radio frequency (RF) switches are disclosed herein. The RF switches use various layout design techniques to improve figure of merit (FOM). Examples of such techniques include using only two field-effect transistors (FETs) in series to maintain shorter fingers for lower metal resistance, placing a body contact on only one side of the RF switch layout, implementing metallization with reduced coupling from input to output, and/or providing air gaps to improve high frequency performance.
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
78.
MULTILAYER PIEZOELECTRIC SUBSTRATE PACKAGING METHOD FOR STACKING STRUCTURE
A multi-layer piezoelectric substrate silicon package comprises a bottom filter including a cap wafer of the bottom filter, and a device wafer of the bottom filter, the cap wafer of the bottom filter and the device wafer of the bottom filter each having a first through silicon via configured to provide an electrical path from a first bottom terminal of the device wafer of the bottom filter to a first top terminal of the cap wafer of the bottom filter.
H03H 3/08 - Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of resonators or networks using surface acoustic waves
Apparatus and methods for multi-gate radio frequency (RF) switches are disclosed herein. The RF switches use various layout design techniques to improve figure of merit (FOM). Examples of such techniques include using only two field-effect transistors (FETs) in series to maintain shorter fingers for lower metal resistance, placing a body contact on only one side of the RF switch layout, implementing metallization with reduced coupling from input to output, and/or providing air gaps to improve high frequency performance.
H03K 17/693 - Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
H04B 1/48 - Transmit/receive switching in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter
80.
TRANSITION SMOOTHING APPARATUS FOR REDUCING SPURIOUS INPUT TO A SYSTEM UNDER FEEDBACK CONTROL
Transition smoothing apparatus for reducing spurious input to a system under feedback control connected to a control loop. The apparatus includes a loop filter to integrate an error between an input signal applied to the loop filter and an output signal of the system under feedback control, an analog-to-digital converter to provide digitized integrated error values, a controller to generate output values supplied to the system under feedback control in response to the digitized integrated error values and in a start-up sequence to control a feedback digital-to-analog converter according to the digitized integrated error values to supply a first control signal to the loop filter and control the system under feedback control to generate a second control signal, and an alignment detector to detect phase alignment between the first control signal and the second control signal to control a smooth transition into closed loop operation of the control loop.
A tracking and rejection filter for use in a receiver of a radio includes a selectable filter configured to provide an output digital in-phase signal and an output digital quadrature signal based on a center frequency, a digital in-phase signal corresponding to an in-phase component of a received radio frequency signal, and a digital quadrature signal corresponding to a quadrature component of the received radio frequency signal. The tracking and rejection filter includes a select circuit configured to select the center frequency of the selectable filter according to whether an interfering signal is detected in a target frequency band of the received radio frequency signal. The center frequency is selected from a predetermined frequency and an estimated center frequency determined using an instantaneous frequency signal. The instantaneous frequency signal is based on the digital in-phase signal and the digital quadrature signal.
A delay measurement circuit includes a first skew circuit disposed proximate to a first bonding pad configured to receive a first clock signal having a first frequency. The delay measurement circuit includes a second skew circuit disposed proximate to a second bonding pad configured to receive a second clock signal having a second frequency. The first and second skew circuits each have a first mode of operation as zero-delay-return path and a second mode of operation as a synchronized pass path. The delay measurement circuit includes a pair of conductive traces coupled to the first skew circuit, another pair of conductive traces coupled to the second skew circuit, a time-to-digital converter circuit, and a switch circuit configured to selectively couple the time-to-digital converter circuit to the first skew circuit via the pair of conductive traces and the second skew circuit via the other pair of conductive traces.
In one aspect, an apparatus includes: a fast Fourier transform (FFT) engine to receive and convert a plurality of orthogonal frequency division multiplexing (OFDM) samples into a plurality of frequency carriers; a detector coupled to the FFT engine to determine a channel estimate for a first frequency carrier using a first channel estimate for the first frequency carrier and a plurality of other channel estimates, each of the plurality of other channel estimates for one of a plurality of neighboring frequency carriers within an evaluation window, and determine a log likelihood ratio (LLR) for the first frequency carrier using the channel estimate for the first frequency carrier; and a decoder coupled to the detector to decode a first OFDM symbol comprising the first frequency carrier using the LLR for the first frequency carrier.
Disclosed herein are embodiments of low temperature co-fireable dielectric materials which can be used in conjunction with high dielectric materials to form composite structures, in particular for isolators and circulators for radiofrequency components. Embodiments of the low temperature co-fireable dielectric materials can be scheelite or garnet structures, for example barium tungstate. Adhesives and/or glue is not necessary for the formation of the isolators and circulators.
C04B 35/26 - Shaped ceramic products characterised by their composition; Ceramic compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxides based on ferrites
C04B 37/00 - Joining burned ceramic articles with other burned ceramic articles or other articles by heating
C04B 35/495 - Shaped ceramic products characterised by their composition; Ceramic compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxides based on vanadium, niobium, tantalum, molybdenum or tungsten oxides or solid solutions thereof with other oxides, e.g. vanadates, niobates, tantalates, molybdates or tungstates
H01L 21/8258 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using a combination of technologies covered by , , or
A system may include an antenna. A system may include a module including a power amplifier and an antenna switch. A system may include an antennaplexer communicatively coupled to the antenna and the antenna switch, the antennaplexer positioned between the antenna switch and the antenna in a signal path. A system may include a controller communicatively coupled to the module, the controller configured to control the antenna switch with an override signal.
H04B 1/401 - Circuits for selecting or indicating operating mode
H04B 7/06 - Diversity systems; Multi-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
H04B 1/00 - TRANSMISSION - Details of transmission systems not characterised by the medium used for transmission
Remote compensators for mobile devices are provided. In certain embodiments, a remote compensator includes a first balun, a cable-side circulator including an output that provides a transmit signal and an input that receives an amplified receive signal, a first phase shifter, a second phase shifter, a first antenna-side circulator, a second antenna-side circulator, transmit amplifier circuitry, and a receive amplifier that generates the amplified receive signal by amplifying a first receive signal from the first antenna-side circulator and a second receive signal from the second antenna-side circulator. The transmit amplifier circuitry includes an input that receives the transmit signal, a first output connected to a first end of a winding of the first balun through the first antenna-side circulator and the first phase shifter, and a second output connected to a second end of the winding of the first balun through the second phase shifter and the second antenna-side circulator.
A method for calibrating an isolator product includes receiving a calibration signal on a differential pair of nodes of a receiver signal path of a first integrated circuit die of the isolator product. The method includes generating a diagnostic signal having a level corresponding to an average amplitude of the calibration signal on the differential pair of nodes. The method includes configuring a programmable receiver signal path based on the diagnostic signal. Generating the diagnostic signal may include providing an analog signal based on a full-wave rectified version of the calibration signal on the differential pair of nodes. Generating the diagnostic signal may include converting the analog signal to a digital signal.
Disclosed herein are switching or other active FET configurations that implement a branch design with one or more interior FETs of a main path coupled in parallel with one or more auxiliary FETs of an auxiliary path. Such designs include a circuit assembly for performing a switching function that includes a branch with a plurality of auxiliary FETs coupled in series and a main FET coupled in parallel with an interior FET of the plurality of auxiliary FETs. The body nodes of the FETs can be interconnected and/or connected to a body bias network. The body nodes of the FETs can be connected to body bias networks to enable individual body bias voltages to be used for individual or groups of FETs.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
89.
SYSTEMS, DEVICES, AND METHODS RELATED TO RF FRONT-END ARCHITECTURES FOR ROAMING SUPPORT USING FILTER BANDWIDTH CONSOLIDATION AND REDUCED FILTER COUNT
A system may include a multiplexer coupled to an antenna. The system may further include a combined band filter circuit coupled to the multiplexer and including a filter having a modified filter bandpass extent to include a frequency range of a roaming band, the combined band filter circuit configured to couple a signal associated with the roaming band to the filter.
H04B 1/00 - TRANSMISSION - Details of transmission systems not characterised by the medium used for transmission
H04W 8/02 - Processing of mobility data, e.g. registration information at HLR [Home Location Register] or VLR [Visitor Location Register]; Transfer of mobility data, e.g. between HLR, VLR or external networks
A radio-frequency module has radio-frequency input and outputs and a radio-frequency core connected between them and configured to transition between operational states. An energy management core triggers a selected transition between two of the operational states via a sequence of transitions between the plurality of operational states
Filters and acoustic resonators for radio-frequency circuits and devices. In some embodiments, a radio-frequency circuit can include a plurality of nodes and a common node. The radio-frequency circuit can further include a signal path implemented between each of the plurality of nodes and the common node. Each corresponding signal path can include a filter having a first Q-factor value and a respective resonator having a second Q-factor value higher than the first Q-factor value.
A transistor can include a plurality of source regions and a plurality of drain regions arranged in an alternating manner, with each of the source regions and the drain regions being implemented as a first type active region, and a plurality of gate structures implemented relative to the source regions and the drain regions such that application of a voltage to each gate structure results in formation of a conductive channel between a respective pair of source and drain regions. The transistor can further include a body region configured to provide the respective conductive channel upon the application of the voltage to the corresponding gate structure, with the body region being implemented as a second type active region. The transistor can further include a recessed region defined by an end of each drain region and one or both of the gate structures adjacent to the drain region.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
93.
RADIO FREQUENCY COMMUNICATION SYSTEMS WITH INTERFERENCE CANCELLATION FOR COEXISTENCE
Radio frequency (RF) communication systems with interference cancellation for coexistence are provided herein. In certain embodiments, an RF communication system includes a transmitter including a power amplifier that amplifies an RF transmit signal, a receiver including a low noise amplifier (LNA) that amplifies an RF receive signal, and an interference cancellation circuit that selects a bandpass filter from a plurality of bandpass filters to filter the RF transmit signal after amplification by the power amplifier. The selected bandpass filter operates in combination with a controllable gain circuit and a controllable phase circuit to generate an analog interference cancellation signal that is injected into the receiver to compensate the RF receive signal for interference arising from the transmitter.
H04B 1/525 - Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa with means for reducing leakage of transmitter signal into the receiver
H04B 1/12 - Neutralising, balancing, or compensation arrangements
In some embodiments, a system can include an arbiter device, a first client device and a second client device configured as parts of a coupled set, and a wireless network architecture. The wireless network architecture can communicatively couple the arbiter device, the first device, and the second device. The arbiter device can be configured to receive a switch arbiter message from the first client device, determine that the coupled set includes the first client device and the second client device, and based on the determination, forward the switch arbiter message to the second client device.
Voltage generators with relatively low clock feedthrough are disclosed. A voltage generator can include a charge pump with a first set of two switches arranged between two voltages, a second set of two switches arranged between one of the two voltages and an output node, and a fly capacitor connected to the first and second sets of two switches. The voltage generator can include a clock generation circuit to provide clock signals such that the two switches of the first set transition state and the two switches of the second set transition state at different times. In certain embodiments, the charge pump includes a p-type fly capacitor connected to an output node by way of an n-type transistor. In some embodiments, a level shifter can generate a level shifted clock signal for the charge pump and includes cross coupled transistors to receive a regulated voltage provided to the voltage generator.
H02M 1/096 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices the power supply of the control circuit being connected in parallel to the main switching element
H02M 3/07 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
H03K 19/0185 - Coupling arrangements; Interface arrangements using field-effect transistors only
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
H02M 1/00 - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF - Details of apparatus for conversion
H02M 1/44 - Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
H02M 3/158 - Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
96.
SYSTEMS, DEVICES, AND METHODS RELATED TO CONSERVING COMMUNICATION BANDWIDTH WITH SPARE TIME SCHEDULE
In some embodiments, a system can include a first client device connected to an arbiter device, a second client device connected to the arbiter device; and a wireless network architecture that provides a shared spare time during which one selected client device of the first client device or the second client device retransmits a portion of a previously transmitted message to the arbiter device.
In some embodiments, a system can include a first stream to be opened with an arbiter device, the first stream associated with a first set of capabilities, a second stream to be opened with the arbiter device, the second stream associated with a second set of capabilities, and a wireless network architecture that determines a network messaging schedule based on the first set of capabilities and the second set of capabilities. The network messaging schedule can be sent to one or more client devices associated with the first stream or the second stream.
Power amplifier systems with a switchable transistor array and a switchable biasing circuit are provided herein. In certain embodiments, a power amplifier system includes a power amplifier that amplifies an RF signal, and a biasing circuit that controls a bias of the power amplifier. The power amplifier includes a transistor array in which a number of active transistors that amplify the RF signal changes based on a selected power mode of the power amplifier system. Additionally, the biasing circuit changes the bias of power amplifier based on the selected power mode. For instance, the biasing circuit can change an amount of bias current and/or a bias voltage level of the power amplifier based on the selected power mode, for instance, a low power mode or a high power mode.
In some embodiments, a system can include a first arbiter device connected to a first network, the first arbiter device communicating with a first communication interval, a second arbiter device connected to a second network, the second arbiter device communicating with a second communication interval synchronized with the first communication interval; and a wireless network architecture that desynchronizes the first communication interval and the second communication interval.
A power amplification system is provided herein. In certain embodiments, the power amplification system comprises: a power amplifier configured to amplify an input radio frequency (RF) signal to generate an output RF signal when powered by a supply voltage and biased by a biasing signal; an envelope tracker configured to generate an envelope signal that changes in relation to an envelope of the input RF signal; a mode controller configured to set an envelope tracking (ET) mode of the power amplification system based on a modulation bandwidth of the input RF signal; a supply voltage controller configured to control the supply voltage based on the envelope signal when the ET mode is set to a first mode; and a bias controller configured to control the biasing signal based on the envelope signal when the operation mode is set to a second mode.
