Lam Research Corporation

United States of America

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        Patent 4,677
        Trademark 164
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        Europe 3
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[Owner] Lam Research Corporation 4,841
LAM Research AG 72
Date
New (last 4 weeks) 63
2024 July (MTD) 16
2024 June 56
2024 May 44
2024 April 33
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IPC Class
H01J 37/32 - Gas-filled discharge tubes 1,578
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components 1,085
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber 771
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof 724
H01L 21/3065 - Plasma etching; Reactive-ion etching 548
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NICE Class
07 - Machines and machine tools 122
09 - Scientific and electric apparatus and instruments 37
37 - Construction and mining; installation and repair services 8
25 - Clothing; footwear; headgear 4
42 - Scientific, technological and industrial services, research and design 4
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Status
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Registered / In Force 4,161
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1.

DEPOSITING A CARBON HARDMASK BY HIGH POWER PULSED LOW FREQUENCY RF

      
Application Number 18493614
Status Pending
Filing Date 2023-10-24
First Publication Date 2024-07-11
Owner Lam Research Corporation (USA)
Inventor
  • Weimer, Matthew Scott
  • Subramonium, Pramod
  • Puthenkovilakam, Ragesh
  • Bai, Rujun
  • French, David

Abstract

Methods and related apparatus for depositing an ashable hard mask (AHM) on a substrate include pulsing a low frequency radio frequency component at a high power. Pulsing low frequency power may be used to increase the selectivity or reduce the stress of an AHM. The AHM may then be used to etch features into underlying layers of the substrate.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • C23C 16/517 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using a combination of discharges covered by two or more of groups
  • C23C 16/52 - Controlling or regulating the coating process
  • H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or
  • H01L 21/311 - Etching the insulating layers
  • H01L 21/3213 - Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer

2.

BLADE-TYPE END EFFECTOR WITH ANGULAR COMPLIANCE MECHANISM

      
Application Number 18560334
Status Pending
Filing Date 2022-05-11
First Publication Date 2024-07-11
Owner Lam Research Corporation (USA)
Inventor
  • Embertson, Ross C.
  • Senn, Brandon Lee
  • Ditmore, Charles N.

Abstract

Disclosed herein are wafer handling robots and related systems for providing a blade-type end effector that has a built-in compliance mechanism that allows the end effector blades to rotate by a small amount relative to a wrist unit housing of the end effector wrist unit due to gravitational loading in both a first configuration and a second configuration in which the wrist unit housing is flipped upside down from the first configuration. Such a system may be used in conjunction with end effector blades made of high-stiffness materials such as silicon carbide, allowing such end effector blades to be used in conditions that normally require end effector blades made of more compliant materials.

IPC Classes  ?

3.

APPARATUSES FOR THERMAL MANAGEMENT OF A PEDESTAL AND CHAMBER

      
Application Number 18563666
Status Pending
Filing Date 2022-05-26
First Publication Date 2024-07-11
Owner Lam Research Corporation (USA)
Inventor
  • Miller, Aaron Blake
  • Durbin, Aaron
  • Chandrasekharan, Ramesh
  • Streng, Bradley Taylor

Abstract

Apparatuses not only capable of reducing unwanted radiative heat loss from a pedestal of a substrate processing system, but also capable of reducing radiative heat transfer to other components within a chamber of the substrate processing system.

IPC Classes  ?

  • H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

4.

IMAGE ANALYSIS OF PLASMA CONDITIONS

      
Application Number 18572075
Status Pending
Filing Date 2022-07-01
First Publication Date 2024-07-11
Owner Lam Research Corporation (USA)
Inventor
  • Danek, Michal
  • Haskell, Benjamin Allen
  • Reddy, Kapu Sirish
  • Badt, David
  • Williams, Brian Joseph
  • Franzen, Paul
  • Leeser, Karl Frederick
  • Petraglia, Jennifer Leigh
  • Sakiyama, Yukinori
  • Sawlani, Kapil

Abstract

Multi-pixel sensors such as camera sensors may be configured to capture two-dimensional and/or three-dimensional images of the interior of a process chamber or other fabrication tool. The sensors may be configured to capture pixelated electromagnetic radiation intensity information from within the interior of such process chamber before, during, and/or after processing of a substrate in the chamber. Such sensors may also be utilized for control, predictive, and/or diagnostic applications.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • G06T 7/00 - Image analysis
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

5.

REACTOR DESIGN OPTIMIZATION WITH DC BIAS PULSING TO PEDESTAL

      
Application Number US2024010085
Publication Number 2024/148031
Status In Force
Filing Date 2024-01-02
Publication Date 2024-07-11
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Smith, Shaun, Tyler
  • Chen, Lee
  • Benjamin, Neil, M.P.

Abstract

A plasma processing system, including a main plasma chamber configured for generating a main plasma, wherein the plasma chamber includes a bottom electrode located within an electrostatic chuck (ESC). The system including a direct current (DC) generator providing a pulsed DC bias signal to the bottom electrode over a plurality of cycles. The plasma processing system including a neutralization source that is external to the main plasma chamber, wherein the neutralization source is configured for providing a neutralization current into the main plasma chamber, wherein the neutralization cunent is electrically coupled to the main plasma.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

6.

NON-METAL INCORPORATION IN MOLYBDENUM ON DIELECTRIC SURFACES

      
Application Number 18547481
Status Pending
Filing Date 2022-02-18
First Publication Date 2024-07-11
Owner Lam Research Corporation (USA)
Inventor
  • Schloss, Lawrence
  • Collins, Joshua
  • Kennedy, Griffin John
  • Bamnolker, Hanna
  • Lee, Sang-Hyeob
  • Van Cleemput, Patrick
  • Gopinath, Sanjay

Abstract

Provided herein are low resistance metallization stack structures for 3D-NAND applications and related methods of fabrication. In some embodiments, thin metal oxynitride nucleation layers are deposited on dielectric material followed by deposition of a pure metal conductor using process conditions that increase non-molybdenum component element content at the oxynitride-dielectric interface. Certain embodiments of the methods described below convert less than all of the metal oxynitride nucleation layer to a pure metal layer, further lowering the resistivity.

IPC Classes  ?

  • H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
  • C23C 16/02 - Pretreatment of the material to be coated
  • C23C 16/14 - Deposition of only one other metal element
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/46 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for heating the substrate
  • C23C 16/52 - Controlling or regulating the coating process

7.

VOID FREE LOW STRESS FILL

      
Application Number 18616741
Status Pending
Filing Date 2024-03-26
First Publication Date 2024-07-11
Owner Lam Research Corporation (USA)
Inventor
  • Chandrashekar, Anand
  • Yang, Tsung-Han

Abstract

Provided herein are methods of depositing low stress and void free metal films in deep features and related apparatus. Embodiments of the methods include treating the sidewalls of the holes to inhibit metal deposition while leaving the feature bottom untreated. In subsequent deposition operations, metal precursor molecules diffuse to the feature bottom for deposition. The process is repeated with subsequent inhibition operations treating the remaining exposed sidewalls. By repeating inhibition and deposition operations, high quality void free fill can be achieved. This allows high temperature, low stress deposition to be performed.

IPC Classes  ?

  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • C23C 16/04 - Coating on selected surface areas, e.g. using masks
  • C23C 16/06 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the deposition of metallic material
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/52 - Controlling or regulating the coating process
  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
  • H10B 69/00 - Erasable-and-programmable ROM [EPROM] devices not provided for in groups , e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

8.

TRIPOLAR ELECTRODE ARRANGEMENT FOR ELECTROSTATIC CHUCKS

      
Application Number 18278276
Status Pending
Filing Date 2022-03-11
First Publication Date 2024-07-11
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Leeser, Karl Frederick
  • Blank, Richard
  • Hiester, Jacob L.

Abstract

A system comprises a pedestal and a controller. The pedestal is arranged below a showerhead in a processing chamber and includes at least three electrodes to clamp a substrate to the pedestal during processing. The controller is configured to measure a pedestal-to-showerhead gap and at least one of a magnitude and a direction of a relative tilt between the pedestal and the showerhead by sensing impedances between the at least three electrodes and the showerhead.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
  • C23C 16/50 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges
  • C23C 16/52 - Controlling or regulating the coating process
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

9.

MULTI-SECTIONAL PLASMA CONFINEMENT RING STRUCTURE

      
Application Number 18559313
Status Pending
Filing Date 2022-05-16
First Publication Date 2024-07-11
Owner Lam Research Corporation (USA)
Inventor
  • Marakhtanov, Alexei
  • Kellogg, Michael C.

Abstract

A confinement ring for use in a plasma processing chamber includes an upper horizontal section, an upper vertical section, a mid-section, a lower vertical section, a lower horizontal section and a vertical extension. The upper horizontal section extends between an inner upper radius and a first outer radius of the confinement ring. The mid-section extends between inner upper radius and a second outer radius of the confinement ring. The lower horizontal section extends between an inner lower radius and the second outer radius, and the vertical extension extends down from the lower horizontal section proximate to the inner lower radius. The upper vertical section extends between the upper horizontal section and the mid-section proximate to the inner upper radius, and the lower vertical section extends between the mid-section and the lower horizontal section proximate to the second outer radius.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

10.

HALOGEN-AND ALIPHATIC-CONTAINING ORGANOTIN PHOTORESISTS AND METHODS THEREOF

      
Application Number 18546879
Status Pending
Filing Date 2022-01-28
First Publication Date 2024-07-11
Owner Lam Research Corporation (USA)
Inventor
  • Weidman, Timothy William
  • Hansen, Eric Calvin
  • Wu, Chenghao

Abstract

The present disclosure relates to a composition formed with a precursor including a C1-4 haloaliphatic or C1-4 aliphatic group or vinyl group (—CH═CH2) and other unsaturated substituents, as well as methods for forming and employing such compositions. In particular embodiments, the haloaliphatic group is a C1-2 haloalkyl group, which in turn provides a resist film having enhanced radiation absorptivity and/or minimal film shrinkage (e.g., upon radiation exposure and/or post-exposure bake). In other embodiments, the aliphatic group is a C1-2 alkyl or vinyl group and other unsaturated substituents, which can be dry deposited. In non-limiting embodiments, the radiation can include extreme ultraviolet (EUV) or deep ultraviolet (DUV) radiation.

IPC Classes  ?

  • G03F 7/004 - Photosensitive materials
  • G03F 7/095 - Photosensitive materials - characterised by structural details, e.g. supports, auxiliary layers having more than one photosensitive layer
  • G03F 7/16 - Coating processes; Apparatus therefor
  • G03F 7/20 - Exposure; Apparatus therefor
  • G03F 7/30 - Imagewise removal using liquid means
  • G03F 7/36 - Imagewise removal not covered by groups , e.g. using gas streams, using plasma

11.

APPARATUSES FOR UNIFORM FLUID DELIVERY IN A MULTI-STATION SEMICONDUCTOR PROCESSING CHAMBER

      
Application Number 18557043
Status Pending
Filing Date 2022-04-28
First Publication Date 2024-07-04
Owner Lam Research Corporation (USA)
Inventor
  • Jeon, Eli
  • Roberts, Michael Philip
  • Agnew, Douglas Walter
  • Boatright, Daniel
  • Anandhan Duraisamy, Arun
  • Abel, Joseph R.
  • Mcdaniel, William Laurence

Abstract

The present disclosure relates to a system for a semiconductor processing. The system includes a semiconductor processing chamber having a plurality of processing stations, a plurality of manifold trunks, a plurality of valves, and a plurality of fluid manifolds. Each manifold trunk includes an outlet, a common flowpath, a plurality of trunk inlets, a plurality of orifices, and a plurality of valve interfaces.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

12.

FILL ON DEMAND AMPOULE REFILL

      
Application Number 18602760
Status Pending
Filing Date 2024-03-12
First Publication Date 2024-07-04
Owner Lam Research Corporation (USA)
Inventor
  • Nguyen, Tuan
  • Ranganathan, Eashwar
  • Swaminathan, Shankar
  • Lavoie, Adrien
  • Baldasseroni, Chloe
  • Chandrasekharan, Ramesh
  • Pasquale, Frank Loren
  • Petraglia, Jennifer Leigh

Abstract

Methods and apparatus for use of a fill on demand ampoule are disclosed. The fill on demand ampoule may refill an ampoule with precursor concurrent with the performance of other deposition processes. The fill on demand may keep the level of precursor within the ampoule at a relatively constant level. The level may be calculated to result in an optimum head volume. Methods and apparatus for use of a fill on demand ampoule are disclosed. The fill on demand ampoule may refill an ampoule with precursor concurrent with the performance of other deposition processes. The fill on demand may keep the level of precursor within the ampoule at a relatively constant level. The level may be calculated to result in an optimum head volume. The fill on demand may also keep the precursor at a temperature near that of an optimum precursor temperature. The fill on demand may occur during parts of the deposition process where the agitation of the precursor due to the filling of the ampoule with the precursor minimally effects the substrate deposition. Substrate throughput may be increased through the use of fill on demand.

IPC Classes  ?

  • C23C 16/52 - Controlling or regulating the coating process
  • C23C 16/448 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials

13.

WAFER STATE DETECTION

      
Application Number 18558327
Status Pending
Filing Date 2022-04-29
First Publication Date 2024-07-04
Owner Lam Research Corporation (USA)
Inventor Baker, Noah Elliot

Abstract

Various embodiments herein relate to apparatuses and methods for wafer state detection. In some embodiments, an apparatus for wafer state detection is provided, the apparatus comprising: an RF blocking filter; a DC blocking filter; and a controller coupled to a plurality of electrodes associated with an electrostatic chuck (ESC) via the RF blocking filter and the DC blocking filter, wherein the controller is configured to: cause an input signal to be injected in an input side of a circuit associated with the plurality of electrodes, the RF blocking filter, and the DC blocking filter, wherein the input side corresponds to a first electrode; measure characteristics of an output signal at an output side of the circuit, wherein the output side corresponds to a second electrode; and calculate wafer state characteristics of a wafer positioned on a surface of a platen based on the characteristics of the output signal.

IPC Classes  ?

  • G01B 7/28 - Measuring arrangements characterised by the use of electric or magnetic techniques for measuring contours or curvatures
  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

14.

MINIMIZING RADICAL RECOMBINATION USING ALD SILICON OXIDE SURFACE COATING WITH INTERMITTENT RESTORATION PLASMA

      
Application Number 18427691
Status Pending
Filing Date 2024-01-30
First Publication Date 2024-07-04
Owner Lam Research Corporation (USA)
Inventor
  • Varadarajan, Bhadri N.
  • Gong, Bo
  • Batzer, Rachel E.
  • Qiu, Huatan
  • Van Schravendijk, Bart J.
  • Hohn, Geoffrey

Abstract

Certain embodiments herein relate to an apparatus used for remote plasma processing. In various embodiments, the apparatus includes a reaction chamber that is conditioned by forming a low recombination material coating on interior chamber surfaces. The low recombination material helps minimize the degree of radical recombination that occurs when the reaction chamber is used to process substrates. During processing on substrates, the low recombination material may become covered by relatively higher recombination material (e.g., as a byproduct of the substrate processing), which results in a decrease in the amount of radicals available to process the substrate over time. The low recombination material coating may be reconditioned through exposure to an oxidizing plasma, which acts to reform the low recombination material coating. The reconditioning process may occur periodically as additional processing occurs on substrates. The apparatus may be configured to cause formation and reconditioning of the low recombination material coating.

IPC Classes  ?

  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/40 - Oxides
  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
  • C23C 16/452 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials by activating reactive gas streams before introduction into the reaction chamber, e.g. by ionization or by addition of reactive species
  • C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
  • C23C 16/50 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges
  • C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges
  • H01J 37/32 - Gas-filled discharge tubes

15.

DEPOSITING FILMS WITH CONCENTRATION GRADIENTS IN A MOLD STACK

      
Application Number US2023083857
Publication Number 2024/145012
Status In Force
Filing Date 2023-12-13
Publication Date 2024-07-04
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Voigt, Bryan Nicholas
  • Fox, Keith
  • Langan, Peter Andrew

Abstract

Examples are disclosed that relate to depositing films comprising a concentration gradient of an elemental component. One example provides a method for depositing a stack of films on a substrate in a processing chamber using chemical vapor deposition. The method comprises depositing a layer of silicon oxide on the substrate. The method further comprises controlling processing conditions to deposit a transition film onto the layer of silicon oxide while flowing polysilicon precursor into the processing chamber. The transition film comprising silicon oxide with an oxygen concentration gradient. The method further comprises depositing a layer of silicon onto the transition film.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/3205 - Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
  • C23C 16/24 - Deposition of silicon only
  • C23C 16/40 - Oxides

16.

AUTOMATED RECIPE HEALTH OPTIMIZATION

      
Application Number US2023086485
Publication Number 2024/145612
Status In Force
Filing Date 2023-12-29
Publication Date 2024-07-04
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Wang, Roger
  • Wong, Travis Joseph
  • Tang, Justin
  • Valcore, John
  • Sapio, Adrian Esteban
  • Alwan, Aravind
  • Wu, Ying
  • Hong, Junghyup
  • Ding, Jilai

Abstract

Process recipes have process parameter values for each step of the recipe. Recipes may be validated to determine if it can be stably implemented. A recipe that is considered invalid may be optimized to determine minimum or maximum setpoints for the recipe, which may differ from the setpoints determined to be valid by the initial validation. The recipe may also be optimized to determine recipe margin and optimal process parameter values for process parameters of a step in the recipe.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • G05B 19/418 - Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control (DNC), flexible manufacturing systems (FMS), integrated manufacturing systems (IMS), computer integrated manufacturing (CIM)

17.

IN-SITU WAFER THICKNESS AND GAP MONITORING USING THROUGH BEAM LASER SENSOR

      
Application Number 17913902
Status Pending
Filing Date 2021-03-24
First Publication Date 2024-06-27
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Wong, Goon Heng
  • Hua, Xuefeng
  • Van Selow, Anthony Paul
  • Torres, Daniel
  • Chen, Jack

Abstract

A system for determining a thickness of a substrate arranged in a processing chamber includes an emitter configured to transmit a signal toward a gap between the substrate and a component of the processing chamber arranged above the substrate, a receiver configured to receive at least a portion of the transmitted signal and generate a measurement signal based on a characteristic of the received portion of the signal, and a system controller configured to receive the measurement signal and selectively adjust a parameter of the processing chamber based on a relationship between values of the measurement signal and at least one of the thickness of the substrate, a width of the gap between the substrate and the component of the processing chamber, and an amount to adjust the parameter of the processing chamber.

IPC Classes  ?

  • G01B 11/06 - Measuring arrangements characterised by the use of optical techniques for measuring length, width, or thickness for measuring thickness
  • C23C 14/54 - Controlling or regulating the coating process
  • C23C 16/52 - Controlling or regulating the coating process
  • G01B 11/14 - Measuring arrangements characterised by the use of optical techniques for measuring distance or clearance between spaced objects or spaced apertures

18.

INTEGRATED ATMOSPHERIC PLASMA TREATMENT STATION IN PROCESSING TOOL

      
Application Number 18556978
Status Pending
Filing Date 2022-04-20
First Publication Date 2024-06-27
Owner Lam Research Corporation (USA)
Inventor
  • Subbaiyan, Navaneetha Krishnan
  • Little, Patrick
  • Dinneen, Daniel Mark
  • Ghongadi, Shantinath

Abstract

An atmospheric plasma treatment station is integrated in a semiconductor process tool. The atmospheric plasma treatment station directly interfaces with a deposition chamber of the semiconductor process tool without adding to the footprint or form factor of the semiconductor process tool. The atmospheric plasma treatment station includes a movable atmospheric plasma source such as a linear head for scanning across a surface of a substrate. The atmospheric plasma treatment station provides an enclosed space in a controlled environment with non-reactive gas flowing through the enclosed space. Process gases may be supplied to the linear head based on a surface condition of the substrate being treated.

IPC Classes  ?

  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations

19.

LOWER PLASMA EXCLUSION ZONE RING FOR CONTROLLING PLASMA DEPOSITION OR ETCHING NEAR A SUBSTRATE NOTCH

      
Application Number US2023083739
Publication Number 2024/137297
Status In Force
Filing Date 2023-12-13
Publication Date 2024-06-27
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Katailiha, Anand
  • Kim, Keechan
  • Behera, Asit Kumar
  • Bravo, Andrew Stratton

Abstract

A lower plasma exclusion zone ring for a substrate processing chamber includes an annular body including a radially inner surface, a radially outer surface, an upper surface, and a lower surface. A plasma exclusion zone (PEZ) ring notch is arranged on the upper surface and the radially outer surface of the annular body.

IPC Classes  ?

20.

BOTTOM-UP GAP FILL USING A LINER

      
Application Number US2023083884
Publication Number 2024/137313
Status In Force
Filing Date 2023-12-13
Publication Date 2024-06-27
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Messina, Daniel Christopher
  • Agnew, Douglas Walter
  • Petraglia, Jennifer Leigh

Abstract

Examples are disclosed that relate to performing a partial gap fill process in a bottom-up manner using atomic layer deposition (ALD). One example provides a method for partially filling a gap in a substrate. The method comprises depositing a sub-conformal layer of silicon nitride in a first portion of the gap and not in a second portion of the gap. The first portion extends from a top of the gap to a selected depth within the gap. The second portion extends from the selected depth to a bottom of the gap. The method further comprises performing a plurality of ALD cycles to deposit a silicon-containing oxide in the second portion of the gap. An ALD cycle comprises exposing the substrate to a silicon-containing precursor and reacting the silicon-containing precursor with an oxidant to deposit the silicon-containing oxide on a surface in the second portion of the gap.

IPC Classes  ?

  • C23C 16/04 - Coating on selected surface areas, e.g. using masks
  • C23C 16/02 - Pretreatment of the material to be coated
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber

21.

TREATING AN ELECTROSTATIC CHUCK PEDESTAL

      
Application Number US2023083885
Publication Number 2024/137314
Status In Force
Filing Date 2023-12-13
Publication Date 2024-06-27
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Vahidi, Mahmoud
  • Belostotskiy, Sergey Georgiyevich
  • Hollingsworth, Joel
  • Leeser, Karl Frederick
  • Kucuk, Ahmet

Abstract

A method for laser treating an electrostatic chuck pedestal comprises selectively applying a laser beam to a substrate contact area of the electrostatic chuck pedestal to form a microstructurally modified layer on at least a portion of the substrate contact area. The electrostatic chuck pedestal may be refurbished using the laser beam without significantly reducing its thickness compared to machining. This may extend a lifetime of the electrostatic chuck pedestal through multiple use and refurbishment cycles.

IPC Classes  ?

  • H01L 21/268 - Bombardment with wave or particle radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

22.

INDUCTIVELY COUPLED PLASMA SOURCE WITH PARALLEL HELICAL RF COILS

      
Application Number US2023084205
Publication Number 2024/137370
Status In Force
Filing Date 2023-12-15
Publication Date 2024-06-27
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Luo, Wei Yi
  • Chokshi, Himanshu
  • Mertke, Norman
  • Prakash, Abhinav

Abstract

A substrate processing system includes a processing chamber and an RF generator configured to generate RF power. A matching network connected to the RF generator. N helical coils are connected to the matching network and include M turns, where N and M are integers greater than one. The N helical coils are interwound symmetrically around an outer surface of the processing chamber. The N helical coils are connected in parallel to the matching network.

IPC Classes  ?

23.

FORMING HALOGEN-DOPED DIELECTRIC FILMS

      
Application Number US2023084335
Publication Number 2024/137399
Status In Force
Filing Date 2023-12-15
Publication Date 2024-06-27
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Grumbles, Mary Waddington
  • Agnew, Douglas Walter
  • Messina, Daniel Christopher
  • Petraglia, Jennifer Leigh
  • Kumar, Ravi
  • Holden, Konner Eric Kurt
  • Zhang, Tao
  • Agarwal, Pulkit

Abstract

One example provides a method of forming a halogen-doped dielectric film. The method comprises forming a dielectric film comprising a plurality of dielectric film layers. The method further comprises performing a plasma doping process after forming the dielectric film. The plasma doping process comprises introducing a halogen-containing precursor into a plasma, and exposing the dielectric film to reactive halogen-containing species generated in the plasma from the halogen-containing precursor, thereby forming the halogen-doped dielectric film.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/3115 - Doping the insulating layers
  • C23C 16/40 - Oxides
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/56 - After-treatment

24.

ROTATIONAL INDEXERS WITH WAFER CENTERING CAPABILITY

      
Application Number 18556910
Status Pending
Filing Date 2022-04-22
First Publication Date 2024-06-27
Owner Lam Research Corporation (USA)
Inventor
  • Ratliff, Brian Lewis
  • Blank, Richard M.
  • Topping, Stephen
  • Leeser, Karl Frederick

Abstract

Rotational indexers are provided that allow for wafer-by-wafer centering to be performed in association with each wafer pedestal-to-pedestal transfer operation within a multi-station chamber. One such rotational indexer has a rotational center axis that is movable along one or more lateral directions in order to provide wafer centering capability; sealing arrangements with lateral movement capability are provided for such implementations. Another such rotational indexer uses additional rotational capability at the wafer supports of the indexer, in combination with deliberate off-center placement of the wafers on the wafer supports of the indexer, to provide wafer centering capability.

IPC Classes  ?

  • H01L 21/68 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for positioning, orientation or alignment
  • G05B 19/4099 - Surface or curve machining, making 3D objects, e.g. desktop manufacturing
  • H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches

25.

GRAPHENE-CAPPED COPPER IN DUAL DAMASCENE INTERCONNECT

      
Application Number 18291200
Status Pending
Filing Date 2022-07-19
First Publication Date 2024-06-27
Owner Lam Research Corporation (USA)
Inventor
  • Parbatani, Asish
  • Van Schravendijk, Bart J.
  • Varadarajan, Bhadri N.
  • Narkeviciute, Ieva
  • Srinivasan, Easwar
  • Sharma, Kashish
  • Knarr, Randolph
  • Schmitz, Stefan
  • Ramanan, Vinayak

Abstract

A method for selectively depositing graphene on a metal surface in a back-end-of-line substrate is provided. The method comprises providing the substrate comprising a first dielectric layer and a copper interconnect in the first dielectric layer, the copper interconnect having an exposed metal surface, wherein the exposed metal surface comprises copper, and selectively deposing a carbon layer on the exposed metal surface.

IPC Classes  ?

  • H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
  • C23C 16/04 - Coating on selected surface areas, e.g. using masks
  • C23C 16/26 - Deposition of carbon only
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/56 - After-treatment
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device

26.

SUBSTRATE SUPPORTS WITH MESOCHANNEL ASSEMBLIES

      
Application Number 18291444
Status Pending
Filing Date 2022-07-19
First Publication Date 2024-06-27
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Subramanya, Spoorthi
  • Revanna, Shivakumara
  • Flynn, Kevin
  • Gandur Balagangadhara, Chandrashekara Kuashik
  • Jain, Muskaan
  • Krishna Murthy, Santosh Kumar

Abstract

A substrate support includes a body and a mesochannel assembly. The body is configured to support a substrate within a substrate processing system. The first mesochannel assembly is disposed in the body and includes: a first mesochannels; a first supply manifold supplying coolant to each of the first mesochannels; and a first return manifold receiving the coolant from the first mesochannels. The first mesochannels are disposed between the first supply manifold and the first return manifold to facilitate flow of the coolant from the first supply manifold to the first return manifold.

IPC Classes  ?

  • H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
  • C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
  • H01J 37/32 - Gas-filled discharge tubes

27.

APPARATUSES FOR MEASURING GAP BETWEEN A SUBSTRATE SUPPORT PLANE AND GAS DISTRIBUTION DEVICE

      
Application Number 18557250
Status Pending
Filing Date 2022-04-21
First Publication Date 2024-06-27
Owner Lam Research Corporation (USA)
Inventor
  • Vintila, Adriana
  • Bapat, Shriram Vasant
  • Alden, Emily Ann
  • Slevin, Damien Martin

Abstract

Some embodiments provide apparatuses capable of enabling the measurement of various characteristics of a showerhead-substrate gap in a processing chamber, including at high temperatures and at low-light conditions, using an imaging system external to the processing chamber.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber

28.

YTTRIUM ALUMINUM PEROVSKITE (YAP) BASED COATINGS FOR SEMICONDUCTOR PROCESSING CHAMBER COMPONENTS

      
Application Number 18577115
Status Pending
Filing Date 2022-08-02
First Publication Date 2024-06-27
Owner Lam Research Corporation (USA)
Inventor
  • Pape, Eric A.
  • Wetzel, David Joseph
  • Xu, Lin
  • Srinivasan, Satish
  • Koshy, Robin
  • Detert, Douglas
  • Dederick, Jeremiah Michael

Abstract

A component for use in a semiconductor processing chamber is provided. A component body comprises a metallic material or ceramic material. A coating is disposed on a surface of the component body where the coating comprises a layer of yttrium aluminum oxide, the yttrium aluminum oxide layer being formed of a composition having a molar ratio of 1.0-0.9 yttrium to 1.0-1.1 aluminum over at least 90% of the yttrium aluminum oxide layer.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • B05D 1/02 - Processes for applying liquids or other fluent materials performed by spraying
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

29.

RF SIGNAL PARAMETER MEASUREMENT IN AN INTEGRATED CIRCUIT FABRICATION CHAMBER

      
Application Number 17907067
Status Pending
Filing Date 2021-03-24
First Publication Date 2024-06-20
Owner Lam Research Corporation (USA)
Inventor
  • Kapoor, Sunil
  • French, David
  • Lemson, Gary
  • Meng, Liang

Abstract

An apparatus to estimate parameters of a radio frequency (RF) signal may include a voltage sensor configured to provide an indication of a voltage of the RF signal as well as a current sensor configured to provide an indication of current conducted by the RF signal. The apparatus may additionally include an analog-to-digital converter coupled to an output port of the voltage sensor and the current sensor, wherein the analog-to-digital converter is configured to provide digital representations of an instantaneous voltage and an instantaneous current of the RF signal. The apparatus may additionally include one or more processors configured to transform the digital representations of the instantaneous voltage and current into frequency domain representations of a complex voltage and complex current.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • G01R 15/16 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using capacitive devices
  • G01R 15/18 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using inductive devices, e.g. transformers
  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
  • G01R 19/25 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
  • G01R 25/00 - Arrangements for measuring phase angle between a voltage and a current or between voltages or currents
  • G01R 35/00 - Testing or calibrating of apparatus covered by the other groups of this subclass
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

30.

SHADOW RING ALIGNMENT FOR SUBSTRATE SUPPORT

      
Application Number 18287131
Status Pending
Filing Date 2022-04-15
First Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Gulabal, Vinayakaraddy
  • Vellanki, Ravi
  • Lind, Gary B.
  • Eib, Andrew Paul

Abstract

A system to align a shadow ring on a substrate support includes a baseplate of the substrate support, an alignment recess defined within an upper surface of the baseplate, a shadow ring, an upper alignment groove defined in a lower surface of the shadow ring, an alignment block disposed within the alignment recess, and an alignment feature disposed between the shadow ring and the alignment block. The alignment feature extends into the upper alignment groove defined in the lower surface of the shadow ring.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
  • H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches

31.

USE OF SIGNAL FILTERING SCHEMES IN HIGH TCR BASED CONTROL

      
Application Number 18288144
Status Pending
Filing Date 2022-04-25
First Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Chandrasekharan, Ramesh
  • Thilagaraj, Mohan
  • Leeser, Karl Frederick

Abstract

A controller to control a temperature of a first substrate support in a substrate processing system includes a resistance calculation module to calculate a first resistance of a first heater element of a plurality of heater elements of the first substrate support, a temperature calculation module to calculate a first temperature of the first heater element based on the calculated first resistance, and a filter module to filter a first signal that corresponds to the calculated first resistance. The temperature calculation module selectively causes the filter module to filter the first signal in response to a determination of whether at least one condition associated with operation of the substrate processing system is met.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
  • C23C 16/46 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for heating the substrate

32.

CONTROL OF DISSOLVED GAS CONCENTRATION IN ELECTROPLATING BATHS

      
Application Number 18554622
Status Pending
Filing Date 2022-04-14
First Publication Date 2024-06-20
Owner Lam Research Corporation (USA)
Inventor
  • Kearns, Gregory J.
  • Blickensderfer, Jacob Kurtis
  • Venkatraman, Kailash
  • Wilmot, Frederick Dean
  • Chua, Lee Peng
  • Rash, Robert

Abstract

A concentration of a dissolved gas can be controlled by following an electroplating solution through a contactor, controlling a pressure within the contactor, and thereby maintaining the concentration of the dissolved gas in the electroplating solution within a first concentration range. The first concentration range is non-zero and sub-saturation.

IPC Classes  ?

  • C25D 21/04 - Removal of gases or vapours
  • C25D 17/00 - Constructional parts, or assemblies thereof, of cells for electrolytic coating
  • C25D 21/12 - Process control or regulation
  • C25D 21/18 - Regeneration of process solutions of electrolytes

33.

PLASMA ETCHING CHEMISTRIES OF HIGH ASPECT RATIO FEATURES IN DIELECTRICS

      
Application Number 18592994
Status Pending
Filing Date 2024-03-01
First Publication Date 2024-06-20
Owner Lam Research Corporation (USA)
Inventor
  • Kanarik, Keren J.
  • Tan, Samantha Siamhwa
  • Pan, Yang
  • Marks, Jeffrey

Abstract

A method for etching features in a stack below a patterned mask in an etch chamber is provided. The stack is cooled with a coolant with a coolant temperature below −20° C. An etch gas is flowed into the etch chamber. A plasma is generated from the etch gas. Features are selectively etched into the stack with respect to the patterned mask.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

34.

CONTROLLING GAS FLOWS IN PROCESSING TOOL

      
Application Number US2023078561
Publication Number 2024/129260
Status In Force
Filing Date 2023-11-02
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Roberts, Michael Philip
  • Bhimarasetti, Gopinath
  • Wiltse, John Michael
  • Fisher, Adam
  • Schlosser, William
  • Letourneau, Steven Payonk
  • Richey, Nathaniel Elba
  • Kim, Hyeongeu
  • Duvall, Andrew Kenichi
  • Guo, Tongtong
  • Hobernicht, Michael William

Abstract

One example provides a processing tool comprising a processing chamber and a remote plasma generator (RPG) fluidly connected to the processing chamber. The processing tool further comprises an RPG gas supply system for mixing and delivering gases to the RPG. The RPG gas supply system comprises a first RPG gas supply line for delivering a first gas at a first, lower flow rate to the RPG, a second RPG gas supply line for delivering a second gas at a second, higher flow rate to the RPG, a junction connecting the first RPG gas supply line and the second RPG gas supply line, an orifice in the first RPG gas supply line, a divert valve on the second RPG gas supply line for diverting the flow away from the RPG and a common RPG gas supply line connecting the junction to the RPG.

IPC Classes  ?

35.

ELECTROSTATIC CHUCK WITH HALOGEN MODULATED SILICONE DIKE

      
Application Number US2023079660
Publication Number 2024/129283
Status In Force
Filing Date 2023-11-14
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Xu, Lin
  • Koshy, Robin
  • Srinivasan, Satish
  • Liu, Lei
  • Dederick, Jeremiah Michael
  • Daugherty, John

Abstract

An electrostatic chuck for use in a semiconductor processing chamber is provided. A base plate has a plurality of gas passages. A bond layer is on a surface of the base plate. A ceramic plate is on a second side of the bond layer, wherein the bond layer bonds the base plate to the ceramic plate, and wherein the ceramic plate has a plurality of gas outlets. A plurality of gas permeable plugs is in the ceramic plate, wherein each gas permeable plug is placed between a gas outlet of the plurality of gas outlets and a gas passage of the plurality of gas passages. A plurality of dikes comprising halogen modulated silicone is positioned within the bond layer and between the base plate and ceramic plate, wherein each dike of the plurality of dikes has an aperture of a plurality of apertures.

IPC Classes  ?

  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches

36.

FORMING INTERMETAL NITRIDE PHASE IN METAL NITRIDE LAYER

      
Application Number US2023082305
Publication Number 2024/129418
Status In Force
Filing Date 2023-12-04
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Nunn, William Todd
  • Mclaughlin, Kevin M.
  • Banerji, Ananda K.
  • Mahorowala, Arpan Pravin

Abstract

Examples are disclosed that relate to forming, in a cobalt nitride layer, an intermetal nitride phase that inhibits cobalt mobility in the cobalt nitride layer. One example provides a method for processing a substrate. The method comprises introducing a gas-phase metal-containing precursor into a processing chamber to expose a cobalt nitride layer on a substrate in the processing chamber to the gas-phase metal-containing precursor, thereby forming an intermetal nitride phase in at least a surface region of the cobalt nitride layer. The method further comprises depositing the dielectric etch stop layer onto the cobalt nitride layer.

IPC Classes  ?

  • H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • C23C 16/34 - Nitrides

37.

SYSTEMS AND METHODS FOR CONTROLLING AN LF RF PULSE GENERATOR TO INCREASE SELECTIVITY

      
Application Number US2023083011
Publication Number 2024/129517
Status In Force
Filing Date 2023-12-07
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Marakhtanov, Alexei, M.
  • Zhao, Lin
  • Righetti, Fabio
  • Lucchesi, Kenneth
  • Holland, John, P.

Abstract

Systems and methods for controlling a low frequency (LF) radio frequency (RF) pulse generator to increase selectivity are described. One of the methods includes controlling the LF RF pulse generator to generate a plurality of square pulses that are interspersed with a plurality of square sub-pulses. Each of the plurality of square pulses has a first sub-pulse width that is greater than a second sub-pulse width of each of the plurality of square sub-pulses.

IPC Classes  ?

38.

SYSTEMS AND METHODS FOR USING A SQUARE-SHAPED PULSE SIGNAL TO INCREASE A RATE OF PROCESSING A SUBSTRATE

      
Application Number US2023083215
Publication Number 2024/129545
Status In Force
Filing Date 2023-12-08
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Marakhtanov, Alexei, M.
  • Ji, Bing
  • Bhowmick, Ranadeep
  • Kozakevich, Felix, Leib
  • Holland, John, P.

Abstract

Systems and methods for increasing a rate of processing a substrate using a square wave signal are described. One of the methods includes generating, by a low frequency (LF) radio frequency (RF) pulse generator, the square wave signal. The method further includes generating, by a high frequency (HF) RF signal generator, a sinusoidal RF signal and supplying the square wave signal to a filter coupled to an electrode of a plasma chamber. The method includes supplying the sinusoidal RF signal to an impedance matching circuit that is coupled to the electrode. The operation of supplying the square wave signal reduces power reflected towards the HF RF signal generator from the plasma chamber. The reduction in the power reflected towards the HF RF signal generator increases the rate of processing the substrate.

IPC Classes  ?

39.

REDUCING PARTICLE CONTAMINATION OF A LASER ENTRANCE WINDOW IN A PULSED LASER DEPOSITION TOOL

      
Application Number US2023083442
Publication Number 2024/129621
Status In Force
Filing Date 2023-12-11
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Kikkert, Andre
  • Hopman, Willem
  • Heuver, Jeroen
  • Te Boekhorst, Tom

Abstract

One example provides a pulsed laser deposition (PLD) tool. The PLD tool comprises a processing chamber comprising a laser entrance window. The PLD tool further comprises a target holder located within the processing chamber. The PLD tool further comprises a substrate holder located within the processing chamber. The PLD tool further comprises a laser configured to direct laser light through the laser entrance window and towards the target holder. The PLD tool further comprises a purge gas inlet located between the laser entrance window and the target holder, the purge gas inlet configured to direct a flow of purge gas into a path of the laser light.

IPC Classes  ?

  • C23C 14/28 - Vacuum evaporation by wave energy or particle radiation
  • C23C 14/50 - Substrate holders
  • C23C 14/56 - Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks
  • C23C 14/14 - Metallic material, boron or silicon

40.

BACKSIDE DEPOSITION PREVENTION ON SUBSTRATES

      
Application Number 18287372
Status Pending
Filing Date 2022-04-15
First Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Gage, Christopher
  • Chandrasekharan, Ramesh
  • Lenz, Eric H.
  • Leeser, Karl Frederick

Abstract

Various systems and methods are provided to prevent backside deposition on a substrate by using a combination of approaches. The approaches include clamping the substrate to a pedestal and/or supplying purge gases to an area where deposition is not desired. The clamping methods include electrostatic or vacuum clamping. In addition, various pedestal and edge ring designs are provided for supplying purge gases to the area where deposition is not desired. The use of clamping in conjunction with purging can further enhance the performance without affecting deposition of materials on front side of the substrate. The clamping along the edge of the substrate can be made more effective by machining an upper surface of the pedestal to have a slight dish or dome like shape (i.e., concave or convex, respectively).

IPC Classes  ?

  • C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
  • C23C 16/04 - Coating on selected surface areas, e.g. using masks
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber

41.

PLASMA ETCHING CHEMISTRIES OF HIGH ASPECT RATIO FEATURES IN DIELECTRICS

      
Application Number 18593113
Status Pending
Filing Date 2024-03-01
First Publication Date 2024-06-20
Owner Lam Research Corporation (USA)
Inventor
  • Kanarik, Keren J.
  • Tan, Samantha Siamhwa
  • Pan, Yang
  • Marks, Jeffrey

Abstract

A method for etching features in a stack below a patterned mask in an etch chamber is provided. The stack is cooled with a coolant with a coolant temperature below −20° C. An etch gas is flowed into the etch chamber. A plasma is generated from the etch gas. Features are selectively etched into the stack with respect to the patterned mask.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

42.

COMPOUND ORIFICE INLET NOZZLE FOR TUNING FLOW FROM GAS DISTRIBUTION SHOWERHEADS

      
Application Number US2023078111
Publication Number 2024/129248
Status In Force
Filing Date 2023-10-27
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Slevin, Damien M.
  • Donnelly, Sean M.

Abstract

Described is a showerhead assembly comprising a faceplate and a plurality of orifices extending through the faceplate from an upstream side to an opposing downstream side. At least one orifice of the plurality of orifices comprises an entrance zone disposed on the upstream side of the faceplate. The entrance zone comprises a compound bore having at least a first sidewall stacked over a second sidewall. The first sidewall has a first subtended angle that is larger than a second subtended angle of the second sidewall.

IPC Classes  ?

  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
  • C23C 16/50 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges

43.

SHOWERHEAD FOR SUBSTRATE PROCESSING TOOL

      
Application Number US2023079120
Publication Number 2024/129270
Status In Force
Filing Date 2023-11-08
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Luo, Bin
  • Donnelly, Sean M
  • Madsen, Eric
  • Womack, Jeffrey
  • Martin, Keith Joseph

Abstract

One example provides a showerhead for a substrate processing tool. The showerhead comprising a faceplate comprising a plurality of outlet holes, a backplate coupled to the faceplate, a plenum between the faceplate and backplate, and a plurality of posts connecting the faceplate and the backplate, an outermost set of posts of the plurality of posts being positioned between 45% and 65% of a distance from a center of the plenum to a perimeter of the plenum and no posts being positioned between 65% and 100% of the distance from the center of the plenum to the perimeter of the plenum.

IPC Classes  ?

  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber

44.

ALD TUNGSTEN FILL WITH BOOSTED THERMAL INHIBITION

      
Application Number US2023081921
Publication Number 2024/129394
Status In Force
Filing Date 2023-11-30
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Pan, Yu
  • Qin, Ying
  • Ba, Xiaolan
  • Zhang, Zizhuo
  • Gao, Juwen
  • Vellanki, Ravi
  • Eib, Andrew Paul

Abstract

33333 may be delivered from a charge volume to facilitate top-to-bottom uniform treatment of a 3D NAND structure. Apparatuses for filling wordline features include separate gas zones and individually controlled stations.

IPC Classes  ?

  • C23C 16/08 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the deposition of metallic material from metal halides
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
  • C23C 16/02 - Pretreatment of the material to be coated
  • C23C 16/04 - Coating on selected surface areas, e.g. using masks

45.

METHOD AND APPARATUS TO BIAS AN ELECTROSTATIC CHUCK

      
Application Number US2023082774
Publication Number 2024/129472
Status In Force
Filing Date 2023-12-06
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor Saurabh, Ashish

Abstract

Described is one or more circuitries and method to control generation of one or more ion vacancies in an electrostatic chuck based, at least in part, on a bias applied to the electrostatic chuck. In at least one implementation, the bias applied to the electrostatic chuck comprises a conditioning voltage followed by a program voltage. In at least one implementation, the conditioning voltage has a first ramp rate which is slower than a second ramp rate of the program voltage. In at least one implementation, an end of the conditioning voltage and a beginning of the program voltage is separated in time.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

46.

DIVERGENCE MEASUREMENT SYSTEM FOR ION BEAM SUBSTRATE PROCESSING SYSTEMS

      
Application Number US2023082831
Publication Number 2024/129489
Status In Force
Filing Date 2023-12-07
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Paeng, Dong Woo
  • Yun, Seokmin
  • Huang, Shuogang
  • Bise, Ryan

Abstract

A divergence measurement system includes an ion beam sensor including an enclosure including a first aperture on a first surface of the enclosure. A Faraday cup is arranged in the enclosure and includes a second aperture to receive ions generated by a plasma source and to generate a current signal based thereon. A first positioning device moves the Faraday cup within the enclosure.

IPC Classes  ?

  • H01J 37/305 - Electron-beam or ion-beam tubes for localised treatment of objects for casting, melting, evaporating, or etching
  • G01N 23/22 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material
  • H01J 37/22 - Optical or photographic arrangements associated with the tube

47.

SYSTEMS AND METHODS FOR REDUCING HF REFLECTED POWER DURING A CYCLE OF A SQUARE WAVE SIGNAL

      
Application Number US2023083005
Publication Number 2024/129516
Status In Force
Filing Date 2023-12-07
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Marakhtanov, Alexei, M.
  • Ji, Bing
  • Bhowmick, Ranadeep
  • Kozakevich, Felix, Leib
  • Holland, John, P.

Abstract

A method for reducing power reflected towards a high frequency (HF) radio frequency (RF) generator during a cycle of a square wave voltage signal is described. The method includes receiving the square wave voltage signal, and dividing the square wave voltage signal into a pre¬ determined number of bins including a first bin and a second bin. The first bin has a different time interval than the second bin. The method further includes controlling the HF RF generator to generate an HF RF signal having a first frequency value during the first bin and a second frequency value during the second bin. The first frequency value is different from the second frequency value. The HF RF generator is controlled to reduce the power reflected towards the HF RF generator.

IPC Classes  ?

48.

PEDESTAL AND SHOWERHEAD WITH RESISTIVE AND RADIATIVE HEATING

      
Application Number US2023083634
Publication Number 2024/129734
Status In Force
Filing Date 2023-12-12
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Leeser, Karl Frederick
  • Badam, Vijay Kumar

Abstract

A substrate processing system includes a pedestal to support a substrate, a resistive heater disposed in the pedestal to heat the substrate, and a radiative heater disposed in the pedestal to heat the substrate. A substrate processing system includes a showerhead comprising a faceplate and a radiative heater disposed in the showerhead. The faceplate includes a plurality of through holes. The radiative heater includes a plurality of optical elements arranged interstitially with the plurality of through holes of the faceplate. A substrate processing system includes a pedestal to support a substrate, a resistive heater disposed in the pedestal to heat the substrate, a first radiative heater disposed in the pedestal to heat the substrate, a showerhead spaced from the pedestal, and a second radiative heater disposed in the showerhead to heat the substrate.

IPC Classes  ?

  • C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
  • C23C 16/48 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/52 - Controlling or regulating the coating process

49.

FEATURE FILL USING INHIBITION

      
Application Number US2023083696
Publication Number 2024/129781
Status In Force
Filing Date 2023-12-12
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Chandrashekar, Anand
  • Tran, Son Vo Nam

Abstract

Provided herein are methods of filling features with metal including inhibition of metal nucleation

IPC Classes  ?

  • C23C 16/06 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the deposition of metallic material
  • C23C 16/04 - Coating on selected surface areas, e.g. using masks
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber

50.

DETERMINING PROCESS CHAMBER COMPONENT TEMPERATURES

      
Application Number US2023083810
Publication Number 2024/129845
Status In Force
Filing Date 2023-12-13
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor Baker, Noah Elliot

Abstract

Methods and systems for determining temperatures are provided. In some embodiments, a method for determining temperatures comprises applying an input signal to a first conductive element of a fabrication apparatus, the input signal having a first magnitude and a first phase. The method may comprise measuring an output signal at a second conductive element of the fabrication apparatus, the output signal having a second magnitude and a second phase. The method may comprise determining a temperature of a region between the first conductive element and the second conductive element based at least in part on the second magnitude and the second phase.

IPC Classes  ?

  • G01K 7/32 - Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat using change of resonant frequency of a crystal
  • G01K 1/14 - Supports; Fastening devices; Arrangements for mounting thermometers in particular locations

51.

LOW K DIELECTRIC GAPFILL

      
Application Number US2023084005
Publication Number 2024/129962
Status In Force
Filing Date 2023-12-14
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Van Schravendijk, Bart, J.
  • Galluzzo, Michael, David
  • Smith, Joel, David
  • Hausmann, Dennis, M.

Abstract

The present invention involves a method for depositing low-k dielectric material in a feature, the method comprising: depositing a silicon-containing layer in one or more recessed features of a substrate; exposing at least a portion of the silicon-containing layer to an oxygen-containing species, thereby forming a silicon oxide-containing portion in the silicon-containing layer; and at least partially etching the silicon oxide-containing portion.

IPC Classes  ?

  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/311 - Etching the insulating layers

52.

REFERENCE WAFER FOR HIGH FIDELITY IN-SITU TEMPERATURE METROLOGY CALIBRATION

      
Application Number US2023084450
Publication Number 2024/130209
Status In Force
Filing Date 2023-12-15
Publication Date 2024-06-20
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Gao, Songqi
  • Mui, David

Abstract

Systems, methods, and devices for in-situ calibration of a second sensor use a first sensor, with the two sensors operating in different optical regimes and/or based on different optical effects. In some embodiments, the methods employ a reference wafer having two regions that have different optical properties to calibrate a temperature sensor. Prior to the in-situ calibration, the first sensor is calibrated over a range of temperatures. During the in-situ calibration, the first sensor reads a first spot in the first region of the reference wafer and a second sensor reads a second spot in the second region that is close to the first spot.

IPC Classes  ?

  • G01J 5/80 - Calibration
  • G01J 5/00 - Radiation pyrometry, e.g. infrared or optical thermometry
  • G01J 5/52 - Radiation pyrometry, e.g. infrared or optical thermometry using comparison with reference sources, e.g. disappearing-filament pyrometer
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

53.

APPARATUS AND PROCESS FOR EUV DRY RESIST SENSITIZATION BY GAS PHASE INFUSION OF A SENSITIZER

      
Application Number 17905754
Status Pending
Filing Date 2021-03-24
First Publication Date 2024-06-13
Owner Lam Research Corporation (USA)
Inventor
  • Kanakasabapathy, Sivananda Krishnan
  • Tan, Samantha S.H.
  • Yu, Jengyi
  • Lee, Younghee
  • Jensen, Alan J.
  • Li, Da

Abstract

The present disclosure relates to stacks having a sensitized resist film, as well as methods and apparatuses for applying such sensitized films. In particular embodiments, the sensitizer can be provided in gas form, and unreacted sensitizer precursors can be recovered after a deposition step.

IPC Classes  ?

  • G03F 7/004 - Photosensitive materials
  • G03F 7/16 - Coating processes; Apparatus therefor
  • G03F 7/20 - Exposure; Apparatus therefor
  • H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or

54.

DUAL ZONE HEATERS FOR METALLIC PEDESTALS

      
Application Number 18443906
Status Pending
Filing Date 2024-02-16
First Publication Date 2024-06-13
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Sundaram, Sairam
  • Durbin, Aaron
  • Chandrasekharan, Ramesh

Abstract

A temperature-controlled substrate support for a substrate processing system includes a substrate support and a controller. The substrate support includes N zones and N resistive heaters, respectively, where N is an integer greater than one, and a temperature sensor located in one of the N zones. The controller is configured to calculate N resistances of the N resistive heaters during operation and adjust power to N-1 of the N resistive heaters during operation of the substrate processing system in response to a temperature measured by the temperature sensor located in the one of the N zones and the N resistances of the N resistive heaters.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches

55.

CONTROL OF SEMICONDUCTOR MANUFACTURING EQUIPMENT IN MIXED REALITY ENVIRONMENTS

      
Application Number 18554823
Status Pending
Filing Date 2022-04-11
First Publication Date 2024-06-13
Owner Lam Research Corporation (USA)
Inventor
  • Unterguggenberger, Rainer
  • Thorgrimsson, Christopher
  • Chan, Henry T.
  • Huang, Chung-Ho
  • Bernier, Terrence George

Abstract

Various embodiments herein relate to a Mixed Reality (MR) control platform to operate a semiconductor manufacturing tool in an MR environment and to display data associated with the semiconductor manufacturing tool. In son embodiments, the MR control platform comprises an MR control system and an MR headset. The MR control system can obtain sensor data representative of sensor output from a semiconductor manufacturing tool. The MR control system can determine operational information associated with the semiconductor manufacturing tool and based on the sensor data. The MR control system can cause the operational information to be transmitted to the MR headset. The MR headset can receive the operational information associated with the semiconductor manufacturing tool from the MR control system. The MR headset can cause content associated with the operational information and one or more control features to be rendered in an MR environment.

IPC Classes  ?

  • G05B 19/042 - Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06T 15/20 - Perspective computation
  • G06T 17/00 - 3D modelling for computer graphics
  • G06T 19/00 - Manipulating 3D models or images for computer graphics
  • G06V 20/20 - Scenes; Scene-specific elements in augmented reality scenes
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

56.

ELECTROMECHANICAL MODELING OF COMPONENTS FOR POWER BOX DESIGN

      
Application Number US2023079709
Publication Number 2024/123509
Status In Force
Filing Date 2023-11-14
Publication Date 2024-06-13
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Shetty, Prajwal S L
  • Vallabhaneni, Kiran Kumar
  • Bhat, Kota Chalukya

Abstract

A method of generating an electrical twin for a power system component of a power box is provided. The method comprises: building a computer implemented mechanical model of the power system component for one or more of a range of load currents or a range of ambient temperatures; performing simulations of the computer implemented mechanical model across the one or more of the range of load currents or the range of ambient temperatures; generating modeled physical data of the power system component based on the simulations of the computer implemented mechanical model; and building the electrical twin of the power system component based at least on the modeled physical data.

IPC Classes  ?

  • H02J 3/00 - Circuit arrangements for ac mains or ac distribution networks
  • G06F 30/20 - Design optimisation, verification or simulation
  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
  • H01H 71/16 - Electrothermal mechanisms with bimetal element

57.

ETCH WITH SULFUR BASED OXYGEN FREE PASSIVANT

      
Application Number US2023081180
Publication Number 2024/123556
Status In Force
Filing Date 2023-11-27
Publication Date 2024-06-13
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Hudson, Eric
  • Kumar, Prabhat

Abstract

A method for selectively etching a dielectric material with respect to a semiconductor material is provided. The dielectric material is etched. The semiconductor material is passivated by providing a passivation gas comprising a non-thiol sulfur based component, wherein the non-thiol sulfur based component is oxygen free.

IPC Classes  ?

  • H01L 21/311 - Etching the insulating layers
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

58.

SEMICONDUCTOR PROCESSING CHAMBER WITH METAL OR METALLOID FLUORIDE PROCESS EXPOSED COATING

      
Application Number US2023081640
Publication Number 2024/123579
Status In Force
Filing Date 2023-11-29
Publication Date 2024-06-13
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Koshy, Robin
  • Pape, Eric A.
  • Wetzel, David Joseph
  • Xu, Lin

Abstract

A component for use in a semiconductor processing chamber is provided. A process exposed coating is on a surface of a component body, wherein the process exposed coating comprises at least one of YF3, MgF2, CeF4, HfF4, and LaF3, and wherein the process exposed coating has a thickness in a range of 10 nm to 290 nm.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating

59.

PROCESSING TOOL WITH HYPERSPECTRAL CAMERA FOR METROLOGY-BASED ANALYSIS

      
Application Number US2023082977
Publication Number 2024/124053
Status In Force
Filing Date 2023-12-07
Publication Date 2024-06-13
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Sawlani, Kapil
  • Martin, Patging John Elsworth
  • Franzen, Paul
  • Christensen, Michael
  • Porter, David

Abstract

Examples are disclosed that relate to a processing tool including a hyperspectral camera configured to acquire hyperspectral imagery of a processing chamber of the processing tool and/or a substrate in the processing tool. Metrology data derived from the hyperspectral imagery is used to control operation of the processing tool.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

60.

MINIMIZING TIN OXIDE CHAMBER CLEAN TIME

      
Application Number 18556075
Status Pending
Filing Date 2022-04-20
First Publication Date 2024-06-13
Owner Lam Research Corporation (USA)
Inventor
  • Chang, Ching-Yun
  • Ha, Jeongseok
  • Liu, Pei-Chi

Abstract

Techniques described herein relate to methods and apparatus for minimizing tin oxide chamber clean time. In many cases, the chamber is a deposition chamber used for depositing tin oxide on semiconductor substrates. The techniques involve exposing the chamber surface to a first plasma generated from a first plasma generation gas including reducing chemistry to reduce the tin oxide to tin, and then exposing the chamber surface to a second plasma generated from a second plasma generation gas including reducing chemistry and organic additive chemistry to remove the tin from the chamber surface. In some cases, the first plasma used to reduce the tin oxide to tin further includes inert gas.

IPC Classes  ?

  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
  • C23C 16/52 - Controlling or regulating the coating process

61.

ENDPOINT DETECTION AND TRACKING OF PHOTORESIST PROCESSES

      
Application Number US2023082204
Publication Number 2024/123632
Status In Force
Filing Date 2023-12-01
Publication Date 2024-06-13
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Kc, Shambhu
  • Volosskiy, Boris
  • Wang, Chen
  • Lushington, Andrew Pratheep
  • Myers, Michael Thomas
  • Hubacek, Jerome S.
  • Wise, Richard
  • Tucker, Jeremy Todd
  • Stevens, Jason
  • Ong, Seng
  • Roux, Malcolm

Abstract

A non-optical sensor system tracks and detects an endpoint of various photoresist processes. Photoresist processes may include deposition, development, bevel edge and/or backside clean, bake, etch, and chamber clean operations. Chamber clean may involve one or both of a thermal clean and a plasma clean of unintended metal-containing material. Endpoint detection of the thermal clean or remote plasma clean uses a throttle valve sensor that measures a position of a throttle valve over time. Alternatively, endpoint detection of the thermal clean or remote plasma clean uses a chamber manometer that tracks chamber pressure while the throttle valve is held constant. Endpoint detection of the plasma clean uses a non-optical sensor that can include an RF matching network, a temperature sensor, a heater control sensor, a Langmuir probe, or an RF harmonics sensor.

IPC Classes  ?

  • G03F 7/20 - Exposure; Apparatus therefor
  • G03F 7/36 - Imagewise removal not covered by groups , e.g. using gas streams, using plasma
  • G03F 7/004 - Photosensitive materials

62.

SELECTIVE METAL PASSIVATION OF CARBON AND NITROGEN CONTAINING LAYERS

      
Application Number US2023083147
Publication Number 2024/124150
Status In Force
Filing Date 2023-12-08
Publication Date 2024-06-13
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Jayanti, Sriharsha
  • Delgadino, Gerardo
  • Wong, Merrett
  • Zhang, Kunyi
  • Bhargava, Anuj
  • Jeong, Young Doo
  • Joi, Aniruddha

Abstract

A method for processing a stack comprising a silicon oxide layer and a dielectric layer comprising at least one of nitrogen and carbon is provided. A metal containing passivation layer is selectively deposited on surfaces of the dielectric layer comprising at least one of nitrogen and carbon with respect to surfaces of the silicon oxide layer, comprising flowing a metal containing passivation gas, forming the metal containing passivation gas into a plasma, and exposing the stack to the plasma, wherein the plasma selectively deposits a metal containing passivation layer on the surfaces of the dielectric layer comprising at least one of nitrogen and carbon with respect to surfaces of the silicon oxide layer.

IPC Classes  ?

  • H01L 21/033 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or comprising inorganic layers
  • H01L 21/311 - Etching the insulating layers
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

63.

THREADED NOZZLE INSERTS

      
Application Number US2023083205
Publication Number 2024/124185
Status In Force
Filing Date 2023-12-08
Publication Date 2024-06-13
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Bussan, John, Edward
  • Kulkarni, Prasanna
  • Batzer, Rachel, E.
  • Guo, Tongtong
  • Chitikase, Vamshi Krishna
  • Chang, Ching-Yun
  • Gong, Bo

Abstract

Threaded nozzle inserts for use in semiconductor processing tool showerheads or gas distributors are disclosed. an apparatus comprising: a head portion, wherein the head portion has a first face surface and a second face urface parallel to the first face surface; a shaft portion extending from the second face surface, wherein: a first sub-portion of the shaft portion is threaded along its length and has a diameter smaller than a maximum dimension of the second face surface, and a gas distribution hole extends through the head portion and the shaft portion and along a direction perpendicular to the second face surface.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber

64.

METHOD AND APPARATUS FOR MODULATING FILM UNIFORMITY

      
Application Number 18442427
Status Pending
Filing Date 2024-02-15
First Publication Date 2024-06-06
Owner Lam Research Corporation (USA)
Inventor
  • Agarwal, Pulkit
  • Lavoie, Adrien
  • Kumar, Purushottam

Abstract

A method for processing a substrate is provided, wherein the substrate is located below a showerhead in a processing chamber. A deposition layer is deposited on the substrate, wherein at least one deposition gas is provided through the showerhead. A secondary purge gas is flowed during the depositing the deposition layer from a location outside of the showerhead in the processing chamber forming a flow curtain around an outer edge of the showerhead, wherein the secondary purge gas comprises at least one component gas. A partial pressure of the at least one component gas is changed over time during the depositing the deposition layer, wherein the depositing the deposition layer has a non-uniformity, wherein the changing the partial pressure changes the non-uniformity over time during the depositing the deposition layer.

IPC Classes  ?

  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

65.

VAPOR SUPPLY FOR SUBSTRATE PROCESSING SYSTEMS

      
Application Number US2023032136
Publication Number 2024/118124
Status In Force
Filing Date 2023-09-07
Publication Date 2024-06-06
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Bailey, Curtis W.
  • Bruening, Rigel Martin
  • Reyes, Jorge
  • Kumar, Ashwin
  • Gerber, Kevin
  • Babaei, Mohammadreza
  • Jaiswal, Avinash
  • Odum, Kyle Starr
  • Nie, Jiuyuan

Abstract

A vapor supply system to supply vapor to a process module of a substrate processing tool includes an evaporator assembly to vaporize liquid and to supply the vaporized liquid as vapor to the process module. The evaporator assembly is located external to the substrate processing tool. The vapor supply system includes a gas box to receive the vapor supplied by the evaporator assembly and supply the vapor from the gas box to the process module. The gas box encloses a plurality of valves and respective mass flow controllers to selectively supply the vapor from the evaporator assembly and at least one process gas from a gas source to the process module. The gas box is mounted on or within the substrate processing tool.

IPC Classes  ?

  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/448 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials
  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
  • C23C 16/52 - Controlling or regulating the coating process
  • C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges

66.

EXTREME LOW VOLUME SHOWERHEADS WITH DUAL DISTRIBUTION SPOKES AND HIGH-DENSITY HOLES

      
Application Number US2023081298
Publication Number 2024/118574
Status In Force
Filing Date 2023-11-28
Publication Date 2024-06-06
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Vikraman, Nivin
  • Wongsenakhum, Panya
  • Kallurkar, Srinivas Rao Hemanth Rao
  • Yap, Lipyeow

Abstract

A showerhead for a substrate processing system includes a first plate and a faceplate. The first plate includes a first plurality of gas channels of a first length and a second plurality of gas channels of a second length that is greater than the first length. The first and second plurality of gas channels extend radially from a center of the first plate towards an outer diameter of the first plate in an alternating sequence. The faceplate is coupled to the first plate and includes a plurality of through holes. The faceplate and the first plate define a plenum. The first and second plurality of gas channels and the plurality of through holes are in fluid communication with the plenum.

IPC Classes  ?

  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber

67.

PEDESTAL WITH SPIRAL VANES

      
Application Number US2023081694
Publication Number 2024/118847
Status In Force
Filing Date 2023-11-29
Publication Date 2024-06-06
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Trakroo, Ujjwal Aashray
  • Ben-Yuhmin, Narudha Tai
  • Chalmers, Jeffrey Michael
  • Hubacek, Jerome S.
  • Torbatisarraf, Seyedalireza
  • Sovani, Yogesh Mahesh
  • Le Gear, Conor

Abstract

This disclosure pertains to pedestal assemblies for supporting wafers in semiconductor manufacturing tools and chambers. Such pedestal assemblies may have a pedestal base that is configured with an internal plenum volume having a plurality of vanes distributed throughout along various spiral reference paths. Such pedestal bases may provide enhanced and more uniform cooling.

IPC Classes  ?

  • H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01J 37/32 - Gas-filled discharge tubes

68.

SYSTEMS AND METHODS FOR OPTIMIZING POWER DELIVERY TO AN ELECTRODE OF A PLASMA CHAMBER

      
Application Number 18415492
Status Pending
Filing Date 2024-01-17
First Publication Date 2024-06-06
Owner Lam Research Corporation (USA)
Inventor
  • Bhowmick, Ranadeep
  • Holland, John
  • Kozakevich, Felix Leib
  • Ji, Bing
  • Marakhtanov, Alexei

Abstract

A method for optimizing delivery of power to a plasma chamber is described. The method includes dividing each cycle of a low frequency (LF) radio frequency generator (RFG) into multiple time intervals. During each of the time intervals, a frequency offset of a high frequency (HF) RFG is generated for which the delivery of power is maximized. The frequency offsets provide a substantially inverse relationship compared to a voltage signal of the LF RFG for each cycle of the voltage signal. The frequency offsets for the time intervals are multiples of the low frequency. The substantially inverse relationship facilitates an increase in the delivery of power to the electrode. A total range of the frequency offsets from a reference HF frequency over the LF RF cycle depends on a power ratio of power that is supplied by the LF RFG and power that is supplied by the HF RFG.

IPC Classes  ?

69.

ATOMIC LAYER ETCHING FOR SUBTRACTIVE METAL ETCH

      
Application Number 18435244
Status Pending
Filing Date 2024-02-07
First Publication Date 2024-06-06
Owner Lam Research Corporation (USA)
Inventor
  • Yang, Wenbing
  • Brouri, Mohand
  • Tan, Samantha Siamhwa
  • Lee, Shih-Ked
  • Fan, Yiwen
  • Choi, Wook
  • Mukherjee, Tamal
  • Lin, Ran
  • Pan, Yang

Abstract

A method for atomic layer etching a metal containing layer is provided. At least a region of a surface of the metal containing layer is modified to form a modified metal containing region by exposing a surface of the metal containing layer to a modification gas, wherein adjacent to the modified metal containing region remains an unmodified metal containing region. The modified metal containing region is selectively removed with respect to the unmodified metal containing region by exposing the surface of the metal containing layer to an inert bombardment plasma generated from an inert gas.

IPC Classes  ?

  • H01L 21/3213 - Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer

70.

SYSTEMS AND METHODS FOR TUNING A MHZ RF GENERATOR WITHIN A CYCLE OF OPERATION OF A KHZ RF GENERATOR

      
Application Number 18440583
Status Pending
Filing Date 2024-02-13
First Publication Date 2024-06-06
Owner Lam Research Corporation (USA)
Inventor
  • Howald, Arthur M.
  • Valcore, Jr., John C.

Abstract

Systems and methods for tuning a megahertz radio frequency (RF) generator within a cycle of operation of a kilohertz (kHz) RF generator are described. In one of the methods, a predetermined periodic waveform is provided to a processor. The processor uses a computer-based model to determine plurality of frequency parameters for the predetermined periodic waveform. The frequency parameters are applied to the megahertz RF generator to generate an RF signal having the frequency parameters during one or more cycles of operation of the kilohertz RF generator.

IPC Classes  ?

71.

METAL DOPED CARBON NON-CONFORMAL DEPOSITION

      
Application Number US2023079420
Publication Number 2024/118304
Status In Force
Filing Date 2023-11-10
Publication Date 2024-06-06
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Bhadauriya, Sonal
  • Puthenkovilakam, Ragesh
  • Reddy, Kapu Sirish

Abstract

Methods and apparatuses for forming non-conformal metal-doped films on patterned semiconductor substrates to facilitate deeper etching of features are provided. Selective deposition and etch back of a tungsten-doped carbide film can be tuned to configure desired shapes. Shapes with rounded profiles such as helmet-shaped films may be laid over the patterned mask layer, providing selectivity benefits.

IPC Classes  ?

  • H01L 21/311 - Etching the insulating layers
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/033 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or comprising inorganic layers
  • C23C 16/32 - Carbides
  • C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

72.

SPECTRAL SENSING OF PROCESS CHAMBER CONDITIONS

      
Application Number US2023081699
Publication Number 2024/118852
Status In Force
Filing Date 2023-11-29
Publication Date 2024-06-06
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Yee, Benjamin Tong
  • Sakiyama, Yukinori
  • Sawlani, Kapil

Abstract

Methods, apparatus, and various use applications for spectral sensing of a condition of a process chamber of a semiconductor device manufacturing apparatus are provided.

IPC Classes  ?

  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
  • C23C 16/52 - Controlling or regulating the coating process
  • C23C 16/50 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

73.

SYSTEMS AND METHODS FOR CONTROLLING TILTS ACROSS A SURFACE OF A SUBSTRATE

      
Application Number US2023079403
Publication Number 2024/112517
Status In Force
Filing Date 2023-11-10
Publication Date 2024-05-30
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Howald, Arthur, M.
  • Thompson, William, Dean
  • Ji, Bing
  • Paeng, Dong, Woo
  • Holland, John, Patrick
  • Bailey, Andrew, D.

Abstract

Systems and methods for controlling tilt across a surface of a substrate are described. One of the methods includes providing a current signal to a magnetic coil associated with a plasma chamber. The current signal produces a magnetic field within the plasma chamber. The method further includes controlling a direct current (DC) power source to output a plurality of magnitudes of the current signal in a pulsed manner during a clock cycle. The method includes repeating the plurality of magnitudes of the current signal with each additional clock cycle.

IPC Classes  ?

74.

POST-PLACEMENT WAFER-CENTERING SYSTEMS FOR SEMICONDUCTOR PROCESSING TOOLS

      
Application Number US2023080420
Publication Number 2024/112616
Status In Force
Filing Date 2023-11-17
Publication Date 2024-05-30
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Linebarger, Jr., Nick Ray
  • Hiester, Jacob Lee

Abstract

Disclosed herein are systems and techniques for post-placement centering of semiconductor wafers, i.e., centering of semiconductor wafers after they have already been placed on pedestals or, more specifically, on a pedestal base. Such systems also allow for such centering to be performed in an open-loop manner, e.g., without requiring determination of how much a semiconductor wafer is off-center from a desired location. Such capabilities allow for wafers to be centered relative to pedestal bases in multi-station semiconductor processing tools such as those described above—semiconductor processing tools in which AWC systems have limited or no efficacy.

IPC Classes  ?

  • H01L 21/68 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for positioning, orientation or alignment
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches

75.

CONDUCTIVE COOLING OF A LOW TEMPERATURE PEDESTAL OPERATING IN A HIGH TEMPERATURE DEPOSITION SEQUENCE

      
Application Number 18282021
Status Pending
Filing Date 2022-03-21
First Publication Date 2024-05-30
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Lind, Gary B.
  • Vellanki, Ravi
  • Clevenger, Jeff
  • Gulabal, Vinayakarddy

Abstract

A pedestal comprises a base portion, a stem portion, and a heater arranged in the base portion. The stem portion has a first end attached to a center region of the base portion. The heater includes a first loop arranged in the center region of the base portion. A first perimeter of the first loop is less than or equal to a second perimeter of the first end of the stem portion.

IPC Classes  ?

  • C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/46 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for heating the substrate

76.

PLASMA ETCHING CHEMISTRIES OF HIGH ASPECT RATIO FEATURES IN DIELECTRICS

      
Application Number 18431669
Status Pending
Filing Date 2024-02-02
First Publication Date 2024-05-30
Owner Lam Research Corporation (USA)
Inventor
  • Kanarik, Keren J.
  • Tan, Samantha Siamhwa
  • Pan, Yang
  • Marks, Jeffrey

Abstract

A method for etching features in a stack below a patterned mask in an etch chamber is provided. The stack is cooled with a coolant with a coolant temperature below −20° C. An etch gas is flowed into the etch chamber. A plasma is generated from the etch gas. Features are selectively etched into the stack with respect to the patterned mask.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

77.

IN-SITU FILM ANNEALING IN SUBSTRATE PROCESSING

      
Application Number 18283796
Status Pending
Filing Date 2022-03-25
First Publication Date 2024-05-23
Owner Lam Research Corporation (USA)
Inventor
  • Gupta, Awnish
  • Agnew, Douglas Walter
  • Van Schravendijk, Bart Jan
  • Abel, Joseph R.
  • Pasquale, Frank L.
  • Lavoie, Adrien

Abstract

In one example, a method for depositing a film on a substrate comprises arranging a substrate on a substrate support in a processing chamber and setting a processing pressure, temperature and pressure in the chamber. The method includes striking a plasma and depositing and annealing the film on the substrate at a thickness in a predetermined film thickness range.

IPC Classes  ?

  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/56 - After-treatment

78.

LINE BENDING CONTROL FOR MEMORY APPLICATIONS

      
Application Number 18394479
Status Pending
Filing Date 2023-12-22
First Publication Date 2024-05-23
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Butail, Gorun
  • Thombare, Shruti
  • Karim, Ishtak
  • Van Cleemput, Patrick

Abstract

A method for reducing bending of word lines in a memory cell includes a) providing a substrate including a plurality of word lines arranged adjacent to one another and above a plurality of transistors; b) depositing a layer of film on the plurality of word lines using a deposition process; c) after depositing the layer of film, measuring word line bending; d) comparing the word line bending to a predetermined range; e) based on the word line bending, adjusting at least one of nucleation delay and grain size of the deposition process; and f) repeating b) to e) one or more times using one or more substrates, respectively, until the word line bending is within the predetermined range.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices

79.

SYSTEMS AND METHODS FOR DRIVING PASSIVATION TO INCREASE AN ETCH RATE

      
Application Number US2023078563
Publication Number 2024/107552
Status In Force
Filing Date 2023-11-02
Publication Date 2024-05-23
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Mukhopadhyay, Amit
  • Veber, Gregory, Clinton
  • Xu, Qing
  • Wong, Merrett

Abstract

Systems and methods for driving passivation to increase a rate of etching a substrate are described. One of the methods includes generating a kilohertz radio frequency (RF) signal and generating a megahertz RF signal. The method includes pulsing, in a synchronized manner, the kilohertz and megahertz RF signals to transition to a first state. The method also includes transitioning, in a synchronized manner, the kilohertz and megahertz RF signals from the first state to a second state to achieve passivation on a mask layer of the substrate. The method includes pulsing, in a synchronized manner, the kilohertz and megahertz RF signals from the second state to a third state to drive the passivation from a neck of the substrate to a pillar of the substrate. The method includes transitioning, in a synchronized manner, the kilohertz and megahertz RF signals from the third state to a fourth state.

IPC Classes  ?

80.

NONCONFORMAL FILMS DEPOSITED WITHIN A RECESS USING ATOMIC LAYER DEPOSITION

      
Application Number US2023079015
Publication Number 2024/107567
Status In Force
Filing Date 2023-11-07
Publication Date 2024-05-23
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Curtin, Ian John
  • Agarwal, Pulkit
  • Kim, Wanki
  • Petraglia, Jennifer Leigh

Abstract

Examples are disclosed that relate to a method of depositing a film on a lower portion of a recessed feature on a substrate support using atomic layer deposition (ALD). One example provides a method comprising arranging a substrate comprising a recessed feature on a substrate support in an ALD processing chamber, the recessed feature comprising a recess wall extending into the substrate from an opening of the recessed feature in the substrate surface. The method further comprises supplying an inhibitor to the ALD processing chamber and forming a plasma comprising the inhibitor in the ALD processing chamber. This creates an inhibited recess wall surface adjacent the opening of the recessed feature. The method further comprises performing ALD to deposit a film on the recess wall that is thicker at a greater depth in the recessed feature than on the inhibited recess wall surface.

IPC Classes  ?

  • C23C 16/04 - Coating on selected surface areas, e.g. using masks
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/40 - Oxides
  • C23C 16/34 - Nitrides
  • C23C 16/06 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the deposition of metallic material

81.

SEMIVERSE

      
Application Number 1790789
Status Registered
Filing Date 2023-11-14
Registration Date 2023-11-14
Owner Lam Research Corporation (USA)
NICE Classes  ? 42 - Scientific, technological and industrial services, research and design

Goods & Services

Consultation services in the field of software for designing and manufacturing semiconductors and micro-electro-mechanical systems (MEMS); technology consultation in the field of semiconductors and micro-electro-mechanical systems (MEMS); design, development and consulting services for others in the field of semiconductors and micro-electro-mechanical systems (MEMS) (terms too vague in the opinion of the International Bureau – Rule 13 (2) (b) of the Regulations); providing temporary use of online non-downloadable software comprising a library of 3d models and design tools for computer aided design of micro-electro-mechanical systems (MEMS); providing temporary use of online non-downloadable software for designing and manufacturing semiconductors and micro-electro-mechanical systems (MEMS); providing temporary use of online non-downloadable software for virtual prototyping of three-dimensional models for the design of semiconductor devices; providing temporary use of online non-downloadable simulation software for modeling semiconductor manufacturing; providing temporary use of online non-downloadable simulation software for modeling plasma; computer services, namely, creating an on-line community for registered users to participate in discussions, form virtual communities, and engage in social networking; design and development of virtual reality and augmented reality software; providing temporary use of online non-downloadable virtual reality and augmented reality software for the design, development, manufacture, processing, and fabrication of semiconductor substrates or devices; providing temporary use of online non-downloadable virtual reality and augmented reality software for the installation, operation, maintenance, and repair of semiconductor manufacturing machines, semiconductor substrates manufacturing machines, and semiconductor wafer processing machines; providing temporary use of online non-downloadable software for the design, development, manufacture, processing, and fabrication of semiconductor substrates or devices; providing temporary use of online non-downloadable software for the installation, operation, maintenance, and repair of semiconductor manufacturing machines, semiconductor substrates manufacturing machines, and semiconductor wafer processing machines; planning and design of apparatus for the manufacture of semiconductors and microelectronic semiconductor products, and of apparatus for the processing of semi-finished parts of semiconductors and silicon wafers; consulting services provided to others in the field of application development services for semiconductor processing systems, wafer fabrication equipment, and micro-electro-mechanical systems (MEMS); consulting services provided to others in the field of customization of semiconductor processing systems, wafer fabrication equipment, and micro-electro-mechanical systems (MEMS) (terms too vague in the opinion of the International Bureau – Rule 13 (2) (b) of the Regulations); consulting services provided to others in the field of support and diagnostic services for semiconductor processing systems, wafer fabrication equipment, and micro-electro-mechanical systems (MEMS) (terms too vague in the opinion of the International Bureau – Rule 13 (2) (b) of the Regulations); providing on-line database of information in the field of semiconductor processing systems, wafer fabrication equipment, and micro-electro-mechanical systems (MEMS) (terms too vague in the opinion of the International Bureau – Rule 13 (2) (b) of the Regulations); providing temporary use of on-line non-downloadable software for diagnostics and troubleshooting in the field of semiconductor processing systems, wafer fabrication equipment, and micro-electro-mechanical systems (MEMS).

82.

SEMICONDUCTOR TOOL ARRANGEMENTS

      
Application Number 18283797
Status Pending
Filing Date 2022-04-27
First Publication Date 2024-05-23
Owner Lam Research Corporation (USA)
Inventor Leeser, Karl Frederick

Abstract

Various examples include arrangements of semiconductor-processing tools. In one example, a semiconductor-processing tool includes multiple multi-station modules, each having multiple processing stations. At least some of the processing stations are organized in a diamond-shaped arrangement. A vacuum-transfer module is coupled to each of the multi-station modules. The vacuum-transfer module has one or more vacuum-transfer robots to transfer substrates to and from at least one of the multiple processing stations. At least one additional processing-station is located in the vacuum-transfer module. Other systems and apparatuses are disclosed.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

83.

SPATIALLY TUNABLE DEPOSITION TO COMPENSATE WITHIN WAFER DIFFERENTIAL BOW

      
Application Number 18427348
Status Pending
Filing Date 2024-01-30
First Publication Date 2024-05-23
Owner Lam Research Corporation (USA)
Inventor
  • Shaikh, Fayaz A.
  • Vintila, Adriana
  • Mudrow, Matthew
  • Linebarger, Jr., Nick Ray
  • Yin, Xin
  • Lee, James F.
  • Williams, Brian Joseph

Abstract

A plasma processing chamber for depositing a film on an underside surface of a wafer, includes a showerhead pedestal. The showerhead pedestal includes a first zone and a second zone. The first zone is configured for depositing a first film to the underside surface of the wafer and the second zone is configured for depositing a second film to the underside surface of the wafer.

IPC Classes  ?

  • C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
  • C23C 16/04 - Coating on selected surface areas, e.g. using masks
  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/509 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges using internal electrodes

84.

INHIBITED ATOMIC LAYER DEPOSITION FOR PATTERNING APPLICATIONS

      
Application Number US2023079084
Publication Number 2024/107573
Status In Force
Filing Date 2023-11-08
Publication Date 2024-05-23
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Petraglia, Jennifer Leigh
  • Kumar, Ravi
  • Melton, Andrew Geier
  • Bobb Semple, Dara

Abstract

Examples are disclosed related to using an inhibitor in an atomic layer deposition (ALD) process to deposit a film in a patterning process. One example provides a method of processing a substrate comprising a gap between spacers. The method comprises performing a plurality of atomic layer deposition (ALD) cycles to fill the gap between the spacers with an oxide film. An ALD cycle of the plurality of ALD cycles comprises exposing the substrate to an inhibitor under conditions configured to deposit inhibitor at a first depth within the gap at a relatively greater concentration than at a second depth within the gap. The second depth is deeper in the gap than the first depth. The method further comprises, after filling the gap between the spacers, performing an etching cycle to expose the spacers. The method further comprises removing the spacers.

IPC Classes  ?

  • C23C 16/04 - Coating on selected surface areas, e.g. using masks
  • C23C 16/40 - Oxides
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/52 - Controlling or regulating the coating process

85.

MEASUREMENT OF SUBSTRATE TEMPERATURE USING OPTICAL TRANSMISSION

      
Application Number US2023080029
Publication Number 2024/107965
Status In Force
Filing Date 2023-11-16
Publication Date 2024-05-23
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Mui, David
  • Man, Tianxing
  • Cord, Bryan Michael
  • Gao, Songqi
  • Kawaguchi, Mark

Abstract

A substrate processing system includes an optical transmission system configured to output light onto a substrate in a processing chamber and to measure transmission through the substrate at a first location. A controller is configured to receive a measured temperature of a substate; cause the optical transmission system to transmit the light through the substrate during a first period; measure a first transmittance value; determine an effective thickness of the substrate based on the first transmittance value, the measured temperature, and a model; transmit the light onto the substrate during N periods after the first period, where N is an integer greater than zero; measure an Nthtransmittance value during an Nthperiod after the first period; and estimate a temperature of the substrate during the Nthperiod based on the Nthtransmittance value, the effective thickness of the substrate, and the model.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components

86.

SELITANE

      
Serial Number 98554818
Status Pending
Filing Date 2024-05-16
Owner Lam Research Corporation ()
NICE Classes  ? 01 - Chemical and biological materials for industrial, scientific and agricultural use

Goods & Services

Chemicals for use in industry and science; Chemicals for use in the semiconductor industry; Chemicals for use in semiconductor processing and manufacturing; Chemicals for use in the fabrication of silicon substrates, integrated circuits, semiconductor chips and related products; Chemical compositions for use in the processing and manufacture of semiconductors, integrated circuits, semiconductor chips and related products

87.

MECHANICAL SUPPRESSION OF PARASITIC PLASMA IN SUBSTRATE PROCESSING CHAMBER

      
Application Number 18392822
Status Pending
Filing Date 2023-12-21
First Publication Date 2024-05-16
Owner Lam Research Corporation (USA)
Inventor
  • Keil, Douglas
  • Augustyniak, Edward J.
  • Leeser, Karl Frederick
  • Sabri, Mohamed

Abstract

A system includes an electrode. The electrode includes a showerhead having a first stem portion and a head portion. A plurality of dielectric layers is vertically stacked between the electrode and a first surface of a conducting structure. The plurality of dielectric layers includes M dielectric layers arranged adjacent to the head portion and P dielectric portions arranged around the first stem portion. The plurality of dielectric layers defines a first gap between the electrode and one of the plurality of dielectric layers, a second gap between adjacent ones of the plurality of dielectric layers, and a third gap between a last one of the plurality of dielectric layers and the first surface. A number of the plurality of dielectric layers and sizes of the first gap, the second gap, and the third gap are selected to prevent parasitic plasma between the first surface and the electrode.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber

88.

RING STRUCTURES AND SYSTEMS FOR USE IN A PLASMA CHAMBER

      
Application Number 18405997
Status Pending
Filing Date 2024-01-05
First Publication Date 2024-05-16
Owner Lam Research Corporation (USA)
Inventor
  • Kellogg, Michael C.
  • Mace, Adam
  • Marakhtanov, Alexei
  • Holland, John
  • Chen, Zhigang
  • Kozakevich, Felix
  • Matyushkin, Alexander

Abstract

Systems and methods for securing an edge ring to a support ring are described. The edge ring is secured to the support ring via multiple fasteners that are inserted into a bottom surface of the edge ring. The securing of the edge ring to the support ring provides stability of the edge ring during processing of a substrate within a plasma chamber. In addition, the securing of the edge ring to the support ring secures the edge ring to the plasma chamber because the support ring is secured to an insulator ring, which is connected to an insulator wall of the plasma chamber. Moreover, the support ring and the edge ring are pulled down vertically using one or more clasp mechanisms during the processing of the substrate and are pushed up vertically using the clasp mechanisms to remove the edge ring and the support ring from the plasma chamber.

IPC Classes  ?

89.

SYSTEMS AND METHODS FOR ACHIEVING PEAK ION ENERGY ENHANCEMENT WITH A LOW ANGULAR SPREAD

      
Application Number 18420737
Status Pending
Filing Date 2024-01-23
First Publication Date 2024-05-16
Owner Lam Research Corporation (USA)
Inventor
  • Shoeb, Juline
  • Wu, Ying
  • Paterson, Alex

Abstract

Systems and methods for increasing peak ion energy with a low angular spread of ions are described. In one of the systems, multiple radio frequency (RF) generators that are coupled to an upper electrode associated with a plasma chamber are operated in two different states, such as two different frequency levels, for pulsing of the RF generators. The pulsing of the RF generators facilitates a transfer of ion energy during one of the states to another one of the states for increasing ion energy during the other state to further increase a rate of processing a substrate.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

90.

REDUCING LINE BENDING DURING METAL FILL PROCESS

      
Application Number 18550190
Status Pending
Filing Date 2022-03-07
First Publication Date 2024-05-16
Owner Lam Research Corporation (USA)
Inventor
  • Chandrashekar, Anand
  • Guo, Lei
  • Liu, Gang L.
  • Gopinath, Sanjay

Abstract

Methods of mitigating line bending during feature fill include deposition of a nucleation layer having increased roughness. In some embodiments, the methods include depositing two or more metal nucleation layers.

IPC Classes  ?

  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/06 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the deposition of metallic material

91.

ADJUSTABLE DIELECTRIC CONSTANT CERAMIC WINDOW

      
Application Number 18550664
Status Pending
Filing Date 2022-03-15
First Publication Date 2024-05-16
Owner Lam Research Corporation (USA)
Inventor
  • Liu, Chin-Yi
  • Marohl, Dan

Abstract

A dielectric window for a process chamber is provided. The dielectric window includes a disc-shaped body consisting of a first dielectric material having a first dielectric constant. An annular portion consisting of a second dielectric material having a second dielectric constant greater than the first dielectric constant is seated in the disc-shaped body. The dielectric window has a substantially constant thickness over a process region of the process chamber. The process region is an interior region of the process chamber in which a plasma is generated during processing of a substrate in the process chamber. The seating of the annular portion in the disc-shaped body is configured to maintain the substantially constant thickness of the dielectric window.

IPC Classes  ?

92.

A ROBUST ICEFILL METHOD TO PROVIDE VOID FREE TRENCH FILL FOR LOGIC AND MEMORY APPLICATIONS

      
Application Number US2023078999
Publication Number 2024/102763
Status In Force
Filing Date 2023-11-07
Publication Date 2024-05-16
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Agarwal, Pulkit
  • Baker, Jonathan Grant
  • Imade, Mamoru
  • Bhandari, Shiva Sharan
  • Petraglia, Jennifer Leigh

Abstract

Methods of filling a gap with a dielectric material including using an inhibition plasma during deposition. The inhibition plasma increases a nucleation barrier of the deposited film. The inhibition plasma selectively interacts near the top of the feature, inhibiting deposition at the top of the feature compared to the bottom of the feature, enhancing bottom-up fill.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • C23C 16/04 - Coating on selected surface areas, e.g. using masks
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/40 - Oxides

93.

CHEMICAL VAPOR DEPOSITION OF SILICON NITRIDE USING A REMOTE PLASMA

      
Application Number US2023078079
Publication Number 2024/102586
Status In Force
Filing Date 2023-10-27
Publication Date 2024-05-16
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Tang, Shane
  • Bhimarasetti, Gopinath
  • Mckerrow, Andrew J.

Abstract

Examples are disclosed that relate to low-damaging deposition of silicon nitride films using chemical layer deposition (CVD). One example provides a method (300) for forming a silicon nitride film on a substrate in a processing chamber by chemical vapor deposition. The method comprises introducing (302) a nitrogen-containing precursor into a remote plasma formed in a remote plasma chamber of a processing tool. The method further comprises forming (308) radical nitrogen species in the remote plasma. The method further comprises flowing (312) an oxygen-free silicon-containing precursor into a processing chamber of the processing tool. The method further comprises, while flowing the oxygen-free silicon-containing precursor, introducing (316) the radical nitrogen species from the remote plasma chamber into the processing chamber. The method further comprises reacting the oxygen-free silicon-containing precursor with the radical nitrogen species to form the silicon nitride film on the substrate.

IPC Classes  ?

  • C23C 16/34 - Nitrides
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/04 - Coating on selected surface areas, e.g. using masks
  • C23C 16/52 - Controlling or regulating the coating process

94.

PULSE ALD SEQUENCE FOR LOW FLUORINE WN DEPOSITION

      
Application Number US2023079163
Publication Number 2024/102866
Status In Force
Filing Date 2023-11-08
Publication Date 2024-05-16
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Yan, Zhongbo
  • Boochakravarthy, Ashwin Agathya
  • Ba, Xiaolan
  • Gao, Juwen
  • Parmar, Ravi Bharatkumar
  • Rachakonda, Sai

Abstract

Provided herein are methods of forming tungsten nitride (WN) barrier layers in features, the method comprises forming a tungsten sublayer by dosing diborane to a chamber and purging diborane from the chamber one or more times, and after dosing and purging diborane, dosing tungsten hexafluoride to the chamber and purging tungsten hexafluoride from the chamber multiple times; after forming the tungsten sublayer, dosing diborane to the chamber and purging diborane from the chamber; and after dosing and purging diborane, dosing a nitriding agent to the chamber to convert the tungsten sublayer to a tungsten nitride sublayer and purging the nitriding agent from the chamber.

IPC Classes  ?

  • C23C 16/34 - Nitrides
  • C23C 16/04 - Coating on selected surface areas, e.g. using masks
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
  • C23C 16/52 - Controlling or regulating the coating process

95.

DUAL NITROGEN FLOW CAPABILITY FOR LOW FLUORINE TUNGSTEN DEPOSITION

      
Application Number US2023035977
Publication Number 2024/097068
Status In Force
Filing Date 2023-10-26
Publication Date 2024-05-10
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Ba, Xiaolan
  • Zhang, Zizhuo
  • Gao, Juwen
  • Gopinath, Sanjay
  • Vellanki, Ravi

Abstract

A gas delivery system for a processing chamber includes a first flow path coupled to a reducing gas source and configured to supply a reducing gas from the reducing gas source to the processing chamber, a second flow path coupled to a precursor gas source and configured to supply a precursor gas from the precursor gas source to the processing chamber, a third flow path coupled to a first nitrogen gas source and configured to co-flow a first nitrogen gas into the processing chamber from the first nitrogen gas source at a same time that the reducing gas is supplied to the processing chamber, and a fourth flow path coupled to a second nitrogen gas source and configured to co-flow a second nitrogen gas into the processing chamber from the second nitrogen gas source at a same time that the precursor gas is supplied to the processing chamber.

IPC Classes  ?

  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/448 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials
  • C23C 16/52 - Controlling or regulating the coating process

96.

ELECTROSTATIC CHUCK E-SEAL WITH OFFSET SEALING SURFACE

      
Application Number US2023036025
Publication Number 2024/097077
Status In Force
Filing Date 2023-10-26
Publication Date 2024-05-10
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Behziz, Behnam
  • Wu, Benny
  • Mitrovic, Slobodan

Abstract

A seal for a substrate support in a substrate processing system includes first and second annular seal portions each having upper and lower edges. The second seal portion is located radially outside of the first seal portion. A height of the first seal portion is greater than a height of the second seal portion such that the upper edge and the lower edge of the first seal portion are configured to form first sealing surfaces, the upper edge and the lower edge of the second seal portion are configured to form second sealing surfaces, and at least one of the second sealing surfaces is offset from a corresponding one of the first sealing surfaces in a vertical direction. A gap is defined between the first seal portion and the second seal portion. A horizontal connecting portion couples the first seal portion and the second seal portion.

IPC Classes  ?

  • H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
  • H01J 37/32 - Gas-filled discharge tubes

97.

COMPONENT WITH A DUAL LAYER HERMETIC ATOMIC LAYER DEPOSITION COATINGS FOR A SEMICONDUCTOR PROCESSING CHAMBER

      
Application Number US2023076373
Publication Number 2024/097505
Status In Force
Filing Date 2023-10-09
Publication Date 2024-05-10
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Pape, Eric A.
  • Wetzel, David Joseph
  • Xu, Lin

Abstract

A component for use in a semiconductor processing chamber is provided. A component body of a metal or metal alloy has a process facing surface. An intermediate aluminum oxide coating is on the process facing surface, wherein the intermediate aluminum oxide coating is at least 99% pure by weight and has a porosity of less than 0.1% by volume, and wherein the intermediate aluminum oxide coating has a first thickness. A process exposed layer is on the intermediate aluminum oxide coating, wherein the process exposed layer comprises at least one of yttrium, hafnium, zirconium, lanthanum, magnesium, and a lanthanide, and wherein the process exposed layer is at least 99% pure by weight and has a porosity of less than 0.1% and has a second thickness, wherein the second thickness is less than or equal to the first thickness.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating

98.

REDUCING PARTICLE BUILDUP IN PROCESSING CHAMBERS

      
Application Number US2023076389
Publication Number 2024/097507
Status In Force
Filing Date 2023-10-09
Publication Date 2024-05-10
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Beaudette, Chad Adrien
  • Huang, Yanhui
  • Henri, Brandt
  • Hu, Xing Yi

Abstract

Systems and methods for operating a deposition tool are provided. In one aspect, the method includes processing a substrate in a processing chamber including a ceramic showerhead and a coating. The coating includes material deposited in the processing chamber. The ceramic showerhead is heated to a processing temperature during the processing of the substrate. The method further includes performing a cleaning process to remove the coating by introducing a reactive cleaning species into the processing chamber while flowing a purge gas through the ceramic showerhead and by heating the ceramic showerhead to a bake-out temperature above the processing temperature to remove at least some aluminum fluoride particles generated during the cleaning process. The method further includes applying a new coating to the processing chamber.

IPC Classes  ?

  • C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
  • C23C 16/52 - Controlling or regulating the coating process
  • C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges

99.

SYSTEMS AND METHODS FOR INCREASING A HEAT TRANSFER CONTACT AREA ASSOCIATED WITH AN EDGE RING

      
Application Number US2023078244
Publication Number 2024/097679
Status In Force
Filing Date 2023-10-30
Publication Date 2024-05-10
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Gandur Balagangadhara, Chandrashekara, Kaushik
  • Gehani, Sandeep
  • Kellogg, Michael, C.
  • Huynh, Brian, Quoc

Abstract

Systems and methods for increasing a heat transfer contact area associated with an edge ring are described. The edge ring includes a horizontal section having an inner diameter and an outer diameter. The inner diameter surrounds a substrate receiving location of a substrate support and the horizontal section has a top surface and a lower surface. The top surface of the horizontal section faces a plasma region of the plasma chamber and the lower surface of horizontal section has an inner gel receiving section and an outer gel receiving section. The inner gel receiving section is in thermal contact with the substrate support and the outer gel receiving section is in thermal contact with a coupling ring. The edge ring further includes a vertical extension extending from the horizontal section. The vertical extension is oriented downward at the outer diameter of the horizontal section.

IPC Classes  ?

  • H01J 37/32 - Gas-filled discharge tubes
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

100.

SEGREGATED REACTANT DELIVERY USING SHOWERHEAD AND SHROUD

      
Application Number US2023078479
Publication Number 2024/097853
Status In Force
Filing Date 2023-11-02
Publication Date 2024-05-10
Owner LAM RESEARCH CORPORATION (USA)
Inventor
  • Bailey Iii, Andrew D.
  • Subramanya, Spoorthi

Abstract

This disclosure pertains to semiconductor processing chambers with segregated gas delivery using a showerhead and a circumferential shroud that encircles the wafer processing area.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
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