A substrate support includes a monolithic anisotropic body, which includes first, second and intermediate layers. The first layer is formed of a first material and disposed therein are RF and clamping electrodes. The second layer is formed of the first material or a second material and disposed therein is a heating element. The intermediate layer is formed of a different material than the first and second layers, such that at least one of: a thermal energy conductivity of the intermediate layer is different than a thermal energy conductivity of at least one of the first or second materials; or an electrical energy conductivity of the intermediate layer is different than an electrical conductivity of at least one of the first or second materials. Either the intermediate layer is disposed between the first and second layers or the second layer is disposed between the first and intermediate layers.
C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
2.
INHIBITED OXIDE DEPOSITION FOR REFILLING SHALLOW TRENCH ISOLATION
Examples are disclosed relate to using an inhibitor with a silicon oxide ALD deposition process to refill recesses in STI regions. One example provides a method of processing a substrate. The method comprises depositing an inhibitor on the substrate, wherein a concentration of the inhibitor on a gate structure of the substrate is greater relative to the concentration of the inhibitor on a recessed shallow trench isolation (STI) region of the substrate. The method further comprises depositing a layer of silicon oxide on the substrate, the inhibitor inhibiting growth of the layer of silicon oxide such that the layer of silicon oxide is thicker on the recessed STI region and thinner on the gate structure.
The present disclosure relates to methods for protecting semiconductor substrate surfaces by coating the surfaces with a stimulus responsive polymer layer, the stimulus responsive polymer layer composed of copolymers with oxymethylene-containing backbones and hydrophobicity enhancing and/or crystallinity reducing substituents.
A substrate processing chamber includes a pedestal and a baffle. The pedestal is arranged in the substrate processing chamber. The pedestal includes a base portion and a stem portion. The base portion is greater in diameter than the stem portion. The baffle is arranged around the pedestal to direct flow of gases supplied to the substrate processing chamber to flow around the pedestal from a periphery of the base portion of the pedestal towards the stem portion of the pedestal and towards one or more exhaust ports of the substrate processing chamber.
C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
5.
PURGING TOXIC AND CORROSIVE MATERIAL FROM SUBSTRATE PROCESSING CHAMBERS
A system for performing preventive maintenance of a processing chamber of a substrate processing system using atmospheric air comprises a first plurality of valves and manifolds, a second plurality of valves and manifolds, and a controller. The first plurality of valves and manifolds are located downstream from the processing chamber. The second plurality of valves and manifolds are located upstream from the processing chamber. The controller is configured to perform the preventive maintenance by: initially purging the processing chamber and the first plurality of valves and manifolds while maintaining pressure in the processing chamber between a first pressure and a second pressure that is greater than the first pressure and less than atmospheric pressure, and subsequently purging the processing chamber and the second plurality of valves and manifolds while maintaining pressure in the processing chamber between the first pressure and a third pressure that is less than the first pressure.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
in situin situ generation of an iodine-bond containing metal species with an iodine-containing reagent and a metal-containing precursor followed by reduction at a process temperature below 400ºC. In particular, the film can be a molybdenum-containing film. The methods may also include simultaneous introduction of the reagent and the precursor or an optional pretreatment with a passivation gas. Also provided are methods for depositing molybdenum-containing films on semiconductor using low valent molybdenum-containing precursors. The low valent molybdenum precursors of one or two molybdenum atoms may have at least one ligand which is an isocyanohaloalkyl, an allyl, an aryl, a tertiary organophosphino or an alkoxide group.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/18 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the deposition of metallic material from metallo-organic compounds
C07F 11/00 - Compounds containing elements of Groups 6 or 16 of the Periodic System
C23C 16/04 - Coating on selected surface areas, e.g. using masks
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
7.
ELECTRODEPOSITION SYSTEM WITH ION-EXCHANGE MEMBRANE IRRIGATION
Examples are disclosed that relate to irrigating an ion exchange membrane in an electrodeposition system. In one example, the electrodeposition system comprises a fluid distribution system comprising a membrane assembly that comprises a membrane frame configured to support an ion exchange membrane that defines a boundary of a cathode chamber. The fluid distribution system further comprises a high resistance virtual anode (HRVA) positioned between the membrane frame and a substrate holder, a catholyte circulation loop operable to flow catholyte in a first direction across a surface of the HRVA facing the substrate holder and a plurality of flow barriers extending between the membrane frame and the HRVA along a second direction, transverse to the first direction. Irrigation conduits are positioned between adjacent flow barriers, each irrigation conduit configured to receive catholyte from the catholyte circulation loop and to direct catholyte towards the membrane assembly via a plurality of emitters.
A method is provided for cleaning deposition residue from a processing chamber of a processing tool. The method comprises introducing a reactive cleaning species generated by a remote plasma into the processing chamber. An in-situ plasma is formed at a processing station within the processing chamber while introducing the reactive cleaning species generated by the remote plasma into the processing chamber.
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges
C23C 16/52 - Controlling or regulating the coating process
9.
POLYMERIC COATING FOR SEMICONDUCTOR PROCESSING CHAMBER COMPONENTS
A component in a semiconductor processing chamber is provided. An electrically conductive semiconductor or metal body has a CTE of less than 10.0×10−6/K. An intermediate layer is disposed over at least one surface of the body, the intermediate layer comprising a fluoropolymer. A perfluoroalkoxy alkane (PFA) layer is disposed over the intermediate layer to form the component.
A showerhead for a substrate processing chamber configured to perform bulk deposition includes a faceplate, a backplate, and a faceplate. The faceplate defines a first plenum corresponding to center and middles zones and a second plenum corresponding to an edge zone. The faceplate includes a first plurality of holes distributed throughout the center zone and the middle zone and a second plurality of holes distributed throughout the edge zone. The middle plate is disposed between the faceplate and the backplate. The faceplate is configured to receive a first gas mixture supplied to the center zone via a center inlet, receive a second gas mixture supplied to the middle zone via a middle inlet, blend the first gas mixture and the second gas mixture within the first plenum, and receive a third gas mixture supplied to the edge zone via an edge inlet.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
A showerhead for a substrate processing chamber includes a head portion configured to receive a gas mixture and a stem portion coupled to the head portion. A first plenum is defined within the head portion and the gas mixture flows into the plenum and from the plenum into the substrate processing chamber via holes arranged in a lower surface of the head portion. The stem portion is configured to supply the gas mixture to the head portion through a central bore. A mixing chamber is arranged on the stem portion. The mixing chamber is configured to receive a first gas supplied from a first mixer inlet and a second gas supplied from a second mixer inlet, mix the first gas and the second gas into the gas mixture, and direct the gas mixture into an upper end of the central bore to be supplied downward into the head portion.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges
A processing chamber assembly for a substrate processing system includes a first section, a second section, and a third section. The first section defines a first volume configured to enclose a pedestal arranged within the processing chamber assembly. The first volume includes an upper portion, a middle portion, and a lower portion. The second section is disposed below the first section and defines the lower portion of the first volume. An upper surface of the second section defines a second volume radially outside of the first volume. A lower surface of the second section defines a third volume radially outside of the first volume. The third section is disposed below the second section and defines a main pumping port aligned with the third volume. First channels connect the upper portion of the first volume to the second volume. Second channels connect the second volume to the third volume.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges
C23C 16/52 - Controlling or regulating the coating process
A method for performing an etch process on a substrate includes applying a bias signal and a source signal to an electrode of a plasma processing system. The bias signal and the source signal are pulsed RF signals that together define a repeated pulsed RF cycle, wherein each pulsed RF cycle sequentially includes a first state, a second state, a third state, and a fourth state. The power level of the bias signal in the first state is greater than in the third state, which is greater than in the second state, which is greater than in the fourth state. The power level of the source signal in the first state is greater than in the third state, which is greater than in the second state, which is greater than in the fourth state.
A method for etching a stack is described. The method includes etching a first nitrogen-containing layer of the stack by applying a non-metal gas and discontinuing the application of the non-metal gas upon determining that a first oxide layer is reached. The first oxide layer is under the first nitrogen-containing layer. The method further includes etching the first oxide layer by applying a metal-containing gas. The application of the metal-containing gas is discontinued upon determining that a second nitrogen-containing layer will be reached. The second nitrogen-containing layer is situated under the first oxide layer. The method includes etching the second nitrogen-containing layer by applying the non-metal gas.
H01L 21/3213 - Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
15.
HYDROGEN REDUCTION OF SILICON NITRIDE PASSIVATION LAYER BY FORMATION AND TREATMENT OF PASSIVATION SUB-LAYERS
A method for developing a passivation film on a substrate with less than 10 atomic% of hydrogen includes providing the substrate within a processing station of a substrate processing system. A resultant passivation film is formed with less than 10 atomic% of hydrogen on the substrate by performing the following steps of: depositing a passivation film sub-layer on the substrate, where the passivation film sub-layer lays on a semiconductor device layer or directly on a previously deposited passivation film sub-layer; and after depositing the passivation film sub-layer, performing a post plasma treatment to the passivation film sub-layer with at least one of nitrogen and argon to reduce hydrogen content within the passivation film sub-layer.
H01L 33/44 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
A pedestal assembly for a substrate processing system configured to perform bulk deposition on a substrate is configured to be raised and lowered. The pedestal assembly includes a stem portion, a baseplate portion disposed on the stem portion, and a pumping ring assembly. The baseplate portion is configured to support the substrate. The pumping ring assembly is disposed around the baseplate portion and includes a lower pumping ring and an upper pumping ring disposed above the lower pumping ring. The pumping ring assembly is configured to define an annular volume radially outside of the pumping ring assembly such that the pumping ring assembly separates the annular volume from a volume defined below the baseplate portion of the pedestal assembly.
C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
17.
IMPROVING CHEMISTRY UTILIZATION BY INCREASING PRESSURE DURING SUBSTRATE PROCESSING
A substrate processing system comprises a processing chamber comprising a pedestal configured to support a substrate. The processing chamber comprises a showerhead configured to supply precursors during dose steps and a purge gas during purge steps of an atomic layer deposition (ALD) process to process the substrate. The dose steps and the purge steps comprise a sequence of a dose step followed by a subsequent purge step. The substrate processing system comprises a throttle valve connected to the processing chamber and a vacuum pump connected to the throttle valve. The substrate processing system comprises a controller configured to control the vacuum pump, open the throttle valve during the purge steps, and close the throttle valve during at least a portion of the dose steps to increase pressure in the processing chamber during at least the portion of the dose steps of the ALD process.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
C23C 16/52 - Controlling or regulating the coating process
18.
DRY CHAMBER CLEAN USING THERMAL AND PLASMA PROCESSES
A metal-containing photoresist film may be deposited on a semiconductor substrate. Unintended metal-containing material may form on internal surfaces of a process chamber during deposition, bevel and backside cleaning, exposure, baking, development, etch, or other photolithography operations. A dry chamber clean may remove some of the unintended metal-containing material by exposure to plasma. A dry chamber clean may remove some of the unintended metal-containing material and modify some of the unintended metal-containing material by exposure to an etch gas at an elevated temperature without striking a plasma. The dry chamber clean may remove the modified metal-containing material using plasma having a chemistry configured to form volatile products of the modified metal-containing material. In some embodiments, the plasma includes a halide-containing plasma, hydrogen-containing plasma, hydrocarbon-containing plasma, inert gas-containing plasma, or mixtures thereof.
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
19.
MATCHING PRE-PROCESSING AND POST-PROCESSING SUBSTRATE SAMPLES
Various embodiments herein relate to systems, methods, and media for matching pre-processing and post-processing substrate samples. In some embodiments, a computer program product for matching pre-processing and post-processing substrate samples is provided, the computer program product comprising a non-transitory computer-readable on which is provided computer-executable instructions for: receiving a plurality of samples associated with a first set of dimensions characterizing a pre-processed substrate and a plurality of samples associated with a second set of dimensions characterizing a post-processed substrate; receiving an identification of one of the pre-processed dimensions and one of the post-processed dimensions that are to be matched; generating a first probability distribution of samples for the identified pre-processed dimension and a second probability distribution of samples for the identified post-processed dimension; and matching samples of the identified pre-processed dimension to samples of the identified post-processed dimension based on the first probability distribution and the second probability distribution.
A faceplate of a showerhead has a bottom side that faces a plasma generation region and a top side that faces a plenum into which a process gas is supplied during operation of a substrate processing system. The faceplate includes apertures formed through the bottom side and openings formed through the top side. Each of the apertures is formed to extend through a portion of an overall thickness of the faceplate to intersect with at least one of the openings to form a corresponding flow path for process gas through the faceplate. Each of the apertures has a cross-section that has a hollow cathode discharge suppression dimension in at least one direction. Each of the openings has a cross-section that has a smallest cross-sectional dimension that is greater than the hollow cathode discharge suppression dimension.
A method for cleaning surfaces of a substrate processing chamber includes a) supplying a first gas selected from a group consisting of silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), a hydrocarbon (CxHy where x and y are integers) and molecular chlorine (Cl2), boron trichloride (BCl3), and thionyl chloride (SOCl2); b) striking plasma in the substrate processing chamber to etch the surfaces of the substrate processing chamber; c) extinguishing the plasma and evacuating the substrate processing chamber; d) supplying a second gas including fluorine species; e) striking plasma in the substrate processing chamber to etch the surfaces of the substrate processing chamber; and f) extinguishing the plasma and evacuating the substrate processing chamber.
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
22.
MULTI-PLATE ELECTROSTATIC CHUCKS WITH CERAMIC BASEPLATES
An electrostatic chuck for a substrate processing system is provided. The electrostatic chuck includes: a top plate configured to electrostatically clamp to a substrate and formed of ceramic; an intermediate layer disposed below the top plate; and a baseplate disposed below the intermediate layer and formed of ceramic. The intermediate layer bonds the top plate to the baseplate.
H01J 37/244 - Detectors; Associated components or circuits therefor
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
Examples are disclosed that relate to layered metal oxide films. One example provides a method of forming a patterning structure. The method comprises performing one or more layered film deposition cycles to form a layered film comprising a metal oxide. A layered film deposition cycle of the one or more layered deposition cycles comprises a metal oxide deposition subcycle and a silicon oxide deposition cycle. The metal oxide deposition subcycle comprises exposing the substrate to a metal-containing precursor and oxidizing metal-containing precursor adsorbed to the substrate. The silicon oxide deposition subcycle comprising exposing a substrate to a silicon-containing precursor and oxidizing silicon-containing precursor adsorbed to the substrate. The method further comprises etching one or more regions of the layered film to form the patterning structure.
H01L 21/033 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or comprising inorganic layers
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
Methods, systems, and media for generating synthetic semiconductor image data are provided. In some embodiments, a method comprises generating a set of synthetic segmented images, each synthetic segmented image of the set of synthetic segmented images representing a segmented semiconductor metrology image. The method may comprise generating, using a first trained GAN, a set of virtual images, each virtual image corresponding to one of the synthetic segmented images in the set of synthetic segmented images. The method may comprise constructing a training set comprising a plurality of training samples, each training sample comprising a synthetic segmented image from the set of synthetics segmented images and a corresponding virtual image from the set of virtual images, wherein the training set is usable to train a downstream model configured to model semiconductor fabrication processes.
A method of forming features in stack with a silicon containing layer below a mask is provided. Features are etched into the stack. A post etch plasma treatment is provided to reduce surface roughness of sidewalls of the features.
A processing chamber includes a first portion, including a dome, and a second portion. The dome includes a ceramic material and is elliptical in shape. A pedestal to process a substrate is arranged in the second portion. A showerhead is arranged at a base of the dome between the first and second portions. An injector including the ceramic material is mounted on the dome to inject a process gas and a cleaning gas into the dome during substrate processing and cleaning of the processing chamber, respectively. A coil is disposed around a portion of the dome. An RF generator supplies RF power to the coil to generate plasma in the dome during the substrate processing and the cleaning. A controller controls temperatures of the pedestal and the showerhead at respective predetermined temperatures within a predetermined range during the substrate processing and the cleaning.
Methods, systems, and media for optimization of fabrication processes are provided. In some implementations, a method of automatically optimizing fabrication processes comprises: (a) providing a first set of process parameter values associated with a first experiment to a model representing a fabrication process; (b) characterizing a statistical uncertainty of predictions made by the model; (c) using an acquisition function to select a second set of process parameter values, wherein the acquisition function identifies the second set of process parameters based on both: (i) a difference between predicted wafer characteristics and a target specification; and (ii) the statistical uncertainty; (d) receiving results of the fabrication process performed using the second set of process parameter values; and (e) determining whether the performance of the fabrication process generates a post-processed wafer having wafer characteristics that meet the target specification.
G05B 13/04 - Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric involving the use of models or simulators
G05B 19/418 - Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control (DNC), flexible manufacturing systems (FMS), integrated manufacturing systems (IMS), computer integrated manufacturing (CIM)
Multiple charge volumes (CVs) are used to supply a reactant and an inert gas at each processing chamber to perform atomic layer deposition (ALD) on substrates. A series of pulses of the reactant can be supplied at a high flow rate from two CVs during a dose step, which extends dose time. The inert gas can be supplied at an equal starting pressure from first and second CVs at first and second purge steps. A heated pulse valve manifold (PVM) minimizes temperature variations of process gases supplied from the PVM to respective processing chamber during ALD. The PVM preheats the process gases before the process gases enter the respective CVs in the PVM. The PVM includes additional supplemental heaters above and below the CVs to maintain the temperature of the process gases within the CVs. The PVM can be rapidly cooled before performing maintenance, which reduces downtime.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/46 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for heating the substrate
This disclosure pertains to pedestal assemblies for supporting wafers in semiconductor manufacturing tools and chambers. Such pedestal assemblies may have an edge purge system that includes an axially symmetric first plenum volume that includes at least a first radial sub-volume, a first axial sub-volume, and a second radial sub-volume. The first axial sub-volume may be fluidically interposed between the first radial sub-volume and the second radial sub-volume. An optional second plenum volume may be provided as well and may be used to fluidically connect a region of a wafer support that is part of the pedestal assembly with a vacuum port to allow the wafer support to provide vacuum clamping functionality.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
30.
ELECTRONIC COMPONENT COOLING USING COOLING MANIFOLDS FOR PRESSURIZED AIR
Cooling systems featuring cooling manifolds with features that conform to the shape of an electrical component to be cooled are provided herein. Such cooling manifolds may be connected with a cooling fluid source, such as a clean dry air source, by flexible and/or rigid flow conduits. The cooling manifolds may have one or more outlet ports that are configured to direct cooling fluid towards one or more surfaces of the electrical component to be cooled so that the cooling fluid directly impinges on one or more surfaces thereof.
Methods, systems, and media for deposition control in a process chamber are provided. In some embodiments, a method comprises (a) obtaining, at a present time, information indicating a status of one or more components of the process chamber during performance of a deposition process on one or more wafers. The method may comprise (b) determining whether adjustments to one or more control components of the process chamber are to be made by providing an input based on the obtained information to a trained machine learning model configured to determine adjustments as an output, wherein the adjustments to the one or more control components cause a change in the deposition process. The method may comprise (c) transmitting instructions to a controller of the process chamber that cause the adjustments to the one or more control components to be implemented.
C23C 16/52 - Controlling or regulating the coating process
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
A substrate processing apparatus includes a vacuum chamber with upper and lower electrodes and a processing zone for processing a substrate using plasma. The upper electrode includes a surface that is substantially parallel to a surface of the substrate when the substrate is positioned in the chamber. The apparatus includes at least one magnetic field source configured to generate one or more active magnetic fields through the processing zone, and a controller coupled to the at least one magnetic field source and the upper electrode. The controller is configured to apply RF power between the upper and lower electrodes to generate the plasma using a process gas. The controller controls the current through the at least one magnetic field source during the processing of the substrate, where the current is based on a target value corresponding to at least one characteristic of the one or more active magnetic fields.
A substrate support includes an edge ring, a heater element arranged within the edge ring, a ceramic layer, at least one heating element arranged within the ceramic layer, and a cable configured to provide power from a power source to the heater element and the at least one heating element. The cable includes a first plurality of wires connected to the heater element, a second plurality of wires connected to the at least one heating element, a filter module, and an isolation device connected only to the first plurality of wires between the filter module and the heater element. The first and second pluralities of wires are twisted together within the filter module. The isolation device is configured to compensate for a resonance frequency generated during operation of the heater element and the at least one heating element.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
One example provides a plasma-exposed part for a plasma processing tool. The plasma-exposed part comprises an etch-resistant material that has a lower etch rate than silicon or silicon carbide when exposed to plasma process gas chemistries comprising fluorine and/or oxygen. The etch-resistant material comprising one or more of (a) an oxide, a nitride, or an oxynitride of one or more of titanium, hafnium, zirconium, or tin, or (b) one or more of silicon or silicon carbide doped with one or more of titanium, hafnium, zirconium, or tin.
A method for etching features in a stack comprising a silicon oxide layer below a mask is provided. A substrate support for supporting the stack in an etch chamber is cooled to a temperature below 0° C. An etch gas comprising a halogen containing component and a phosphorous containing component is provided. A plasma is generated from the etch gas. A bias is provided to accelerate ions from the plasma to the stack. Features are selectively etched in the stack with respect to the mask.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
A gas distribution port insert, and equipment for use therewith, capable of suppressing or at least reducing process gas interaction with and/or back diffusion into a gas distribution body including the gas distribution port insert in association with a semiconductor processing tool.
A component for use in a plasma processing chamber system is provided. A component body has a plasma facing surface. The plasma facing surface comprises a pyrochlore, comprising at least one of zirconium and hafnium and at least one of lanthanum (La), samarium (Sm), yttrium (Y), erbium (Er), cerium (Ce), gadolinium (Gd), ytterbium (Yb), and neodymium (Nd).
An actuator assembly to actuate a plasma tuning ring in a processing chamber includes an actuator, a rod, bellows, and vacuum seals. The actuator is arranged external to the processing chamber. The processing chamber is under vacuum. The actuator is at atmospheric pressure. The rod is coupled to the actuator and to the plasma tuning ring in the processing chamber. The bellows are arranged external to the processing chamber between the actuator and the processing chamber. The rod passes through the bellows into the processing chamber. The vacuum seals are disposed between the bellows and the actuator and between the bellows and the processing chamber to seal the vacuum in the processing chamber from the atmospheric pressure external to the processing chamber.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
39.
BAKE-SENSITIVE UNDERLAYERS TO REDUCE DOSE TO SIZE OF EUV PHOTORESIST
Provided are patterning structure underlayers deposited between a. substrate and an imaging layer, the underlayers having chemically labile, activatable bonds useful in extreme ultraviolet lithography. Reactive moieties may be released from the underlayer's activatable bonds in the presence of heat, oxidizing gases and/or inert gases into the imaging layer above.
G03F 7/11 - Photosensitive materials - characterised by structural details, e.g. supports, auxiliary layers having cover layers or intermediate layers, e.g. subbing layers
The present disclosure relates to vertical stacks including heterolayers, as well as processes and methods of their manufacture. Also described herein are apparatuses and systems for preparing and making such stacks.
C23C 16/30 - Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
C23C 16/452 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials by activating reactive gas streams before introduction into the reaction chamber, e.g. by ionization or by addition of reactive species
Semiconductor manufacturing machines; Semiconductor substrates manufacturing machines; Semiconductor wafer processing equipment; Semiconductor wafer processing machines; replacement parts and fittings for all of the aforementioned goods
42.
CAPACITANCE MEASUREMENT WITHOUT DISCONNECTING FROM HIGH POWER CIRCUIT
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges
C23C 16/52 - Controlling or regulating the coating process
G01N 21/95 - Investigating the presence of flaws, defects or contamination characterised by the material or shape of the object to be examined
G01R 13/02 - Arrangements for displaying electric variables or waveforms for displaying measured electric variables in digital form
G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
G01R 27/26 - Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
In some examples, a wafer bow measurement system comprises a measurement unit including: a wafer support assembly to impart rotational movement to a measured wafer supported in the measurement unit; an optical sensor; a calibration standard to calibrate the optical sensor; a linear stage actuator to impart linear direction of movement to the optical sensor; a wafer centering sensor to determine a centering of the measured wafer supported in the measurement unit; and a wafer alignment sensor to determine an alignment of the measured wafer supported in the measurement unit.
G01N 21/95 - Investigating the presence of flaws, defects or contamination characterised by the material or shape of the object to be examined
G01B 11/06 - Measuring arrangements characterised by the use of optical techniques for measuring length, width, or thickness for measuring thickness
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/68 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for positioning, orientation or alignment
44.
SYSTEMS AND METHODS FOR PULSE WIDTH MODULATED DOSE CONTROL
A substrate processing system for treating a substrate includes N manifolds, Y groups of injector assemblies, and a dose controller, where Y and N are integers greater than one. Each of the Y groups of injector assemblies includes N injector assemblies located in a processing chamber. Each of the N injector assemblies in each group of injector assemblies is in fluid communication with one of the N manifolds, respectively, and includes a valve including an inlet and an outlet. The dose controller is configured to control pulse widths output to the Y groups of injector assemblies to provide temporal dosing of the substrate
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
B05B 1/14 - Nozzles, spray heads or other outlets, with or without auxiliary devices such as valves, heating means with strainers in or outside the outlet opening
B05B 1/30 - Nozzles, spray heads or other outlets, with or without auxiliary devices such as valves, heating means designed to control volume of flow, e.g. with adjustable passages
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
START PLACE STACK IN CHAMBER ON SUPPORT COOL SUPPORT FLOW HF ETCH GAS INTO CHAMBER FORM ETCH GAS INTO PLASMA EXPOSE STACK TO PLASMA SELECTIVELY ETCH STACK REMOVE STACK FROM CHAMBER STOP
A composite nanocrystalline silicon layer can be formed by depositing a polycrystalline silicon sublayer directly or indirectly on a substrate. An amorphous silicon sublayer is deposited on the polycrystalline silicon sublayer. The composite nanocrystalline silicon layer can be formed by repeating the deposition of the polycrystalline silicon sublayer and the amorphous silicon sublayer.
Methods and systems for using a time-series of spectra to identify endpoint of a multi-step semiconductor fabrication processes such as multi-step deposition and multi-step etch processes. One method includes accessing a virtual carpet (e.g., a machine learning model) that is formed from a time-series of spectra for the multi-step processes collected during a training operation. During production, in-situ time-series of spectra are compared to the virtual carpet as part of end pointing of multi-step fabrication processes.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
48.
DETERMINATION OF RECIPES FOR MANUFACTURING SEMICONDUCTOR DEVICES
Methods, systems, and computer programs are presented for determining the recipe for manufacturing a semiconductor with the use of machine learning (ML) to accelerate the definition of recipes. One general aspect includes a method that includes an operation for performing experiments for processing a component, each experiment controlled by a recipe, from a set of recipes, that identifies parameters for manufacturing equipment. The method further includes an operation for performing virtual simulations for processing the component, each simulation controlled by one recipe from the set of recipes. An ML model is obtained by training an ML algorithm using experiment results and virtual results from the virtual simulations. The method further includes operations for receiving specifications for a desired processing of the component, and creating, by the ML model, a new recipe for processing the component based on the specifications.
G06F 30/3308 - Design verification, e.g. functional simulation or model checking using simulation
G06F 30/27 - Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
Semiconductor processing tool showerhead designs suitable for multi-gas delivery and for being made through additive manufacturing are provided. Such showerhead designs may feature either internal spiral passages or internal plenums with a plurality of pillars spanning between upper and lower surfaces thereof distributed throughout.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
B33Y 80/00 - Products made by additive manufacturing
50.
SPRING-LOADED SEAL COVER BAND FOR PROTECTING A SUBSTRATE SUPPORT
A spring-loaded seal band for protecting a bonding layer of a substrate support, the spring-loaded seal band includes an annular body having a first length when the spring-loaded seal band is in an uncompressed state. The annular body comprises a first annular body portion, an annular arm, and a flexible neck portion that connects the first annular body portion and the annular arm. The spring-loaded seal band is configured to surround the substrate support between a lower surface of a top plate and an upper surface of a baseplate. The lower surface of the top plate and the upper surface of the baseplate is separated by a second length. The first length is greater than the second length. The flexible neck portion is configured to bend when the spring-loaded seal band is in an installed compressed state.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
An outer upper electrode for plasma processing. A shaped bottom surface and a top surface having a radial width, wherein a middle portion of the top surface has an oval shape. A cylindrical outline traversing a height of the outer upper electrode, wherein the middle portion of the top surface defines a top of the cylindrical outline. An inner diameter surface joining the top surface and the shaped bottom surface, wherein the inner diameter surface includes a transition edge. An outer diameter surface joining the top surface and the shaped bottom surface. A convex protrusion of the shaped bottom surface protruding below the transition edge of the inner diameter surface, wherein the convex protrusion includes a protrusion minima that is located in an interior region of the cylindrical outline.
A gas cooling cover for an exhaust connector of a substrate processing system includes a first cover portion configured for arrangement around a first portion of the exhaust connector of the substrate processing system and including a first body defining a first gas plenum and a second gas plenum. A first gas inlet is arranged on an outer surface of the first body and in fluid communication with the first gas plenum. A first plurality of nozzles is arranged on an inner surface of the first cover portion and in fluid communication with the first gas plenum. A first plurality of exhaust ports is arranged on the inner surface of the first cover portion and configured to direct gas located between the first cover portion and the first portion of the exhaust connector to the second gas plenum of the first body.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
An amorphous silicon layer or amorphous boron layer can be deposited on a substrate using one or more silicon or boron-containing precursors, respectively. Radical species are provided from a plasma source or from a controlled reaction chamber atmosphere to convert the amorphous silicon layer to a doped silicon layer with composition tunability. An initiation layer is deposited on one or more semiconductor device structures having a dielectric layer over an electrically conductive layer. The initiation layer may be conformally deposited by a CVD-based process and may comprises amorphous silicon, doped silicon, amorphous boron, or doped boron.
Methods, apparatuses, and systems for forming deposited features on workpieces are provided herein. Generally, the techniques herein employ a deposition head to define an electrical field that facilitates electrochemical deposition. Other systems and controllers can be employed, which can assist in aligning or positioning the deposition head in proximity to a workpiece and controlling the size and location of the deposited feature.
Tin oxide films are used as spacers and hardmasks in semiconductor device manufacturing. In one method, tin oxide layer (e.g., spacer footing) needs to be selectively etched in a presence of an exposed silicon-containing layer, such as SiOC, SiON, SiONC, amorphous silicon, SiC, or SiN. In order to reduce damage to the silicon-containing layer the process involves passivating the silicon-containing layer towards a tin oxide etch chemistry, etching the tin oxide, and repeating passivation and etch in an alternating fashion. For example, passivation and etch can be each performed between 2-50 times. In one implementation, passivation is performed by treating the substrate with an oxygen-containing reactant, activated in a plasma, and the tin oxide etching is performed by a chlorine-based chemistry, such as using a mixture of Cl2 and BCl3.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/033 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or comprising inorganic layers
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
56.
SYSTEMS AND METHODS FOR HOMOGENOUS INTERMIXING OF PRECURSORS IN ALLOY ATOMIC LAYER DEPOSITION
A showerhead includes a plurality of plenums and a plurality of through holes positioned in the plurality of plenums. The plenums are stacked in a sequential order in an axial direction perpendicular to a semiconductor substrate. The plenums extend radially fully across the semiconductor substrate. The plenums are disjoint from each other and are configured to respectively supply a first metal precursor, a second metal precursor, and a reactant via the respective plenums without intermixing the first metal precursor, the second metal precursor, and the reactant in the plenums. The through holes of the respective plenums are arranged in a radial direction, which is perpendicular to the axial direction, in the same sequential order as the sequential order of the plenums. The through holes of the plenums open along a flat surface at a bottom of the showerhead. The flat surface extends radially fully across the bottom of the showerhead.
C23C 16/06 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the deposition of metallic material
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
H01L 21/3205 - Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
57.
MULTI-SENSOR DETERMINATION OF A STATE OF SEMICONDUCTOR EQUIPMENT
Methods and apparatus for multi-sensor determination of a state of semiconductor equipment are provided In some embodiments disclosed herein, semiconductor manufacturing equipment may include: a plurality of sensors comprising one or more spatial sensors, one or more spectral sensors, and one or more temporal sensors disposed about the semiconductor manufacturing equipment; and a controller communicatively coupled to the plurality of sensors, the controller configured to cause: determining a set of signals, from the plurality of sensors, to monitor during a process to be performed by the semiconductor manufacturing equipment; during the process, obtaining measurements associated with the set of signals from the plurality of sensors; and determining an indication of a state of the semiconductor manufacturing equipment based on a combination of data generated from the measurements associated with the set of signals.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
An ionically resistive ionically permeable element for use in an electroplating apparatus includes ribs to tailor hydrodynamic environment proximate a substrate during electroplating. In one implementation, the ionically resistive ionically permeable element includes a channeled portion that is at least coextensive with a plating face of the substrate, and a plurality of ribs extending from the substrate-facing surface of the channeled portion towards the substrate. Ribs include a first plurality of ribs of full maximum height and a second plurality of ribs of smaller maximum height than the full maximum height. In one implementation the ribs of smaller maximum height are disposed such that the maximum height of the ribs gradually increases in a direction from one edge of the element to the center of the element.
An edge seal for sealing an outer surface of a lower electrode assembly configured to support a semiconductor substrate in a plasma processing chamber, the lower electrode assembly including an annular groove defined between a lower member and an upper member of the lower electrode assembly. The edge seal includes an elastomeric band configured to be arranged within the groove, the elastomeric band having an annular upper surface, an annular lower surface, an inner surface, and an outer surface. When the elastomeric band is in an uncompressed state, the outer surface of the elastomeric band is concave. When the upper and lower surfaces are axially compressed at least 1% such that the elastomeric band is in a compressed state, an outward bulging of the outer surface is not greater than a predetermined distance. The predetermined distance corresponds to a maximum outer diameter of the elastomeric band in the uncompressed state.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H02N 13/00 - Clutches or holding devices using electrostatic attraction, e.g. using Johnson-Rahbek effect
60.
A TEMPERATURE CONTROLLED SHOWER HEAD FOR A PROCESSING TOOL
An apparatus includes a shower head comprising a disk and a stem coupled with the disk and an adjuster coupled with the stem. The adjuster includes an adapter comprising a heater cartridge; and a fluid line adjacent to the heater cartridge, where the heater cartridge extends from a top surface of the adapter through a first cavity in the adapter and within a second cavity in the stem. The adapter further includes a bellows comprising a flange, where the bellows is coupled with the adapter through the flange.
A modular vapor delivery system comprising a flow control component module that comprises a first inlet port and a second inlet port, a liquid flow controller coupled to an outlet port of the flow control component module, and a vaporizer module coupled to an outlet port of the liquid flow controller.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/448 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
C23C 16/52 - Controlling or regulating the coating process
Examples are disclosed that relate to using in-situ sputtering in an atomic layer deposition tool to form an angular surface feature in a substrate. One example provides a method of forming an angular surface feature on a substrate in an integrated circuit process. The method comprises placing the substrate in a processing chamber of an atomic layer deposition (ALD) tool. The method further comprises controlling the ALD tool to form a film on the substrate by performing one or more ALD cycles. The method further comprises controlling the ALD tool to sputter the film to form the angular surface feature.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/52 - Controlling or regulating the coating process
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
Provided are nitride atomic layer etch including in situ generating a phosphoric acid on the surface of silicon nitride layer by reacting a phosphorus containing reactant with one or more oxidants. Phosphoric acid selectively etches silicon nitride layer over silicon oxide and/or silicon.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
64.
A PLASMA PROCESSING SYSTEM WITH A GAS RECYCLING SYSTEM
A gas recycling system attachable to a semiconductor processing chamber is provided. A membrane filtering system is in fluid connection with the semiconductor processing chamber, the membrane filtering system comprising at least one gas separation membrane, wherein the at least one gas separation membrane filters a pressurized exhaust gas from the semiconductor processing chamber to separate at least one gas from the pressurized exhaust gas.
A method for etching features in a stack is provided. A non-uniform metal or metalloid containing mask is formed over the stack. The stack is etched through the non-uniform metal or metalloid containing mask, wherein the etching sputters metal or metalloid in the non-uniform metal or metalloid containing mask and the sputtered metal or metalloid physically redeposits on sidewalls of features etched in the stack as a sputtered metal or metalloid containing passivation layer.
A method for etching features in a stack is provided. A patterned mask is formed over the stack. The stack is partially etched through the patterned mask. A helmet mask is deposited over the patterned mask. The stack is etched through the helmet mask.
A method for etching features in a stack is provided. A patterned mask is formed over the stack. Features are partially etched in the stack through the patterned mask. A helmet mask is deposited over the patterned mask and liner on sidewalls of the features. The stack is etched through the helmet mask.
Semiconductor-processing chamber components and methods for making the components are presented. One component includes a base including a metallic material, a metal matrix composite (MMC) layer, and a dielectric layer. The MMC layer at least partially covers the base, and the MMC layer comprises a metallic material as a continuous phase and a non-metallic material as a disperse phase. Further, the MMC layer is formed on the base using solid-state additive manufacturing (SSAM). The dielectric layer is made of a non-metallic material and is directly on the MMC layer.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
B33Y 80/00 - Products made by additive manufacturing
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating
C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
69.
DOPED OR UNDOPED SILICON CARBIDE DEPOSITION AND REMOTE HYDROGEN PLASMA EXPOSURE FOR GAPFILL
A doped or undoped silicon carbide (SiCxOyNz) film can be deposited in one or more features of a substrate for gapfill. After a first thickness of the doped or undoped silicon carbide film is deposited in the one or more features, the doped or undoped silicon carbide film is exposed to a remote hydrogen plasma under conditions that cause a size of an opening near a top surface of each of the one or more features to increase, where the conditions can be controlled by controlling treatment time, treatment frequency, treatment power, and/or remote plasma gas composition. Operations of depositing additional thicknesses of silicon carbide film and performing a remote hydrogen plasma treatment are repeated to at least substantially fill the one or more features. Various time intervals between deposition and plasma treatment may be added to modulate gapfill performance.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
C23C 16/02 - Pretreatment of the material to be coated
C23C 16/30 - Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
This disclosure pertains to compact, mono-block manifolds for providing dual-channel gas delivery for semiconductor processing tools. Some such manifolds may be designed to have surface-mount flow component interfaces on opposite sides of the manifold so as to reduce the overall footprint of the manifold block.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
71.
SELECTIVE SIGE ETCHING USING THERMAL F2 WITH ADDITIVE
2222. Use of the additive produces a more uniform etch rate for the material being etched than would otherwise be achieved in the absence of the additive.
H01L 21/3213 - Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
A gas conditioning assembly comprising a first block structure and at least a second block structure is disclosed. A first gas flow passage and a second gas flow passage extend within the first block structure. The first gas flow passage is adjacent to the second gas flow passage. The second block structure comprises a reservoir housing block and a reservoir yoke. The reservoir yoke comprises at least one gas reservoir within the reservoir housing block. The second block structure further comprises a nonplanar sidewall adjacent to the first block structure. The nonplanar sidewall comprises a plurality of recessed contours and a plurality of grooves extending along the nonplanar sidewall. Individual recessed contours are in thermal contact with adjacent surface mount components. Individual grooves are in thermal contact with gas line tubing sections extending from the first block structure.
C23C 16/448 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/52 - Controlling or regulating the coating process
73.
BOND PROTECTION FOR AN ELECTROSTATIC CHUCK IN A PLASMA PROCESSING CHAMBER
An electrostatic chuck system for use in a plasma processing chamber is provided. A conductive base plate is provided. A bond of a bonding material is bonded to a surface of the base plate on a first side of the bond. A ceramic plate is bonded to a second side of the bond. A protective strip surrounds the bond and extends between the conductive base plate and the ceramic plate, wherein the protective strip comprises at least one of an anodized strip, a ceramic tape strip, and a coated aluminum strip.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
A system for controlling of wafer bow in plasma processing stations is described. The system includes a circuit that provides a low frequency RF signal and another circuit that provides a high frequency RF signal. The system includes an output circuit and the stations. The output circuit combines the low frequency RF signal and the high frequency RF signal to generate a plurality of combined RF signals for the stations. Amount of low frequency power delivered to one of the stations depends on wafer bow, such as non-flatness of a wafer. A bowed wafer decreases low frequency power delivered to the station in a multi-station chamber with a common RF source. A shunt inductor is coupled in parallel to each of the stations to increase an amount of current to the station with a bowed wafer. Hence, station power becomes less sensitive to wafer bow to minimize wafer bowing.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
75.
SYSTEMS AND TECHNIQUES FOR OPTICAL MEASUREMENT OF THIN FILMS
Methods provided herein may include illuminating a region on a wafer within a semiconductor processing tool, the wafer having a layer of a material that is at least semi-transparent to light and has a measurable extinction coefficient, and the region being a first fraction of the wafer's surface, detecting light reflected off the material and off a surface underneath the material using one or more detectors and generating optical data corresponding to the detected light, generating a metric associated with a property of the material on the wafer by applying the optical data to a transfer function that relates the optical data to the metric associated with the property of the material on the wafer, determining an adjustment to one or more processing parameters for a processing module, and performing or modifying a processing operation in the processing module according to the adjusted one or more processing parameters.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
G01N 21/84 - Systems specially adapted for particular applications
76.
PRECURSORS FOR DEPOSITION OF MOLYBDENUM-CONTAINING FILMS
Molybdenum-containing films are deposited on semiconductor substrates using reactions of molybdenum-containing precursors in ALD and CVD processes. In some embodiments, the precursors can be used for deposition of molybdenum metal films with low levels of incorporation of carbon and nitrogen. In some embodiments, the films are deposited using fluorine-free precursors in a presence of exposed silicon-containing layers without using etch stop layers. The precursor, in some embodiments, is a compound that includes molybdenum, at least one halogen that forms a bond with molybdenum, and at least one organic ligand that includes an element selected from the group consisting of N, O, and S, that forms a bond with molybdenum. In another aspect, the precursor is a molybdenum compound with at least one sulfur-containing ligand, and preferably no molybdenum-carbon bonds.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/18 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the deposition of metallic material from metallo-organic compounds
77.
CARRIER RING DESIGNS FOR CONTROLLING DEPOSITION ON WAFER BEVEL/EDGE
Various carrier ring designs and configurations to control an amount of deposition at a wafer's front side and bevel edge are provided. The carrier ring designs can control the amount of deposition at various locations of the wafer while deposition is performed on the wafer's back side, with no deposition desired on the front side of the wafer. These locations include front side, edge, and back side of bevel; and front and back side of the wafer. Edge profiles of the carrier rings are designed to control flow of process gases, flow of front side purge gas, and plasma effects. In some designs, through holes are added to the carrier rings to control gas flows. The edge profiles and added features can reduce or eliminate deposition at the wafer's front side and bevel edge.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
Various embodiments herein relate to systems and methods for adaptive model training. In some embodiments, a computer program product for adaptive model training is provided, the computer program product comprising a non-transitory computer readable medium on which is provided computer-executable instructions for: receiving, from a plurality of process chambers, ex situ data associated with wafers fabricated using the process chambers and in situ measurements, wherein a first machine learning model is used to predict the ex situ data using the in situ measurements; calculating a metric indicating an error associated with the first machine learning model; determining whether to update the first machine learning model; and generating a second machine learning model using the ex situ data and the in situ measurements.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/66 - Testing or measuring during manufacture or treatment
Provided are deposition processes including deposition of a thin, protective Mo layer using a molybdenum chloride (MoClx) precursor. This may be followed by Mo deposition to fill the feature using a molybdenum oxyhalide (MoOyXz) precursor. The protective Mo layer enables Mo fill using an MoOyXz precursor without oxidation of the underlying surfaces. Also provided are in-situ clean processes in which a MoClx precursor is used to remove oxidation from underlying surfaces prior to deposition. Subsequent deposition using the MoClx precursor may deposit an initial layer and/or fill a feature.
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
80.
REAL-TIME CONTROL OF TEMPERATURE IN A PLASMA CHAMBER
Systems and methods for real-time control of temperature within a plasma chamber are described. One of the methods includes sensing a voltage in real time of a rail that is coupled to a voltage source. The voltage source supplies a voltage to multiple heater elements of the plasma chamber. The voltage that is sensed is used to adjust one or more duty cycles of corresponding one or more of the heater elements. The adjusted one or more duty cycles facilitate achieving and maintaining a temperature value within the plasma chamber over time.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
G05B 19/418 - Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control (DNC), flexible manufacturing systems (FMS), integrated manufacturing systems (IMS), computer integrated manufacturing (CIM)
81.
NON-ELASTOMERIC, NON-POLYMERIC, NON-METALLIC MEMBRANE VALVES FOR SEMICONDUCTOR PROCESSING EQUIPMENT
Non-elastomeric, non-polymeric, non-metallic membrane valves for use in high-vacuum applications are disclosed. Such valves are functional even when the fluid-control side of the valve is exposed to a sub-atmospheric pressure field which may generally act to collapse/seal traditional elastomeric membrane valves.
Examples are disclosed that relate to operating an electrodeposition system comprising an inert anode. In one example system, the electrodeposition system includes a substrate holder and a cathode chamber configured to hold a catholyte. An anode chamber configured to hold an anolyte during the electrodeposition process comprises an inert anode. An intermediate chamber is positioned between the cathode chamber and the anode chamber. The intermediate chamber is separated from the cathode chamber by an ion exchange membrane.
A clamping system for a substrate support includes a clamping assembly configured to clamp an edge ring to baseplate of the substrate support, a valve control assembly coupled to a compressed air source, and a valve assembly coupled between the valve control assembly and the clamping assembly. The valve assembly is coupled to the compressed air source and the valve control assembly, and the valve assembly separately receives compressed air as inputs from the compressed air source and the valve control assembly. The valve assembly is configured to selectively supply pressurized air from the compressed air source to the clamping assembly to clamp the edge ring to the baseplate in response to the inputs received from the valve control assembly.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
Provided are methods and structures for keeping the integrity of layers deposited on a semiconductor wafer through a thermal cycle. Deposition of a second backside layer, or a cap, with an internal stress opposite to a first backside layer may be used to reduce bow shift of a wafer during a thermal cycle. The first backside layer may have a tensile internal stress or a compressive internal stress. The second backside layer has an internal stress opposite to the first backside layer. Each of the backside layers may be deposited by a backside deposition apparatus.
An ElectroStatic Chuck (ESC) including a chucking surface having at least a portion covered with a coating of silicon oxide (SiO2), silicon nitride (Si3N4) or a combination of both. The coating can be applied in situ a processing chamber of a substrate processing tool and periodically removed and re-applied in situ to create fresh coating.
G03F 7/00 - Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
Provided are methods for keeping a semiconductor wafer chucked to an electrostatic chuck. The semiconductor wafer may have a conductive backside layer deposited on a backside of the wafer through backside deposition. The conductive layer may be able increase the electrostatic force between the wafer and the electrostatic chuck and to counteract internal stress the wafer may have due to frontside processing, keeping the wafer substantially flat.
H01L 21/302 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
A first edge ring for a substrate support is provided. The first edge ring includes an annular-shaped body and one or more lift pin receiving elements. The annular-shaped body is sized and shaped to surround an upper portion of the substrate support. The annular-shaped body defines an upper surface, a lower surface, a radially inner surface, and a radially outer surface. The one or more lift pin receiving elements are disposed along the lower surface of the annular-shaped body and sized and shaped to receive and provide kinematic coupling with top ends respectively of three or more lift pins.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
88.
SELECTIVE PROCESSING WITH ETCH RESIDUE-BASED INHIBITORS
Selective deposition of a sacrificial material on a semiconductor substrate, the substrate having a surface with a plurality of regions of substrate materials having different selectivities for the sacrificial material, may be conducted such that substantial deposition of the sacrificial material occurs on a first region of the substrate surface, and no substantial deposition occurs on a second region of the substrate surface. Deposition of a non-sacrificial material may then be conducted on the substrate, such that substantial deposition of the non-sacrificial material occurs on the second region and no substantial deposition of the non-sacrificial material occurs on the first region. The sacrificial material may then be removed such that net deposition of the non-sacrificial material occurs substantially only on the second region.
H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
C23C 16/04 - Coating on selected surface areas, e.g. using masks
C23C 16/06 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the deposition of metallic material
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges
C23C 16/52 - Controlling or regulating the coating process
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
89.
CONTROL OF METALLIC CONTAMINATION FROM METAL-CONTAINING PHOTORESIST
Various techniques for controlling metal-containing contamination on a semiconductor substrate are provided herein. Such techniques may involve one or more of a post-development bake treatment, a chemical treatment, a plasma treatment, a light treatment, and a backside and bevel edge clean. The techniques may be combined as desired for a particular application. In many cases, the techniques are used to address metal-containing contamination that is generated during a photoresist development operation.
G03F 7/40 - Treatment after imagewise removal, e.g. baking
G03F 7/00 - Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
G03F 7/36 - Imagewise removal not covered by groups , e.g. using gas streams, using plasma
09 - Scientific and electric apparatus and instruments
Goods & Services
Recorded computer software comprising a library of 3d models
and design tools for computer aided design of
micro-electro-mechanical systems (MEMS); recorded computer
software for designing and manufacturing semiconductors and
micro-electro-mechanical systems (MEMS); recorded computer
software for virtual prototyping of three-dimensional models
for the design of semiconductor devices; recorded computer
simulation software for modeling semiconductor
manufacturing; recorded computer simulation software for
modeling plasma; recorded virtual reality and augmented
reality software for the design, development, manufacture,
processing, and fabrication of semiconductor substrates or
devices; recorded virtual reality and augmented reality
software for the installation, operation, maintenance, and
repair of semiconductor manufacturing machines,
semiconductor substrates manufacturing machines,
semiconductor wafer processing machines; computer hardware
and recorded software systems for the installation,
operation, maintenance, and repair of semiconductor
manufacturing machines, semiconductor substrates
manufacturing machines, semiconductor wafer processing
machines; downloadable interactive multimedia computer
program for the installation, operation, maintenance, and
repair of semiconductor manufacturing machines,
semiconductor substrates manufacturing machines,
semiconductor wafer processing machines; electronic
components for semiconductor manufacturing machines,
substrate manufacturing machines, wafer processing machines,
wafer processing equipment; measurement apparatus and
instruments for use in semiconductor manufacturing,
semiconductor substrates manufacturing, and semiconductor
wafer processing.
Dry development or dry removal of metal-containing extreme ultraviolet radiation (EUV) photoresist is performed in atmospheric conditions or performed in process tools without vacuum equipment. Dry removal of the metal-containing EUV photoresist may be performed under atmospheric pressure or over-atmospheric pressure. Dry removal of the metal-containing EUV photoresist may be performed with exposure to an air environment or with non-oxidizing gases. A process chamber or module may be modified or integrated to perform dry removal of the metal-containing EUV photoresist with baking, wafer cleaning, wafer treatment, or other photoresist processing function. In some embodiments, the process chamber for dry removal of the metal-containing EUV photoresist includes a heating assembly for localized heating of a semiconductor substrate and a movable discharge nozzle for localized gas delivery above the semiconductor substrate.
G03F 7/00 - Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
92.
ELECTROSTATIC CHUCK FOR USE IN SEMICONDUCTOR PROCESSING
A semiconductor substrate processing apparatus includes a vacuum chamber having a processing zone in which a semiconductor substrate may be processed, a process gas source in fluid communication with the vacuum chamber for supplying a process gas into the vacuum chamber, a showerhead module through which process gas from the process gas source is supplied to the processing zone of the vacuum chamber, and a substrate pedestal module. The substrate pedestal module includes a pedestal made of ceramic material having an upper surface configured to support a semiconductor substrate thereon during processing, a stem made of ceramic material, and coplanar electrodes embedded in the platen, the electrodes including an outer RF electrode and inner electrostatic clamping electrodes, the outer RF electrode including a ring-shaped electrode and a radially extending lead extending from the ring-shaped electrode to a central portion of the platen, wherein the ceramic material of the platen and the electrodes comprise a unitary body made in a single sintering step.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
C23C 16/46 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for heating the substrate
C23C 16/509 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges using internal electrodes
C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
Semiconductor manufacturing machines; Semiconductor substrates manufacturing machines; Semiconductor wafer processing equipment; Semiconductor wafer processing machines; replacement parts and fittings for all of the aforementioned goods; Machine parts, namely, optical sensors sold as an integral part of semiconductor manufacturing machines; semiconductor manufacturing machine parts, namely, vacuum chambers embedded with optical sensors; machine parts, namely, monitoring sensors sold as an integral part of semiconductor manufacturing machines; replacement parts for semiconductor manufacturing machines, namely, optical sensors
Systems and methods for reverse pulsing are described. One of the methods includes receiving a digital signal having a first state and a second state. The method further includes generating a transformer coupled plasma (TCP) radio frequency (RF) pulsed signal having a high state when the digital signal is in the first state and having a low state when the digital signal is in the second state. The method includes providing the TCP RF pulsed signal to one or more coils of a plasma chamber, generating a bias RF pulsed signal having a low state when the digital signal is in the first state and having a high state when the digital signal is in the second state, and providing the bias RF pulsed signal to a chuck of the plasma chamber.
Thin tin oxide films can be used in semiconductor device manufacturing. In one implementation, a method of processing a semiconductor substrate includes: providing a semiconductor substrate having a plurality of protruding features residing on an etch stop layer material, and an exposed tin oxide layer in contact with both the protruding features and the etch stop layer material, where the tin oxide layer covers both sidewalls and horizontal surfaces of the protruding features; and then completely removing the tin oxide layer from horizontal surfaces of the semiconductor substrate without completely removing the tin oxide layer residing at the sidewalls of the protruding features. Next, the protruding features can be removed without completely removing the tin oxide layer that resided at the sidewalls of the protruding features, thereby forming tin oxide spacers.
H01L 21/033 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or comprising inorganic layers
H01L 21/3213 - Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
96.
PLASMA MONITORING AND PLASMA DENSITY MEASUREMENT IN PLASMA PROCESSING SYSTEMS
A plasma processing system includes a processing chamber including a substrate support. A plasma generator is configured to selectively generate plasma in the processing chamber to treat a substrate arranged on the substrate support. An emitter is configured to transmit first terahertz waves through the plasma in the processing chamber. A detector is configured to receive second terahertz waves corresponding to the first terahertz waves transmitted through the plasma in the processing chamber.
Various embodiments herein relate to methods and apparatus for etching a substrate. The substrate is typically a semiconductor substrate. In various implementations, the method involves receiving the substrate in a process chamber, the substrate including a carbon layer and a mask layer positioned over the carbon layer, where the mask layer is patterned to define where the feature will be etched in the carbon layer; and exposing the substrate to a plasma to etch the feature into the carbon layer of the substrate, wherein a composition of the plasma changes over time to provide at least a deposition step, a clear step, and an etch step, and wherein the deposition step, the clear step, and the etch step are cycled with one another until the feature reaches its final depth.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/033 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or comprising inorganic layers
H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
H01L 21/308 - Chemical or electrical treatment, e.g. electrolytic etching using masks
Provided herein are methods and related apparatus for depositing an ashable hard mask (AHM) on a substrate by providing a wide gap electrode spacing in low-pressure conditions. A wide gap electrode may facilitate control of parasitic plasmas in low-pressure conditions, thereby enabling formation of high selectivity, low stress, and low-hydrogen AHMs. The AHM may then be used to etch features into underlying layers of the substrate.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/308 - Chemical or electrical treatment, e.g. electrolytic etching using masks
C23C 16/50 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
Methods and apparatuses for an integration scheme for forming a fully aligned via using selective deposition of graphene on metal surfaces and selective deposition of an inhibitor layer on exposed barrier surfaces prior to depositing dielectric material are provided.
C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating using electric discharges using radio frequency discharges
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
A method for protecting a surface of a substrate during processing includes a) providing a solution forming a co-polymer having a ceiling temperature; b) dispensing the solution onto a surface of the substrate to form a sacrificial protective layer, wherein the co-polymer is kinetically trapped to allow storage at a temperature above the ceiling temperature; c) exposing the substrate to ambient conditions for a predetermined period; and d) de-polymerizing the sacrificial protective layer by using stimuli selected from a group consisting of ultraviolet (UV) light and heat.
